1 #ifndef P54PCI_H 2 #define P54PCI_H 3 #include <linux/interrupt.h> 4 5 /* 6 * Defines for PCI based mac80211 Prism54 driver 7 * 8 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 9 * 10 * Based on the islsm (softmac prism54) driver, which is: 11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 */ 17 18 /* Device Interrupt register bits */ 19 #define ISL38XX_DEV_INT_RESET 0x0001 20 #define ISL38XX_DEV_INT_UPDATE 0x0002 21 #define ISL38XX_DEV_INT_WAKEUP 0x0008 22 #define ISL38XX_DEV_INT_SLEEP 0x0010 23 #define ISL38XX_DEV_INT_ABORT 0x0020 24 /* these two only used in USB */ 25 #define ISL38XX_DEV_INT_DATA 0x0040 26 #define ISL38XX_DEV_INT_MGMT 0x0080 27 28 #define ISL38XX_DEV_INT_PCIUART_CTS 0x4000 29 #define ISL38XX_DEV_INT_PCIUART_DR 0x8000 30 31 /* Interrupt Identification/Acknowledge/Enable register bits */ 32 #define ISL38XX_INT_IDENT_UPDATE 0x0002 33 #define ISL38XX_INT_IDENT_INIT 0x0004 34 #define ISL38XX_INT_IDENT_WAKEUP 0x0008 35 #define ISL38XX_INT_IDENT_SLEEP 0x0010 36 #define ISL38XX_INT_IDENT_PCIUART_CTS 0x4000 37 #define ISL38XX_INT_IDENT_PCIUART_DR 0x8000 38 39 /* Control/Status register bits */ 40 #define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200 41 #define ISL38XX_CTRL_STAT_CLKRUN 0x00800000 42 #define ISL38XX_CTRL_STAT_RESET 0x10000000 43 #define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000 44 #define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000 45 #define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000 46 47 struct p54p_csr { 48 __le32 dev_int; 49 u8 unused_1[12]; 50 __le32 int_ident; 51 __le32 int_ack; 52 __le32 int_enable; 53 u8 unused_2[4]; 54 union { 55 __le32 ring_control_base; 56 __le32 gen_purp_com[2]; 57 }; 58 u8 unused_3[8]; 59 __le32 direct_mem_base; 60 u8 unused_4[44]; 61 __le32 dma_addr; 62 __le32 dma_len; 63 __le32 dma_ctrl; 64 u8 unused_5[12]; 65 __le32 ctrl_stat; 66 u8 unused_6[1924]; 67 u8 cardbus_cis[0x800]; 68 u8 direct_mem_win[0x1000]; 69 } __packed; 70 71 /* usb backend only needs the register defines above */ 72 #ifndef P54USB_H 73 struct p54p_desc { 74 __le32 host_addr; 75 __le32 device_addr; 76 __le16 len; 77 __le16 flags; 78 } __packed; 79 80 struct p54p_ring_control { 81 __le32 host_idx[4]; 82 __le32 device_idx[4]; 83 struct p54p_desc rx_data[8]; 84 struct p54p_desc tx_data[32]; 85 struct p54p_desc rx_mgmt[4]; 86 struct p54p_desc tx_mgmt[4]; 87 } __packed; 88 89 #define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) 90 #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) 91 92 struct p54p_priv { 93 struct p54_common common; 94 struct pci_dev *pdev; 95 struct p54p_csr __iomem *map; 96 struct tasklet_struct tasklet; 97 const struct firmware *firmware; 98 spinlock_t lock; 99 struct p54p_ring_control *ring_control; 100 dma_addr_t ring_control_dma; 101 u32 rx_idx_data, tx_idx_data; 102 u32 rx_idx_mgmt, tx_idx_mgmt; 103 struct sk_buff *rx_buf_data[8]; 104 struct sk_buff *rx_buf_mgmt[4]; 105 struct sk_buff *tx_buf_data[32]; 106 struct sk_buff *tx_buf_mgmt[4]; 107 struct completion boot_comp; 108 struct completion fw_loaded; 109 }; 110 111 #endif /* P54USB_H */ 112 #endif /* P54PCI_H */ 113