1 #ifndef HOSTAP_WLAN_H 2 #define HOSTAP_WLAN_H 3 4 #include <linux/interrupt.h> 5 #include <linux/wireless.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/mutex.h> 9 #include <linux/refcount.h> 10 #include <net/iw_handler.h> 11 #include <net/ieee80211_radiotap.h> 12 #include <net/lib80211.h> 13 14 #include "hostap_config.h" 15 #include "hostap_common.h" 16 17 #define MAX_PARM_DEVICES 8 18 #define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES) 19 #define DEF_INTS -1, -1, -1, -1, -1, -1, -1 20 #define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx] 21 22 23 /* Specific skb->protocol value that indicates that the packet already contains 24 * txdesc header. 25 * FIX: This might need own value that would be allocated especially for Prism2 26 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames". 27 * However, these skb's should have only minimal path in the kernel side since 28 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */ 29 #define ETH_P_HOSTAP ETH_P_CONTROL 30 31 /* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header 32 * (from linux-wlan-ng) */ 33 struct linux_wlan_ng_val { 34 u32 did; 35 u16 status, len; 36 u32 data; 37 } __packed; 38 39 struct linux_wlan_ng_prism_hdr { 40 u32 msgcode, msglen; 41 char devname[16]; 42 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, 43 noise, rate, istx, frmlen; 44 } __packed; 45 46 struct linux_wlan_ng_cap_hdr { 47 __be32 version; 48 __be32 length; 49 __be64 mactime; 50 __be64 hosttime; 51 __be32 phytype; 52 __be32 channel; 53 __be32 datarate; 54 __be32 antenna; 55 __be32 priority; 56 __be32 ssi_type; 57 __be32 ssi_signal; 58 __be32 ssi_noise; 59 __be32 preamble; 60 __be32 encoding; 61 } __packed; 62 63 struct hostap_radiotap_rx { 64 struct ieee80211_radiotap_header hdr; 65 __le64 tsft; 66 u8 rate; 67 u8 padding; 68 __le16 chan_freq; 69 __le16 chan_flags; 70 s8 dbm_antsignal; 71 s8 dbm_antnoise; 72 } __packed; 73 74 #define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ 75 #define LWNG_CAPHDR_VERSION 0x80211001 76 77 struct hfa384x_rx_frame { 78 /* HFA384X RX frame descriptor */ 79 __le16 status; /* HFA384X_RX_STATUS_ flags */ 80 __le32 time; /* timestamp, 1 microsecond resolution */ 81 u8 silence; /* 27 .. 154; seems to be 0 */ 82 u8 signal; /* 27 .. 154 */ 83 u8 rate; /* 10, 20, 55, or 110 */ 84 u8 rxflow; 85 __le32 reserved; 86 87 /* 802.11 */ 88 __le16 frame_control; 89 __le16 duration_id; 90 u8 addr1[ETH_ALEN]; 91 u8 addr2[ETH_ALEN]; 92 u8 addr3[ETH_ALEN]; 93 __le16 seq_ctrl; 94 u8 addr4[ETH_ALEN]; 95 __le16 data_len; 96 97 /* 802.3 */ 98 u8 dst_addr[ETH_ALEN]; 99 u8 src_addr[ETH_ALEN]; 100 __be16 len; 101 102 /* followed by frame data; max 2304 bytes */ 103 } __packed; 104 105 106 struct hfa384x_tx_frame { 107 /* HFA384X TX frame descriptor */ 108 __le16 status; /* HFA384X_TX_STATUS_ flags */ 109 __le16 reserved1; 110 __le16 reserved2; 111 __le32 sw_support; 112 u8 retry_count; /* not yet implemented */ 113 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */ 114 __le16 tx_control; /* HFA384X_TX_CTRL_ flags */ 115 116 /* 802.11 */ 117 __le16 frame_control; /* parts not used */ 118 __le16 duration_id; 119 u8 addr1[ETH_ALEN]; 120 u8 addr2[ETH_ALEN]; /* filled by firmware */ 121 u8 addr3[ETH_ALEN]; 122 __le16 seq_ctrl; /* filled by firmware */ 123 u8 addr4[ETH_ALEN]; 124 __le16 data_len; 125 126 /* 802.3 */ 127 u8 dst_addr[ETH_ALEN]; 128 u8 src_addr[ETH_ALEN]; 129 __be16 len; 130 131 /* followed by frame data; max 2304 bytes */ 132 } __packed; 133 134 135 struct hfa384x_rid_hdr 136 { 137 __le16 len; 138 __le16 rid; 139 } __packed; 140 141 142 /* Macro for converting signal levels (range 27 .. 154) to wireless ext 143 * dBm value with some accuracy */ 144 #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 145 146 #define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100 147 148 struct hfa384x_scan_request { 149 __le16 channel_list; 150 __le16 txrate; /* HFA384X_RATES_* */ 151 } __packed; 152 153 struct hfa384x_hostscan_request { 154 __le16 channel_list; 155 __le16 txrate; 156 __le16 target_ssid_len; 157 u8 target_ssid[32]; 158 } __packed; 159 160 struct hfa384x_join_request { 161 u8 bssid[ETH_ALEN]; 162 __le16 channel; 163 } __packed; 164 165 struct hfa384x_info_frame { 166 __le16 len; 167 __le16 type; 168 } __packed; 169 170 struct hfa384x_comm_tallies { 171 __le16 tx_unicast_frames; 172 __le16 tx_multicast_frames; 173 __le16 tx_fragments; 174 __le16 tx_unicast_octets; 175 __le16 tx_multicast_octets; 176 __le16 tx_deferred_transmissions; 177 __le16 tx_single_retry_frames; 178 __le16 tx_multiple_retry_frames; 179 __le16 tx_retry_limit_exceeded; 180 __le16 tx_discards; 181 __le16 rx_unicast_frames; 182 __le16 rx_multicast_frames; 183 __le16 rx_fragments; 184 __le16 rx_unicast_octets; 185 __le16 rx_multicast_octets; 186 __le16 rx_fcs_errors; 187 __le16 rx_discards_no_buffer; 188 __le16 tx_discards_wrong_sa; 189 __le16 rx_discards_wep_undecryptable; 190 __le16 rx_message_in_msg_fragments; 191 __le16 rx_message_in_bad_msg_fragments; 192 } __packed; 193 194 struct hfa384x_comm_tallies32 { 195 __le32 tx_unicast_frames; 196 __le32 tx_multicast_frames; 197 __le32 tx_fragments; 198 __le32 tx_unicast_octets; 199 __le32 tx_multicast_octets; 200 __le32 tx_deferred_transmissions; 201 __le32 tx_single_retry_frames; 202 __le32 tx_multiple_retry_frames; 203 __le32 tx_retry_limit_exceeded; 204 __le32 tx_discards; 205 __le32 rx_unicast_frames; 206 __le32 rx_multicast_frames; 207 __le32 rx_fragments; 208 __le32 rx_unicast_octets; 209 __le32 rx_multicast_octets; 210 __le32 rx_fcs_errors; 211 __le32 rx_discards_no_buffer; 212 __le32 tx_discards_wrong_sa; 213 __le32 rx_discards_wep_undecryptable; 214 __le32 rx_message_in_msg_fragments; 215 __le32 rx_message_in_bad_msg_fragments; 216 } __packed; 217 218 struct hfa384x_scan_result_hdr { 219 __le16 reserved; 220 __le16 scan_reason; 221 #define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */ 222 #define HFA384X_SCAN_HOST_INITIATED 1 223 #define HFA384X_SCAN_FIRMWARE_INITIATED 2 224 #define HFA384X_SCAN_INQUIRY_FROM_HOST 3 225 } __packed; 226 227 #define HFA384X_SCAN_MAX_RESULTS 32 228 229 struct hfa384x_scan_result { 230 __le16 chid; 231 __le16 anl; 232 __le16 sl; 233 u8 bssid[ETH_ALEN]; 234 __le16 beacon_interval; 235 __le16 capability; 236 __le16 ssid_len; 237 u8 ssid[32]; 238 u8 sup_rates[10]; 239 __le16 rate; 240 } __packed; 241 242 struct hfa384x_hostscan_result { 243 __le16 chid; 244 __le16 anl; 245 __le16 sl; 246 u8 bssid[ETH_ALEN]; 247 __le16 beacon_interval; 248 __le16 capability; 249 __le16 ssid_len; 250 u8 ssid[32]; 251 u8 sup_rates[10]; 252 __le16 rate; 253 __le16 atim; 254 } __packed; 255 256 struct comm_tallies_sums { 257 unsigned int tx_unicast_frames; 258 unsigned int tx_multicast_frames; 259 unsigned int tx_fragments; 260 unsigned int tx_unicast_octets; 261 unsigned int tx_multicast_octets; 262 unsigned int tx_deferred_transmissions; 263 unsigned int tx_single_retry_frames; 264 unsigned int tx_multiple_retry_frames; 265 unsigned int tx_retry_limit_exceeded; 266 unsigned int tx_discards; 267 unsigned int rx_unicast_frames; 268 unsigned int rx_multicast_frames; 269 unsigned int rx_fragments; 270 unsigned int rx_unicast_octets; 271 unsigned int rx_multicast_octets; 272 unsigned int rx_fcs_errors; 273 unsigned int rx_discards_no_buffer; 274 unsigned int tx_discards_wrong_sa; 275 unsigned int rx_discards_wep_undecryptable; 276 unsigned int rx_message_in_msg_fragments; 277 unsigned int rx_message_in_bad_msg_fragments; 278 }; 279 280 281 struct hfa384x_regs { 282 u16 cmd; 283 u16 evstat; 284 u16 offset0; 285 u16 offset1; 286 u16 swsupport0; 287 }; 288 289 290 #if defined(PRISM2_PCCARD) || defined(PRISM2_PLX) 291 /* I/O ports for HFA384X Controller access */ 292 #define HFA384X_CMD_OFF 0x00 293 #define HFA384X_PARAM0_OFF 0x02 294 #define HFA384X_PARAM1_OFF 0x04 295 #define HFA384X_PARAM2_OFF 0x06 296 #define HFA384X_STATUS_OFF 0x08 297 #define HFA384X_RESP0_OFF 0x0A 298 #define HFA384X_RESP1_OFF 0x0C 299 #define HFA384X_RESP2_OFF 0x0E 300 #define HFA384X_INFOFID_OFF 0x10 301 #define HFA384X_CONTROL_OFF 0x14 302 #define HFA384X_SELECT0_OFF 0x18 303 #define HFA384X_SELECT1_OFF 0x1A 304 #define HFA384X_OFFSET0_OFF 0x1C 305 #define HFA384X_OFFSET1_OFF 0x1E 306 #define HFA384X_RXFID_OFF 0x20 307 #define HFA384X_ALLOCFID_OFF 0x22 308 #define HFA384X_TXCOMPLFID_OFF 0x24 309 #define HFA384X_SWSUPPORT0_OFF 0x28 310 #define HFA384X_SWSUPPORT1_OFF 0x2A 311 #define HFA384X_SWSUPPORT2_OFF 0x2C 312 #define HFA384X_EVSTAT_OFF 0x30 313 #define HFA384X_INTEN_OFF 0x32 314 #define HFA384X_EVACK_OFF 0x34 315 #define HFA384X_DATA0_OFF 0x36 316 #define HFA384X_DATA1_OFF 0x38 317 #define HFA384X_AUXPAGE_OFF 0x3A 318 #define HFA384X_AUXOFFSET_OFF 0x3C 319 #define HFA384X_AUXDATA_OFF 0x3E 320 #endif /* PRISM2_PCCARD || PRISM2_PLX */ 321 322 #ifdef PRISM2_PCI 323 /* Memory addresses for ISL3874 controller access */ 324 #define HFA384X_CMD_OFF 0x00 325 #define HFA384X_PARAM0_OFF 0x04 326 #define HFA384X_PARAM1_OFF 0x08 327 #define HFA384X_PARAM2_OFF 0x0C 328 #define HFA384X_STATUS_OFF 0x10 329 #define HFA384X_RESP0_OFF 0x14 330 #define HFA384X_RESP1_OFF 0x18 331 #define HFA384X_RESP2_OFF 0x1C 332 #define HFA384X_INFOFID_OFF 0x20 333 #define HFA384X_CONTROL_OFF 0x28 334 #define HFA384X_SELECT0_OFF 0x30 335 #define HFA384X_SELECT1_OFF 0x34 336 #define HFA384X_OFFSET0_OFF 0x38 337 #define HFA384X_OFFSET1_OFF 0x3C 338 #define HFA384X_RXFID_OFF 0x40 339 #define HFA384X_ALLOCFID_OFF 0x44 340 #define HFA384X_TXCOMPLFID_OFF 0x48 341 #define HFA384X_PCICOR_OFF 0x4C 342 #define HFA384X_SWSUPPORT0_OFF 0x50 343 #define HFA384X_SWSUPPORT1_OFF 0x54 344 #define HFA384X_SWSUPPORT2_OFF 0x58 345 #define HFA384X_PCIHCR_OFF 0x5C 346 #define HFA384X_EVSTAT_OFF 0x60 347 #define HFA384X_INTEN_OFF 0x64 348 #define HFA384X_EVACK_OFF 0x68 349 #define HFA384X_DATA0_OFF 0x6C 350 #define HFA384X_DATA1_OFF 0x70 351 #define HFA384X_AUXPAGE_OFF 0x74 352 #define HFA384X_AUXOFFSET_OFF 0x78 353 #define HFA384X_AUXDATA_OFF 0x7C 354 #define HFA384X_PCI_M0_ADDRH_OFF 0x80 355 #define HFA384X_PCI_M0_ADDRL_OFF 0x84 356 #define HFA384X_PCI_M0_LEN_OFF 0x88 357 #define HFA384X_PCI_M0_CTL_OFF 0x8C 358 #define HFA384X_PCI_STATUS_OFF 0x98 359 #define HFA384X_PCI_M1_ADDRH_OFF 0xA0 360 #define HFA384X_PCI_M1_ADDRL_OFF 0xA4 361 #define HFA384X_PCI_M1_LEN_OFF 0xA8 362 #define HFA384X_PCI_M1_CTL_OFF 0xAC 363 364 /* PCI bus master control bits (these are undocumented; based on guessing and 365 * experimenting..) */ 366 #define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0)) 367 #define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0)) 368 369 #endif /* PRISM2_PCI */ 370 371 372 /* Command codes for CMD reg. */ 373 #define HFA384X_CMDCODE_INIT 0x00 374 #define HFA384X_CMDCODE_ENABLE 0x01 375 #define HFA384X_CMDCODE_DISABLE 0x02 376 #define HFA384X_CMDCODE_ALLOC 0x0A 377 #define HFA384X_CMDCODE_TRANSMIT 0x0B 378 #define HFA384X_CMDCODE_INQUIRE 0x11 379 #define HFA384X_CMDCODE_ACCESS 0x21 380 #define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8)) 381 #define HFA384X_CMDCODE_DOWNLOAD 0x22 382 #define HFA384X_CMDCODE_READMIF 0x30 383 #define HFA384X_CMDCODE_WRITEMIF 0x31 384 #define HFA384X_CMDCODE_TEST 0x38 385 386 #define HFA384X_CMDCODE_MASK 0x3F 387 388 /* Test mode operations */ 389 #define HFA384X_TEST_CHANGE_CHANNEL 0x08 390 #define HFA384X_TEST_MONITOR 0x0B 391 #define HFA384X_TEST_STOP 0x0F 392 #define HFA384X_TEST_CFG_BITS 0x15 393 #define HFA384X_TEST_CFG_BIT_ALC BIT(3) 394 395 #define HFA384X_CMD_BUSY BIT(15) 396 397 #define HFA384X_CMD_TX_RECLAIM BIT(8) 398 399 #define HFA384X_OFFSET_ERR BIT(14) 400 #define HFA384X_OFFSET_BUSY BIT(15) 401 402 403 /* ProgMode for download command */ 404 #define HFA384X_PROGMODE_DISABLE 0 405 #define HFA384X_PROGMODE_ENABLE_VOLATILE 1 406 #define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2 407 #define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3 408 409 #define HFA384X_AUX_MAGIC0 0xfe01 410 #define HFA384X_AUX_MAGIC1 0xdc23 411 #define HFA384X_AUX_MAGIC2 0xba45 412 413 #define HFA384X_AUX_PORT_DISABLED 0 414 #define HFA384X_AUX_PORT_DISABLE BIT(14) 415 #define HFA384X_AUX_PORT_ENABLE BIT(15) 416 #define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15)) 417 #define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15)) 418 419 #define PRISM2_PDA_SIZE 1024 420 421 422 /* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */ 423 #define HFA384X_EV_TICK BIT(15) 424 #define HFA384X_EV_WTERR BIT(14) 425 #define HFA384X_EV_INFDROP BIT(13) 426 #ifdef PRISM2_PCI 427 #define HFA384X_EV_PCI_M1 BIT(9) 428 #define HFA384X_EV_PCI_M0 BIT(8) 429 #endif /* PRISM2_PCI */ 430 #define HFA384X_EV_INFO BIT(7) 431 #define HFA384X_EV_DTIM BIT(5) 432 #define HFA384X_EV_CMD BIT(4) 433 #define HFA384X_EV_ALLOC BIT(3) 434 #define HFA384X_EV_TXEXC BIT(2) 435 #define HFA384X_EV_TX BIT(1) 436 #define HFA384X_EV_RX BIT(0) 437 438 439 /* HFA384X Information frames */ 440 #define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */ 441 #define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */ 442 #define HFA384X_INFO_COMMTALLIES 0xF100 443 #define HFA384X_INFO_SCANRESULTS 0xF101 444 #define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */ 445 #define HFA384X_INFO_HOSTSCANRESULTS 0xF103 446 #define HFA384X_INFO_LINKSTATUS 0xF200 447 #define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */ 448 #define HFA384X_INFO_AUTHREQ 0xF202 /* ? */ 449 #define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */ 450 #define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */ 451 452 enum { HFA384X_LINKSTATUS_CONNECTED = 1, 453 HFA384X_LINKSTATUS_DISCONNECTED = 2, 454 HFA384X_LINKSTATUS_AP_CHANGE = 3, 455 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4, 456 HFA384X_LINKSTATUS_AP_IN_RANGE = 5, 457 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 }; 458 459 enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2, 460 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0, 461 HFA384X_PORTTYPE_HOSTAP = 6 }; 462 463 #define HFA384X_RATES_1MBPS BIT(0) 464 #define HFA384X_RATES_2MBPS BIT(1) 465 #define HFA384X_RATES_5MBPS BIT(2) 466 #define HFA384X_RATES_11MBPS BIT(3) 467 468 #define HFA384X_ROAMING_FIRMWARE 1 469 #define HFA384X_ROAMING_HOST 2 470 #define HFA384X_ROAMING_DISABLED 3 471 472 #define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0) 473 #define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1) 474 #define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4) 475 #define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7) 476 477 #define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13)) 478 #define HFA384X_RX_STATUS_PCF BIT(12) 479 #define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8)) 480 #define HFA384X_RX_STATUS_UNDECR BIT(1) 481 #define HFA384X_RX_STATUS_FCSERR BIT(0) 482 483 #define HFA384X_RX_STATUS_GET_MSGTYPE(s) \ 484 (((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13) 485 #define HFA384X_RX_STATUS_GET_MACPORT(s) \ 486 (((s) & HFA384X_RX_STATUS_MACPORT) >> 8) 487 488 enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1, 489 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 }; 490 491 492 #define HFA384X_TX_CTRL_ALT_RTRY BIT(5) 493 #define HFA384X_TX_CTRL_802_11 BIT(3) 494 #define HFA384X_TX_CTRL_802_3 0 495 #define HFA384X_TX_CTRL_TX_EX BIT(2) 496 #define HFA384X_TX_CTRL_TX_OK BIT(1) 497 498 #define HFA384X_TX_STATUS_RETRYERR BIT(0) 499 #define HFA384X_TX_STATUS_AGEDERR BIT(1) 500 #define HFA384X_TX_STATUS_DISCON BIT(2) 501 #define HFA384X_TX_STATUS_FORMERR BIT(3) 502 503 /* HFA3861/3863 (BBP) Control Registers */ 504 #define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */ 505 #define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */ 506 #define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */ 507 #define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */ 508 #define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */ 509 510 511 #ifdef __KERNEL__ 512 513 #define PRISM2_TXFID_COUNT 8 514 #define PRISM2_DATA_MAXLEN 2304 515 #define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame)) 516 #define PRISM2_TXFID_EMPTY 0xffff 517 #define PRISM2_TXFID_RESERVED 0xfffe 518 #define PRISM2_DUMMY_FID 0xffff 519 #define MAX_SSID_LEN 32 520 #define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */ 521 522 #define PRISM2_DUMP_RX_HDR BIT(0) 523 #define PRISM2_DUMP_TX_HDR BIT(1) 524 #define PRISM2_DUMP_TXEXC_HDR BIT(2) 525 526 struct hostap_tx_callback_info { 527 u16 idx; 528 void (*func)(struct sk_buff *, int ok, void *); 529 void *data; 530 struct hostap_tx_callback_info *next; 531 }; 532 533 534 /* IEEE 802.11 requires that STA supports concurrent reception of at least 535 * three fragmented frames. This define can be increased to support more 536 * concurrent frames, but it should be noted that each entry can consume about 537 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ 538 #define PRISM2_FRAG_CACHE_LEN 4 539 540 struct prism2_frag_entry { 541 unsigned long first_frag_time; 542 unsigned int seq; 543 unsigned int last_frag; 544 struct sk_buff *skb; 545 u8 src_addr[ETH_ALEN]; 546 u8 dst_addr[ETH_ALEN]; 547 }; 548 549 550 struct hostap_cmd_queue { 551 struct list_head list; 552 wait_queue_head_t compl; 553 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type; 554 void (*callback)(struct net_device *dev, long context, u16 resp0, 555 u16 res); 556 long context; 557 u16 cmd, param0, param1; 558 u16 resp0, res; 559 volatile int issued, issuing; 560 561 refcount_t usecnt; 562 int del_req; 563 }; 564 565 /* options for hw_shutdown */ 566 #define HOSTAP_HW_NO_DISABLE BIT(0) 567 #define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1) 568 569 typedef struct local_info local_info_t; 570 571 struct prism2_helper_functions { 572 /* these functions are defined in hardware model specific files 573 * (hostap_{cs,plx,pci}.c */ 574 int (*card_present)(local_info_t *local); 575 void (*cor_sreset)(local_info_t *local); 576 void (*genesis_reset)(local_info_t *local, int hcr); 577 578 /* the following functions are from hostap_hw.c, but they may have some 579 * hardware model specific code */ 580 581 /* FIX: low-level commands like cmd might disappear at some point to 582 * make it easier to change them if needed (e.g., cmd would be replaced 583 * with write_mif/read_mif/testcmd/inquire); at least get_rid and 584 * set_rid might move to hostap_{cs,plx,pci}.c */ 585 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1, 586 u16 *resp0); 587 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs); 588 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len, 589 int exact_len); 590 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len); 591 int (*hw_enable)(struct net_device *dev, int initial); 592 int (*hw_config)(struct net_device *dev, int initial); 593 void (*hw_reset)(struct net_device *dev); 594 void (*hw_shutdown)(struct net_device *dev, int no_disable); 595 int (*reset_port)(struct net_device *dev); 596 void (*schedule_reset)(local_info_t *local); 597 int (*download)(local_info_t *local, 598 struct prism2_download_param *param); 599 int (*tx)(struct sk_buff *skb, struct net_device *dev); 600 int (*set_tim)(struct net_device *dev, int aid, int set); 601 const struct file_operations *read_aux_fops; 602 603 int need_tx_headroom; /* number of bytes of headroom needed before 604 * IEEE 802.11 header */ 605 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type; 606 }; 607 608 609 struct prism2_download_data { 610 u32 dl_cmd; 611 u32 start_addr; 612 u32 num_areas; 613 struct prism2_download_data_area { 614 u32 addr; /* wlan card address */ 615 u32 len; 616 u8 *data; /* allocated data */ 617 } data[0]; 618 }; 619 620 621 #define HOSTAP_MAX_BSS_COUNT 64 622 #define MAX_WPA_IE_LEN 64 623 624 struct hostap_bss_info { 625 struct list_head list; 626 unsigned long last_update; 627 unsigned int count; 628 u8 bssid[ETH_ALEN]; 629 u16 capab_info; 630 u8 ssid[32]; 631 size_t ssid_len; 632 u8 wpa_ie[MAX_WPA_IE_LEN]; 633 size_t wpa_ie_len; 634 u8 rsn_ie[MAX_WPA_IE_LEN]; 635 size_t rsn_ie_len; 636 int chan; 637 int included; 638 }; 639 640 641 /* Per radio private Host AP data - shared by all net devices interfaces used 642 * by each radio (wlan#, wlan#ap, wlan#sta, WDS). 643 * ((struct hostap_interface *) netdev_priv(dev))->local points to this 644 * structure. */ 645 struct local_info { 646 struct module *hw_module; 647 int card_idx; 648 int dev_enabled; 649 int master_dev_auto_open; /* was master device opened automatically */ 650 int num_dev_open; /* number of open devices */ 651 struct net_device *dev; /* master radio device */ 652 struct net_device *ddev; /* main data device */ 653 struct list_head hostap_interfaces; /* Host AP interface list (contains 654 * struct hostap_interface entries) 655 */ 656 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock 657 * when removing entries from the list. 658 * TX and RX paths can use read lock. */ 659 spinlock_t cmdlock, baplock, lock, irq_init_lock; 660 struct mutex rid_bap_mtx; 661 u16 infofid; /* MAC buffer id for info frame */ 662 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by 663 * txfidlock */ 664 spinlock_t txfidlock; 665 int txfid_len; /* length of allocated TX buffers */ 666 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */ 667 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if 668 * corresponding txfid is free for next TX frame */ 669 u16 intransmitfid[PRISM2_TXFID_COUNT]; 670 int next_txfid; /* index to the next txfid to be checked for 671 * availability */ 672 int next_alloc; /* index to the next intransmitfid to be checked for 673 * allocation events */ 674 675 /* bitfield for atomic bitops */ 676 #define HOSTAP_BITS_TRANSMIT 0 677 #define HOSTAP_BITS_BAP_TASKLET 1 678 #define HOSTAP_BITS_BAP_TASKLET2 2 679 unsigned long bits; 680 681 struct ap_data *ap; 682 683 char essid[MAX_SSID_LEN + 1]; 684 char name[MAX_NAME_LEN + 1]; 685 int name_set; 686 u16 channel_mask; /* mask of allowed channels */ 687 u16 scan_channel_mask; /* mask of channels to be scanned */ 688 struct comm_tallies_sums comm_tallies; 689 struct proc_dir_entry *proc; 690 int iw_mode; /* operating mode (IW_MODE_*) */ 691 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS 692 * 1: IW_MODE_ADHOC is "pseudo IBSS" */ 693 char bssid[ETH_ALEN]; 694 int channel; 695 int beacon_int; 696 int dtim_period; 697 int mtu; 698 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */ 699 int fw_tx_rate_control; 700 u16 tx_rate_control; 701 u16 basic_rates; 702 int hw_resetting; 703 int hw_ready; 704 int hw_reset_tries; /* how many times reset has been tried */ 705 int hw_downloading; 706 int shutdown; 707 int pri_only; 708 int no_pri; /* no PRI f/w present */ 709 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */ 710 711 enum { 712 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF, 713 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN 714 } txpower_type; 715 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */ 716 717 /* command queue for hfa384x_cmd(); protected with cmdlock */ 718 struct list_head cmd_queue; 719 /* max_len for cmd_queue; in addition, cmd_callback can use two 720 * additional entries to prevent sleeping commands from stopping 721 * transmits */ 722 #define HOSTAP_CMD_QUEUE_MAX_LEN 16 723 int cmd_queue_len; /* number of entries in cmd_queue */ 724 725 /* if card timeout is detected in interrupt context, reset_queue is 726 * used to schedule card reseting to be done in user context */ 727 struct work_struct reset_queue; 728 729 /* For scheduling a change of the promiscuous mode RID */ 730 int is_promisc; 731 struct work_struct set_multicast_list_queue; 732 733 struct work_struct set_tim_queue; 734 struct list_head set_tim_list; 735 spinlock_t set_tim_lock; 736 737 int wds_max_connections; 738 int wds_connections; 739 #define HOSTAP_WDS_BROADCAST_RA BIT(0) 740 #define HOSTAP_WDS_AP_CLIENT BIT(1) 741 #define HOSTAP_WDS_STANDARD_FRAME BIT(2) 742 u32 wds_type; 743 u16 tx_control; /* flags to be used in TX description */ 744 int manual_retry_count; /* -1 = use f/w default; otherwise retry count 745 * to be used with all frames */ 746 747 struct iw_statistics wstats; 748 unsigned long scan_timestamp; /* Time started to scan */ 749 enum { 750 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1, 751 PRISM2_MONITOR_CAPHDR = 2, PRISM2_MONITOR_RADIOTAP = 3 752 } monitor_type; 753 int monitor_allow_fcserr; 754 755 int hostapd; /* whether user space daemon, hostapd, is used for AP 756 * management */ 757 int hostapd_sta; /* whether hostapd is used with an extra STA interface 758 */ 759 struct net_device *apdev; 760 struct net_device_stats apdevstats; 761 762 char assoc_ap_addr[ETH_ALEN]; 763 struct net_device *stadev; 764 struct net_device_stats stadevstats; 765 766 #define WEP_KEYS 4 767 #define WEP_KEY_LEN 13 768 struct lib80211_crypt_info crypt_info; 769 770 int open_wep; /* allow unencrypted frames */ 771 int host_encrypt; 772 int host_decrypt; 773 int privacy_invoked; /* force privacy invoked flag even if no keys are 774 * configured */ 775 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working 776 * in Host AP mode (STA f/w 1.4.9 or newer) */ 777 int bcrx_sta_key; /* use individual keys to override default keys even 778 * with RX of broad/multicast frames */ 779 780 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN]; 781 unsigned int frag_next_idx; 782 783 int ieee_802_1x; /* is IEEE 802.1X used */ 784 785 int antsel_tx, antsel_rx; 786 int rts_threshold; /* dot11RTSThreshold */ 787 int fragm_threshold; /* dot11FragmentationThreshold */ 788 int auth_algs; /* PRISM2_AUTH_ flags */ 789 790 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */ 791 int tallies32; /* 32-bit tallies in use */ 792 793 struct prism2_helper_functions *func; 794 795 u8 *pda; 796 int fw_ap; 797 #define PRISM2_FW_VER(major, minor, variant) \ 798 (((major) << 16) | ((minor) << 8) | variant) 799 u32 sta_fw_ver; 800 801 /* Tasklets for handling hardware IRQ related operations outside hw IRQ 802 * handler */ 803 struct tasklet_struct bap_tasklet; 804 805 struct tasklet_struct info_tasklet; 806 struct sk_buff_head info_list; /* info frames as skb's for 807 * info_tasklet */ 808 809 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks 810 */ 811 812 struct tasklet_struct rx_tasklet; 813 struct sk_buff_head rx_list; 814 815 struct tasklet_struct sta_tx_exc_tasklet; 816 struct sk_buff_head sta_tx_exc_list; 817 818 int host_roaming; 819 unsigned long last_join_time; /* time of last JoinRequest */ 820 struct hfa384x_hostscan_result *last_scan_results; 821 int last_scan_results_count; 822 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type; 823 struct work_struct info_queue; 824 unsigned long pending_info; /* bit field of pending info_queue items */ 825 #define PRISM2_INFO_PENDING_LINKSTATUS 0 826 #define PRISM2_INFO_PENDING_SCANRESULTS 1 827 int prev_link_status; /* previous received LinkStatus info */ 828 int prev_linkstatus_connected; 829 u8 preferred_ap[ETH_ALEN]; /* use this AP if possible */ 830 831 #ifdef PRISM2_CALLBACK 832 void *callback_data; /* Can be used in callbacks; e.g., allocate 833 * on enable event and free on disable event. 834 * Host AP driver code does not touch this. */ 835 #endif /* PRISM2_CALLBACK */ 836 837 wait_queue_head_t hostscan_wq; 838 839 /* Passive scan in Host AP mode */ 840 struct timer_list passive_scan_timer; 841 int passive_scan_interval; /* in seconds, 0 = disabled */ 842 int passive_scan_channel; 843 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state; 844 845 struct timer_list tick_timer; 846 unsigned long last_tick_timer; 847 unsigned int sw_tick_stuck; 848 849 /* commsQuality / dBmCommsQuality data from periodic polling; only 850 * valid for Managed and Ad-hoc modes */ 851 unsigned long last_comms_qual_update; 852 int comms_qual; /* in some odd unit.. */ 853 int avg_signal; /* in dB (note: negative) */ 854 int avg_noise; /* in dB (note: negative) */ 855 struct work_struct comms_qual_update; 856 857 /* RSSI to dBm adjustment (for RX descriptor fields) */ 858 int rssi_to_dBm; /* subtract from RSSI to get approximate dBm value */ 859 860 /* BSS list / protected by local->lock */ 861 struct list_head bss_list; 862 int num_bss_info; 863 int wpa; /* WPA support enabled */ 864 int tkip_countermeasures; 865 int drop_unencrypted; 866 /* Generic IEEE 802.11 info element to be added to 867 * ProbeResp/Beacon/(Re)AssocReq */ 868 u8 *generic_elem; 869 size_t generic_elem_len; 870 871 #ifdef PRISM2_DOWNLOAD_SUPPORT 872 /* Persistent volatile download data */ 873 struct prism2_download_data *dl_pri; 874 struct prism2_download_data *dl_sec; 875 #endif /* PRISM2_DOWNLOAD_SUPPORT */ 876 877 #ifdef PRISM2_IO_DEBUG 878 #define PRISM2_IO_DEBUG_SIZE 10000 879 u32 io_debug[PRISM2_IO_DEBUG_SIZE]; 880 int io_debug_head; 881 int io_debug_enabled; 882 #endif /* PRISM2_IO_DEBUG */ 883 884 /* Pointer to hardware model specific (cs,pci,plx) private data. */ 885 void *hw_priv; 886 }; 887 888 889 /* Per interface private Host AP data 890 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta, 891 * WDS) and netdev_priv(dev) points to this structure. */ 892 struct hostap_interface { 893 struct list_head list; /* list entry in Host AP interface list */ 894 struct net_device *dev; /* pointer to this device */ 895 struct local_info *local; /* pointer to shared private data */ 896 struct net_device_stats stats; 897 struct iw_spy_data spy_data; /* iwspy support */ 898 struct iw_public_data wireless_data; 899 900 enum { 901 HOSTAP_INTERFACE_MASTER, 902 HOSTAP_INTERFACE_MAIN, 903 HOSTAP_INTERFACE_AP, 904 HOSTAP_INTERFACE_STA, 905 HOSTAP_INTERFACE_WDS, 906 } type; 907 908 union { 909 struct hostap_interface_wds { 910 u8 remote_addr[ETH_ALEN]; 911 } wds; 912 } u; 913 }; 914 915 916 #define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2 917 918 /* 919 * TX meta data - stored in skb->cb buffer, so this must not be increased over 920 * the 48-byte limit. 921 * THE PADDING THIS STARTS WITH IS A HORRIBLE HACK THAT SHOULD NOT LIVE 922 * TO SEE THE DAY. 923 */ 924 struct hostap_skb_tx_data { 925 unsigned int __padding_for_default_qdiscs; 926 u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */ 927 u8 rate; /* transmit rate */ 928 #define HOSTAP_TX_FLAGS_WDS BIT(0) 929 #define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1) 930 #define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2) 931 u8 flags; /* HOSTAP_TX_FLAGS_* */ 932 u16 tx_cb_idx; 933 struct hostap_interface *iface; 934 unsigned long jiffies; /* queueing timestamp */ 935 unsigned short ethertype; 936 }; 937 938 939 #ifndef PRISM2_NO_DEBUG 940 941 #define DEBUG_FID BIT(0) 942 #define DEBUG_PS BIT(1) 943 #define DEBUG_FLOW BIT(2) 944 #define DEBUG_AP BIT(3) 945 #define DEBUG_HW BIT(4) 946 #define DEBUG_EXTRA BIT(5) 947 #define DEBUG_EXTRA2 BIT(6) 948 #define DEBUG_PS2 BIT(7) 949 #define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA) 950 #define PDEBUG(n, args...) \ 951 do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0) 952 #define PDEBUG2(n, args...) \ 953 do { if ((n) & DEBUG_MASK) printk(args); } while (0) 954 955 #else /* PRISM2_NO_DEBUG */ 956 957 #define PDEBUG(n, args...) 958 #define PDEBUG2(n, args...) 959 960 #endif /* PRISM2_NO_DEBUG */ 961 962 enum { BAP0 = 0, BAP1 = 1 }; 963 964 #define PRISM2_IO_DEBUG_CMD_INB 0 965 #define PRISM2_IO_DEBUG_CMD_INW 1 966 #define PRISM2_IO_DEBUG_CMD_INSW 2 967 #define PRISM2_IO_DEBUG_CMD_OUTB 3 968 #define PRISM2_IO_DEBUG_CMD_OUTW 4 969 #define PRISM2_IO_DEBUG_CMD_OUTSW 5 970 #define PRISM2_IO_DEBUG_CMD_ERROR 6 971 #define PRISM2_IO_DEBUG_CMD_INTERRUPT 7 972 973 #ifdef PRISM2_IO_DEBUG 974 975 #define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \ 976 (((cmd) << 24) | ((reg) << 16) | value) 977 978 static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 979 int reg, int value) 980 { 981 struct hostap_interface *iface = netdev_priv(dev); 982 local_info_t *local = iface->local; 983 984 if (!local->io_debug_enabled) 985 return; 986 987 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff; 988 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 989 local->io_debug_head = 0; 990 local->io_debug[local->io_debug_head] = 991 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value); 992 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 993 local->io_debug_head = 0; 994 } 995 996 997 static inline void prism2_io_debug_error(struct net_device *dev, int err) 998 { 999 struct hostap_interface *iface = netdev_priv(dev); 1000 local_info_t *local = iface->local; 1001 unsigned long flags; 1002 1003 if (!local->io_debug_enabled) 1004 return; 1005 1006 spin_lock_irqsave(&local->lock, flags); 1007 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err); 1008 if (local->io_debug_enabled == 1) { 1009 local->io_debug_enabled = 0; 1010 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name); 1011 } 1012 spin_unlock_irqrestore(&local->lock, flags); 1013 } 1014 1015 #else /* PRISM2_IO_DEBUG */ 1016 1017 static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 1018 int reg, int value) 1019 { 1020 } 1021 1022 static inline void prism2_io_debug_error(struct net_device *dev, int err) 1023 { 1024 } 1025 1026 #endif /* PRISM2_IO_DEBUG */ 1027 1028 1029 #ifdef PRISM2_CALLBACK 1030 enum { 1031 /* Called when card is enabled */ 1032 PRISM2_CALLBACK_ENABLE, 1033 1034 /* Called when card is disabled */ 1035 PRISM2_CALLBACK_DISABLE, 1036 1037 /* Called when RX/TX starts/ends */ 1038 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END, 1039 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END 1040 }; 1041 void prism2_callback(local_info_t *local, int event); 1042 #else /* PRISM2_CALLBACK */ 1043 #define prism2_callback(d, e) do { } while (0) 1044 #endif /* PRISM2_CALLBACK */ 1045 1046 #endif /* __KERNEL__ */ 1047 1048 #endif /* HOSTAP_WLAN_H */ 1049