1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2017 Intel Deutschland GmbH
4  * Copyright (C) 2018-2020 Intel Corporation
5  */
6 #include "iwl-trans.h"
7 #include "iwl-prph.h"
8 #include "iwl-context-info.h"
9 #include "iwl-context-info-gen3.h"
10 #include "internal.h"
11 #include "fw/dbg.h"
12 
13 /*
14  * Start up NIC's basic functionality after it has been reset
15  * (e.g. after platform boot, or shutdown via iwl_pcie_apm_stop())
16  * NOTE:  This does not load uCode nor start the embedded processor
17  */
18 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
19 {
20 	int ret = 0;
21 
22 	IWL_DEBUG_INFO(trans, "Init card's basic functions\n");
23 
24 	/*
25 	 * Use "set_bit" below rather than "write", to preserve any hardware
26 	 * bits already set by default after reset.
27 	 */
28 
29 	/*
30 	 * Disable L0s without affecting L1;
31 	 * don't wait for ICH L0s (ICH bug W/A)
32 	 */
33 	iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,
34 		    CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
35 
36 	/* Set FH wait threshold to maximum (HW error during stress W/A) */
37 	iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
38 
39 	/*
40 	 * Enable HAP INTA (interrupt from management bus) to
41 	 * wake device's PCI Express link L1a -> L0s
42 	 */
43 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
44 		    CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
45 
46 	iwl_pcie_apm_config(trans);
47 
48 	ret = iwl_finish_nic_init(trans, trans->trans_cfg);
49 	if (ret)
50 		return ret;
51 
52 	set_bit(STATUS_DEVICE_ENABLED, &trans->status);
53 
54 	return 0;
55 }
56 
57 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
58 {
59 	IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n");
60 
61 	if (op_mode_leave) {
62 		if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status))
63 			iwl_pcie_gen2_apm_init(trans);
64 
65 		/* inform ME that we are leaving */
66 		iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
67 			    CSR_RESET_LINK_PWR_MGMT_DISABLED);
68 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
69 			    CSR_HW_IF_CONFIG_REG_PREPARE |
70 			    CSR_HW_IF_CONFIG_REG_ENABLE_PME);
71 		mdelay(1);
72 		iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
73 			      CSR_RESET_LINK_PWR_MGMT_DISABLED);
74 		mdelay(5);
75 	}
76 
77 	clear_bit(STATUS_DEVICE_ENABLED, &trans->status);
78 
79 	/* Stop device's DMA activity */
80 	iwl_pcie_apm_stop_master(trans);
81 
82 	iwl_trans_sw_reset(trans);
83 
84 	/*
85 	 * Clear "initialization complete" bit to move adapter from
86 	 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
87 	 */
88 	iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
89 }
90 
91 static void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans)
92 {
93 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
94 	int ret;
95 
96 	trans_pcie->fw_reset_done = false;
97 
98 	if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
99 		iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
100 				    UREG_NIC_SET_NMI_DRIVER_RESET_HANDSHAKE);
101 	else
102 		iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
103 				    UREG_DOORBELL_TO_ISR6_RESET_HANDSHAKE);
104 
105 	/* wait 200ms */
106 	ret = wait_event_timeout(trans_pcie->fw_reset_waitq,
107 				 trans_pcie->fw_reset_done, HZ / 5);
108 	if (!ret)
109 		IWL_ERR(trans,
110 			"firmware didn't ACK the reset - continue anyway\n");
111 }
112 
113 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
114 {
115 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
116 
117 	lockdep_assert_held(&trans_pcie->mutex);
118 
119 	if (trans_pcie->is_down)
120 		return;
121 
122 	if (trans_pcie->fw_reset_handshake &&
123 	    trans->state >= IWL_TRANS_FW_STARTED)
124 		iwl_trans_pcie_fw_reset_handshake(trans);
125 
126 	trans_pcie->is_down = true;
127 
128 	/* tell the device to stop sending interrupts */
129 	iwl_disable_interrupts(trans);
130 
131 	/* device going down, Stop using ICT table */
132 	iwl_pcie_disable_ict(trans);
133 
134 	/*
135 	 * If a HW restart happens during firmware loading,
136 	 * then the firmware loading might call this function
137 	 * and later it might be called again due to the
138 	 * restart. So don't process again if the device is
139 	 * already dead.
140 	 */
141 	if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
142 		IWL_DEBUG_INFO(trans,
143 			       "DEVICE_ENABLED bit was set and is now cleared\n");
144 		iwl_txq_gen2_tx_stop(trans);
145 		iwl_pcie_rx_stop(trans);
146 	}
147 
148 	iwl_pcie_ctxt_info_free_paging(trans);
149 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
150 		iwl_pcie_ctxt_info_gen3_free(trans);
151 	else
152 		iwl_pcie_ctxt_info_free(trans);
153 
154 	/* Make sure (redundant) we've released our request to stay awake */
155 	iwl_clear_bit(trans, CSR_GP_CNTRL,
156 		      CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
157 
158 	/* Stop the device, and put it in low power state */
159 	iwl_pcie_gen2_apm_stop(trans, false);
160 
161 	iwl_trans_sw_reset(trans);
162 
163 	/*
164 	 * Upon stop, the IVAR table gets erased, so msi-x won't
165 	 * work. This causes a bug in RF-KILL flows, since the interrupt
166 	 * that enables radio won't fire on the correct irq, and the
167 	 * driver won't be able to handle the interrupt.
168 	 * Configure the IVAR table again after reset.
169 	 */
170 	iwl_pcie_conf_msix_hw(trans_pcie);
171 
172 	/*
173 	 * Upon stop, the APM issues an interrupt if HW RF kill is set.
174 	 * This is a bug in certain verions of the hardware.
175 	 * Certain devices also keep sending HW RF kill interrupt all
176 	 * the time, unless the interrupt is ACKed even if the interrupt
177 	 * should be masked. Re-ACK all the interrupts here.
178 	 */
179 	iwl_disable_interrupts(trans);
180 
181 	/* clear all status bits */
182 	clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
183 	clear_bit(STATUS_INT_ENABLED, &trans->status);
184 	clear_bit(STATUS_TPOWER_PMI, &trans->status);
185 
186 	/*
187 	 * Even if we stop the HW, we still want the RF kill
188 	 * interrupt
189 	 */
190 	iwl_enable_rfkill_int(trans);
191 
192 	/* re-take ownership to prevent other users from stealing the device */
193 	iwl_pcie_prepare_card_hw(trans);
194 }
195 
196 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
197 {
198 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
199 	bool was_in_rfkill;
200 
201 	mutex_lock(&trans_pcie->mutex);
202 	trans_pcie->opmode_down = true;
203 	was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status);
204 	_iwl_trans_pcie_gen2_stop_device(trans);
205 	iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill);
206 	mutex_unlock(&trans_pcie->mutex);
207 }
208 
209 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans)
210 {
211 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
212 	int queue_size = max_t(u32, IWL_CMD_QUEUE_SIZE,
213 			       trans->cfg->min_txq_size);
214 
215 	/* TODO: most of the logic can be removed in A0 - but not in Z0 */
216 	spin_lock(&trans_pcie->irq_lock);
217 	iwl_pcie_gen2_apm_init(trans);
218 	spin_unlock(&trans_pcie->irq_lock);
219 
220 	iwl_op_mode_nic_config(trans->op_mode);
221 
222 	/* Allocate the RX queue, or reset if it is already allocated */
223 	if (iwl_pcie_gen2_rx_init(trans))
224 		return -ENOMEM;
225 
226 	/* Allocate or reset and init all Tx and Command queues */
227 	if (iwl_txq_gen2_init(trans, trans->txqs.cmd.q_id, queue_size))
228 		return -ENOMEM;
229 
230 	/* enable shadow regs in HW */
231 	iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);
232 	IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n");
233 
234 	return 0;
235 }
236 
237 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr)
238 {
239 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
240 
241 	iwl_pcie_reset_ict(trans);
242 
243 	/* make sure all queue are not stopped/used */
244 	memset(trans->txqs.queue_stopped, 0,
245 	       sizeof(trans->txqs.queue_stopped));
246 	memset(trans->txqs.queue_used, 0, sizeof(trans->txqs.queue_used));
247 
248 	/* now that we got alive we can free the fw image & the context info.
249 	 * paging memory cannot be freed included since FW will still use it
250 	 */
251 	iwl_pcie_ctxt_info_free(trans);
252 
253 	/*
254 	 * Re-enable all the interrupts, including the RF-Kill one, now that
255 	 * the firmware is alive.
256 	 */
257 	iwl_enable_interrupts(trans);
258 	mutex_lock(&trans_pcie->mutex);
259 	iwl_pcie_check_hw_rf_kill(trans);
260 	mutex_unlock(&trans_pcie->mutex);
261 }
262 
263 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
264 				 const struct fw_img *fw, bool run_in_rfkill)
265 {
266 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
267 	bool hw_rfkill;
268 	int ret;
269 
270 	/* This may fail if AMT took ownership of the device */
271 	if (iwl_pcie_prepare_card_hw(trans)) {
272 		IWL_WARN(trans, "Exit HW not ready\n");
273 		ret = -EIO;
274 		goto out;
275 	}
276 
277 	iwl_enable_rfkill_int(trans);
278 
279 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
280 
281 	/*
282 	 * We enabled the RF-Kill interrupt and the handler may very
283 	 * well be running. Disable the interrupts to make sure no other
284 	 * interrupt can be fired.
285 	 */
286 	iwl_disable_interrupts(trans);
287 
288 	/* Make sure it finished running */
289 	iwl_pcie_synchronize_irqs(trans);
290 
291 	mutex_lock(&trans_pcie->mutex);
292 
293 	/* If platform's RF_KILL switch is NOT set to KILL */
294 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
295 	if (hw_rfkill && !run_in_rfkill) {
296 		ret = -ERFKILL;
297 		goto out;
298 	}
299 
300 	/* Someone called stop_device, don't try to start_fw */
301 	if (trans_pcie->is_down) {
302 		IWL_WARN(trans,
303 			 "Can't start_fw since the HW hasn't been started\n");
304 		ret = -EIO;
305 		goto out;
306 	}
307 
308 	/* make sure rfkill handshake bits are cleared */
309 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
310 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
311 		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
312 
313 	/* clear (again), then enable host interrupts */
314 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
315 
316 	ret = iwl_pcie_gen2_nic_init(trans);
317 	if (ret) {
318 		IWL_ERR(trans, "Unable to init nic\n");
319 		goto out;
320 	}
321 
322 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
323 		ret = iwl_pcie_ctxt_info_gen3_init(trans, fw);
324 	else
325 		ret = iwl_pcie_ctxt_info_init(trans, fw);
326 	if (ret)
327 		goto out;
328 
329 	/* re-check RF-Kill state since we may have missed the interrupt */
330 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
331 	if (hw_rfkill && !run_in_rfkill)
332 		ret = -ERFKILL;
333 
334 out:
335 	mutex_unlock(&trans_pcie->mutex);
336 	return ret;
337 }
338