1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH 10 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24 * USA 25 * 26 * The full GNU General Public License is included in this distribution 27 * in the file called COPYING. 28 * 29 * Contact Information: 30 * Intel Linux Wireless <linuxwifi@intel.com> 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32 * 33 * BSD LICENSE 34 * 35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 36 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH 37 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 44 * * Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * * Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in 48 * the documentation and/or other materials provided with the 49 * distribution. 50 * * Neither the name Intel Corporation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 *****************************************************************************/ 67 #include <net/mac80211.h> 68 69 #include "iwl-debug.h" 70 #include "iwl-io.h" 71 #include "iwl-prph.h" 72 #include "iwl-csr.h" 73 #include "mvm.h" 74 #include "fw/api/rs.h" 75 76 /* 77 * Will return 0 even if the cmd failed when RFKILL is asserted unless 78 * CMD_WANT_SKB is set in cmd->flags. 79 */ 80 int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd) 81 { 82 int ret; 83 84 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP) 85 if (WARN_ON(mvm->d3_test_active)) 86 return -EIO; 87 #endif 88 89 /* 90 * Synchronous commands from this op-mode must hold 91 * the mutex, this ensures we don't try to send two 92 * (or more) synchronous commands at a time. 93 */ 94 if (!(cmd->flags & CMD_ASYNC)) { 95 lockdep_assert_held(&mvm->mutex); 96 if (!(cmd->flags & CMD_SEND_IN_IDLE)) 97 iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD); 98 } 99 100 ret = iwl_trans_send_cmd(mvm->trans, cmd); 101 102 if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE))) 103 iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD); 104 105 /* 106 * If the caller wants the SKB, then don't hide any problems, the 107 * caller might access the response buffer which will be NULL if 108 * the command failed. 109 */ 110 if (cmd->flags & CMD_WANT_SKB) 111 return ret; 112 113 /* Silently ignore failures if RFKILL is asserted */ 114 if (!ret || ret == -ERFKILL) 115 return 0; 116 return ret; 117 } 118 119 int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id, 120 u32 flags, u16 len, const void *data) 121 { 122 struct iwl_host_cmd cmd = { 123 .id = id, 124 .len = { len, }, 125 .data = { data, }, 126 .flags = flags, 127 }; 128 129 return iwl_mvm_send_cmd(mvm, &cmd); 130 } 131 132 /* 133 * We assume that the caller set the status to the success value 134 */ 135 int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd, 136 u32 *status) 137 { 138 struct iwl_rx_packet *pkt; 139 struct iwl_cmd_response *resp; 140 int ret, resp_len; 141 142 lockdep_assert_held(&mvm->mutex); 143 144 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP) 145 if (WARN_ON(mvm->d3_test_active)) 146 return -EIO; 147 #endif 148 149 /* 150 * Only synchronous commands can wait for status, 151 * we use WANT_SKB so the caller can't. 152 */ 153 if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB), 154 "cmd flags %x", cmd->flags)) 155 return -EINVAL; 156 157 cmd->flags |= CMD_WANT_SKB; 158 159 ret = iwl_trans_send_cmd(mvm->trans, cmd); 160 if (ret == -ERFKILL) { 161 /* 162 * The command failed because of RFKILL, don't update 163 * the status, leave it as success and return 0. 164 */ 165 return 0; 166 } else if (ret) { 167 return ret; 168 } 169 170 pkt = cmd->resp_pkt; 171 172 resp_len = iwl_rx_packet_payload_len(pkt); 173 if (WARN_ON_ONCE(resp_len != sizeof(*resp))) { 174 ret = -EIO; 175 goto out_free_resp; 176 } 177 178 resp = (void *)pkt->data; 179 *status = le32_to_cpu(resp->status); 180 out_free_resp: 181 iwl_free_resp(cmd); 182 return ret; 183 } 184 185 /* 186 * We assume that the caller set the status to the sucess value 187 */ 188 int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len, 189 const void *data, u32 *status) 190 { 191 struct iwl_host_cmd cmd = { 192 .id = id, 193 .len = { len, }, 194 .data = { data, }, 195 }; 196 197 return iwl_mvm_send_cmd_status(mvm, &cmd, status); 198 } 199 200 #define IWL_DECLARE_RATE_INFO(r) \ 201 [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP 202 203 /* 204 * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP 205 */ 206 static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = { 207 IWL_DECLARE_RATE_INFO(1), 208 IWL_DECLARE_RATE_INFO(2), 209 IWL_DECLARE_RATE_INFO(5), 210 IWL_DECLARE_RATE_INFO(11), 211 IWL_DECLARE_RATE_INFO(6), 212 IWL_DECLARE_RATE_INFO(9), 213 IWL_DECLARE_RATE_INFO(12), 214 IWL_DECLARE_RATE_INFO(18), 215 IWL_DECLARE_RATE_INFO(24), 216 IWL_DECLARE_RATE_INFO(36), 217 IWL_DECLARE_RATE_INFO(48), 218 IWL_DECLARE_RATE_INFO(54), 219 }; 220 221 int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags, 222 enum nl80211_band band) 223 { 224 int rate = rate_n_flags & RATE_LEGACY_RATE_MSK; 225 int idx; 226 int band_offset = 0; 227 228 /* Legacy rate format, search for match in table */ 229 if (band == NL80211_BAND_5GHZ) 230 band_offset = IWL_FIRST_OFDM_RATE; 231 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++) 232 if (fw_rate_idx_to_plcp[idx] == rate) 233 return idx - band_offset; 234 235 return -1; 236 } 237 238 u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx) 239 { 240 /* Get PLCP rate for tx_cmd->rate_n_flags */ 241 return fw_rate_idx_to_plcp[rate_idx]; 242 } 243 244 void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb) 245 { 246 struct iwl_rx_packet *pkt = rxb_addr(rxb); 247 struct iwl_error_resp *err_resp = (void *)pkt->data; 248 249 IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n", 250 le32_to_cpu(err_resp->error_type), err_resp->cmd_id); 251 IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n", 252 le16_to_cpu(err_resp->bad_cmd_seq_num), 253 le32_to_cpu(err_resp->error_service)); 254 IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n", 255 le64_to_cpu(err_resp->timestamp)); 256 } 257 258 /* 259 * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h. 260 * The parameter should also be a combination of ANT_[ABC]. 261 */ 262 u8 first_antenna(u8 mask) 263 { 264 BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */ 265 if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */ 266 return BIT(0); 267 return BIT(ffs(mask) - 1); 268 } 269 270 /* 271 * Toggles between TX antennas to send the probe request on. 272 * Receives the bitmask of valid TX antennas and the *index* used 273 * for the last TX, and returns the next valid *index* to use. 274 * In order to set it in the tx_cmd, must do BIT(idx). 275 */ 276 u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx) 277 { 278 u8 ind = last_idx; 279 int i; 280 281 for (i = 0; i < MAX_RS_ANT_NUM; i++) { 282 ind = (ind + 1) % MAX_RS_ANT_NUM; 283 if (valid & BIT(ind)) 284 return ind; 285 } 286 287 WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid); 288 return last_idx; 289 } 290 291 static const struct { 292 const char *name; 293 u8 num; 294 } advanced_lookup[] = { 295 { "NMI_INTERRUPT_WDG", 0x34 }, 296 { "SYSASSERT", 0x35 }, 297 { "UCODE_VERSION_MISMATCH", 0x37 }, 298 { "BAD_COMMAND", 0x38 }, 299 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, 300 { "FATAL_ERROR", 0x3D }, 301 { "NMI_TRM_HW_ERR", 0x46 }, 302 { "NMI_INTERRUPT_TRM", 0x4C }, 303 { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, 304 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, 305 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, 306 { "NMI_INTERRUPT_HOST", 0x66 }, 307 { "NMI_INTERRUPT_ACTION_PT", 0x7C }, 308 { "NMI_INTERRUPT_UNKNOWN", 0x84 }, 309 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, 310 { "ADVANCED_SYSASSERT", 0 }, 311 }; 312 313 static const char *desc_lookup(u32 num) 314 { 315 int i; 316 317 for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++) 318 if (advanced_lookup[i].num == num) 319 return advanced_lookup[i].name; 320 321 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */ 322 return advanced_lookup[i].name; 323 } 324 325 /* 326 * Note: This structure is read from the device with IO accesses, 327 * and the reading already does the endian conversion. As it is 328 * read with u32-sized accesses, any members with a different size 329 * need to be ordered correctly though! 330 */ 331 struct iwl_error_event_table_v1 { 332 u32 valid; /* (nonzero) valid, (0) log is empty */ 333 u32 error_id; /* type of error */ 334 u32 pc; /* program counter */ 335 u32 blink1; /* branch link */ 336 u32 blink2; /* branch link */ 337 u32 ilink1; /* interrupt link */ 338 u32 ilink2; /* interrupt link */ 339 u32 data1; /* error-specific data */ 340 u32 data2; /* error-specific data */ 341 u32 data3; /* error-specific data */ 342 u32 bcon_time; /* beacon timer */ 343 u32 tsf_low; /* network timestamp function timer */ 344 u32 tsf_hi; /* network timestamp function timer */ 345 u32 gp1; /* GP1 timer register */ 346 u32 gp2; /* GP2 timer register */ 347 u32 gp3; /* GP3 timer register */ 348 u32 ucode_ver; /* uCode version */ 349 u32 hw_ver; /* HW Silicon version */ 350 u32 brd_ver; /* HW board version */ 351 u32 log_pc; /* log program counter */ 352 u32 frame_ptr; /* frame pointer */ 353 u32 stack_ptr; /* stack pointer */ 354 u32 hcmd; /* last host command header */ 355 u32 isr0; /* isr status register LMPM_NIC_ISR0: 356 * rxtx_flag */ 357 u32 isr1; /* isr status register LMPM_NIC_ISR1: 358 * host_flag */ 359 u32 isr2; /* isr status register LMPM_NIC_ISR2: 360 * enc_flag */ 361 u32 isr3; /* isr status register LMPM_NIC_ISR3: 362 * time_flag */ 363 u32 isr4; /* isr status register LMPM_NIC_ISR4: 364 * wico interrupt */ 365 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 366 u32 wait_event; /* wait event() caller address */ 367 u32 l2p_control; /* L2pControlField */ 368 u32 l2p_duration; /* L2pDurationField */ 369 u32 l2p_mhvalid; /* L2pMhValidBits */ 370 u32 l2p_addr_match; /* L2pAddrMatchStat */ 371 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 372 * (LMPM_PMG_SEL) */ 373 u32 u_timestamp; /* indicate when the date and time of the 374 * compilation */ 375 u32 flow_handler; /* FH read/write pointers, RX credit */ 376 } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */; 377 378 struct iwl_error_event_table { 379 u32 valid; /* (nonzero) valid, (0) log is empty */ 380 u32 error_id; /* type of error */ 381 u32 trm_hw_status0; /* TRM HW status */ 382 u32 trm_hw_status1; /* TRM HW status */ 383 u32 blink2; /* branch link */ 384 u32 ilink1; /* interrupt link */ 385 u32 ilink2; /* interrupt link */ 386 u32 data1; /* error-specific data */ 387 u32 data2; /* error-specific data */ 388 u32 data3; /* error-specific data */ 389 u32 bcon_time; /* beacon timer */ 390 u32 tsf_low; /* network timestamp function timer */ 391 u32 tsf_hi; /* network timestamp function timer */ 392 u32 gp1; /* GP1 timer register */ 393 u32 gp2; /* GP2 timer register */ 394 u32 fw_rev_type; /* firmware revision type */ 395 u32 major; /* uCode version major */ 396 u32 minor; /* uCode version minor */ 397 u32 hw_ver; /* HW Silicon version */ 398 u32 brd_ver; /* HW board version */ 399 u32 log_pc; /* log program counter */ 400 u32 frame_ptr; /* frame pointer */ 401 u32 stack_ptr; /* stack pointer */ 402 u32 hcmd; /* last host command header */ 403 u32 isr0; /* isr status register LMPM_NIC_ISR0: 404 * rxtx_flag */ 405 u32 isr1; /* isr status register LMPM_NIC_ISR1: 406 * host_flag */ 407 u32 isr2; /* isr status register LMPM_NIC_ISR2: 408 * enc_flag */ 409 u32 isr3; /* isr status register LMPM_NIC_ISR3: 410 * time_flag */ 411 u32 isr4; /* isr status register LMPM_NIC_ISR4: 412 * wico interrupt */ 413 u32 last_cmd_id; /* last HCMD id handled by the firmware */ 414 u32 wait_event; /* wait event() caller address */ 415 u32 l2p_control; /* L2pControlField */ 416 u32 l2p_duration; /* L2pDurationField */ 417 u32 l2p_mhvalid; /* L2pMhValidBits */ 418 u32 l2p_addr_match; /* L2pAddrMatchStat */ 419 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 420 * (LMPM_PMG_SEL) */ 421 u32 u_timestamp; /* indicate when the date and time of the 422 * compilation */ 423 u32 flow_handler; /* FH read/write pointers, RX credit */ 424 } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */; 425 426 /* 427 * UMAC error struct - relevant starting from family 8000 chip. 428 * Note: This structure is read from the device with IO accesses, 429 * and the reading already does the endian conversion. As it is 430 * read with u32-sized accesses, any members with a different size 431 * need to be ordered correctly though! 432 */ 433 struct iwl_umac_error_event_table { 434 u32 valid; /* (nonzero) valid, (0) log is empty */ 435 u32 error_id; /* type of error */ 436 u32 blink1; /* branch link */ 437 u32 blink2; /* branch link */ 438 u32 ilink1; /* interrupt link */ 439 u32 ilink2; /* interrupt link */ 440 u32 data1; /* error-specific data */ 441 u32 data2; /* error-specific data */ 442 u32 data3; /* error-specific data */ 443 u32 umac_major; 444 u32 umac_minor; 445 u32 frame_pointer; /* core register 27*/ 446 u32 stack_pointer; /* core register 28 */ 447 u32 cmd_header; /* latest host cmd sent to UMAC */ 448 u32 nic_isr_pref; /* ISR status register */ 449 } __packed; 450 451 #define ERROR_START_OFFSET (1 * sizeof(u32)) 452 #define ERROR_ELEM_SIZE (7 * sizeof(u32)) 453 454 static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm) 455 { 456 struct iwl_trans *trans = mvm->trans; 457 struct iwl_umac_error_event_table table; 458 459 if (!mvm->support_umac_log) 460 return; 461 462 iwl_trans_read_mem_bytes(trans, mvm->umac_error_event_table, &table, 463 sizeof(table)); 464 465 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { 466 IWL_ERR(trans, "Start IWL Error Log Dump:\n"); 467 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", 468 mvm->status, table.valid); 469 } 470 471 IWL_ERR(mvm, "0x%08X | %s\n", table.error_id, 472 desc_lookup(table.error_id)); 473 IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1); 474 IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2); 475 IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1); 476 IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2); 477 IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1); 478 IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2); 479 IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3); 480 IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major); 481 IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor); 482 IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer); 483 IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer); 484 IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header); 485 IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref); 486 } 487 488 static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base) 489 { 490 struct iwl_trans *trans = mvm->trans; 491 struct iwl_error_event_table table; 492 u32 val; 493 494 if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) { 495 if (!base) 496 base = mvm->fw->init_errlog_ptr; 497 } else { 498 if (!base) 499 base = mvm->fw->inst_errlog_ptr; 500 } 501 502 if (base < 0x400000) { 503 IWL_ERR(mvm, 504 "Not valid error log pointer 0x%08X for %s uCode\n", 505 base, 506 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) 507 ? "Init" : "RT"); 508 return; 509 } 510 511 /* check if there is a HW error */ 512 val = iwl_trans_read_mem32(trans, base); 513 if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) { 514 int err; 515 516 IWL_ERR(trans, "HW error, resetting before reading\n"); 517 518 /* reset the device */ 519 iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 520 usleep_range(5000, 6000); 521 522 /* set INIT_DONE flag */ 523 iwl_set_bit(trans, CSR_GP_CNTRL, 524 CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 525 526 /* and wait for clock stabilization */ 527 if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) 528 udelay(2); 529 530 err = iwl_poll_bit(trans, CSR_GP_CNTRL, 531 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 532 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 533 25000); 534 if (err < 0) { 535 IWL_DEBUG_INFO(trans, 536 "Failed to reset the card for the dump\n"); 537 return; 538 } 539 } 540 541 iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table)); 542 543 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { 544 IWL_ERR(trans, "Start IWL Error Log Dump:\n"); 545 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", 546 mvm->status, table.valid); 547 } 548 549 /* Do not change this output - scripts rely on it */ 550 551 IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version); 552 553 trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low, 554 table.data1, table.data2, table.data3, 555 table.blink2, table.ilink1, 556 table.ilink2, table.bcon_time, table.gp1, 557 table.gp2, table.fw_rev_type, table.major, 558 table.minor, table.hw_ver, table.brd_ver); 559 IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id, 560 desc_lookup(table.error_id)); 561 IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0); 562 IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1); 563 IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2); 564 IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1); 565 IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2); 566 IWL_ERR(mvm, "0x%08X | data1\n", table.data1); 567 IWL_ERR(mvm, "0x%08X | data2\n", table.data2); 568 IWL_ERR(mvm, "0x%08X | data3\n", table.data3); 569 IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time); 570 IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low); 571 IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi); 572 IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1); 573 IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2); 574 IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type); 575 IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major); 576 IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor); 577 IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver); 578 IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver); 579 IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd); 580 IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0); 581 IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1); 582 IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2); 583 IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3); 584 IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4); 585 IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id); 586 IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event); 587 IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control); 588 IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration); 589 IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid); 590 IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match); 591 IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); 592 IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp); 593 IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler); 594 } 595 596 void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm) 597 { 598 if (!test_bit(STATUS_DEVICE_ENABLED, &mvm->trans->status)) { 599 IWL_ERR(mvm, 600 "DEVICE_ENABLED bit is not set. Aborting dump.\n"); 601 return; 602 } 603 604 iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]); 605 606 if (mvm->error_event_table[1]) 607 iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]); 608 609 iwl_mvm_dump_umac_error_log(mvm); 610 } 611 612 int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq) 613 { 614 int i; 615 616 lockdep_assert_held(&mvm->queue_info_lock); 617 618 /* This should not be hit with new TX path */ 619 if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) 620 return -ENOSPC; 621 622 /* Start by looking for a free queue */ 623 for (i = minq; i <= maxq; i++) 624 if (mvm->queue_info[i].hw_queue_refcount == 0 && 625 mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE) 626 return i; 627 628 /* 629 * If no free queue found - settle for an inactive one to reconfigure 630 * Make sure that the inactive queue either already belongs to this STA, 631 * or that if it belongs to another one - it isn't the reserved queue 632 */ 633 for (i = minq; i <= maxq; i++) 634 if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE && 635 (sta_id == mvm->queue_info[i].ra_sta_id || 636 !mvm->queue_info[i].reserved)) 637 return i; 638 639 return -ENOSPC; 640 } 641 642 int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id, 643 int tid, int frame_limit, u16 ssn) 644 { 645 struct iwl_scd_txq_cfg_cmd cmd = { 646 .scd_queue = queue, 647 .action = SCD_CFG_ENABLE_QUEUE, 648 .window = frame_limit, 649 .sta_id = sta_id, 650 .ssn = cpu_to_le16(ssn), 651 .tx_fifo = fifo, 652 .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE || 653 queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE), 654 .tid = tid, 655 }; 656 int ret; 657 658 if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) 659 return -EINVAL; 660 661 spin_lock_bh(&mvm->queue_info_lock); 662 if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0, 663 "Trying to reconfig unallocated queue %d\n", queue)) { 664 spin_unlock_bh(&mvm->queue_info_lock); 665 return -ENXIO; 666 } 667 spin_unlock_bh(&mvm->queue_info_lock); 668 669 IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue); 670 671 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd); 672 WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n", 673 queue, fifo, ret); 674 675 return ret; 676 } 677 678 static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue, 679 int mac80211_queue, u8 sta_id, u8 tid) 680 { 681 bool enable_queue = true; 682 683 spin_lock_bh(&mvm->queue_info_lock); 684 685 /* Make sure this TID isn't already enabled */ 686 if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) { 687 spin_unlock_bh(&mvm->queue_info_lock); 688 IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n", 689 queue, tid); 690 return false; 691 } 692 693 /* Update mappings and refcounts */ 694 if (mvm->queue_info[queue].hw_queue_refcount > 0) 695 enable_queue = false; 696 697 if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) { 698 WARN(mac80211_queue >= 699 BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]), 700 "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n", 701 mac80211_queue, queue, sta_id, tid); 702 mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue); 703 } 704 705 mvm->queue_info[queue].hw_queue_refcount++; 706 mvm->queue_info[queue].tid_bitmap |= BIT(tid); 707 mvm->queue_info[queue].ra_sta_id = sta_id; 708 709 if (enable_queue) { 710 if (tid != IWL_MAX_TID_COUNT) 711 mvm->queue_info[queue].mac80211_ac = 712 tid_to_mac80211_ac[tid]; 713 else 714 mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO; 715 716 mvm->queue_info[queue].txq_tid = tid; 717 } 718 719 IWL_DEBUG_TX_QUEUES(mvm, 720 "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n", 721 queue, mvm->queue_info[queue].hw_queue_refcount, 722 mvm->hw_queue_to_mac80211[queue]); 723 724 spin_unlock_bh(&mvm->queue_info_lock); 725 726 return enable_queue; 727 } 728 729 int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue, 730 u8 sta_id, u8 tid, unsigned int timeout) 731 { 732 struct iwl_tx_queue_cfg_cmd cmd = { 733 .flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE), 734 .sta_id = sta_id, 735 .tid = tid, 736 }; 737 int queue; 738 739 if (cmd.tid == IWL_MAX_TID_COUNT) 740 cmd.tid = IWL_MGMT_TID; 741 queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd, 742 SCD_QUEUE_CFG, timeout); 743 744 if (queue < 0) { 745 IWL_DEBUG_TX_QUEUES(mvm, 746 "Failed allocating TXQ for sta %d tid %d, ret: %d\n", 747 sta_id, tid, queue); 748 return queue; 749 } 750 751 IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n", 752 queue, sta_id, tid); 753 754 mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue); 755 IWL_DEBUG_TX_QUEUES(mvm, 756 "Enabling TXQ #%d (mac80211 map:0x%x)\n", 757 queue, mvm->hw_queue_to_mac80211[queue]); 758 759 return queue; 760 } 761 762 bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue, 763 u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg, 764 unsigned int wdg_timeout) 765 { 766 struct iwl_scd_txq_cfg_cmd cmd = { 767 .scd_queue = queue, 768 .action = SCD_CFG_ENABLE_QUEUE, 769 .window = cfg->frame_limit, 770 .sta_id = cfg->sta_id, 771 .ssn = cpu_to_le16(ssn), 772 .tx_fifo = cfg->fifo, 773 .aggregate = cfg->aggregate, 774 .tid = cfg->tid, 775 }; 776 bool inc_ssn; 777 778 if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) 779 return false; 780 781 /* Send the enabling command if we need to */ 782 if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue, 783 cfg->sta_id, cfg->tid)) 784 return false; 785 786 inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, 787 NULL, wdg_timeout); 788 if (inc_ssn) 789 le16_add_cpu(&cmd.ssn, 1); 790 791 WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd), 792 "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo); 793 794 return inc_ssn; 795 } 796 797 int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue, 798 u8 tid, u8 flags) 799 { 800 struct iwl_scd_txq_cfg_cmd cmd = { 801 .scd_queue = queue, 802 .action = SCD_CFG_DISABLE_QUEUE, 803 }; 804 bool remove_mac_queue = true; 805 int ret; 806 807 if (iwl_mvm_has_new_tx_api(mvm)) { 808 spin_lock_bh(&mvm->queue_info_lock); 809 mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac80211_queue); 810 spin_unlock_bh(&mvm->queue_info_lock); 811 812 iwl_trans_txq_free(mvm->trans, queue); 813 814 return 0; 815 } 816 817 spin_lock_bh(&mvm->queue_info_lock); 818 819 if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) { 820 spin_unlock_bh(&mvm->queue_info_lock); 821 return 0; 822 } 823 824 mvm->queue_info[queue].tid_bitmap &= ~BIT(tid); 825 826 /* 827 * If there is another TID with the same AC - don't remove the MAC queue 828 * from the mapping 829 */ 830 if (tid < IWL_MAX_TID_COUNT) { 831 unsigned long tid_bitmap = 832 mvm->queue_info[queue].tid_bitmap; 833 int ac = tid_to_mac80211_ac[tid]; 834 int i; 835 836 for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) { 837 if (tid_to_mac80211_ac[i] == ac) 838 remove_mac_queue = false; 839 } 840 } 841 842 if (remove_mac_queue) 843 mvm->hw_queue_to_mac80211[queue] &= 844 ~BIT(mac80211_queue); 845 mvm->queue_info[queue].hw_queue_refcount--; 846 847 cmd.action = mvm->queue_info[queue].hw_queue_refcount ? 848 SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE; 849 if (cmd.action == SCD_CFG_DISABLE_QUEUE) 850 mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE; 851 852 IWL_DEBUG_TX_QUEUES(mvm, 853 "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n", 854 queue, 855 mvm->queue_info[queue].hw_queue_refcount, 856 mvm->hw_queue_to_mac80211[queue]); 857 858 /* If the queue is still enabled - nothing left to do in this func */ 859 if (cmd.action == SCD_CFG_ENABLE_QUEUE) { 860 spin_unlock_bh(&mvm->queue_info_lock); 861 return 0; 862 } 863 864 cmd.sta_id = mvm->queue_info[queue].ra_sta_id; 865 cmd.tid = mvm->queue_info[queue].txq_tid; 866 867 /* Make sure queue info is correct even though we overwrite it */ 868 WARN(mvm->queue_info[queue].hw_queue_refcount || 869 mvm->queue_info[queue].tid_bitmap || 870 mvm->hw_queue_to_mac80211[queue], 871 "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n", 872 queue, mvm->queue_info[queue].hw_queue_refcount, 873 mvm->hw_queue_to_mac80211[queue], 874 mvm->queue_info[queue].tid_bitmap); 875 876 /* If we are here - the queue is freed and we can zero out these vals */ 877 mvm->queue_info[queue].hw_queue_refcount = 0; 878 mvm->queue_info[queue].tid_bitmap = 0; 879 mvm->hw_queue_to_mac80211[queue] = 0; 880 881 /* Regardless if this is a reserved TXQ for a STA - mark it as false */ 882 mvm->queue_info[queue].reserved = false; 883 884 spin_unlock_bh(&mvm->queue_info_lock); 885 886 iwl_trans_txq_disable(mvm->trans, queue, false); 887 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags, 888 sizeof(struct iwl_scd_txq_cfg_cmd), &cmd); 889 890 if (ret) 891 IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n", 892 queue, ret); 893 return ret; 894 } 895 896 /** 897 * iwl_mvm_send_lq_cmd() - Send link quality command 898 * @init: This command is sent as part of station initialization right 899 * after station has been added. 900 * 901 * The link quality command is sent as the last step of station creation. 902 * This is the special case in which init is set and we call a callback in 903 * this case to clear the state indicating that station creation is in 904 * progress. 905 */ 906 int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init) 907 { 908 struct iwl_host_cmd cmd = { 909 .id = LQ_CMD, 910 .len = { sizeof(struct iwl_lq_cmd), }, 911 .flags = init ? 0 : CMD_ASYNC, 912 .data = { lq, }, 913 }; 914 915 if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA || 916 fw_has_capa(&mvm->fw->ucode_capa, 917 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD))) 918 return -EINVAL; 919 920 return iwl_mvm_send_cmd(mvm, &cmd); 921 } 922 923 /** 924 * iwl_mvm_update_smps - Get a request to change the SMPS mode 925 * @req_type: The part of the driver who call for a change. 926 * @smps_requests: The request to change the SMPS mode. 927 * 928 * Get a requst to change the SMPS mode, 929 * and change it according to all other requests in the driver. 930 */ 931 void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif, 932 enum iwl_mvm_smps_type_request req_type, 933 enum ieee80211_smps_mode smps_request) 934 { 935 struct iwl_mvm_vif *mvmvif; 936 enum ieee80211_smps_mode smps_mode; 937 int i; 938 939 lockdep_assert_held(&mvm->mutex); 940 941 /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */ 942 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1) 943 return; 944 945 if (vif->type == NL80211_IFTYPE_AP) 946 smps_mode = IEEE80211_SMPS_OFF; 947 else 948 smps_mode = IEEE80211_SMPS_AUTOMATIC; 949 950 mvmvif = iwl_mvm_vif_from_mac80211(vif); 951 mvmvif->smps_requests[req_type] = smps_request; 952 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) { 953 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) { 954 smps_mode = IEEE80211_SMPS_STATIC; 955 break; 956 } 957 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) 958 smps_mode = IEEE80211_SMPS_DYNAMIC; 959 } 960 961 ieee80211_request_smps(vif, smps_mode); 962 } 963 964 int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear) 965 { 966 struct iwl_statistics_cmd scmd = { 967 .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0, 968 }; 969 struct iwl_host_cmd cmd = { 970 .id = STATISTICS_CMD, 971 .len[0] = sizeof(scmd), 972 .data[0] = &scmd, 973 .flags = CMD_WANT_SKB, 974 }; 975 int ret; 976 977 ret = iwl_mvm_send_cmd(mvm, &cmd); 978 if (ret) 979 return ret; 980 981 iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt); 982 iwl_free_resp(&cmd); 983 984 if (clear) 985 iwl_mvm_accu_radio_stats(mvm); 986 987 return 0; 988 } 989 990 void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm) 991 { 992 mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time; 993 mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time; 994 mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf; 995 mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan; 996 } 997 998 static void iwl_mvm_diversity_iter(void *_data, u8 *mac, 999 struct ieee80211_vif *vif) 1000 { 1001 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1002 bool *result = _data; 1003 int i; 1004 1005 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) { 1006 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC || 1007 mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) 1008 *result = false; 1009 } 1010 } 1011 1012 bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm) 1013 { 1014 bool result = true; 1015 1016 lockdep_assert_held(&mvm->mutex); 1017 1018 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1) 1019 return false; 1020 1021 if (mvm->cfg->rx_with_siso_diversity) 1022 return false; 1023 1024 ieee80211_iterate_active_interfaces_atomic( 1025 mvm->hw, IEEE80211_IFACE_ITER_NORMAL, 1026 iwl_mvm_diversity_iter, &result); 1027 1028 return result; 1029 } 1030 1031 int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif, 1032 bool prev) 1033 { 1034 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1035 int res; 1036 1037 lockdep_assert_held(&mvm->mutex); 1038 1039 if (iwl_mvm_vif_low_latency(mvmvif) == prev) 1040 return 0; 1041 1042 res = iwl_mvm_update_quotas(mvm, false, NULL); 1043 if (res) 1044 return res; 1045 1046 iwl_mvm_bt_coex_vif_change(mvm); 1047 1048 return iwl_mvm_power_update_mac(mvm); 1049 } 1050 1051 static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif) 1052 { 1053 bool *result = _data; 1054 1055 if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif))) 1056 *result = true; 1057 } 1058 1059 bool iwl_mvm_low_latency(struct iwl_mvm *mvm) 1060 { 1061 bool result = false; 1062 1063 ieee80211_iterate_active_interfaces_atomic( 1064 mvm->hw, IEEE80211_IFACE_ITER_NORMAL, 1065 iwl_mvm_ll_iter, &result); 1066 1067 return result; 1068 } 1069 1070 struct iwl_bss_iter_data { 1071 struct ieee80211_vif *vif; 1072 bool error; 1073 }; 1074 1075 static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac, 1076 struct ieee80211_vif *vif) 1077 { 1078 struct iwl_bss_iter_data *data = _data; 1079 1080 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p) 1081 return; 1082 1083 if (data->vif) { 1084 data->error = true; 1085 return; 1086 } 1087 1088 data->vif = vif; 1089 } 1090 1091 struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm) 1092 { 1093 struct iwl_bss_iter_data bss_iter_data = {}; 1094 1095 ieee80211_iterate_active_interfaces_atomic( 1096 mvm->hw, IEEE80211_IFACE_ITER_NORMAL, 1097 iwl_mvm_bss_iface_iterator, &bss_iter_data); 1098 1099 if (bss_iter_data.error) { 1100 IWL_ERR(mvm, "More than one managed interface active!\n"); 1101 return ERR_PTR(-EINVAL); 1102 } 1103 1104 return bss_iter_data.vif; 1105 } 1106 1107 struct iwl_sta_iter_data { 1108 bool assoc; 1109 }; 1110 1111 static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac, 1112 struct ieee80211_vif *vif) 1113 { 1114 struct iwl_sta_iter_data *data = _data; 1115 1116 if (vif->type != NL80211_IFTYPE_STATION) 1117 return; 1118 1119 if (vif->bss_conf.assoc) 1120 data->assoc = true; 1121 } 1122 1123 bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm) 1124 { 1125 struct iwl_sta_iter_data data = { 1126 .assoc = false, 1127 }; 1128 1129 ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1130 IEEE80211_IFACE_ITER_NORMAL, 1131 iwl_mvm_sta_iface_iterator, 1132 &data); 1133 return data.assoc; 1134 } 1135 1136 unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm, 1137 struct ieee80211_vif *vif, 1138 bool tdls, bool cmd_q) 1139 { 1140 struct iwl_fw_dbg_trigger_tlv *trigger; 1141 struct iwl_fw_dbg_trigger_txq_timer *txq_timer; 1142 unsigned int default_timeout = 1143 cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout; 1144 1145 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) { 1146 /* 1147 * We can't know when the station is asleep or awake, so we 1148 * must disable the queue hang detection. 1149 */ 1150 if (fw_has_capa(&mvm->fw->ucode_capa, 1151 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) && 1152 vif && vif->type == NL80211_IFTYPE_AP) 1153 return IWL_WATCHDOG_DISABLED; 1154 return iwlmvm_mod_params.tfd_q_hang_detect ? 1155 default_timeout : IWL_WATCHDOG_DISABLED; 1156 } 1157 1158 trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS); 1159 txq_timer = (void *)trigger->data; 1160 1161 if (tdls) 1162 return le32_to_cpu(txq_timer->tdls); 1163 1164 if (cmd_q) 1165 return le32_to_cpu(txq_timer->command_queue); 1166 1167 if (WARN_ON(!vif)) 1168 return default_timeout; 1169 1170 switch (ieee80211_vif_type_p2p(vif)) { 1171 case NL80211_IFTYPE_ADHOC: 1172 return le32_to_cpu(txq_timer->ibss); 1173 case NL80211_IFTYPE_STATION: 1174 return le32_to_cpu(txq_timer->bss); 1175 case NL80211_IFTYPE_AP: 1176 return le32_to_cpu(txq_timer->softap); 1177 case NL80211_IFTYPE_P2P_CLIENT: 1178 return le32_to_cpu(txq_timer->p2p_client); 1179 case NL80211_IFTYPE_P2P_GO: 1180 return le32_to_cpu(txq_timer->p2p_go); 1181 case NL80211_IFTYPE_P2P_DEVICE: 1182 return le32_to_cpu(txq_timer->p2p_device); 1183 case NL80211_IFTYPE_MONITOR: 1184 return default_timeout; 1185 default: 1186 WARN_ON(1); 1187 return mvm->cfg->base_params->wd_timeout; 1188 } 1189 } 1190 1191 void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif, 1192 const char *errmsg) 1193 { 1194 struct iwl_fw_dbg_trigger_tlv *trig; 1195 struct iwl_fw_dbg_trigger_mlme *trig_mlme; 1196 1197 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME)) 1198 goto out; 1199 1200 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME); 1201 trig_mlme = (void *)trig->data; 1202 if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, 1203 ieee80211_vif_to_wdev(vif), trig)) 1204 goto out; 1205 1206 if (trig_mlme->stop_connection_loss && 1207 --trig_mlme->stop_connection_loss) 1208 goto out; 1209 1210 iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg); 1211 1212 out: 1213 ieee80211_connection_loss(vif); 1214 } 1215 1216 /* 1217 * Remove inactive TIDs of a given queue. 1218 * If all queue TIDs are inactive - mark the queue as inactive 1219 * If only some the queue TIDs are inactive - unmap them from the queue 1220 */ 1221 static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm, 1222 struct iwl_mvm_sta *mvmsta, int queue, 1223 unsigned long tid_bitmap) 1224 { 1225 int tid; 1226 1227 lockdep_assert_held(&mvmsta->lock); 1228 lockdep_assert_held(&mvm->queue_info_lock); 1229 1230 if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) 1231 return; 1232 1233 /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */ 1234 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) { 1235 /* If some TFDs are still queued - don't mark TID as inactive */ 1236 if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid])) 1237 tid_bitmap &= ~BIT(tid); 1238 1239 /* Don't mark as inactive any TID that has an active BA */ 1240 if (mvmsta->tid_data[tid].state != IWL_AGG_OFF) 1241 tid_bitmap &= ~BIT(tid); 1242 } 1243 1244 /* If all TIDs in the queue are inactive - mark queue as inactive. */ 1245 if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) { 1246 mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE; 1247 1248 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) 1249 mvmsta->tid_data[tid].is_tid_active = false; 1250 1251 IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n", 1252 queue); 1253 return; 1254 } 1255 1256 /* 1257 * If we are here, this is a shared queue and not all TIDs timed-out. 1258 * Remove the ones that did. 1259 */ 1260 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) { 1261 int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]; 1262 1263 mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE; 1264 mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue); 1265 mvm->queue_info[queue].hw_queue_refcount--; 1266 mvm->queue_info[queue].tid_bitmap &= ~BIT(tid); 1267 mvmsta->tid_data[tid].is_tid_active = false; 1268 1269 IWL_DEBUG_TX_QUEUES(mvm, 1270 "Removing inactive TID %d from shared Q:%d\n", 1271 tid, queue); 1272 } 1273 1274 IWL_DEBUG_TX_QUEUES(mvm, 1275 "TXQ #%d left with tid bitmap 0x%x\n", queue, 1276 mvm->queue_info[queue].tid_bitmap); 1277 1278 /* 1279 * There may be different TIDs with the same mac queues, so make 1280 * sure all TIDs have existing corresponding mac queues enabled 1281 */ 1282 tid_bitmap = mvm->queue_info[queue].tid_bitmap; 1283 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) { 1284 mvm->hw_queue_to_mac80211[queue] |= 1285 BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]); 1286 } 1287 1288 /* If the queue is marked as shared - "unshare" it */ 1289 if (mvm->queue_info[queue].hw_queue_refcount == 1 && 1290 mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) { 1291 mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING; 1292 IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n", 1293 queue); 1294 } 1295 } 1296 1297 void iwl_mvm_inactivity_check(struct iwl_mvm *mvm) 1298 { 1299 unsigned long timeout_queues_map = 0; 1300 unsigned long now = jiffies; 1301 int i; 1302 1303 if (iwl_mvm_has_new_tx_api(mvm)) 1304 return; 1305 1306 spin_lock_bh(&mvm->queue_info_lock); 1307 for (i = 0; i < IWL_MAX_HW_QUEUES; i++) 1308 if (mvm->queue_info[i].hw_queue_refcount > 0) 1309 timeout_queues_map |= BIT(i); 1310 spin_unlock_bh(&mvm->queue_info_lock); 1311 1312 rcu_read_lock(); 1313 1314 /* 1315 * If a queue time outs - mark it as INACTIVE (don't remove right away 1316 * if we don't have to.) This is an optimization in case traffic comes 1317 * later, and we don't HAVE to use a currently-inactive queue 1318 */ 1319 for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) { 1320 struct ieee80211_sta *sta; 1321 struct iwl_mvm_sta *mvmsta; 1322 u8 sta_id; 1323 int tid; 1324 unsigned long inactive_tid_bitmap = 0; 1325 unsigned long queue_tid_bitmap; 1326 1327 spin_lock_bh(&mvm->queue_info_lock); 1328 queue_tid_bitmap = mvm->queue_info[i].tid_bitmap; 1329 1330 /* If TXQ isn't in active use anyway - nothing to do here... */ 1331 if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY && 1332 mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) { 1333 spin_unlock_bh(&mvm->queue_info_lock); 1334 continue; 1335 } 1336 1337 /* Check to see if there are inactive TIDs on this queue */ 1338 for_each_set_bit(tid, &queue_tid_bitmap, 1339 IWL_MAX_TID_COUNT + 1) { 1340 if (time_after(mvm->queue_info[i].last_frame_time[tid] + 1341 IWL_MVM_DQA_QUEUE_TIMEOUT, now)) 1342 continue; 1343 1344 inactive_tid_bitmap |= BIT(tid); 1345 } 1346 spin_unlock_bh(&mvm->queue_info_lock); 1347 1348 /* If all TIDs are active - finish check on this queue */ 1349 if (!inactive_tid_bitmap) 1350 continue; 1351 1352 /* 1353 * If we are here - the queue hadn't been served recently and is 1354 * in use 1355 */ 1356 1357 sta_id = mvm->queue_info[i].ra_sta_id; 1358 sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]); 1359 1360 /* 1361 * If the STA doesn't exist anymore, it isn't an error. It could 1362 * be that it was removed since getting the queues, and in this 1363 * case it should've inactivated its queues anyway. 1364 */ 1365 if (IS_ERR_OR_NULL(sta)) 1366 continue; 1367 1368 mvmsta = iwl_mvm_sta_from_mac80211(sta); 1369 1370 spin_lock_bh(&mvmsta->lock); 1371 spin_lock(&mvm->queue_info_lock); 1372 iwl_mvm_remove_inactive_tids(mvm, mvmsta, i, 1373 inactive_tid_bitmap); 1374 spin_unlock(&mvm->queue_info_lock); 1375 spin_unlock_bh(&mvmsta->lock); 1376 } 1377 1378 rcu_read_unlock(); 1379 } 1380 1381 void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm, 1382 struct ieee80211_vif *vif, 1383 const struct ieee80211_sta *sta, 1384 u16 tid) 1385 { 1386 struct iwl_fw_dbg_trigger_tlv *trig; 1387 struct iwl_fw_dbg_trigger_ba *ba_trig; 1388 1389 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_BA)) 1390 return; 1391 1392 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_BA); 1393 ba_trig = (void *)trig->data; 1394 if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, 1395 ieee80211_vif_to_wdev(vif), trig)) 1396 return; 1397 1398 if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid))) 1399 return; 1400 1401 iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, 1402 "Frame from %pM timed out, tid %d", 1403 sta->addr, tid); 1404 } 1405 1406 void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime) 1407 { 1408 bool ps_disabled; 1409 1410 lockdep_assert_held(&mvm->mutex); 1411 1412 /* Disable power save when reading GP2 */ 1413 ps_disabled = mvm->ps_disabled; 1414 if (!ps_disabled) { 1415 mvm->ps_disabled = true; 1416 iwl_mvm_power_update_device(mvm); 1417 } 1418 1419 *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG); 1420 *boottime = ktime_get_boot_ns(); 1421 1422 if (!ps_disabled) { 1423 mvm->ps_disabled = ps_disabled; 1424 iwl_mvm_power_update_device(mvm); 1425 } 1426 } 1427