1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10  * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of version 2 of the GNU General Public License as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24  * USA
25  *
26  * The full GNU General Public License is included in this distribution
27  * in the file called COPYING.
28  *
29  * Contact Information:
30  *  Intel Linux Wireless <linuxwifi@intel.com>
31  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32  *
33  * BSD LICENSE
34  *
35  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36  * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
37  * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
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41  * modification, are permitted provided that the following conditions
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43  *
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45  *    notice, this list of conditions and the following disclaimer.
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48  *    the documentation and/or other materials provided with the
49  *    distribution.
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51  *    contributors may be used to endorse or promote products derived
52  *    from this software without specific prior written permission.
53  *
54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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59  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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63  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65  *
66  *****************************************************************************/
67 #include <net/mac80211.h>
68 
69 #include "iwl-debug.h"
70 #include "iwl-io.h"
71 #include "iwl-prph.h"
72 #include "iwl-csr.h"
73 #include "mvm.h"
74 #include "fw/api/rs.h"
75 
76 /*
77  * Will return 0 even if the cmd failed when RFKILL is asserted unless
78  * CMD_WANT_SKB is set in cmd->flags.
79  */
80 int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
81 {
82 	int ret;
83 
84 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
85 	if (WARN_ON(mvm->d3_test_active))
86 		return -EIO;
87 #endif
88 
89 	/*
90 	 * Synchronous commands from this op-mode must hold
91 	 * the mutex, this ensures we don't try to send two
92 	 * (or more) synchronous commands at a time.
93 	 */
94 	if (!(cmd->flags & CMD_ASYNC)) {
95 		lockdep_assert_held(&mvm->mutex);
96 		if (!(cmd->flags & CMD_SEND_IN_IDLE))
97 			iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
98 	}
99 
100 	ret = iwl_trans_send_cmd(mvm->trans, cmd);
101 
102 	if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
103 		iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
104 
105 	/*
106 	 * If the caller wants the SKB, then don't hide any problems, the
107 	 * caller might access the response buffer which will be NULL if
108 	 * the command failed.
109 	 */
110 	if (cmd->flags & CMD_WANT_SKB)
111 		return ret;
112 
113 	/* Silently ignore failures if RFKILL is asserted */
114 	if (!ret || ret == -ERFKILL)
115 		return 0;
116 	return ret;
117 }
118 
119 int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
120 			 u32 flags, u16 len, const void *data)
121 {
122 	struct iwl_host_cmd cmd = {
123 		.id = id,
124 		.len = { len, },
125 		.data = { data, },
126 		.flags = flags,
127 	};
128 
129 	return iwl_mvm_send_cmd(mvm, &cmd);
130 }
131 
132 /*
133  * We assume that the caller set the status to the success value
134  */
135 int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
136 			    u32 *status)
137 {
138 	struct iwl_rx_packet *pkt;
139 	struct iwl_cmd_response *resp;
140 	int ret, resp_len;
141 
142 	lockdep_assert_held(&mvm->mutex);
143 
144 #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
145 	if (WARN_ON(mvm->d3_test_active))
146 		return -EIO;
147 #endif
148 
149 	/*
150 	 * Only synchronous commands can wait for status,
151 	 * we use WANT_SKB so the caller can't.
152 	 */
153 	if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
154 		      "cmd flags %x", cmd->flags))
155 		return -EINVAL;
156 
157 	cmd->flags |= CMD_WANT_SKB;
158 
159 	ret = iwl_trans_send_cmd(mvm->trans, cmd);
160 	if (ret == -ERFKILL) {
161 		/*
162 		 * The command failed because of RFKILL, don't update
163 		 * the status, leave it as success and return 0.
164 		 */
165 		return 0;
166 	} else if (ret) {
167 		return ret;
168 	}
169 
170 	pkt = cmd->resp_pkt;
171 
172 	resp_len = iwl_rx_packet_payload_len(pkt);
173 	if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
174 		ret = -EIO;
175 		goto out_free_resp;
176 	}
177 
178 	resp = (void *)pkt->data;
179 	*status = le32_to_cpu(resp->status);
180  out_free_resp:
181 	iwl_free_resp(cmd);
182 	return ret;
183 }
184 
185 /*
186  * We assume that the caller set the status to the sucess value
187  */
188 int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
189 				const void *data, u32 *status)
190 {
191 	struct iwl_host_cmd cmd = {
192 		.id = id,
193 		.len = { len, },
194 		.data = { data, },
195 	};
196 
197 	return iwl_mvm_send_cmd_status(mvm, &cmd, status);
198 }
199 
200 #define IWL_DECLARE_RATE_INFO(r) \
201 	[IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
202 
203 /*
204  * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
205  */
206 static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
207 	IWL_DECLARE_RATE_INFO(1),
208 	IWL_DECLARE_RATE_INFO(2),
209 	IWL_DECLARE_RATE_INFO(5),
210 	IWL_DECLARE_RATE_INFO(11),
211 	IWL_DECLARE_RATE_INFO(6),
212 	IWL_DECLARE_RATE_INFO(9),
213 	IWL_DECLARE_RATE_INFO(12),
214 	IWL_DECLARE_RATE_INFO(18),
215 	IWL_DECLARE_RATE_INFO(24),
216 	IWL_DECLARE_RATE_INFO(36),
217 	IWL_DECLARE_RATE_INFO(48),
218 	IWL_DECLARE_RATE_INFO(54),
219 };
220 
221 int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
222 					enum nl80211_band band)
223 {
224 	int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
225 	int idx;
226 	int band_offset = 0;
227 
228 	/* Legacy rate format, search for match in table */
229 	if (band == NL80211_BAND_5GHZ)
230 		band_offset = IWL_FIRST_OFDM_RATE;
231 	for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
232 		if (fw_rate_idx_to_plcp[idx] == rate)
233 			return idx - band_offset;
234 
235 	return -1;
236 }
237 
238 u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
239 {
240 	/* Get PLCP rate for tx_cmd->rate_n_flags */
241 	return fw_rate_idx_to_plcp[rate_idx];
242 }
243 
244 void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
245 {
246 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
247 	struct iwl_error_resp *err_resp = (void *)pkt->data;
248 
249 	IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
250 		le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
251 	IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
252 		le16_to_cpu(err_resp->bad_cmd_seq_num),
253 		le32_to_cpu(err_resp->error_service));
254 	IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
255 		le64_to_cpu(err_resp->timestamp));
256 }
257 
258 /*
259  * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
260  * The parameter should also be a combination of ANT_[ABC].
261  */
262 u8 first_antenna(u8 mask)
263 {
264 	BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
265 	if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
266 		return BIT(0);
267 	return BIT(ffs(mask) - 1);
268 }
269 
270 /*
271  * Toggles between TX antennas to send the probe request on.
272  * Receives the bitmask of valid TX antennas and the *index* used
273  * for the last TX, and returns the next valid *index* to use.
274  * In order to set it in the tx_cmd, must do BIT(idx).
275  */
276 u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
277 {
278 	u8 ind = last_idx;
279 	int i;
280 
281 	for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
282 		ind = (ind + 1) % RATE_MCS_ANT_NUM;
283 		if (valid & BIT(ind))
284 			return ind;
285 	}
286 
287 	WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
288 	return last_idx;
289 }
290 
291 static const struct {
292 	const char *name;
293 	u8 num;
294 } advanced_lookup[] = {
295 	{ "NMI_INTERRUPT_WDG", 0x34 },
296 	{ "SYSASSERT", 0x35 },
297 	{ "UCODE_VERSION_MISMATCH", 0x37 },
298 	{ "BAD_COMMAND", 0x38 },
299 	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
300 	{ "FATAL_ERROR", 0x3D },
301 	{ "NMI_TRM_HW_ERR", 0x46 },
302 	{ "NMI_INTERRUPT_TRM", 0x4C },
303 	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },
304 	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
305 	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
306 	{ "NMI_INTERRUPT_HOST", 0x66 },
307 	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },
308 	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },
309 	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
310 	{ "ADVANCED_SYSASSERT", 0 },
311 };
312 
313 static const char *desc_lookup(u32 num)
314 {
315 	int i;
316 
317 	for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
318 		if (advanced_lookup[i].num == num)
319 			return advanced_lookup[i].name;
320 
321 	/* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
322 	return advanced_lookup[i].name;
323 }
324 
325 /*
326  * Note: This structure is read from the device with IO accesses,
327  * and the reading already does the endian conversion. As it is
328  * read with u32-sized accesses, any members with a different size
329  * need to be ordered correctly though!
330  */
331 struct iwl_error_event_table_v1 {
332 	u32 valid;		/* (nonzero) valid, (0) log is empty */
333 	u32 error_id;		/* type of error */
334 	u32 pc;			/* program counter */
335 	u32 blink1;		/* branch link */
336 	u32 blink2;		/* branch link */
337 	u32 ilink1;		/* interrupt link */
338 	u32 ilink2;		/* interrupt link */
339 	u32 data1;		/* error-specific data */
340 	u32 data2;		/* error-specific data */
341 	u32 data3;		/* error-specific data */
342 	u32 bcon_time;		/* beacon timer */
343 	u32 tsf_low;		/* network timestamp function timer */
344 	u32 tsf_hi;		/* network timestamp function timer */
345 	u32 gp1;		/* GP1 timer register */
346 	u32 gp2;		/* GP2 timer register */
347 	u32 gp3;		/* GP3 timer register */
348 	u32 ucode_ver;		/* uCode version */
349 	u32 hw_ver;		/* HW Silicon version */
350 	u32 brd_ver;		/* HW board version */
351 	u32 log_pc;		/* log program counter */
352 	u32 frame_ptr;		/* frame pointer */
353 	u32 stack_ptr;		/* stack pointer */
354 	u32 hcmd;		/* last host command header */
355 	u32 isr0;		/* isr status register LMPM_NIC_ISR0:
356 				 * rxtx_flag */
357 	u32 isr1;		/* isr status register LMPM_NIC_ISR1:
358 				 * host_flag */
359 	u32 isr2;		/* isr status register LMPM_NIC_ISR2:
360 				 * enc_flag */
361 	u32 isr3;		/* isr status register LMPM_NIC_ISR3:
362 				 * time_flag */
363 	u32 isr4;		/* isr status register LMPM_NIC_ISR4:
364 				 * wico interrupt */
365 	u32 isr_pref;		/* isr status register LMPM_NIC_PREF_STAT */
366 	u32 wait_event;		/* wait event() caller address */
367 	u32 l2p_control;	/* L2pControlField */
368 	u32 l2p_duration;	/* L2pDurationField */
369 	u32 l2p_mhvalid;	/* L2pMhValidBits */
370 	u32 l2p_addr_match;	/* L2pAddrMatchStat */
371 	u32 lmpm_pmg_sel;	/* indicate which clocks are turned on
372 				 * (LMPM_PMG_SEL) */
373 	u32 u_timestamp;	/* indicate when the date and time of the
374 				 * compilation */
375 	u32 flow_handler;	/* FH read/write pointers, RX credit */
376 } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
377 
378 struct iwl_error_event_table {
379 	u32 valid;		/* (nonzero) valid, (0) log is empty */
380 	u32 error_id;		/* type of error */
381 	u32 trm_hw_status0;	/* TRM HW status */
382 	u32 trm_hw_status1;	/* TRM HW status */
383 	u32 blink2;		/* branch link */
384 	u32 ilink1;		/* interrupt link */
385 	u32 ilink2;		/* interrupt link */
386 	u32 data1;		/* error-specific data */
387 	u32 data2;		/* error-specific data */
388 	u32 data3;		/* error-specific data */
389 	u32 bcon_time;		/* beacon timer */
390 	u32 tsf_low;		/* network timestamp function timer */
391 	u32 tsf_hi;		/* network timestamp function timer */
392 	u32 gp1;		/* GP1 timer register */
393 	u32 gp2;		/* GP2 timer register */
394 	u32 fw_rev_type;	/* firmware revision type */
395 	u32 major;		/* uCode version major */
396 	u32 minor;		/* uCode version minor */
397 	u32 hw_ver;		/* HW Silicon version */
398 	u32 brd_ver;		/* HW board version */
399 	u32 log_pc;		/* log program counter */
400 	u32 frame_ptr;		/* frame pointer */
401 	u32 stack_ptr;		/* stack pointer */
402 	u32 hcmd;		/* last host command header */
403 	u32 isr0;		/* isr status register LMPM_NIC_ISR0:
404 				 * rxtx_flag */
405 	u32 isr1;		/* isr status register LMPM_NIC_ISR1:
406 				 * host_flag */
407 	u32 isr2;		/* isr status register LMPM_NIC_ISR2:
408 				 * enc_flag */
409 	u32 isr3;		/* isr status register LMPM_NIC_ISR3:
410 				 * time_flag */
411 	u32 isr4;		/* isr status register LMPM_NIC_ISR4:
412 				 * wico interrupt */
413 	u32 last_cmd_id;	/* last HCMD id handled by the firmware */
414 	u32 wait_event;		/* wait event() caller address */
415 	u32 l2p_control;	/* L2pControlField */
416 	u32 l2p_duration;	/* L2pDurationField */
417 	u32 l2p_mhvalid;	/* L2pMhValidBits */
418 	u32 l2p_addr_match;	/* L2pAddrMatchStat */
419 	u32 lmpm_pmg_sel;	/* indicate which clocks are turned on
420 				 * (LMPM_PMG_SEL) */
421 	u32 u_timestamp;	/* indicate when the date and time of the
422 				 * compilation */
423 	u32 flow_handler;	/* FH read/write pointers, RX credit */
424 } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
425 
426 /*
427  * UMAC error struct - relevant starting from family 8000 chip.
428  * Note: This structure is read from the device with IO accesses,
429  * and the reading already does the endian conversion. As it is
430  * read with u32-sized accesses, any members with a different size
431  * need to be ordered correctly though!
432  */
433 struct iwl_umac_error_event_table {
434 	u32 valid;		/* (nonzero) valid, (0) log is empty */
435 	u32 error_id;		/* type of error */
436 	u32 blink1;		/* branch link */
437 	u32 blink2;		/* branch link */
438 	u32 ilink1;		/* interrupt link */
439 	u32 ilink2;		/* interrupt link */
440 	u32 data1;		/* error-specific data */
441 	u32 data2;		/* error-specific data */
442 	u32 data3;		/* error-specific data */
443 	u32 umac_major;
444 	u32 umac_minor;
445 	u32 frame_pointer;	/* core register 27*/
446 	u32 stack_pointer;	/* core register 28 */
447 	u32 cmd_header;		/* latest host cmd sent to UMAC */
448 	u32 nic_isr_pref;	/* ISR status register */
449 } __packed;
450 
451 #define ERROR_START_OFFSET  (1 * sizeof(u32))
452 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
453 
454 static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
455 {
456 	struct iwl_trans *trans = mvm->trans;
457 	struct iwl_umac_error_event_table table;
458 	u32 base;
459 
460 	base = mvm->umac_error_event_table;
461 
462 	if (base < 0x800000) {
463 		IWL_ERR(mvm,
464 			"Not valid error log pointer 0x%08X for %s uCode\n",
465 			base,
466 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
467 			? "Init" : "RT");
468 		return;
469 	}
470 
471 	iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
472 
473 	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
474 		IWL_ERR(trans, "Start IWL Error Log Dump:\n");
475 		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
476 			mvm->status, table.valid);
477 	}
478 
479 	IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
480 		desc_lookup(table.error_id));
481 	IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
482 	IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
483 	IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
484 	IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
485 	IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
486 	IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
487 	IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
488 	IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
489 	IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
490 	IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
491 	IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
492 	IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
493 	IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
494 }
495 
496 static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
497 {
498 	struct iwl_trans *trans = mvm->trans;
499 	struct iwl_error_event_table table;
500 	u32 val;
501 
502 	if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
503 		if (!base)
504 			base = mvm->fw->init_errlog_ptr;
505 	} else {
506 		if (!base)
507 			base = mvm->fw->inst_errlog_ptr;
508 	}
509 
510 	if (base < 0x400000) {
511 		IWL_ERR(mvm,
512 			"Not valid error log pointer 0x%08X for %s uCode\n",
513 			base,
514 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
515 			? "Init" : "RT");
516 		return;
517 	}
518 
519 	/* check if there is a HW error */
520 	val = iwl_trans_read_mem32(trans, base);
521 	if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
522 		int err;
523 
524 		IWL_ERR(trans, "HW error, resetting before reading\n");
525 
526 		/* reset the device */
527 		iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
528 		usleep_range(5000, 6000);
529 
530 		/* set INIT_DONE flag */
531 		iwl_set_bit(trans, CSR_GP_CNTRL,
532 			    CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
533 
534 		/* and wait for clock stabilization */
535 		if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
536 			udelay(2);
537 
538 		err = iwl_poll_bit(trans, CSR_GP_CNTRL,
539 				   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
540 				   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
541 				   25000);
542 		if (err < 0) {
543 			IWL_DEBUG_INFO(trans,
544 				       "Failed to reset the card for the dump\n");
545 			return;
546 		}
547 	}
548 
549 	iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
550 
551 	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
552 		IWL_ERR(trans, "Start IWL Error Log Dump:\n");
553 		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
554 			mvm->status, table.valid);
555 	}
556 
557 	/* Do not change this output - scripts rely on it */
558 
559 	IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
560 
561 	trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
562 				      table.data1, table.data2, table.data3,
563 				      table.blink2, table.ilink1,
564 				      table.ilink2, table.bcon_time, table.gp1,
565 				      table.gp2, table.fw_rev_type, table.major,
566 				      table.minor, table.hw_ver, table.brd_ver);
567 	IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
568 		desc_lookup(table.error_id));
569 	IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
570 	IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
571 	IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
572 	IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
573 	IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
574 	IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
575 	IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
576 	IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
577 	IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
578 	IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
579 	IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
580 	IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
581 	IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
582 	IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
583 	IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
584 	IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
585 	IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
586 	IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
587 	IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
588 	IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
589 	IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
590 	IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
591 	IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
592 	IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
593 	IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
594 	IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
595 	IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
596 	IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
597 	IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
598 	IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
599 	IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
600 	IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
601 	IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
602 }
603 
604 void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
605 {
606 	iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
607 
608 	if (mvm->error_event_table[1])
609 		iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
610 
611 	if (mvm->support_umac_log)
612 		iwl_mvm_dump_umac_error_log(mvm);
613 }
614 
615 int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
616 {
617 	int i;
618 
619 	lockdep_assert_held(&mvm->queue_info_lock);
620 
621 	/* This should not be hit with new TX path */
622 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
623 		return -ENOSPC;
624 
625 	/* Start by looking for a free queue */
626 	for (i = minq; i <= maxq; i++)
627 		if (mvm->queue_info[i].hw_queue_refcount == 0 &&
628 		    mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
629 			return i;
630 
631 	/*
632 	 * If no free queue found - settle for an inactive one to reconfigure
633 	 * Make sure that the inactive queue either already belongs to this STA,
634 	 * or that if it belongs to another one - it isn't the reserved queue
635 	 */
636 	for (i = minq; i <= maxq; i++)
637 		if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
638 		    (sta_id == mvm->queue_info[i].ra_sta_id ||
639 		     !mvm->queue_info[i].reserved))
640 			return i;
641 
642 	return -ENOSPC;
643 }
644 
645 int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
646 			 int tid, int frame_limit, u16 ssn)
647 {
648 	struct iwl_scd_txq_cfg_cmd cmd = {
649 		.scd_queue = queue,
650 		.action = SCD_CFG_ENABLE_QUEUE,
651 		.window = frame_limit,
652 		.sta_id = sta_id,
653 		.ssn = cpu_to_le16(ssn),
654 		.tx_fifo = fifo,
655 		.aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
656 			      queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
657 		.tid = tid,
658 	};
659 	int ret;
660 
661 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
662 		return -EINVAL;
663 
664 	spin_lock_bh(&mvm->queue_info_lock);
665 	if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
666 		 "Trying to reconfig unallocated queue %d\n", queue)) {
667 		spin_unlock_bh(&mvm->queue_info_lock);
668 		return -ENXIO;
669 	}
670 	spin_unlock_bh(&mvm->queue_info_lock);
671 
672 	IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
673 
674 	ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
675 	WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
676 		  queue, fifo, ret);
677 
678 	return ret;
679 }
680 
681 static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
682 				       int mac80211_queue, u8 sta_id, u8 tid)
683 {
684 	bool enable_queue = true;
685 
686 	spin_lock_bh(&mvm->queue_info_lock);
687 
688 	/* Make sure this TID isn't already enabled */
689 	if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
690 		spin_unlock_bh(&mvm->queue_info_lock);
691 		IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
692 			queue, tid);
693 		return false;
694 	}
695 
696 	/* Update mappings and refcounts */
697 	if (mvm->queue_info[queue].hw_queue_refcount > 0)
698 		enable_queue = false;
699 
700 	if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) {
701 		WARN(mac80211_queue >=
702 		     BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]),
703 		     "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n",
704 		     mac80211_queue, queue, sta_id, tid);
705 		mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
706 	}
707 
708 	mvm->queue_info[queue].hw_queue_refcount++;
709 	mvm->queue_info[queue].tid_bitmap |= BIT(tid);
710 	mvm->queue_info[queue].ra_sta_id = sta_id;
711 
712 	if (enable_queue) {
713 		if (tid != IWL_MAX_TID_COUNT)
714 			mvm->queue_info[queue].mac80211_ac =
715 				tid_to_mac80211_ac[tid];
716 		else
717 			mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
718 
719 		mvm->queue_info[queue].txq_tid = tid;
720 	}
721 
722 	IWL_DEBUG_TX_QUEUES(mvm,
723 			    "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
724 			    queue, mvm->queue_info[queue].hw_queue_refcount,
725 			    mvm->hw_queue_to_mac80211[queue]);
726 
727 	spin_unlock_bh(&mvm->queue_info_lock);
728 
729 	return enable_queue;
730 }
731 
732 int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
733 			    u8 sta_id, u8 tid, unsigned int timeout)
734 {
735 	struct iwl_tx_queue_cfg_cmd cmd = {
736 		.flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
737 		.sta_id = sta_id,
738 		.tid = tid,
739 	};
740 	int queue;
741 
742 	if (cmd.tid == IWL_MAX_TID_COUNT)
743 		cmd.tid = IWL_MGMT_TID;
744 	queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
745 				    SCD_QUEUE_CFG, timeout);
746 
747 	if (queue < 0) {
748 		IWL_DEBUG_TX_QUEUES(mvm,
749 				    "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
750 				    sta_id, tid, queue);
751 		return queue;
752 	}
753 
754 	IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
755 			    queue, sta_id, tid);
756 
757 	mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
758 	IWL_DEBUG_TX_QUEUES(mvm,
759 			    "Enabling TXQ #%d (mac80211 map:0x%x)\n",
760 			    queue, mvm->hw_queue_to_mac80211[queue]);
761 
762 	return queue;
763 }
764 
765 bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
766 			u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
767 			unsigned int wdg_timeout)
768 {
769 	struct iwl_scd_txq_cfg_cmd cmd = {
770 		.scd_queue = queue,
771 		.action = SCD_CFG_ENABLE_QUEUE,
772 		.window = cfg->frame_limit,
773 		.sta_id = cfg->sta_id,
774 		.ssn = cpu_to_le16(ssn),
775 		.tx_fifo = cfg->fifo,
776 		.aggregate = cfg->aggregate,
777 		.tid = cfg->tid,
778 	};
779 	bool inc_ssn;
780 
781 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
782 		return false;
783 
784 	/* Send the enabling command if we need to */
785 	if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
786 					cfg->sta_id, cfg->tid))
787 		return false;
788 
789 	inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn,
790 					   NULL, wdg_timeout);
791 	if (inc_ssn)
792 		le16_add_cpu(&cmd.ssn, 1);
793 
794 	WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
795 	     "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
796 
797 	return inc_ssn;
798 }
799 
800 int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
801 			u8 tid, u8 flags)
802 {
803 	struct iwl_scd_txq_cfg_cmd cmd = {
804 		.scd_queue = queue,
805 		.action = SCD_CFG_DISABLE_QUEUE,
806 	};
807 	bool remove_mac_queue = true;
808 	int ret;
809 
810 	if (iwl_mvm_has_new_tx_api(mvm)) {
811 		spin_lock_bh(&mvm->queue_info_lock);
812 		mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac80211_queue);
813 		spin_unlock_bh(&mvm->queue_info_lock);
814 
815 		iwl_trans_txq_free(mvm->trans, queue);
816 
817 		return 0;
818 	}
819 
820 	spin_lock_bh(&mvm->queue_info_lock);
821 
822 	if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
823 		spin_unlock_bh(&mvm->queue_info_lock);
824 		return 0;
825 	}
826 
827 	mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
828 
829 	/*
830 	 * If there is another TID with the same AC - don't remove the MAC queue
831 	 * from the mapping
832 	 */
833 	if (tid < IWL_MAX_TID_COUNT) {
834 		unsigned long tid_bitmap =
835 			mvm->queue_info[queue].tid_bitmap;
836 		int ac = tid_to_mac80211_ac[tid];
837 		int i;
838 
839 		for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
840 			if (tid_to_mac80211_ac[i] == ac)
841 				remove_mac_queue = false;
842 		}
843 	}
844 
845 	if (remove_mac_queue)
846 		mvm->hw_queue_to_mac80211[queue] &=
847 			~BIT(mac80211_queue);
848 	mvm->queue_info[queue].hw_queue_refcount--;
849 
850 	cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
851 		SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
852 	if (cmd.action == SCD_CFG_DISABLE_QUEUE)
853 		mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
854 
855 	IWL_DEBUG_TX_QUEUES(mvm,
856 			    "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
857 			    queue,
858 			    mvm->queue_info[queue].hw_queue_refcount,
859 			    mvm->hw_queue_to_mac80211[queue]);
860 
861 	/* If the queue is still enabled - nothing left to do in this func */
862 	if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
863 		spin_unlock_bh(&mvm->queue_info_lock);
864 		return 0;
865 	}
866 
867 	cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
868 	cmd.tid = mvm->queue_info[queue].txq_tid;
869 
870 	/* Make sure queue info is correct even though we overwrite it */
871 	WARN(mvm->queue_info[queue].hw_queue_refcount ||
872 	     mvm->queue_info[queue].tid_bitmap ||
873 	     mvm->hw_queue_to_mac80211[queue],
874 	     "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
875 	     queue, mvm->queue_info[queue].hw_queue_refcount,
876 	     mvm->hw_queue_to_mac80211[queue],
877 	     mvm->queue_info[queue].tid_bitmap);
878 
879 	/* If we are here - the queue is freed and we can zero out these vals */
880 	mvm->queue_info[queue].hw_queue_refcount = 0;
881 	mvm->queue_info[queue].tid_bitmap = 0;
882 	mvm->hw_queue_to_mac80211[queue] = 0;
883 
884 	/* Regardless if this is a reserved TXQ for a STA - mark it as false */
885 	mvm->queue_info[queue].reserved = false;
886 
887 	spin_unlock_bh(&mvm->queue_info_lock);
888 
889 	iwl_trans_txq_disable(mvm->trans, queue, false);
890 	ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
891 				   sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
892 
893 	if (ret)
894 		IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
895 			queue, ret);
896 	return ret;
897 }
898 
899 /**
900  * iwl_mvm_send_lq_cmd() - Send link quality command
901  * @init: This command is sent as part of station initialization right
902  *        after station has been added.
903  *
904  * The link quality command is sent as the last step of station creation.
905  * This is the special case in which init is set and we call a callback in
906  * this case to clear the state indicating that station creation is in
907  * progress.
908  */
909 int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
910 {
911 	struct iwl_host_cmd cmd = {
912 		.id = LQ_CMD,
913 		.len = { sizeof(struct iwl_lq_cmd), },
914 		.flags = init ? 0 : CMD_ASYNC,
915 		.data = { lq, },
916 	};
917 
918 	if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA))
919 		return -EINVAL;
920 
921 	return iwl_mvm_send_cmd(mvm, &cmd);
922 }
923 
924 /**
925  * iwl_mvm_update_smps - Get a request to change the SMPS mode
926  * @req_type: The part of the driver who call for a change.
927  * @smps_requests: The request to change the SMPS mode.
928  *
929  * Get a requst to change the SMPS mode,
930  * and change it according to all other requests in the driver.
931  */
932 void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
933 			 enum iwl_mvm_smps_type_request req_type,
934 			 enum ieee80211_smps_mode smps_request)
935 {
936 	struct iwl_mvm_vif *mvmvif;
937 	enum ieee80211_smps_mode smps_mode;
938 	int i;
939 
940 	lockdep_assert_held(&mvm->mutex);
941 
942 	/* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
943 	if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
944 		return;
945 
946 	if (vif->type == NL80211_IFTYPE_AP)
947 		smps_mode = IEEE80211_SMPS_OFF;
948 	else
949 		smps_mode = IEEE80211_SMPS_AUTOMATIC;
950 
951 	mvmvif = iwl_mvm_vif_from_mac80211(vif);
952 	mvmvif->smps_requests[req_type] = smps_request;
953 	for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
954 		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
955 			smps_mode = IEEE80211_SMPS_STATIC;
956 			break;
957 		}
958 		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
959 			smps_mode = IEEE80211_SMPS_DYNAMIC;
960 	}
961 
962 	ieee80211_request_smps(vif, smps_mode);
963 }
964 
965 int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
966 {
967 	struct iwl_statistics_cmd scmd = {
968 		.flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
969 	};
970 	struct iwl_host_cmd cmd = {
971 		.id = STATISTICS_CMD,
972 		.len[0] = sizeof(scmd),
973 		.data[0] = &scmd,
974 		.flags = CMD_WANT_SKB,
975 	};
976 	int ret;
977 
978 	ret = iwl_mvm_send_cmd(mvm, &cmd);
979 	if (ret)
980 		return ret;
981 
982 	iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
983 	iwl_free_resp(&cmd);
984 
985 	if (clear)
986 		iwl_mvm_accu_radio_stats(mvm);
987 
988 	return 0;
989 }
990 
991 void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
992 {
993 	mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
994 	mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
995 	mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
996 	mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
997 }
998 
999 static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
1000 				   struct ieee80211_vif *vif)
1001 {
1002 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1003 	bool *result = _data;
1004 	int i;
1005 
1006 	for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
1007 		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
1008 		    mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
1009 			*result = false;
1010 	}
1011 }
1012 
1013 bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
1014 {
1015 	bool result = true;
1016 
1017 	lockdep_assert_held(&mvm->mutex);
1018 
1019 	if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
1020 		return false;
1021 
1022 	if (mvm->cfg->rx_with_siso_diversity)
1023 		return false;
1024 
1025 	ieee80211_iterate_active_interfaces_atomic(
1026 			mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1027 			iwl_mvm_diversity_iter, &result);
1028 
1029 	return result;
1030 }
1031 
1032 int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1033 			       bool prev)
1034 {
1035 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1036 	int res;
1037 
1038 	lockdep_assert_held(&mvm->mutex);
1039 
1040 	if (iwl_mvm_vif_low_latency(mvmvif) == prev)
1041 		return 0;
1042 
1043 	res = iwl_mvm_update_quotas(mvm, false, NULL);
1044 	if (res)
1045 		return res;
1046 
1047 	iwl_mvm_bt_coex_vif_change(mvm);
1048 
1049 	return iwl_mvm_power_update_mac(mvm);
1050 }
1051 
1052 static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
1053 {
1054 	bool *result = _data;
1055 
1056 	if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
1057 		*result = true;
1058 }
1059 
1060 bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
1061 {
1062 	bool result = false;
1063 
1064 	ieee80211_iterate_active_interfaces_atomic(
1065 			mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1066 			iwl_mvm_ll_iter, &result);
1067 
1068 	return result;
1069 }
1070 
1071 struct iwl_bss_iter_data {
1072 	struct ieee80211_vif *vif;
1073 	bool error;
1074 };
1075 
1076 static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
1077 				       struct ieee80211_vif *vif)
1078 {
1079 	struct iwl_bss_iter_data *data = _data;
1080 
1081 	if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
1082 		return;
1083 
1084 	if (data->vif) {
1085 		data->error = true;
1086 		return;
1087 	}
1088 
1089 	data->vif = vif;
1090 }
1091 
1092 struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
1093 {
1094 	struct iwl_bss_iter_data bss_iter_data = {};
1095 
1096 	ieee80211_iterate_active_interfaces_atomic(
1097 		mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1098 		iwl_mvm_bss_iface_iterator, &bss_iter_data);
1099 
1100 	if (bss_iter_data.error) {
1101 		IWL_ERR(mvm, "More than one managed interface active!\n");
1102 		return ERR_PTR(-EINVAL);
1103 	}
1104 
1105 	return bss_iter_data.vif;
1106 }
1107 
1108 struct iwl_sta_iter_data {
1109 	bool assoc;
1110 };
1111 
1112 static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
1113 				       struct ieee80211_vif *vif)
1114 {
1115 	struct iwl_sta_iter_data *data = _data;
1116 
1117 	if (vif->type != NL80211_IFTYPE_STATION)
1118 		return;
1119 
1120 	if (vif->bss_conf.assoc)
1121 		data->assoc = true;
1122 }
1123 
1124 bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
1125 {
1126 	struct iwl_sta_iter_data data = {
1127 		.assoc = false,
1128 	};
1129 
1130 	ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1131 						   IEEE80211_IFACE_ITER_NORMAL,
1132 						   iwl_mvm_sta_iface_iterator,
1133 						   &data);
1134 	return data.assoc;
1135 }
1136 
1137 unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
1138 				    struct ieee80211_vif *vif,
1139 				    bool tdls, bool cmd_q)
1140 {
1141 	struct iwl_fw_dbg_trigger_tlv *trigger;
1142 	struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
1143 	unsigned int default_timeout =
1144 		cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
1145 
1146 	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
1147 		return iwlmvm_mod_params.tfd_q_hang_detect ?
1148 			default_timeout : IWL_WATCHDOG_DISABLED;
1149 
1150 	trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
1151 	txq_timer = (void *)trigger->data;
1152 
1153 	if (tdls)
1154 		return le32_to_cpu(txq_timer->tdls);
1155 
1156 	if (cmd_q)
1157 		return le32_to_cpu(txq_timer->command_queue);
1158 
1159 	if (WARN_ON(!vif))
1160 		return default_timeout;
1161 
1162 	switch (ieee80211_vif_type_p2p(vif)) {
1163 	case NL80211_IFTYPE_ADHOC:
1164 		return le32_to_cpu(txq_timer->ibss);
1165 	case NL80211_IFTYPE_STATION:
1166 		return le32_to_cpu(txq_timer->bss);
1167 	case NL80211_IFTYPE_AP:
1168 		return le32_to_cpu(txq_timer->softap);
1169 	case NL80211_IFTYPE_P2P_CLIENT:
1170 		return le32_to_cpu(txq_timer->p2p_client);
1171 	case NL80211_IFTYPE_P2P_GO:
1172 		return le32_to_cpu(txq_timer->p2p_go);
1173 	case NL80211_IFTYPE_P2P_DEVICE:
1174 		return le32_to_cpu(txq_timer->p2p_device);
1175 	default:
1176 		WARN_ON(1);
1177 		return mvm->cfg->base_params->wd_timeout;
1178 	}
1179 }
1180 
1181 void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1182 			     const char *errmsg)
1183 {
1184 	struct iwl_fw_dbg_trigger_tlv *trig;
1185 	struct iwl_fw_dbg_trigger_mlme *trig_mlme;
1186 
1187 	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
1188 		goto out;
1189 
1190 	trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
1191 	trig_mlme = (void *)trig->data;
1192 	if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
1193 					   ieee80211_vif_to_wdev(vif), trig))
1194 		goto out;
1195 
1196 	if (trig_mlme->stop_connection_loss &&
1197 	    --trig_mlme->stop_connection_loss)
1198 		goto out;
1199 
1200 	iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
1201 
1202 out:
1203 	ieee80211_connection_loss(vif);
1204 }
1205 
1206 /*
1207  * Remove inactive TIDs of a given queue.
1208  * If all queue TIDs are inactive - mark the queue as inactive
1209  * If only some the queue TIDs are inactive - unmap them from the queue
1210  */
1211 static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
1212 					 struct iwl_mvm_sta *mvmsta, int queue,
1213 					 unsigned long tid_bitmap)
1214 {
1215 	int tid;
1216 
1217 	lockdep_assert_held(&mvmsta->lock);
1218 	lockdep_assert_held(&mvm->queue_info_lock);
1219 
1220 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
1221 		return;
1222 
1223 	/* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
1224 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1225 		/* If some TFDs are still queued - don't mark TID as inactive */
1226 		if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
1227 			tid_bitmap &= ~BIT(tid);
1228 
1229 		/* Don't mark as inactive any TID that has an active BA */
1230 		if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
1231 			tid_bitmap &= ~BIT(tid);
1232 	}
1233 
1234 	/* If all TIDs in the queue are inactive - mark queue as inactive. */
1235 	if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
1236 		mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
1237 
1238 		for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
1239 			mvmsta->tid_data[tid].is_tid_active = false;
1240 
1241 		IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
1242 				    queue);
1243 		return;
1244 	}
1245 
1246 	/*
1247 	 * If we are here, this is a shared queue and not all TIDs timed-out.
1248 	 * Remove the ones that did.
1249 	 */
1250 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1251 		int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
1252 
1253 		mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
1254 		mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
1255 		mvm->queue_info[queue].hw_queue_refcount--;
1256 		mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
1257 		mvmsta->tid_data[tid].is_tid_active = false;
1258 
1259 		IWL_DEBUG_TX_QUEUES(mvm,
1260 				    "Removing inactive TID %d from shared Q:%d\n",
1261 				    tid, queue);
1262 	}
1263 
1264 	IWL_DEBUG_TX_QUEUES(mvm,
1265 			    "TXQ #%d left with tid bitmap 0x%x\n", queue,
1266 			    mvm->queue_info[queue].tid_bitmap);
1267 
1268 	/*
1269 	 * There may be different TIDs with the same mac queues, so make
1270 	 * sure all TIDs have existing corresponding mac queues enabled
1271 	 */
1272 	tid_bitmap = mvm->queue_info[queue].tid_bitmap;
1273 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1274 		mvm->hw_queue_to_mac80211[queue] |=
1275 			BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
1276 	}
1277 
1278 	/* If the queue is marked as shared - "unshare" it */
1279 	if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
1280 	    mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
1281 		mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
1282 		IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
1283 				    queue);
1284 	}
1285 }
1286 
1287 void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
1288 {
1289 	unsigned long timeout_queues_map = 0;
1290 	unsigned long now = jiffies;
1291 	int i;
1292 
1293 	if (iwl_mvm_has_new_tx_api(mvm))
1294 		return;
1295 
1296 	spin_lock_bh(&mvm->queue_info_lock);
1297 	for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
1298 		if (mvm->queue_info[i].hw_queue_refcount > 0)
1299 			timeout_queues_map |= BIT(i);
1300 	spin_unlock_bh(&mvm->queue_info_lock);
1301 
1302 	rcu_read_lock();
1303 
1304 	/*
1305 	 * If a queue time outs - mark it as INACTIVE (don't remove right away
1306 	 * if we don't have to.) This is an optimization in case traffic comes
1307 	 * later, and we don't HAVE to use a currently-inactive queue
1308 	 */
1309 	for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
1310 		struct ieee80211_sta *sta;
1311 		struct iwl_mvm_sta *mvmsta;
1312 		u8 sta_id;
1313 		int tid;
1314 		unsigned long inactive_tid_bitmap = 0;
1315 		unsigned long queue_tid_bitmap;
1316 
1317 		spin_lock_bh(&mvm->queue_info_lock);
1318 		queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
1319 
1320 		/* If TXQ isn't in active use anyway - nothing to do here... */
1321 		if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
1322 		    mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
1323 			spin_unlock_bh(&mvm->queue_info_lock);
1324 			continue;
1325 		}
1326 
1327 		/* Check to see if there are inactive TIDs on this queue */
1328 		for_each_set_bit(tid, &queue_tid_bitmap,
1329 				 IWL_MAX_TID_COUNT + 1) {
1330 			if (time_after(mvm->queue_info[i].last_frame_time[tid] +
1331 				       IWL_MVM_DQA_QUEUE_TIMEOUT, now))
1332 				continue;
1333 
1334 			inactive_tid_bitmap |= BIT(tid);
1335 		}
1336 		spin_unlock_bh(&mvm->queue_info_lock);
1337 
1338 		/* If all TIDs are active - finish check on this queue */
1339 		if (!inactive_tid_bitmap)
1340 			continue;
1341 
1342 		/*
1343 		 * If we are here - the queue hadn't been served recently and is
1344 		 * in use
1345 		 */
1346 
1347 		sta_id = mvm->queue_info[i].ra_sta_id;
1348 		sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
1349 
1350 		/*
1351 		 * If the STA doesn't exist anymore, it isn't an error. It could
1352 		 * be that it was removed since getting the queues, and in this
1353 		 * case it should've inactivated its queues anyway.
1354 		 */
1355 		if (IS_ERR_OR_NULL(sta))
1356 			continue;
1357 
1358 		mvmsta = iwl_mvm_sta_from_mac80211(sta);
1359 
1360 		spin_lock_bh(&mvmsta->lock);
1361 		spin_lock(&mvm->queue_info_lock);
1362 		iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
1363 					     inactive_tid_bitmap);
1364 		spin_unlock(&mvm->queue_info_lock);
1365 		spin_unlock_bh(&mvmsta->lock);
1366 	}
1367 
1368 	rcu_read_unlock();
1369 }
1370 
1371 void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
1372 {
1373 	bool ps_disabled;
1374 
1375 	lockdep_assert_held(&mvm->mutex);
1376 
1377 	/* Disable power save when reading GP2 */
1378 	ps_disabled = mvm->ps_disabled;
1379 	if (!ps_disabled) {
1380 		mvm->ps_disabled = true;
1381 		iwl_mvm_power_update_device(mvm);
1382 	}
1383 
1384 	*gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
1385 	*boottime = ktime_get_boot_ns();
1386 
1387 	if (!ps_disabled) {
1388 		mvm->ps_disabled = ps_disabled;
1389 		iwl_mvm_power_update_device(mvm);
1390 	}
1391 }
1392 
1393 int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
1394 			 enum iwl_lqm_cmd_operatrions operation,
1395 			 u32 duration, u32 timeout)
1396 {
1397 	struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1398 	struct iwl_link_qual_msrmnt_cmd cmd = {
1399 		.cmd_operation = cpu_to_le32(operation),
1400 		.mac_id = cpu_to_le32(mvm_vif->id),
1401 		.measurement_time = cpu_to_le32(duration),
1402 		.timeout = cpu_to_le32(timeout),
1403 	};
1404 	u32 cmdid =
1405 		iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
1406 	int ret;
1407 
1408 	if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
1409 			 IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
1410 		return -EOPNOTSUPP;
1411 
1412 	if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
1413 		return -EINVAL;
1414 
1415 	switch (operation) {
1416 	case LQM_CMD_OPERATION_START_MEASUREMENT:
1417 		if (iwl_mvm_lqm_active(mvm_vif->mvm))
1418 			return -EBUSY;
1419 		if (!vif->bss_conf.assoc)
1420 			return -EINVAL;
1421 		mvm_vif->lqm_active = true;
1422 		break;
1423 	case LQM_CMD_OPERATION_STOP_MEASUREMENT:
1424 		if (!iwl_mvm_lqm_active(mvm_vif->mvm))
1425 			return -EINVAL;
1426 		break;
1427 	default:
1428 		return -EINVAL;
1429 	}
1430 
1431 	ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
1432 				   &cmd);
1433 
1434 	/* command failed - roll back lqm_active state */
1435 	if (ret) {
1436 		mvm_vif->lqm_active =
1437 			operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
1438 	}
1439 
1440 	return ret;
1441 }
1442 
1443 static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
1444 					struct ieee80211_vif *vif)
1445 {
1446 	struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1447 	bool *lqm_active = _data;
1448 
1449 	*lqm_active = *lqm_active || mvm_vif->lqm_active;
1450 }
1451 
1452 bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
1453 {
1454 	bool ret = false;
1455 
1456 	lockdep_assert_held(&mvm->mutex);
1457 	ieee80211_iterate_active_interfaces_atomic(
1458 		mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1459 		iwl_mvm_lqm_active_iterator, &ret);
1460 
1461 	return ret;
1462 }
1463