1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10de8ba41bSLiad Kaufman * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 118745f12aSShaul Triebitz * Copyright(c) 2018 Intel Corporation 12e705c121SKalle Valo * 13e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 14e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 15e705c121SKalle Valo * published by the Free Software Foundation. 16e705c121SKalle Valo * 17e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 18e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 19e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20e705c121SKalle Valo * General Public License for more details. 21e705c121SKalle Valo * 22e705c121SKalle Valo * You should have received a copy of the GNU General Public License 23e705c121SKalle Valo * along with this program; if not, write to the Free Software 24e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 25e705c121SKalle Valo * USA 26e705c121SKalle Valo * 27e705c121SKalle Valo * The full GNU General Public License is included in this distribution 28e705c121SKalle Valo * in the file called COPYING. 29e705c121SKalle Valo * 30e705c121SKalle Valo * Contact Information: 31cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 32e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33e705c121SKalle Valo * 34e705c121SKalle Valo * BSD LICENSE 35e705c121SKalle Valo * 36e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 37e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 38de8ba41bSLiad Kaufman * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 398745f12aSShaul Triebitz * Copyright(c) 2018 Intel Corporation 40e705c121SKalle Valo * All rights reserved. 41e705c121SKalle Valo * 42e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 43e705c121SKalle Valo * modification, are permitted provided that the following conditions 44e705c121SKalle Valo * are met: 45e705c121SKalle Valo * 46e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 47e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 48e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 49e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 50e705c121SKalle Valo * the documentation and/or other materials provided with the 51e705c121SKalle Valo * distribution. 52e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 53e705c121SKalle Valo * contributors may be used to endorse or promote products derived 54e705c121SKalle Valo * from this software without specific prior written permission. 55e705c121SKalle Valo * 56e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 57e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 58e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 59e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 60e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 62e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 66e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67e705c121SKalle Valo * 68e705c121SKalle Valo *****************************************************************************/ 69e705c121SKalle Valo #include <linux/module.h> 70e705c121SKalle Valo #include <linux/vmalloc.h> 71e705c121SKalle Valo #include <net/mac80211.h> 72e705c121SKalle Valo 739fca9d5cSJohannes Berg #include "fw/notif-wait.h" 74e705c121SKalle Valo #include "iwl-trans.h" 75e705c121SKalle Valo #include "iwl-op-mode.h" 76d962f9b1SJohannes Berg #include "fw/img.h" 77e705c121SKalle Valo #include "iwl-debug.h" 78e705c121SKalle Valo #include "iwl-drv.h" 79e705c121SKalle Valo #include "iwl-modparams.h" 80e705c121SKalle Valo #include "mvm.h" 81e705c121SKalle Valo #include "iwl-phy-db.h" 82e705c121SKalle Valo #include "iwl-eeprom-parse.h" 83e705c121SKalle Valo #include "iwl-csr.h" 84e705c121SKalle Valo #include "iwl-io.h" 85e705c121SKalle Valo #include "iwl-prph.h" 86e705c121SKalle Valo #include "rs.h" 87d172a5efSJohannes Berg #include "fw/api/scan.h" 88e705c121SKalle Valo #include "time-event.h" 8939bdb17eSSharon Dvir #include "fw-api.h" 90d172a5efSJohannes Berg #include "fw/api/scan.h" 91f2abcfa6SLuca Coelho #include "fw/acpi.h" 92e705c121SKalle Valo 93e705c121SKalle Valo #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" 94e705c121SKalle Valo MODULE_DESCRIPTION(DRV_DESCRIPTION); 95e705c121SKalle Valo MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 96e705c121SKalle Valo MODULE_LICENSE("GPL"); 97e705c121SKalle Valo 98e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops; 99e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq; 100e705c121SKalle Valo 101e705c121SKalle Valo struct iwl_mvm_mod_params iwlmvm_mod_params = { 102e705c121SKalle Valo .power_scheme = IWL_POWER_SCHEME_BPS, 103e705c121SKalle Valo .tfd_q_hang_detect = true 104e705c121SKalle Valo /* rest of fields are 0 by default */ 105e705c121SKalle Valo }; 106e705c121SKalle Valo 1072ef00c53SJoe Perches module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, 0444); 108e705c121SKalle Valo MODULE_PARM_DESC(init_dbg, 109e705c121SKalle Valo "set to true to debug an ASSERT in INIT fw (default: false"); 1102ef00c53SJoe Perches module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, 0444); 111e705c121SKalle Valo MODULE_PARM_DESC(power_scheme, 112e705c121SKalle Valo "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); 113e705c121SKalle Valo module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, 1142ef00c53SJoe Perches bool, 0444); 115e705c121SKalle Valo MODULE_PARM_DESC(tfd_q_hang_detect, 116e705c121SKalle Valo "TFD queues hang detection (default: true"); 117e705c121SKalle Valo 118e705c121SKalle Valo /* 119e705c121SKalle Valo * module init and exit functions 120e705c121SKalle Valo */ 121e705c121SKalle Valo static int __init iwl_mvm_init(void) 122e705c121SKalle Valo { 123e705c121SKalle Valo int ret; 124e705c121SKalle Valo 125e705c121SKalle Valo ret = iwl_mvm_rate_control_register(); 126e705c121SKalle Valo if (ret) { 127e705c121SKalle Valo pr_err("Unable to register rate control algorithm: %d\n", ret); 128e705c121SKalle Valo return ret; 129e705c121SKalle Valo } 130e705c121SKalle Valo 131e705c121SKalle Valo ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); 1329f66a397SGregory Greenman if (ret) 133e705c121SKalle Valo pr_err("Unable to register MVM op_mode: %d\n", ret); 134e705c121SKalle Valo 135e705c121SKalle Valo return ret; 136e705c121SKalle Valo } 137e705c121SKalle Valo module_init(iwl_mvm_init); 138e705c121SKalle Valo 139e705c121SKalle Valo static void __exit iwl_mvm_exit(void) 140e705c121SKalle Valo { 141e705c121SKalle Valo iwl_opmode_deregister("iwlmvm"); 142e705c121SKalle Valo iwl_mvm_rate_control_unregister(); 143e705c121SKalle Valo } 144e705c121SKalle Valo module_exit(iwl_mvm_exit); 145e705c121SKalle Valo 146e705c121SKalle Valo static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) 147e705c121SKalle Valo { 148e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 149e705c121SKalle Valo u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; 150e705c121SKalle Valo u32 reg_val = 0; 151e705c121SKalle Valo u32 phy_config = iwl_mvm_get_phy_config(mvm); 152e705c121SKalle Valo 153e705c121SKalle Valo radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> 154e705c121SKalle Valo FW_PHY_CFG_RADIO_TYPE_POS; 155e705c121SKalle Valo radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> 156e705c121SKalle Valo FW_PHY_CFG_RADIO_STEP_POS; 157e705c121SKalle Valo radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> 158e705c121SKalle Valo FW_PHY_CFG_RADIO_DASH_POS; 159e705c121SKalle Valo 160e705c121SKalle Valo /* SKU control */ 161e705c121SKalle Valo reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << 162e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 163e705c121SKalle Valo reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << 164e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 165e705c121SKalle Valo 166e705c121SKalle Valo /* radio configuration */ 167e705c121SKalle Valo reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 168e705c121SKalle Valo reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 169e705c121SKalle Valo reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 170e705c121SKalle Valo 171e705c121SKalle Valo WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & 172e705c121SKalle Valo ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); 173e705c121SKalle Valo 174e705c121SKalle Valo /* 1756e584873SSara Sharon * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC 1766e584873SSara Sharon * sampling, and shouldn't be set to any non-zero value. 1776e584873SSara Sharon * The same is supposed to be true of the other HW, but unsetting 1786e584873SSara Sharon * them (such as the 7260) causes automatic tests to fail on seemingly 1796e584873SSara Sharon * unrelated errors. Need to further investigate this, but for now 1806e584873SSara Sharon * we'll separate cases. 181e705c121SKalle Valo */ 1826e584873SSara Sharon if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000) 183e705c121SKalle Valo reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; 184e705c121SKalle Valo 1852d8c2615SShahar S Matityahu if (iwl_fw_dbg_is_d3_debug_enabled(&mvm->fwrt)) 1862d8c2615SShahar S Matityahu reg_val |= CSR_HW_IF_CONFIG_REG_D3_DEBUG; 1872d8c2615SShahar S Matityahu 188e705c121SKalle Valo iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, 189e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | 190e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | 191e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | 192e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | 193e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | 194e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | 1952d8c2615SShahar S Matityahu CSR_HW_IF_CONFIG_REG_BIT_MAC_SI | 1962d8c2615SShahar S Matityahu CSR_HW_IF_CONFIG_REG_D3_DEBUG, 197e705c121SKalle Valo reg_val); 198e705c121SKalle Valo 199e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 200e705c121SKalle Valo radio_cfg_step, radio_cfg_dash); 201e705c121SKalle Valo 202e705c121SKalle Valo /* 203e705c121SKalle Valo * W/A : NIC is stuck in a reset state after Early PCIe power off 204e705c121SKalle Valo * (PCIe power is lost before PERST# is asserted), causing ME FW 205e705c121SKalle Valo * to lose ownership and not being able to obtain it back. 206e705c121SKalle Valo */ 207e705c121SKalle Valo if (!mvm->trans->cfg->apmg_not_supported) 208e705c121SKalle Valo iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, 209e705c121SKalle Valo APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 210e705c121SKalle Valo ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 211e705c121SKalle Valo } 212e705c121SKalle Valo 213c9cb14a6SChaya Rachel Ivgi /** 214c9cb14a6SChaya Rachel Ivgi * enum iwl_rx_handler_context context for Rx handler 215c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_SYNC : this means that it will be called in the Rx path 216c9cb14a6SChaya Rachel Ivgi * which can't acquire mvm->mutex. 217c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex 218c9cb14a6SChaya Rachel Ivgi * (and only in this case!), it should be set as ASYNC. In that case, 219c9cb14a6SChaya Rachel Ivgi * it will be called from a worker with mvm->mutex held. 220c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the 221c9cb14a6SChaya Rachel Ivgi * mutex itself, it will be called from a worker without mvm->mutex held. 222c9cb14a6SChaya Rachel Ivgi */ 223c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context { 224c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC, 225c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED, 226c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_UNLOCKED, 227c9cb14a6SChaya Rachel Ivgi }; 228c9cb14a6SChaya Rachel Ivgi 229c9cb14a6SChaya Rachel Ivgi /** 230c9cb14a6SChaya Rachel Ivgi * struct iwl_rx_handlers handler for FW notification 231c9cb14a6SChaya Rachel Ivgi * @cmd_id: command id 232c9cb14a6SChaya Rachel Ivgi * @context: see &iwl_rx_handler_context 233c9cb14a6SChaya Rachel Ivgi * @fn: the function is called when notification is received 234c9cb14a6SChaya Rachel Ivgi */ 235e705c121SKalle Valo struct iwl_rx_handlers { 236e705c121SKalle Valo u16 cmd_id; 237c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 238e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 239e705c121SKalle Valo }; 240e705c121SKalle Valo 241c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER(_cmd_id, _fn, _context) \ 242c9cb14a6SChaya Rachel Ivgi { .cmd_id = _cmd_id, .fn = _fn, .context = _context } 243c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ 244c9cb14a6SChaya Rachel Ivgi { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } 245e705c121SKalle Valo 246e705c121SKalle Valo /* 247e705c121SKalle Valo * Handlers for fw notifications 248e705c121SKalle Valo * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME 249e705c121SKalle Valo * This list should be in order of frequency for performance purposes. 250e705c121SKalle Valo * 251c9cb14a6SChaya Rachel Ivgi * The handler can be one from three contexts, see &iwl_rx_handler_context 252e705c121SKalle Valo */ 253e705c121SKalle Valo static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { 254c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), 255c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), 256e705c121SKalle Valo 25784226ca1SGregory Greenman RX_HANDLER_GRP(DATA_PATH_GROUP, TLC_MNG_UPDATE_NOTIF, 25884226ca1SGregory Greenman iwl_mvm_tlc_update_notif, RX_HANDLER_SYNC), 25984226ca1SGregory Greenman 260c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, 261c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 262c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, 263c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 264c9cb14a6SChaya Rachel Ivgi RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, 265c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 266e705c121SKalle Valo 2673af512d6SSara Sharon RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, 268c9cb14a6SChaya Rachel Ivgi iwl_mvm_window_status_notif, RX_HANDLER_SYNC), 2693af512d6SSara Sharon 270c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, 271c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 272c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, 273c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 274e705c121SKalle Valo 275c9cb14a6SChaya Rachel Ivgi RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), 276e705c121SKalle Valo 277e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE, 278c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), 279e705c121SKalle Valo RX_HANDLER(SCAN_OFFLOAD_COMPLETE, 280c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_complete_notif, 281c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 282e705c121SKalle Valo RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, 283c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 284e705c121SKalle Valo RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, 285c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 286e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, 287c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), 288e705c121SKalle Valo 289c9cb14a6SChaya Rachel Ivgi RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, 290c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 291e705c121SKalle Valo 292e705c121SKalle Valo RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, 293c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 294e705c121SKalle Valo 295c9cb14a6SChaya Rachel Ivgi RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), 296e705c121SKalle Valo RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, 297c9cb14a6SChaya Rachel Ivgi iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), 298c9cb14a6SChaya Rachel Ivgi RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, 299c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 300e705c121SKalle Valo RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, 301ec77a33eSChaya Rachel Ivgi iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), 3020a3b7119SChaya Rachel Ivgi RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, 303c9cb14a6SChaya Rachel Ivgi iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), 304e705c121SKalle Valo 305e705c121SKalle Valo RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, 306c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 307c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, 308c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 309c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, 310c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 311bdccdb85SGolan Ben-Ami RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, 312bdccdb85SGolan Ben-Ami iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), 3130db056d3SSara Sharon RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, 314c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), 315f92659a1SSara Sharon RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, 316c9cb14a6SChaya Rachel Ivgi iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), 31765e25482SJohannes Berg RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, 31865e25482SJohannes Berg iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), 319e705c121SKalle Valo }; 320e705c121SKalle Valo #undef RX_HANDLER 321e705c121SKalle Valo #undef RX_HANDLER_GRP 322e705c121SKalle Valo 32339bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 32439bdb17eSSharon Dvir * Access is done through binary search 32539bdb17eSSharon Dvir */ 32639bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { 32739bdb17eSSharon Dvir HCMD_NAME(MVM_ALIVE), 32839bdb17eSSharon Dvir HCMD_NAME(REPLY_ERROR), 32939bdb17eSSharon Dvir HCMD_NAME(ECHO_CMD), 33039bdb17eSSharon Dvir HCMD_NAME(INIT_COMPLETE_NOTIF), 33139bdb17eSSharon Dvir HCMD_NAME(PHY_CONTEXT_CMD), 33239bdb17eSSharon Dvir HCMD_NAME(DBG_CFG), 33339bdb17eSSharon Dvir HCMD_NAME(SCAN_CFG_CMD), 33439bdb17eSSharon Dvir HCMD_NAME(SCAN_REQ_UMAC), 33539bdb17eSSharon Dvir HCMD_NAME(SCAN_ABORT_UMAC), 33639bdb17eSSharon Dvir HCMD_NAME(SCAN_COMPLETE_UMAC), 33739bdb17eSSharon Dvir HCMD_NAME(TOF_CMD), 33839bdb17eSSharon Dvir HCMD_NAME(TOF_NOTIFICATION), 3393af512d6SSara Sharon HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), 34039bdb17eSSharon Dvir HCMD_NAME(ADD_STA_KEY), 34139bdb17eSSharon Dvir HCMD_NAME(ADD_STA), 34239bdb17eSSharon Dvir HCMD_NAME(REMOVE_STA), 34339bdb17eSSharon Dvir HCMD_NAME(FW_GET_ITEM_CMD), 34439bdb17eSSharon Dvir HCMD_NAME(TX_CMD), 34539bdb17eSSharon Dvir HCMD_NAME(SCD_QUEUE_CFG), 34639bdb17eSSharon Dvir HCMD_NAME(TXPATH_FLUSH), 34739bdb17eSSharon Dvir HCMD_NAME(MGMT_MCAST_KEY), 34839bdb17eSSharon Dvir HCMD_NAME(WEP_KEY), 34939bdb17eSSharon Dvir HCMD_NAME(SHARED_MEM_CFG), 35039bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), 35139bdb17eSSharon Dvir HCMD_NAME(MAC_CONTEXT_CMD), 35239bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_CMD), 35339bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_NOTIFICATION), 35439bdb17eSSharon Dvir HCMD_NAME(BINDING_CONTEXT_CMD), 35539bdb17eSSharon Dvir HCMD_NAME(TIME_QUOTA_CMD), 35639bdb17eSSharon Dvir HCMD_NAME(NON_QOS_TX_COUNTER_CMD), 3577089ae63SJohannes Berg HCMD_NAME(LEDS_CMD), 35839bdb17eSSharon Dvir HCMD_NAME(LQ_CMD), 35939bdb17eSSharon Dvir HCMD_NAME(FW_PAGING_BLOCK_CMD), 36039bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), 36139bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), 36239bdb17eSSharon Dvir HCMD_NAME(HOT_SPOT_CMD), 36339bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), 36439bdb17eSSharon Dvir HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), 36539bdb17eSSharon Dvir HCMD_NAME(BT_COEX_CI), 36639bdb17eSSharon Dvir HCMD_NAME(PHY_CONFIGURATION_CMD), 36739bdb17eSSharon Dvir HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), 368176aa60bSSara Sharon HCMD_NAME(PHY_DB_CMD), 36939bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_COMPLETE), 37039bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), 37139bdb17eSSharon Dvir HCMD_NAME(POWER_TABLE_CMD), 37239bdb17eSSharon Dvir HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), 37339bdb17eSSharon Dvir HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), 37439bdb17eSSharon Dvir HCMD_NAME(DC2DC_CONFIG_CMD), 37539bdb17eSSharon Dvir HCMD_NAME(NVM_ACCESS_CMD), 37639bdb17eSSharon Dvir HCMD_NAME(BEACON_NOTIFICATION), 37739bdb17eSSharon Dvir HCMD_NAME(BEACON_TEMPLATE_CMD), 37839bdb17eSSharon Dvir HCMD_NAME(TX_ANT_CONFIGURATION_CMD), 37939bdb17eSSharon Dvir HCMD_NAME(BT_CONFIG), 38039bdb17eSSharon Dvir HCMD_NAME(STATISTICS_CMD), 38139bdb17eSSharon Dvir HCMD_NAME(STATISTICS_NOTIFICATION), 38239bdb17eSSharon Dvir HCMD_NAME(EOSP_NOTIFICATION), 38339bdb17eSSharon Dvir HCMD_NAME(REDUCE_TX_POWER_CMD), 38439bdb17eSSharon Dvir HCMD_NAME(CARD_STATE_NOTIFICATION), 38539bdb17eSSharon Dvir HCMD_NAME(MISSED_BEACONS_NOTIFICATION), 38639bdb17eSSharon Dvir HCMD_NAME(TDLS_CONFIG_CMD), 38739bdb17eSSharon Dvir HCMD_NAME(MAC_PM_POWER_TABLE), 38839bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), 38939bdb17eSSharon Dvir HCMD_NAME(MFUART_LOAD_NOTIFICATION), 39043413a97SSara Sharon HCMD_NAME(RSS_CONFIG_CMD), 39139bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), 39239bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_PHY_CMD), 39339bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_MPDU_CMD), 3943e73aa3bSEmmanuel Grumbach HCMD_NAME(FRAME_RELEASE), 39539bdb17eSSharon Dvir HCMD_NAME(BA_NOTIF), 39639bdb17eSSharon Dvir HCMD_NAME(MCC_UPDATE_CMD), 39739bdb17eSSharon Dvir HCMD_NAME(MCC_CHUB_UPDATE_CMD), 39839bdb17eSSharon Dvir HCMD_NAME(MARKER_CMD), 39939bdb17eSSharon Dvir HCMD_NAME(BT_PROFILE_NOTIFICATION), 40039bdb17eSSharon Dvir HCMD_NAME(BCAST_FILTER_CMD), 40139bdb17eSSharon Dvir HCMD_NAME(MCAST_FILTER_CMD), 40239bdb17eSSharon Dvir HCMD_NAME(REPLY_SF_CFG_CMD), 40339bdb17eSSharon Dvir HCMD_NAME(REPLY_BEACON_FILTERING_CMD), 40439bdb17eSSharon Dvir HCMD_NAME(D3_CONFIG_CMD), 40539bdb17eSSharon Dvir HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), 40639bdb17eSSharon Dvir HCMD_NAME(OFFLOADS_QUERY_CMD), 40739bdb17eSSharon Dvir HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), 40839bdb17eSSharon Dvir HCMD_NAME(MATCH_FOUND_NOTIFICATION), 40939bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), 41039bdb17eSSharon Dvir HCMD_NAME(WOWLAN_PATTERNS), 41139bdb17eSSharon Dvir HCMD_NAME(WOWLAN_CONFIGURATION), 41239bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TSC_RSC_PARAM), 41339bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TKIP_PARAM), 41439bdb17eSSharon Dvir HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), 41539bdb17eSSharon Dvir HCMD_NAME(WOWLAN_GET_STATUSES), 41639bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE), 41739bdb17eSSharon Dvir HCMD_NAME(D0I3_END_CMD), 41839bdb17eSSharon Dvir HCMD_NAME(LTR_CONFIG), 419e705c121SKalle Valo }; 42039bdb17eSSharon Dvir 42139bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 42239bdb17eSSharon Dvir * Access is done through binary search 42339bdb17eSSharon Dvir */ 4245b086414SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_system_names[] = { 4255b086414SGolan Ben-Ami HCMD_NAME(SHARED_MEM_CFG_CMD), 4264399caaaSSara Sharon HCMD_NAME(INIT_EXTENDED_CFG_CMD), 4275b086414SGolan Ben-Ami }; 4285b086414SGolan Ben-Ami 4295b086414SGolan Ben-Ami /* Please keep this array *SORTED* by hex value. 4305b086414SGolan Ben-Ami * Access is done through binary search 4315b086414SGolan Ben-Ami */ 43203098268SAviya Erenfeld static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { 433d3a108a4SAndrei Otcheretianski HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), 43403098268SAviya Erenfeld }; 43503098268SAviya Erenfeld 43603098268SAviya Erenfeld /* Please keep this array *SORTED* by hex value. 43703098268SAviya Erenfeld * Access is done through binary search 43803098268SAviya Erenfeld */ 43939bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { 44039bdb17eSSharon Dvir HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), 4415c89e7bcSChaya Rachel Ivgi HCMD_NAME(CTDP_CONFIG_CMD), 442c221daf2SChaya Rachel Ivgi HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), 443a6bff3cbSHaim Dreyfuss HCMD_NAME(GEO_TX_POWER_LIMIT), 4440a3b7119SChaya Rachel Ivgi HCMD_NAME(CT_KILL_NOTIFICATION), 44539bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), 44639bdb17eSSharon Dvir }; 44739bdb17eSSharon Dvir 4480db056d3SSara Sharon /* Please keep this array *SORTED* by hex value. 4490db056d3SSara Sharon * Access is done through binary search 4500db056d3SSara Sharon */ 451e0d8fdecSSara Sharon static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { 452ddef2f98SEmmanuel Grumbach HCMD_NAME(DQA_ENABLE_CMD), 453e0d8fdecSSara Sharon HCMD_NAME(UPDATE_MU_GROUPS_CMD), 45494bb4481SSara Sharon HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), 455514c3069SLuca Coelho HCMD_NAME(STA_HE_CTXT_CMD), 4568edbfaa1SSara Sharon HCMD_NAME(RFH_QUEUE_CONFIG_CMD), 45765e25482SJohannes Berg HCMD_NAME(STA_PM_NOTIF), 458f92659a1SSara Sharon HCMD_NAME(MU_GROUP_MGMT_NOTIF), 45994bb4481SSara Sharon HCMD_NAME(RX_QUEUES_NOTIFICATION), 460e0d8fdecSSara Sharon }; 461e0d8fdecSSara Sharon 462e0d8fdecSSara Sharon /* Please keep this array *SORTED* by hex value. 463e0d8fdecSSara Sharon * Access is done through binary search 464e0d8fdecSSara Sharon */ 465bdccdb85SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_debug_names[] = { 466bdccdb85SGolan Ben-Ami HCMD_NAME(MFU_ASSERT_DUMP_NTF), 467bdccdb85SGolan Ben-Ami }; 468bdccdb85SGolan Ben-Ami 469bdccdb85SGolan Ben-Ami /* Please keep this array *SORTED* by hex value. 470bdccdb85SGolan Ben-Ami * Access is done through binary search 471bdccdb85SGolan Ben-Ami */ 4720db056d3SSara Sharon static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { 4730db056d3SSara Sharon HCMD_NAME(STORED_BEACON_NTF), 4740db056d3SSara Sharon }; 4750db056d3SSara Sharon 4761f370650SSara Sharon /* Please keep this array *SORTED* by hex value. 4771f370650SSara Sharon * Access is done through binary search 4781f370650SSara Sharon */ 4791f370650SSara Sharon static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { 4801f370650SSara Sharon HCMD_NAME(NVM_ACCESS_COMPLETE), 481e9e1ba3dSSara Sharon HCMD_NAME(NVM_GET_INFO), 4821f370650SSara Sharon }; 4831f370650SSara Sharon 48439bdb17eSSharon Dvir static const struct iwl_hcmd_arr iwl_mvm_groups[] = { 48539bdb17eSSharon Dvir [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 48639bdb17eSSharon Dvir [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 4875b086414SGolan Ben-Ami [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), 48803098268SAviya Erenfeld [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), 48939bdb17eSSharon Dvir [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), 490e0d8fdecSSara Sharon [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), 4910db056d3SSara Sharon [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), 4921f370650SSara Sharon [REGULATORY_AND_NVM_GROUP] = 4931f370650SSara Sharon HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), 49439bdb17eSSharon Dvir }; 49539bdb17eSSharon Dvir 496e705c121SKalle Valo /* this forward declaration can avoid to export the function */ 497e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk); 498a75b9b33SLuca Coelho #ifdef CONFIG_PM 499e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); 500a75b9b33SLuca Coelho #endif 501e705c121SKalle Valo 502f2abcfa6SLuca Coelho static u32 iwl_mvm_min_backoff(struct iwl_mvm *mvm) 503e705c121SKalle Valo { 504f2abcfa6SLuca Coelho const struct iwl_pwr_tx_backoff *backoff = mvm->cfg->pwr_tx_backoffs; 505f2abcfa6SLuca Coelho u64 dflt_pwr_limit; 506e705c121SKalle Valo 507f2abcfa6SLuca Coelho if (!backoff) 508e705c121SKalle Valo return 0; 509e705c121SKalle Valo 510f2abcfa6SLuca Coelho dflt_pwr_limit = iwl_acpi_get_pwr_limit(mvm->dev); 511e705c121SKalle Valo 512f2abcfa6SLuca Coelho while (backoff->pwr) { 513f2abcfa6SLuca Coelho if (dflt_pwr_limit >= backoff->pwr) 514f2abcfa6SLuca Coelho return backoff->backoff; 515f2abcfa6SLuca Coelho 516f2abcfa6SLuca Coelho backoff++; 517e705c121SKalle Valo } 518e705c121SKalle Valo 519e705c121SKalle Valo return 0; 520e705c121SKalle Valo } 521e705c121SKalle Valo 522d3a108a4SAndrei Otcheretianski static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) 523d3a108a4SAndrei Otcheretianski { 524d3a108a4SAndrei Otcheretianski struct iwl_mvm *mvm = 525d3a108a4SAndrei Otcheretianski container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); 526d3a108a4SAndrei Otcheretianski struct ieee80211_vif *tx_blocked_vif; 527d3a108a4SAndrei Otcheretianski struct iwl_mvm_vif *mvmvif; 528d3a108a4SAndrei Otcheretianski 529d3a108a4SAndrei Otcheretianski mutex_lock(&mvm->mutex); 530d3a108a4SAndrei Otcheretianski 531d3a108a4SAndrei Otcheretianski tx_blocked_vif = 532d3a108a4SAndrei Otcheretianski rcu_dereference_protected(mvm->csa_tx_blocked_vif, 533d3a108a4SAndrei Otcheretianski lockdep_is_held(&mvm->mutex)); 534d3a108a4SAndrei Otcheretianski 535d3a108a4SAndrei Otcheretianski if (!tx_blocked_vif) 536d3a108a4SAndrei Otcheretianski goto unlock; 537d3a108a4SAndrei Otcheretianski 538d3a108a4SAndrei Otcheretianski mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); 539d3a108a4SAndrei Otcheretianski iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); 540d3a108a4SAndrei Otcheretianski RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); 541d3a108a4SAndrei Otcheretianski unlock: 542d3a108a4SAndrei Otcheretianski mutex_unlock(&mvm->mutex); 543d3a108a4SAndrei Otcheretianski } 544d3a108a4SAndrei Otcheretianski 5457174beb6SJohannes Berg static int iwl_mvm_fwrt_dump_start(void *ctx) 5467174beb6SJohannes Berg { 5477174beb6SJohannes Berg struct iwl_mvm *mvm = ctx; 5487174beb6SJohannes Berg int ret; 5497174beb6SJohannes Berg 5507174beb6SJohannes Berg ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT); 5517174beb6SJohannes Berg if (ret) 5527174beb6SJohannes Berg return ret; 5537174beb6SJohannes Berg 5547174beb6SJohannes Berg mutex_lock(&mvm->mutex); 5557174beb6SJohannes Berg 5567174beb6SJohannes Berg return 0; 5577174beb6SJohannes Berg } 5587174beb6SJohannes Berg 5597174beb6SJohannes Berg static void iwl_mvm_fwrt_dump_end(void *ctx) 5607174beb6SJohannes Berg { 5617174beb6SJohannes Berg struct iwl_mvm *mvm = ctx; 5627174beb6SJohannes Berg 5637174beb6SJohannes Berg mutex_unlock(&mvm->mutex); 5647174beb6SJohannes Berg 5657174beb6SJohannes Berg iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); 5667174beb6SJohannes Berg } 5677174beb6SJohannes Berg 5688745f12aSShaul Triebitz static bool iwl_mvm_fwrt_fw_running(void *ctx) 5698745f12aSShaul Triebitz { 5708745f12aSShaul Triebitz return iwl_mvm_firmware_running(ctx); 5718745f12aSShaul Triebitz } 5728745f12aSShaul Triebitz 5737174beb6SJohannes Berg static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = { 5747174beb6SJohannes Berg .dump_start = iwl_mvm_fwrt_dump_start, 5757174beb6SJohannes Berg .dump_end = iwl_mvm_fwrt_dump_end, 5768745f12aSShaul Triebitz .fw_running = iwl_mvm_fwrt_fw_running, 5777174beb6SJohannes Berg }; 5787174beb6SJohannes Berg 579e705c121SKalle Valo static struct iwl_op_mode * 580e705c121SKalle Valo iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, 581e705c121SKalle Valo const struct iwl_fw *fw, struct dentry *dbgfs_dir) 582e705c121SKalle Valo { 583e705c121SKalle Valo struct ieee80211_hw *hw; 584e705c121SKalle Valo struct iwl_op_mode *op_mode; 585e705c121SKalle Valo struct iwl_mvm *mvm; 586e705c121SKalle Valo struct iwl_trans_config trans_cfg = {}; 587e705c121SKalle Valo static const u8 no_reclaim_cmds[] = { 588e705c121SKalle Valo TX_CMD, 589e705c121SKalle Valo }; 590e705c121SKalle Valo int err, scan_size; 591e705c121SKalle Valo u32 min_backoff; 592e705c121SKalle Valo 593e705c121SKalle Valo /* 594e705c121SKalle Valo * We use IWL_MVM_STATION_COUNT to check the validity of the station 595e705c121SKalle Valo * index all over the driver - check that its value corresponds to the 596e705c121SKalle Valo * array size. 597e705c121SKalle Valo */ 598e705c121SKalle Valo BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); 599e705c121SKalle Valo 600e705c121SKalle Valo /******************************** 601e705c121SKalle Valo * 1. Allocating and configuring HW data 602e705c121SKalle Valo ********************************/ 603e705c121SKalle Valo hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + 604e705c121SKalle Valo sizeof(struct iwl_mvm), 605e705c121SKalle Valo &iwl_mvm_hw_ops); 606e705c121SKalle Valo if (!hw) 607e705c121SKalle Valo return NULL; 608e705c121SKalle Valo 609e705c121SKalle Valo if (cfg->max_rx_agg_size) 610e705c121SKalle Valo hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; 611e705c121SKalle Valo 612e705c121SKalle Valo if (cfg->max_tx_agg_size) 613e705c121SKalle Valo hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; 614e705c121SKalle Valo 615e705c121SKalle Valo op_mode = hw->priv; 616e705c121SKalle Valo 617e705c121SKalle Valo mvm = IWL_OP_MODE_GET_MVM(op_mode); 618e705c121SKalle Valo mvm->dev = trans->dev; 619e705c121SKalle Valo mvm->trans = trans; 620e705c121SKalle Valo mvm->cfg = cfg; 621e705c121SKalle Valo mvm->fw = fw; 622e705c121SKalle Valo mvm->hw = hw; 623e705c121SKalle Valo 62493b167c1SMordechay Goodstein iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm, 62593b167c1SMordechay Goodstein dbgfs_dir); 626235acb18SJohannes Berg 627de8ba41bSLiad Kaufman mvm->init_status = 0; 628de8ba41bSLiad Kaufman 629e705c121SKalle Valo if (iwl_mvm_has_new_rx_api(mvm)) { 630e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops_mq; 63118ead597SGolan Ben Ami trans->rx_mpdu_cmd_hdr_size = 63218ead597SGolan Ben Ami (trans->cfg->device_family >= 63318ead597SGolan Ben Ami IWL_DEVICE_FAMILY_22560) ? 63418ead597SGolan Ben Ami sizeof(struct iwl_rx_mpdu_desc) : 63518ead597SGolan Ben Ami IWL_RX_DESC_SIZE_V1; 636e705c121SKalle Valo } else { 637e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops; 63825c2b22cSSara Sharon trans->rx_mpdu_cmd_hdr_size = 63925c2b22cSSara Sharon sizeof(struct iwl_rx_mpdu_res_start); 640e705c121SKalle Valo 641e705c121SKalle Valo if (WARN_ON(trans->num_rx_queues > 1)) 642e705c121SKalle Valo goto out_free; 643e705c121SKalle Valo } 644e705c121SKalle Valo 6453b37f4c9SJohannes Berg mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; 646e705c121SKalle Valo 64728d0793eSLiad Kaufman mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; 648b13f43a4SEmmanuel Grumbach mvm->snif_queue = IWL_MVM_DQA_INJECT_MONITOR_QUEUE; 64949f71713SSara Sharon mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; 65049f71713SSara Sharon mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; 651c8f54701SJohannes Berg 652e705c121SKalle Valo mvm->sf_state = SF_UNINIT; 6537d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 654702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR); 6551f370650SSara Sharon else 656702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT); 657c89e333dSAndrei Otcheretianski mvm->drop_bcn_ap_mode = true; 658e705c121SKalle Valo 659e705c121SKalle Valo mutex_init(&mvm->mutex); 660e705c121SKalle Valo mutex_init(&mvm->d0i3_suspend_mutex); 661e705c121SKalle Valo spin_lock_init(&mvm->async_handlers_lock); 662e705c121SKalle Valo INIT_LIST_HEAD(&mvm->time_event_list); 663e705c121SKalle Valo INIT_LIST_HEAD(&mvm->aux_roc_te_list); 664e705c121SKalle Valo INIT_LIST_HEAD(&mvm->async_handlers_list); 665e705c121SKalle Valo spin_lock_init(&mvm->time_event_lock); 666e705c121SKalle Valo spin_lock_init(&mvm->queue_info_lock); 667e705c121SKalle Valo 668e705c121SKalle Valo INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); 669e705c121SKalle Valo INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); 670a75b9b33SLuca Coelho #ifdef CONFIG_PM 671e705c121SKalle Valo INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); 672a75b9b33SLuca Coelho #endif 673e705c121SKalle Valo INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); 67469e04642SLuca Coelho INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); 67524afba76SLiad Kaufman INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); 676e705c121SKalle Valo 677e705c121SKalle Valo spin_lock_init(&mvm->d0i3_tx_lock); 678e705c121SKalle Valo spin_lock_init(&mvm->refs_lock); 679e705c121SKalle Valo skb_queue_head_init(&mvm->d0i3_tx); 680e705c121SKalle Valo init_waitqueue_head(&mvm->d0i3_exit_waitq); 6813a732c65SSara Sharon init_waitqueue_head(&mvm->rx_sync_waitq); 682e705c121SKalle Valo 6830636b938SSara Sharon atomic_set(&mvm->queue_sync_counter, 0); 6840636b938SSara Sharon 685e705c121SKalle Valo SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); 686e705c121SKalle Valo 6877d9d0d56SLuca Coelho spin_lock_init(&mvm->tcm.lock); 6887d9d0d56SLuca Coelho INIT_DELAYED_WORK(&mvm->tcm.work, iwl_mvm_tcm_work); 6897d9d0d56SLuca Coelho mvm->tcm.ts = jiffies; 6907d9d0d56SLuca Coelho mvm->tcm.ll_ts = jiffies; 6917d9d0d56SLuca Coelho mvm->tcm.uapsd_nonagg_ts = jiffies; 6927d9d0d56SLuca Coelho 693d3a108a4SAndrei Otcheretianski INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); 694d3a108a4SAndrei Otcheretianski 695e705c121SKalle Valo /* 696e705c121SKalle Valo * Populate the state variables that the transport layer needs 697e705c121SKalle Valo * to know about. 698e705c121SKalle Valo */ 699e705c121SKalle Valo trans_cfg.op_mode = op_mode; 700e705c121SKalle Valo trans_cfg.no_reclaim_cmds = no_reclaim_cmds; 701e705c121SKalle Valo trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); 7026c4fbcbcSEmmanuel Grumbach switch (iwlwifi_mod_params.amsdu_size) { 7034bdd4dfeSEmmanuel Grumbach case IWL_AMSDU_DEF: 7046c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_4K: 7056c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 7066c4fbcbcSEmmanuel Grumbach break; 7076c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_8K: 7086c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_8K; 7096c4fbcbcSEmmanuel Grumbach break; 7106c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_12K: 7116c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_12K; 7126c4fbcbcSEmmanuel Grumbach break; 7136c4fbcbcSEmmanuel Grumbach default: 7146c4fbcbcSEmmanuel Grumbach pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, 7156c4fbcbcSEmmanuel Grumbach iwlwifi_mod_params.amsdu_size); 7166c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 7176c4fbcbcSEmmanuel Grumbach } 7184bdd4dfeSEmmanuel Grumbach 7194bdd4dfeSEmmanuel Grumbach /* the hardware splits the A-MSDU */ 720f137c097SGolan Ben Ami if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560) { 7211a4968d1SGolan Ben Ami trans_cfg.rx_buf_size = IWL_AMSDU_2K; 722f137c097SGolan Ben Ami /* TODO: remove when balanced power mode is fw supported */ 723f137c097SGolan Ben Ami iwlmvm_mod_params.power_scheme = IWL_POWER_SCHEME_CAM; 724f137c097SGolan Ben Ami } else if (mvm->cfg->mq_rx_supported) { 7254bdd4dfeSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 726f137c097SGolan Ben Ami } 727e705c121SKalle Valo 7284b87e5afSLuca Coelho trans->wide_cmd_header = true; 7292a182fbbSGolan Ben Ami trans_cfg.bc_table_dword = 7302a182fbbSGolan Ben Ami mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_22560; 731e705c121SKalle Valo 73239bdb17eSSharon Dvir trans_cfg.command_groups = iwl_mvm_groups; 73339bdb17eSSharon Dvir trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); 734e705c121SKalle Valo 735097129c9SLiad Kaufman trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; 736e705c121SKalle Valo trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; 737e705c121SKalle Valo trans_cfg.scd_set_active = true; 738e705c121SKalle Valo 73921cb3222SJohannes Berg trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, 74021cb3222SJohannes Berg driver_data[2]); 74121cb3222SJohannes Berg 74241837ca9SEmmanuel Grumbach trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; 743e705c121SKalle Valo 744e705c121SKalle Valo /* Set a short watchdog for the command queue */ 745e705c121SKalle Valo trans_cfg.cmd_q_wdg_timeout = 746e705c121SKalle Valo iwl_mvm_get_wd_timeout(mvm, NULL, false, true); 747e705c121SKalle Valo 748e705c121SKalle Valo snprintf(mvm->hw->wiphy->fw_version, 749e705c121SKalle Valo sizeof(mvm->hw->wiphy->fw_version), 750e705c121SKalle Valo "%s", fw->fw_version); 751e705c121SKalle Valo 752e705c121SKalle Valo /* Configure transport layer */ 753e705c121SKalle Valo iwl_trans_configure(mvm->trans, &trans_cfg); 754e705c121SKalle Valo 755e705c121SKalle Valo trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; 756e705c121SKalle Valo trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv; 757e705c121SKalle Valo trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num; 758e705c121SKalle Valo memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv, 759e705c121SKalle Valo sizeof(trans->dbg_conf_tlv)); 760e705c121SKalle Valo trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv; 761520f03eaSShahar S Matityahu trans->dbg_dump_mask = mvm->fw->dbg_dump_mask; 762e705c121SKalle Valo 763132db31cSGolan Ben-Ami trans->iml = mvm->fw->iml; 764132db31cSGolan Ben-Ami trans->iml_len = mvm->fw->iml_len; 765132db31cSGolan Ben-Ami 766e705c121SKalle Valo /* set up notification wait support */ 767e705c121SKalle Valo iwl_notification_wait_init(&mvm->notif_wait); 768e705c121SKalle Valo 769e705c121SKalle Valo /* Init phy db */ 770e705c121SKalle Valo mvm->phy_db = iwl_phy_db_init(trans); 771e705c121SKalle Valo if (!mvm->phy_db) { 772e705c121SKalle Valo IWL_ERR(mvm, "Cannot init phy_db\n"); 773e705c121SKalle Valo goto out_free; 774e705c121SKalle Valo } 775e705c121SKalle Valo 776e705c121SKalle Valo IWL_INFO(mvm, "Detected %s, REV=0x%X\n", 777e705c121SKalle Valo mvm->cfg->name, mvm->trans->hw_rev); 778e705c121SKalle Valo 779e705c121SKalle Valo if (iwlwifi_mod_params.nvm_file) 780e705c121SKalle Valo mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; 781e705c121SKalle Valo else 782e705c121SKalle Valo IWL_DEBUG_EEPROM(mvm->trans->dev, 783e705c121SKalle Valo "working without external nvm file\n"); 784e705c121SKalle Valo 785e705c121SKalle Valo err = iwl_trans_start_hw(mvm->trans); 786e705c121SKalle Valo if (err) 787e705c121SKalle Valo goto out_free; 788e705c121SKalle Valo 789e705c121SKalle Valo mutex_lock(&mvm->mutex); 79008f0d23dSEliad Peller iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); 791e705c121SKalle Valo err = iwl_run_init_mvm_ucode(mvm, true); 792f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !err) 793fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 79408f0d23dSEliad Peller iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); 795e705c121SKalle Valo mutex_unlock(&mvm->mutex); 796de8ba41bSLiad Kaufman if (err < 0) { 797e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); 798e705c121SKalle Valo goto out_free; 799e705c121SKalle Valo } 800e705c121SKalle Valo 801e705c121SKalle Valo scan_size = iwl_mvm_scan_size(mvm); 802e705c121SKalle Valo 803e705c121SKalle Valo mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); 804e705c121SKalle Valo if (!mvm->scan_cmd) 805e705c121SKalle Valo goto out_free; 806e705c121SKalle Valo 807e705c121SKalle Valo /* Set EBS as successful as long as not stated otherwise by the FW. */ 808e705c121SKalle Valo mvm->last_ebs_successful = true; 809e705c121SKalle Valo 810e705c121SKalle Valo err = iwl_mvm_mac_setup_register(mvm); 811e705c121SKalle Valo if (err) 812e705c121SKalle Valo goto out_free; 8131f370650SSara Sharon mvm->hw_registered = true; 814e705c121SKalle Valo 815f2abcfa6SLuca Coelho min_backoff = iwl_mvm_min_backoff(mvm); 81604ddc2aaSChaya Rachel Ivgi iwl_mvm_thermal_initialize(mvm, min_backoff); 81704ddc2aaSChaya Rachel Ivgi 818e705c121SKalle Valo err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); 819e705c121SKalle Valo if (err) 820e705c121SKalle Valo goto out_unregister; 821e705c121SKalle Valo 822678d9b6dSLiad Kaufman if (!iwl_mvm_has_new_rx_stats_api(mvm)) 823678d9b6dSLiad Kaufman memset(&mvm->rx_stats_v3, 0, 824678d9b6dSLiad Kaufman sizeof(struct mvm_statistics_rx_v3)); 825678d9b6dSLiad Kaufman else 826e705c121SKalle Valo memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); 827e705c121SKalle Valo 82833c85eadSLuca Coelho /* The transport always starts with a taken reference, we can 82933c85eadSLuca Coelho * release it now if d0i3 is supported */ 83033c85eadSLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 831a42b2af3SLuca Coelho iwl_trans_unref(mvm->trans); 832e705c121SKalle Valo 833e705c121SKalle Valo iwl_mvm_tof_init(mvm); 834e705c121SKalle Valo 835e705c121SKalle Valo return op_mode; 836e705c121SKalle Valo 837e705c121SKalle Valo out_unregister: 838de8ba41bSLiad Kaufman if (iwlmvm_mod_params.init_dbg) 839de8ba41bSLiad Kaufman return op_mode; 840de8ba41bSLiad Kaufman 841e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 8421f370650SSara Sharon mvm->hw_registered = false; 843e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 844c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 845e705c121SKalle Valo out_free: 8467174beb6SJohannes Berg iwl_fw_flush_dump(&mvm->fwrt); 847de8ba41bSLiad Kaufman 848de8ba41bSLiad Kaufman if (iwlmvm_mod_params.init_dbg) 849de8ba41bSLiad Kaufman return op_mode; 850e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 851e705c121SKalle Valo kfree(mvm->scan_cmd); 852e705c121SKalle Valo iwl_trans_op_mode_leave(trans); 85356f2929bSSara Sharon 854e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 855e705c121SKalle Valo return NULL; 856e705c121SKalle Valo } 857e705c121SKalle Valo 858e705c121SKalle Valo static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) 859e705c121SKalle Valo { 860e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 861e705c121SKalle Valo int i; 862e705c121SKalle Valo 863e27deb45SLuca Coelho /* If d0i3 is supported, we have released the reference that 864e27deb45SLuca Coelho * the transport started with, so we should take it back now 865e27deb45SLuca Coelho * that we are leaving. 866e27deb45SLuca Coelho */ 867e27deb45SLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 868e27deb45SLuca Coelho iwl_trans_ref(mvm->trans); 869e27deb45SLuca Coelho 870e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 871e705c121SKalle Valo 872c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 873e705c121SKalle Valo 874de8ba41bSLiad Kaufman if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) { 875e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 876de8ba41bSLiad Kaufman mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE; 877de8ba41bSLiad Kaufman } 878e705c121SKalle Valo 879e705c121SKalle Valo kfree(mvm->scan_cmd); 880e705c121SKalle Valo kfree(mvm->mcast_filter_cmd); 881e705c121SKalle Valo mvm->mcast_filter_cmd = NULL; 882e705c121SKalle Valo 883e705c121SKalle Valo #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) 884e705c121SKalle Valo kfree(mvm->d3_resume_sram); 885e705c121SKalle Valo #endif 886e705c121SKalle Valo iwl_trans_op_mode_leave(mvm->trans); 887e705c121SKalle Valo 888e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 889e705c121SKalle Valo mvm->phy_db = NULL; 890e705c121SKalle Valo 8911dad3e0aSLuca Coelho kfree(mvm->nvm_data); 892e705c121SKalle Valo for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) 893e705c121SKalle Valo kfree(mvm->nvm_sections[i].data); 894e705c121SKalle Valo 8957d9d0d56SLuca Coelho cancel_delayed_work_sync(&mvm->tcm.work); 8967d9d0d56SLuca Coelho 897e705c121SKalle Valo iwl_mvm_tof_clean(mvm); 898e705c121SKalle Valo 899a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->mutex); 900a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->d0i3_suspend_mutex); 901a2a57a35SEmmanuel Grumbach 902e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 903e705c121SKalle Valo } 904e705c121SKalle Valo 905e705c121SKalle Valo struct iwl_async_handler_entry { 906e705c121SKalle Valo struct list_head list; 907e705c121SKalle Valo struct iwl_rx_cmd_buffer rxb; 908c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 909e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 910e705c121SKalle Valo }; 911e705c121SKalle Valo 912e705c121SKalle Valo void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) 913e705c121SKalle Valo { 914e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 915e705c121SKalle Valo 916e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 917e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { 918e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 919e705c121SKalle Valo list_del(&entry->list); 920e705c121SKalle Valo kfree(entry); 921e705c121SKalle Valo } 922e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 923e705c121SKalle Valo } 924e705c121SKalle Valo 925e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk) 926e705c121SKalle Valo { 927e705c121SKalle Valo struct iwl_mvm *mvm = 928e705c121SKalle Valo container_of(wk, struct iwl_mvm, async_handlers_wk); 929e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 9308098203fSJohannes Berg LIST_HEAD(local_list); 931e705c121SKalle Valo 932e705c121SKalle Valo /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ 933e705c121SKalle Valo 934e705c121SKalle Valo /* 935e705c121SKalle Valo * Sync with Rx path with a lock. Remove all the entries from this list, 936e705c121SKalle Valo * add them to a local one (lock free), and then handle them. 937e705c121SKalle Valo */ 938e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 939e705c121SKalle Valo list_splice_init(&mvm->async_handlers_list, &local_list); 940e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 941e705c121SKalle Valo 942e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &local_list, list) { 943c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 944c9cb14a6SChaya Rachel Ivgi mutex_lock(&mvm->mutex); 945e705c121SKalle Valo entry->fn(mvm, &entry->rxb); 946e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 947e705c121SKalle Valo list_del(&entry->list); 948c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 949c9cb14a6SChaya Rachel Ivgi mutex_unlock(&mvm->mutex); 950e705c121SKalle Valo kfree(entry); 951e705c121SKalle Valo } 952e705c121SKalle Valo } 953e705c121SKalle Valo 954e705c121SKalle Valo static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, 955e705c121SKalle Valo struct iwl_rx_packet *pkt) 956e705c121SKalle Valo { 957e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trig; 958e705c121SKalle Valo struct iwl_fw_dbg_trigger_cmd *cmds_trig; 959e705c121SKalle Valo int i; 960e705c121SKalle Valo 961e705c121SKalle Valo if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF)) 962e705c121SKalle Valo return; 963e705c121SKalle Valo 964e705c121SKalle Valo trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF); 965e705c121SKalle Valo cmds_trig = (void *)trig->data; 966e705c121SKalle Valo 9677174beb6SJohannes Berg if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, NULL, trig)) 968e705c121SKalle Valo return; 969e705c121SKalle Valo 970e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { 971e705c121SKalle Valo /* don't collect on CMD 0 */ 972e705c121SKalle Valo if (!cmds_trig->cmds[i].cmd_id) 973e705c121SKalle Valo break; 974e705c121SKalle Valo 975e705c121SKalle Valo if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || 976e705c121SKalle Valo cmds_trig->cmds[i].group_id != pkt->hdr.group_id) 977e705c121SKalle Valo continue; 978e705c121SKalle Valo 9797174beb6SJohannes Berg iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, 980e705c121SKalle Valo "CMD 0x%02x.%02x received", 981e705c121SKalle Valo pkt->hdr.group_id, pkt->hdr.cmd); 982e705c121SKalle Valo break; 983e705c121SKalle Valo } 984e705c121SKalle Valo } 985e705c121SKalle Valo 986e705c121SKalle Valo static void iwl_mvm_rx_common(struct iwl_mvm *mvm, 987e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 988e705c121SKalle Valo struct iwl_rx_packet *pkt) 989e705c121SKalle Valo { 990e705c121SKalle Valo int i; 991e705c121SKalle Valo 992e705c121SKalle Valo iwl_mvm_rx_check_trigger(mvm, pkt); 993e705c121SKalle Valo 994e705c121SKalle Valo /* 995e705c121SKalle Valo * Do the notification wait before RX handlers so 996e705c121SKalle Valo * even if the RX handler consumes the RXB we have 997e705c121SKalle Valo * access to it in the notification wait entry. 998e705c121SKalle Valo */ 999e705c121SKalle Valo iwl_notification_wait_notify(&mvm->notif_wait, pkt); 1000e705c121SKalle Valo 1001e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { 1002e705c121SKalle Valo const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; 1003e705c121SKalle Valo struct iwl_async_handler_entry *entry; 1004e705c121SKalle Valo 1005e705c121SKalle Valo if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) 1006e705c121SKalle Valo continue; 1007e705c121SKalle Valo 1008c9cb14a6SChaya Rachel Ivgi if (rx_h->context == RX_HANDLER_SYNC) { 1009e705c121SKalle Valo rx_h->fn(mvm, rxb); 1010e705c121SKalle Valo return; 1011e705c121SKalle Valo } 1012e705c121SKalle Valo 1013e705c121SKalle Valo entry = kzalloc(sizeof(*entry), GFP_ATOMIC); 1014e705c121SKalle Valo /* we can't do much... */ 1015e705c121SKalle Valo if (!entry) 1016e705c121SKalle Valo return; 1017e705c121SKalle Valo 1018e705c121SKalle Valo entry->rxb._page = rxb_steal_page(rxb); 1019e705c121SKalle Valo entry->rxb._offset = rxb->_offset; 1020e705c121SKalle Valo entry->rxb._rx_page_order = rxb->_rx_page_order; 1021e705c121SKalle Valo entry->fn = rx_h->fn; 1022c9cb14a6SChaya Rachel Ivgi entry->context = rx_h->context; 1023e705c121SKalle Valo spin_lock(&mvm->async_handlers_lock); 1024e705c121SKalle Valo list_add_tail(&entry->list, &mvm->async_handlers_list); 1025e705c121SKalle Valo spin_unlock(&mvm->async_handlers_lock); 1026e705c121SKalle Valo schedule_work(&mvm->async_handlers_wk); 102707fb3299SSara Sharon break; 1028e705c121SKalle Valo } 1029e705c121SKalle Valo } 1030e705c121SKalle Valo 1031e705c121SKalle Valo static void iwl_mvm_rx(struct iwl_op_mode *op_mode, 1032e705c121SKalle Valo struct napi_struct *napi, 1033e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1034e705c121SKalle Valo { 1035e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1036e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 103761b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1038e705c121SKalle Valo 103961b0f5d7SJohannes Berg if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1040e705c121SKalle Valo iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); 104161b0f5d7SJohannes Berg else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) 1042e705c121SKalle Valo iwl_mvm_rx_rx_phy_cmd(mvm, rxb); 1043e705c121SKalle Valo else 1044e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 1045e705c121SKalle Valo } 1046e705c121SKalle Valo 1047e705c121SKalle Valo static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, 1048e705c121SKalle Valo struct napi_struct *napi, 1049e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1050e705c121SKalle Valo { 1051e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1052e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 105361b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1054e705c121SKalle Valo 105561b0f5d7SJohannes Berg if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1056780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); 105761b0f5d7SJohannes Berg else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, 105861b0f5d7SJohannes Berg RX_QUEUES_NOTIFICATION))) 105994bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, 0); 106061b0f5d7SJohannes Berg else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) 106158035432SJohannes Berg iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); 1062e705c121SKalle Valo else 1063e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 1064e705c121SKalle Valo } 1065e705c121SKalle Valo 1066b4f7a9d1SLiad Kaufman void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 1067e705c121SKalle Valo { 1068e705c121SKalle Valo int q; 1069e705c121SKalle Valo 1070e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 1071e705c121SKalle Valo return; 1072e705c121SKalle Valo 1073e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 1074e705c121SKalle Valo if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { 1075e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 1076b4f7a9d1SLiad Kaufman "mac80211 %d already stopped\n", q); 1077e705c121SKalle Valo continue; 1078e705c121SKalle Valo } 1079e705c121SKalle Valo 1080e705c121SKalle Valo ieee80211_stop_queue(mvm->hw, q); 1081e705c121SKalle Valo } 1082e705c121SKalle Valo } 1083e705c121SKalle Valo 1084156f92f2SEmmanuel Grumbach static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, 1085156f92f2SEmmanuel Grumbach const struct iwl_device_cmd *cmd) 1086156f92f2SEmmanuel Grumbach { 1087156f92f2SEmmanuel Grumbach struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1088156f92f2SEmmanuel Grumbach 1089156f92f2SEmmanuel Grumbach /* 1090156f92f2SEmmanuel Grumbach * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA 1091156f92f2SEmmanuel Grumbach * commands that need to block the Tx queues. 1092156f92f2SEmmanuel Grumbach */ 1093156f92f2SEmmanuel Grumbach iwl_trans_block_txq_ptrs(mvm->trans, false); 1094156f92f2SEmmanuel Grumbach } 1095156f92f2SEmmanuel Grumbach 1096b4f7a9d1SLiad Kaufman static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1097e705c121SKalle Valo { 1098e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1099e705c121SKalle Valo unsigned long mq; 1100e705c121SKalle Valo 1101e705c121SKalle Valo spin_lock_bh(&mvm->queue_info_lock); 110234e10860SSara Sharon mq = mvm->hw_queue_to_mac80211[hw_queue]; 1103e705c121SKalle Valo spin_unlock_bh(&mvm->queue_info_lock); 1104e705c121SKalle Valo 1105b4f7a9d1SLiad Kaufman iwl_mvm_stop_mac_queues(mvm, mq); 1106b4f7a9d1SLiad Kaufman } 1107b4f7a9d1SLiad Kaufman 1108b4f7a9d1SLiad Kaufman void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 1109b4f7a9d1SLiad Kaufman { 1110b4f7a9d1SLiad Kaufman int q; 1111b4f7a9d1SLiad Kaufman 1112e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 1113e705c121SKalle Valo return; 1114e705c121SKalle Valo 1115e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 1116e705c121SKalle Valo if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { 1117e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 1118b4f7a9d1SLiad Kaufman "mac80211 %d still stopped\n", q); 1119e705c121SKalle Valo continue; 1120e705c121SKalle Valo } 1121e705c121SKalle Valo 1122e705c121SKalle Valo ieee80211_wake_queue(mvm->hw, q); 1123e705c121SKalle Valo } 1124e705c121SKalle Valo } 1125e705c121SKalle Valo 1126b4f7a9d1SLiad Kaufman static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1127b4f7a9d1SLiad Kaufman { 1128b4f7a9d1SLiad Kaufman struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1129b4f7a9d1SLiad Kaufman unsigned long mq; 1130b4f7a9d1SLiad Kaufman 1131b4f7a9d1SLiad Kaufman spin_lock_bh(&mvm->queue_info_lock); 113234e10860SSara Sharon mq = mvm->hw_queue_to_mac80211[hw_queue]; 1133b4f7a9d1SLiad Kaufman spin_unlock_bh(&mvm->queue_info_lock); 1134b4f7a9d1SLiad Kaufman 1135b4f7a9d1SLiad Kaufman iwl_mvm_start_mac_queues(mvm, mq); 1136b4f7a9d1SLiad Kaufman } 1137b4f7a9d1SLiad Kaufman 11386ad04359SJohannes Berg static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) 11396ad04359SJohannes Berg { 11406ad04359SJohannes Berg bool state = iwl_mvm_is_radio_killed(mvm); 11416ad04359SJohannes Berg 11426ad04359SJohannes Berg if (state) 11436ad04359SJohannes Berg wake_up(&mvm->rx_sync_waitq); 11446ad04359SJohannes Berg 11456ad04359SJohannes Berg wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); 11466ad04359SJohannes Berg } 11476ad04359SJohannes Berg 1148e705c121SKalle Valo void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) 1149e705c121SKalle Valo { 1150e705c121SKalle Valo if (state) 1151e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1152e705c121SKalle Valo else 1153e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1154e705c121SKalle Valo 11556ad04359SJohannes Berg iwl_mvm_set_rfkill_state(mvm); 1156e705c121SKalle Valo } 1157e705c121SKalle Valo 1158e705c121SKalle Valo static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) 1159e705c121SKalle Valo { 1160e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 11616aa7de05SMark Rutland bool calibrating = READ_ONCE(mvm->calibrating); 1162e705c121SKalle Valo 1163e705c121SKalle Valo if (state) 1164e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1165e705c121SKalle Valo else 1166e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1167e705c121SKalle Valo 11686ad04359SJohannes Berg iwl_mvm_set_rfkill_state(mvm); 1169e705c121SKalle Valo 1170e705c121SKalle Valo /* iwl_run_init_mvm_ucode is waiting for results, abort it */ 1171e705c121SKalle Valo if (calibrating) 1172e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1173e705c121SKalle Valo 1174e705c121SKalle Valo /* 1175e705c121SKalle Valo * Stop the device if we run OPERATIONAL firmware or if we are in the 1176e705c121SKalle Valo * middle of the calibrations. 1177e705c121SKalle Valo */ 1178702e975dSJohannes Berg return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating); 1179e705c121SKalle Valo } 1180e705c121SKalle Valo 1181e705c121SKalle Valo static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) 1182e705c121SKalle Valo { 1183e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1184e705c121SKalle Valo struct ieee80211_tx_info *info; 1185e705c121SKalle Valo 1186e705c121SKalle Valo info = IEEE80211_SKB_CB(skb); 1187e705c121SKalle Valo iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); 1188e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1189e705c121SKalle Valo } 1190e705c121SKalle Valo 1191e705c121SKalle Valo struct iwl_mvm_reprobe { 1192e705c121SKalle Valo struct device *dev; 1193e705c121SKalle Valo struct work_struct work; 1194e705c121SKalle Valo }; 1195e705c121SKalle Valo 1196e705c121SKalle Valo static void iwl_mvm_reprobe_wk(struct work_struct *wk) 1197e705c121SKalle Valo { 1198e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1199e705c121SKalle Valo 1200e705c121SKalle Valo reprobe = container_of(wk, struct iwl_mvm_reprobe, work); 1201e705c121SKalle Valo if (device_reprobe(reprobe->dev)) 1202e705c121SKalle Valo dev_err(reprobe->dev, "reprobe failed!\n"); 1203e705c121SKalle Valo kfree(reprobe); 1204e705c121SKalle Valo module_put(THIS_MODULE); 1205e705c121SKalle Valo } 1206e705c121SKalle Valo 1207e705c121SKalle Valo void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) 1208e705c121SKalle Valo { 1209e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1210e705c121SKalle Valo 1211e705c121SKalle Valo /* 1212e705c121SKalle Valo * This is a bit racy, but worst case we tell mac80211 about 1213e705c121SKalle Valo * a stopped/aborted scan when that was already done which 1214e705c121SKalle Valo * is not a problem. It is necessary to abort any os scan 1215e705c121SKalle Valo * here because mac80211 requires having the scan cleared 1216e705c121SKalle Valo * before restarting. 1217e705c121SKalle Valo * We'll reset the scan_status to NONE in restart cleanup in 1218e705c121SKalle Valo * the next start() call from mac80211. If restart isn't called 1219e705c121SKalle Valo * (no fw restart) scan status will stay busy. 1220e705c121SKalle Valo */ 1221e705c121SKalle Valo iwl_mvm_report_scan_aborted(mvm); 1222e705c121SKalle Valo 1223e705c121SKalle Valo /* 1224e705c121SKalle Valo * If we're restarting already, don't cycle restarts. 1225e705c121SKalle Valo * If INIT fw asserted, it will likely fail again. 1226e705c121SKalle Valo * If WoWLAN fw asserted, don't restart either, mac80211 1227e705c121SKalle Valo * can't recover this since we're already half suspended. 1228e705c121SKalle Valo */ 12293b37f4c9SJohannes Berg if (!mvm->fw_restart && fw_error) { 12307174beb6SJohannes Berg iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert, 1231e705c121SKalle Valo NULL); 1232bf8b286fSJohannes Berg } else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1233e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1234e705c121SKalle Valo 1235e705c121SKalle Valo IWL_ERR(mvm, 1236e705c121SKalle Valo "Firmware error during reconfiguration - reprobe!\n"); 1237e705c121SKalle Valo 1238e705c121SKalle Valo /* 1239e705c121SKalle Valo * get a module reference to avoid doing this while unloading 1240e705c121SKalle Valo * anyway and to avoid scheduling a work with code that's 1241e705c121SKalle Valo * being removed. 1242e705c121SKalle Valo */ 1243e705c121SKalle Valo if (!try_module_get(THIS_MODULE)) { 1244e705c121SKalle Valo IWL_ERR(mvm, "Module is being unloaded - abort\n"); 1245e705c121SKalle Valo return; 1246e705c121SKalle Valo } 1247e705c121SKalle Valo 1248e705c121SKalle Valo reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); 1249e705c121SKalle Valo if (!reprobe) { 1250e705c121SKalle Valo module_put(THIS_MODULE); 1251e705c121SKalle Valo return; 1252e705c121SKalle Valo } 1253e705c121SKalle Valo reprobe->dev = mvm->trans->dev; 1254e705c121SKalle Valo INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); 1255e705c121SKalle Valo schedule_work(&reprobe->work); 1256702e975dSJohannes Berg } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR && 12571f370650SSara Sharon mvm->hw_registered) { 1258e705c121SKalle Valo /* don't let the transport/FW power down */ 1259e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); 1260e705c121SKalle Valo 12613b37f4c9SJohannes Berg if (fw_error && mvm->fw_restart > 0) 12623b37f4c9SJohannes Berg mvm->fw_restart--; 1263bf8b286fSJohannes Berg set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status); 1264e705c121SKalle Valo ieee80211_restart_hw(mvm->hw); 1265e705c121SKalle Valo } 1266e705c121SKalle Valo } 1267e705c121SKalle Valo 1268e705c121SKalle Valo static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) 1269e705c121SKalle Valo { 1270e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1271e705c121SKalle Valo 1272e705c121SKalle Valo iwl_mvm_dump_nic_error_log(mvm); 1273e705c121SKalle Valo 1274e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1275e705c121SKalle Valo } 1276e705c121SKalle Valo 1277e705c121SKalle Valo static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) 1278e705c121SKalle Valo { 1279e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1280e705c121SKalle Valo 1281e705c121SKalle Valo WARN_ON(1); 1282e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1283e705c121SKalle Valo } 1284e705c121SKalle Valo 1285a75b9b33SLuca Coelho #ifdef CONFIG_PM 1286e705c121SKalle Valo struct iwl_d0i3_iter_data { 1287e705c121SKalle Valo struct iwl_mvm *mvm; 1288a3f7ba5cSEliad Peller struct ieee80211_vif *connected_vif; 1289e705c121SKalle Valo u8 ap_sta_id; 1290e705c121SKalle Valo u8 vif_count; 1291e705c121SKalle Valo u8 offloading_tid; 1292e705c121SKalle Valo bool disable_offloading; 1293e705c121SKalle Valo }; 1294e705c121SKalle Valo 1295e705c121SKalle Valo static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, 1296e705c121SKalle Valo struct ieee80211_vif *vif, 1297e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1298e705c121SKalle Valo { 1299e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1300e705c121SKalle Valo struct iwl_mvm_sta *mvmsta; 1301e705c121SKalle Valo u32 available_tids = 0; 1302e705c121SKalle Valo u8 tid; 1303e705c121SKalle Valo 1304e705c121SKalle Valo if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || 13050ae98812SSara Sharon mvmvif->ap_sta_id == IWL_MVM_INVALID_STA)) 1306e705c121SKalle Valo return false; 1307e705c121SKalle Valo 130813303c0fSSara Sharon mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); 130913303c0fSSara Sharon if (!mvmsta) 1310e705c121SKalle Valo return false; 1311e705c121SKalle Valo 1312e705c121SKalle Valo spin_lock_bh(&mvmsta->lock); 1313e705c121SKalle Valo for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { 1314e705c121SKalle Valo struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; 1315e705c121SKalle Valo 1316e705c121SKalle Valo /* 1317e705c121SKalle Valo * in case of pending tx packets, don't use this tid 1318e705c121SKalle Valo * for offloading in order to prevent reuse of the same 1319e705c121SKalle Valo * qos seq counters. 1320e705c121SKalle Valo */ 1321dd32162dSLiad Kaufman if (iwl_mvm_tid_queued(mvm, tid_data)) 1322e705c121SKalle Valo continue; 1323e705c121SKalle Valo 1324e705c121SKalle Valo if (tid_data->state != IWL_AGG_OFF) 1325e705c121SKalle Valo continue; 1326e705c121SKalle Valo 1327e705c121SKalle Valo available_tids |= BIT(tid); 1328e705c121SKalle Valo } 1329e705c121SKalle Valo spin_unlock_bh(&mvmsta->lock); 1330e705c121SKalle Valo 1331e705c121SKalle Valo /* 1332e705c121SKalle Valo * disallow protocol offloading if we have no available tid 1333e705c121SKalle Valo * (with no pending frames and no active aggregation, 1334e705c121SKalle Valo * as we don't handle "holes" properly - the scheduler needs the 1335e705c121SKalle Valo * frame's seq number and TFD index to match) 1336e705c121SKalle Valo */ 1337e705c121SKalle Valo if (!available_tids) 1338e705c121SKalle Valo return true; 1339e705c121SKalle Valo 1340e705c121SKalle Valo /* for simplicity, just use the first available tid */ 1341e705c121SKalle Valo iter_data->offloading_tid = ffs(available_tids) - 1; 1342e705c121SKalle Valo return false; 1343e705c121SKalle Valo } 1344e705c121SKalle Valo 1345e705c121SKalle Valo static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, 1346e705c121SKalle Valo struct ieee80211_vif *vif) 1347e705c121SKalle Valo { 1348e705c121SKalle Valo struct iwl_d0i3_iter_data *data = _data; 1349e705c121SKalle Valo struct iwl_mvm *mvm = data->mvm; 1350e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1351e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1352e705c121SKalle Valo 1353e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); 1354e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1355e705c121SKalle Valo !vif->bss_conf.assoc) 1356e705c121SKalle Valo return; 1357e705c121SKalle Valo 1358e705c121SKalle Valo /* 1359e705c121SKalle Valo * in case of pending tx packets or active aggregations, 1360e705c121SKalle Valo * avoid offloading features in order to prevent reuse of 1361e705c121SKalle Valo * the same qos seq counters. 1362e705c121SKalle Valo */ 1363e705c121SKalle Valo if (iwl_mvm_disallow_offloading(mvm, vif, data)) 1364e705c121SKalle Valo data->disable_offloading = true; 1365e705c121SKalle Valo 1366e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); 1367c97dab40SSara Sharon iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, 1368c97dab40SSara Sharon false, flags); 1369e705c121SKalle Valo 1370e705c121SKalle Valo /* 1371e705c121SKalle Valo * on init/association, mvm already configures POWER_TABLE_CMD 1372e705c121SKalle Valo * and REPLY_MCAST_FILTER_CMD, so currently don't 1373e705c121SKalle Valo * reconfigure them (we might want to use different 1374e705c121SKalle Valo * params later on, though). 1375e705c121SKalle Valo */ 1376e705c121SKalle Valo data->ap_sta_id = mvmvif->ap_sta_id; 1377e705c121SKalle Valo data->vif_count++; 1378a3f7ba5cSEliad Peller 1379a3f7ba5cSEliad Peller /* 1380a3f7ba5cSEliad Peller * no new commands can be sent at this stage, so it's safe 1381a3f7ba5cSEliad Peller * to save the vif pointer during d0i3 entrance. 1382a3f7ba5cSEliad Peller */ 1383a3f7ba5cSEliad Peller data->connected_vif = vif; 1384e705c121SKalle Valo } 1385e705c121SKalle Valo 1386e705c121SKalle Valo static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, 1387e705c121SKalle Valo struct iwl_wowlan_config_cmd *cmd, 1388e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1389e705c121SKalle Valo { 1390e705c121SKalle Valo struct ieee80211_sta *ap_sta; 1391e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1392e705c121SKalle Valo 13930ae98812SSara Sharon if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA) 1394e705c121SKalle Valo return; 1395e705c121SKalle Valo 1396e705c121SKalle Valo rcu_read_lock(); 1397e705c121SKalle Valo 1398e705c121SKalle Valo ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); 1399e705c121SKalle Valo if (IS_ERR_OR_NULL(ap_sta)) 1400e705c121SKalle Valo goto out; 1401e705c121SKalle Valo 1402e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); 1403e705c121SKalle Valo cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; 1404e705c121SKalle Valo cmd->offloading_tid = iter_data->offloading_tid; 140570b4c536SSara Sharon cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | 14060db056d3SSara Sharon ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; 1407e705c121SKalle Valo /* 1408e705c121SKalle Valo * The d0i3 uCode takes care of the nonqos counters, 1409e705c121SKalle Valo * so configure only the qos seq ones. 1410e705c121SKalle Valo */ 1411e705c121SKalle Valo iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); 1412e705c121SKalle Valo out: 1413e705c121SKalle Valo rcu_read_unlock(); 1414e705c121SKalle Valo } 1415e705c121SKalle Valo 1416e705c121SKalle Valo int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) 1417e705c121SKalle Valo { 1418e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1419e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1420e705c121SKalle Valo int ret; 1421e705c121SKalle Valo struct iwl_d0i3_iter_data d0i3_iter_data = { 1422e705c121SKalle Valo .mvm = mvm, 1423e705c121SKalle Valo }; 1424e705c121SKalle Valo struct iwl_wowlan_config_cmd wowlan_config_cmd = { 1425e705c121SKalle Valo .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | 1426e705c121SKalle Valo IWL_WOWLAN_WAKEUP_BEACON_MISS | 14270db056d3SSara Sharon IWL_WOWLAN_WAKEUP_LINK_CHANGE), 1428e705c121SKalle Valo }; 1429e705c121SKalle Valo struct iwl_d3_manager_config d3_cfg_cmd = { 1430e705c121SKalle Valo .min_sleep_time = cpu_to_le32(1000), 1431e705c121SKalle Valo .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), 1432e705c121SKalle Valo }; 1433e705c121SKalle Valo 1434e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); 1435e705c121SKalle Valo 1436702e975dSJohannes Berg if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) 143708f0d23dSEliad Peller return -EINVAL; 143808f0d23dSEliad Peller 1439e705c121SKalle Valo set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1440e705c121SKalle Valo 1441e705c121SKalle Valo /* 1442e705c121SKalle Valo * iwl_mvm_ref_sync takes a reference before checking the flag. 1443e705c121SKalle Valo * so by checking there is no held reference we prevent a state 1444e705c121SKalle Valo * in which iwl_mvm_ref_sync continues successfully while we 1445e705c121SKalle Valo * configure the firmware to enter d0i3 1446e705c121SKalle Valo */ 1447e705c121SKalle Valo if (iwl_mvm_ref_taken(mvm)) { 1448e705c121SKalle Valo IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); 1449e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1450e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 1451e705c121SKalle Valo return 1; 1452e705c121SKalle Valo } 1453e705c121SKalle Valo 1454e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1455e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1456e705c121SKalle Valo iwl_mvm_enter_d0i3_iterator, 1457e705c121SKalle Valo &d0i3_iter_data); 1458e705c121SKalle Valo if (d0i3_iter_data.vif_count == 1) { 1459e705c121SKalle Valo mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; 1460e705c121SKalle Valo mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; 1461e705c121SKalle Valo } else { 1462e705c121SKalle Valo WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); 14630ae98812SSara Sharon mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; 1464e705c121SKalle Valo mvm->d0i3_offloading = false; 1465e705c121SKalle Valo } 1466e705c121SKalle Valo 14677d9d0d56SLuca Coelho iwl_mvm_pause_tcm(mvm, true); 1468e705c121SKalle Valo /* make sure we have no running tx while configuring the seqno */ 1469e705c121SKalle Valo synchronize_net(); 1470e705c121SKalle Valo 1471eb3908d3SLuca Coelho /* Flush the hw queues, in case something got queued during entry */ 1472d167e81aSMordechai Goodstein /* TODO new tx api */ 1473d167e81aSMordechai Goodstein if (iwl_mvm_has_new_tx_api(mvm)) { 1474d167e81aSMordechai Goodstein WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n"); 1475d167e81aSMordechai Goodstein } else { 1476d167e81aSMordechai Goodstein ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), 1477d167e81aSMordechai Goodstein flags); 1478eb3908d3SLuca Coelho if (ret) 1479eb3908d3SLuca Coelho return ret; 1480d167e81aSMordechai Goodstein } 1481eb3908d3SLuca Coelho 1482e705c121SKalle Valo /* configure wowlan configuration only if needed */ 14830ae98812SSara Sharon if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) { 14840db056d3SSara Sharon /* wake on beacons only if beacon storing isn't supported */ 14850db056d3SSara Sharon if (!fw_has_capa(&mvm->fw->ucode_capa, 14860db056d3SSara Sharon IWL_UCODE_TLV_CAPA_BEACON_STORING)) 14870db056d3SSara Sharon wowlan_config_cmd.wakeup_filter |= 14880db056d3SSara Sharon cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); 14890db056d3SSara Sharon 1490a3f7ba5cSEliad Peller iwl_mvm_wowlan_config_key_params(mvm, 1491a3f7ba5cSEliad Peller d0i3_iter_data.connected_vif, 1492a3f7ba5cSEliad Peller true, flags); 1493a3f7ba5cSEliad Peller 1494e705c121SKalle Valo iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, 1495e705c121SKalle Valo &d0i3_iter_data); 1496e705c121SKalle Valo 1497e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, 1498e705c121SKalle Valo sizeof(wowlan_config_cmd), 1499e705c121SKalle Valo &wowlan_config_cmd); 1500e705c121SKalle Valo if (ret) 1501e705c121SKalle Valo return ret; 1502e705c121SKalle Valo } 1503e705c121SKalle Valo 1504e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, 1505e705c121SKalle Valo flags | CMD_MAKE_TRANS_IDLE, 1506e705c121SKalle Valo sizeof(d3_cfg_cmd), &d3_cfg_cmd); 1507e705c121SKalle Valo } 1508e705c121SKalle Valo 1509e705c121SKalle Valo static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, 1510e705c121SKalle Valo struct ieee80211_vif *vif) 1511e705c121SKalle Valo { 1512e705c121SKalle Valo struct iwl_mvm *mvm = _data; 1513e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; 1514e705c121SKalle Valo 1515e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); 1516e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1517e705c121SKalle Valo !vif->bss_conf.assoc) 1518e705c121SKalle Valo return; 1519e705c121SKalle Valo 1520e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); 1521e705c121SKalle Valo } 1522e705c121SKalle Valo 1523a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data { 1524e705c121SKalle Valo struct iwl_mvm *mvm; 1525a3f7ba5cSEliad Peller struct iwl_wowlan_status *status; 1526e705c121SKalle Valo u32 wakeup_reasons; 1527e705c121SKalle Valo }; 1528e705c121SKalle Valo 1529a3f7ba5cSEliad Peller static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, 1530e705c121SKalle Valo struct ieee80211_vif *vif) 1531e705c121SKalle Valo { 1532a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; 1533e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1534a3f7ba5cSEliad Peller u32 reasons = data->wakeup_reasons; 1535e705c121SKalle Valo 1536a3f7ba5cSEliad Peller /* consider only the relevant station interface */ 1537a3f7ba5cSEliad Peller if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || 1538a3f7ba5cSEliad Peller data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) 1539a3f7ba5cSEliad Peller return; 1540a3f7ba5cSEliad Peller 1541a3f7ba5cSEliad Peller if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) 1542e705c121SKalle Valo iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); 1543a3f7ba5cSEliad Peller else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) 1544e705c121SKalle Valo ieee80211_beacon_loss(vif); 1545a3f7ba5cSEliad Peller else 1546a3f7ba5cSEliad Peller iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); 1547e705c121SKalle Valo } 1548e705c121SKalle Valo 1549e705c121SKalle Valo void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) 1550e705c121SKalle Valo { 1551e705c121SKalle Valo struct ieee80211_sta *sta = NULL; 1552e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1553e705c121SKalle Valo int i; 1554e705c121SKalle Valo bool wake_queues = false; 1555e705c121SKalle Valo 1556e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1557e705c121SKalle Valo 1558e705c121SKalle Valo spin_lock_bh(&mvm->d0i3_tx_lock); 1559e705c121SKalle Valo 15600ae98812SSara Sharon if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA) 1561e705c121SKalle Valo goto out; 1562e705c121SKalle Valo 1563e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); 1564e705c121SKalle Valo 1565e705c121SKalle Valo /* get the sta in order to update seq numbers and re-enqueue skbs */ 1566e705c121SKalle Valo sta = rcu_dereference_protected( 1567e705c121SKalle Valo mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], 1568e705c121SKalle Valo lockdep_is_held(&mvm->mutex)); 1569e705c121SKalle Valo 1570e705c121SKalle Valo if (IS_ERR_OR_NULL(sta)) { 1571e705c121SKalle Valo sta = NULL; 1572e705c121SKalle Valo goto out; 1573e705c121SKalle Valo } 1574e705c121SKalle Valo 1575e705c121SKalle Valo if (mvm->d0i3_offloading && qos_seq) { 1576e705c121SKalle Valo /* update qos seq numbers if offloading was enabled */ 1577e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); 1578e705c121SKalle Valo for (i = 0; i < IWL_MAX_TID_COUNT; i++) { 1579e705c121SKalle Valo u16 seq = le16_to_cpu(qos_seq[i]); 1580e705c121SKalle Valo /* firmware stores last-used one, we store next one */ 1581e705c121SKalle Valo seq += 0x10; 1582e705c121SKalle Valo mvm_ap_sta->tid_data[i].seq_number = seq; 1583e705c121SKalle Valo } 1584e705c121SKalle Valo } 1585e705c121SKalle Valo out: 1586e705c121SKalle Valo /* re-enqueue (or drop) all packets */ 1587e705c121SKalle Valo while (!skb_queue_empty(&mvm->d0i3_tx)) { 1588e705c121SKalle Valo struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); 1589e705c121SKalle Valo 1590e705c121SKalle Valo if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) 1591e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1592e705c121SKalle Valo 1593e705c121SKalle Valo /* if the skb_queue is not empty, we need to wake queues */ 1594e705c121SKalle Valo wake_queues = true; 1595e705c121SKalle Valo } 1596e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1597e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 15980ae98812SSara Sharon mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; 1599e705c121SKalle Valo if (wake_queues) 1600e705c121SKalle Valo ieee80211_wake_queues(mvm->hw); 1601e705c121SKalle Valo 1602e705c121SKalle Valo spin_unlock_bh(&mvm->d0i3_tx_lock); 1603e705c121SKalle Valo } 1604e705c121SKalle Valo 1605e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) 1606e705c121SKalle Valo { 1607e705c121SKalle Valo struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); 1608e705c121SKalle Valo struct iwl_host_cmd get_status_cmd = { 1609e705c121SKalle Valo .id = WOWLAN_GET_STATUSES, 1610e705c121SKalle Valo .flags = CMD_HIGH_PRIO | CMD_WANT_SKB, 1611e705c121SKalle Valo }; 1612a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { 1613a3f7ba5cSEliad Peller .mvm = mvm, 1614a3f7ba5cSEliad Peller }; 1615a3f7ba5cSEliad Peller 1616e705c121SKalle Valo struct iwl_wowlan_status *status; 1617e705c121SKalle Valo int ret; 1618a3f7ba5cSEliad Peller u32 wakeup_reasons = 0; 1619e705c121SKalle Valo __le16 *qos_seq = NULL; 1620e705c121SKalle Valo 1621e705c121SKalle Valo mutex_lock(&mvm->mutex); 1622e705c121SKalle Valo ret = iwl_mvm_send_cmd(mvm, &get_status_cmd); 1623e705c121SKalle Valo if (ret) 1624e705c121SKalle Valo goto out; 1625e705c121SKalle Valo 1626e705c121SKalle Valo status = (void *)get_status_cmd.resp_pkt->data; 1627e705c121SKalle Valo wakeup_reasons = le32_to_cpu(status->wakeup_reasons); 1628e705c121SKalle Valo qos_seq = status->qos_seq_ctr; 1629e705c121SKalle Valo 1630e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); 1631e705c121SKalle Valo 1632a3f7ba5cSEliad Peller iter_data.wakeup_reasons = wakeup_reasons; 1633a3f7ba5cSEliad Peller iter_data.status = status; 1634a3f7ba5cSEliad Peller ieee80211_iterate_active_interfaces(mvm->hw, 1635a3f7ba5cSEliad Peller IEEE80211_IFACE_ITER_NORMAL, 1636a3f7ba5cSEliad Peller iwl_mvm_d0i3_exit_work_iter, 1637a3f7ba5cSEliad Peller &iter_data); 1638e705c121SKalle Valo out: 1639e705c121SKalle Valo iwl_mvm_d0i3_enable_tx(mvm, qos_seq); 1640e705c121SKalle Valo 1641e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", 1642e705c121SKalle Valo wakeup_reasons); 1643e705c121SKalle Valo 1644e705c121SKalle Valo /* qos_seq might point inside resp_pkt, so free it only now */ 1645e705c121SKalle Valo if (get_status_cmd.resp_pkt) 1646e705c121SKalle Valo iwl_free_resp(&get_status_cmd); 1647e705c121SKalle Valo 1648e705c121SKalle Valo /* the FW might have updated the regdomain */ 1649e705c121SKalle Valo iwl_mvm_update_changed_regdom(mvm); 1650e705c121SKalle Valo 16517d9d0d56SLuca Coelho iwl_mvm_resume_tcm(mvm); 1652e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); 1653e705c121SKalle Valo mutex_unlock(&mvm->mutex); 1654e705c121SKalle Valo } 1655e705c121SKalle Valo 1656e705c121SKalle Valo int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) 1657e705c121SKalle Valo { 1658e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | 1659e705c121SKalle Valo CMD_WAKE_UP_TRANS; 1660e705c121SKalle Valo int ret; 1661e705c121SKalle Valo 1662e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); 1663e705c121SKalle Valo 1664702e975dSJohannes Berg if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) 166508f0d23dSEliad Peller return -EINVAL; 166608f0d23dSEliad Peller 1667e705c121SKalle Valo mutex_lock(&mvm->d0i3_suspend_mutex); 1668e705c121SKalle Valo if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { 1669e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); 1670e705c121SKalle Valo __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); 1671e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1672e705c121SKalle Valo return 0; 1673e705c121SKalle Valo } 1674e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1675e705c121SKalle Valo 1676e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); 1677e705c121SKalle Valo if (ret) 1678e705c121SKalle Valo goto out; 1679e705c121SKalle Valo 1680e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1681e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1682e705c121SKalle Valo iwl_mvm_exit_d0i3_iterator, 1683e705c121SKalle Valo mvm); 1684e705c121SKalle Valo out: 1685e705c121SKalle Valo schedule_work(&mvm->d0i3_exit_work); 1686e705c121SKalle Valo return ret; 1687e705c121SKalle Valo } 1688e705c121SKalle Valo 1689e705c121SKalle Valo int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) 1690e705c121SKalle Valo { 1691e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1692e705c121SKalle Valo 1693e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); 1694e705c121SKalle Valo return _iwl_mvm_exit_d0i3(mvm); 1695e705c121SKalle Valo } 1696e705c121SKalle Valo 1697a75b9b33SLuca Coelho #define IWL_MVM_D0I3_OPS \ 1698a75b9b33SLuca Coelho .enter_d0i3 = iwl_mvm_enter_d0i3, \ 1699a75b9b33SLuca Coelho .exit_d0i3 = iwl_mvm_exit_d0i3, 1700a75b9b33SLuca Coelho #else /* CONFIG_PM */ 1701a75b9b33SLuca Coelho #define IWL_MVM_D0I3_OPS 1702a75b9b33SLuca Coelho #endif /* CONFIG_PM */ 1703a75b9b33SLuca Coelho 1704e705c121SKalle Valo #define IWL_MVM_COMMON_OPS \ 1705e705c121SKalle Valo /* these could be differentiated */ \ 1706156f92f2SEmmanuel Grumbach .async_cb = iwl_mvm_async_cb, \ 1707e705c121SKalle Valo .queue_full = iwl_mvm_stop_sw_queue, \ 1708e705c121SKalle Valo .queue_not_full = iwl_mvm_wake_sw_queue, \ 1709e705c121SKalle Valo .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ 1710e705c121SKalle Valo .free_skb = iwl_mvm_free_skb, \ 1711e705c121SKalle Valo .nic_error = iwl_mvm_nic_error, \ 1712e705c121SKalle Valo .cmd_queue_full = iwl_mvm_cmd_queue_full, \ 1713e705c121SKalle Valo .nic_config = iwl_mvm_nic_config, \ 1714a75b9b33SLuca Coelho IWL_MVM_D0I3_OPS \ 1715e705c121SKalle Valo /* as we only register one, these MUST be common! */ \ 1716e705c121SKalle Valo .start = iwl_op_mode_mvm_start, \ 1717e705c121SKalle Valo .stop = iwl_op_mode_mvm_stop 1718e705c121SKalle Valo 1719e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops = { 1720e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1721e705c121SKalle Valo .rx = iwl_mvm_rx, 1722e705c121SKalle Valo }; 1723e705c121SKalle Valo 1724e705c121SKalle Valo static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, 1725e705c121SKalle Valo struct napi_struct *napi, 1726e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 1727e705c121SKalle Valo unsigned int queue) 1728e705c121SKalle Valo { 1729e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1730585a6fccSSara Sharon struct iwl_rx_packet *pkt = rxb_addr(rxb); 173161b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1732e705c121SKalle Valo 173361b0f5d7SJohannes Berg if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) 1734a338384bSSara Sharon iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); 173561b0f5d7SJohannes Berg else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, 173661b0f5d7SJohannes Berg RX_QUEUES_NOTIFICATION))) 173794bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, queue); 173861b0f5d7SJohannes Berg else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1739780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); 1740e705c121SKalle Valo } 1741e705c121SKalle Valo 1742e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { 1743e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1744e705c121SKalle Valo .rx = iwl_mvm_rx_mq, 1745e705c121SKalle Valo .rx_rss = iwl_mvm_rx_mq_rss, 1746e705c121SKalle Valo }; 1747