1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10de8ba41bSLiad Kaufman * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 118745f12aSShaul Triebitz * Copyright(c) 2018 Intel Corporation 12e705c121SKalle Valo * 13e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 14e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 15e705c121SKalle Valo * published by the Free Software Foundation. 16e705c121SKalle Valo * 17e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 18e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 19e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20e705c121SKalle Valo * General Public License for more details. 21e705c121SKalle Valo * 22e705c121SKalle Valo * The full GNU General Public License is included in this distribution 23e705c121SKalle Valo * in the file called COPYING. 24e705c121SKalle Valo * 25e705c121SKalle Valo * Contact Information: 26cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 27e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28e705c121SKalle Valo * 29e705c121SKalle Valo * BSD LICENSE 30e705c121SKalle Valo * 31e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 32e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33de8ba41bSLiad Kaufman * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 348745f12aSShaul Triebitz * Copyright(c) 2018 Intel Corporation 35e705c121SKalle Valo * All rights reserved. 36e705c121SKalle Valo * 37e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 38e705c121SKalle Valo * modification, are permitted provided that the following conditions 39e705c121SKalle Valo * are met: 40e705c121SKalle Valo * 41e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 42e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 43e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 45e705c121SKalle Valo * the documentation and/or other materials provided with the 46e705c121SKalle Valo * distribution. 47e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 48e705c121SKalle Valo * contributors may be used to endorse or promote products derived 49e705c121SKalle Valo * from this software without specific prior written permission. 50e705c121SKalle Valo * 51e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62e705c121SKalle Valo * 63e705c121SKalle Valo *****************************************************************************/ 64e705c121SKalle Valo #include <linux/module.h> 65e705c121SKalle Valo #include <linux/vmalloc.h> 66e705c121SKalle Valo #include <net/mac80211.h> 67e705c121SKalle Valo 689fca9d5cSJohannes Berg #include "fw/notif-wait.h" 69e705c121SKalle Valo #include "iwl-trans.h" 70e705c121SKalle Valo #include "iwl-op-mode.h" 71d962f9b1SJohannes Berg #include "fw/img.h" 72e705c121SKalle Valo #include "iwl-debug.h" 73e705c121SKalle Valo #include "iwl-drv.h" 74e705c121SKalle Valo #include "iwl-modparams.h" 75e705c121SKalle Valo #include "mvm.h" 76e705c121SKalle Valo #include "iwl-phy-db.h" 77e705c121SKalle Valo #include "iwl-eeprom-parse.h" 78e705c121SKalle Valo #include "iwl-csr.h" 79e705c121SKalle Valo #include "iwl-io.h" 80e705c121SKalle Valo #include "iwl-prph.h" 81e705c121SKalle Valo #include "rs.h" 82d172a5efSJohannes Berg #include "fw/api/scan.h" 83e705c121SKalle Valo #include "time-event.h" 8439bdb17eSSharon Dvir #include "fw-api.h" 85d172a5efSJohannes Berg #include "fw/api/scan.h" 86f2abcfa6SLuca Coelho #include "fw/acpi.h" 87e705c121SKalle Valo 88e705c121SKalle Valo #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" 89e705c121SKalle Valo MODULE_DESCRIPTION(DRV_DESCRIPTION); 90e705c121SKalle Valo MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 91e705c121SKalle Valo MODULE_LICENSE("GPL"); 92e705c121SKalle Valo 93e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops; 94e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq; 95e705c121SKalle Valo 96e705c121SKalle Valo struct iwl_mvm_mod_params iwlmvm_mod_params = { 97e705c121SKalle Valo .power_scheme = IWL_POWER_SCHEME_BPS, 98e705c121SKalle Valo .tfd_q_hang_detect = true 99e705c121SKalle Valo /* rest of fields are 0 by default */ 100e705c121SKalle Valo }; 101e705c121SKalle Valo 1022ef00c53SJoe Perches module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, 0444); 103e705c121SKalle Valo MODULE_PARM_DESC(init_dbg, 104e705c121SKalle Valo "set to true to debug an ASSERT in INIT fw (default: false"); 1052ef00c53SJoe Perches module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, 0444); 106e705c121SKalle Valo MODULE_PARM_DESC(power_scheme, 107e705c121SKalle Valo "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); 108e705c121SKalle Valo module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, 1092ef00c53SJoe Perches bool, 0444); 110e705c121SKalle Valo MODULE_PARM_DESC(tfd_q_hang_detect, 111e705c121SKalle Valo "TFD queues hang detection (default: true"); 112e705c121SKalle Valo 113e705c121SKalle Valo /* 114e705c121SKalle Valo * module init and exit functions 115e705c121SKalle Valo */ 116e705c121SKalle Valo static int __init iwl_mvm_init(void) 117e705c121SKalle Valo { 118e705c121SKalle Valo int ret; 119e705c121SKalle Valo 120e705c121SKalle Valo ret = iwl_mvm_rate_control_register(); 121e705c121SKalle Valo if (ret) { 122e705c121SKalle Valo pr_err("Unable to register rate control algorithm: %d\n", ret); 123e705c121SKalle Valo return ret; 124e705c121SKalle Valo } 125e705c121SKalle Valo 126e705c121SKalle Valo ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); 1279f66a397SGregory Greenman if (ret) 128e705c121SKalle Valo pr_err("Unable to register MVM op_mode: %d\n", ret); 129e705c121SKalle Valo 130e705c121SKalle Valo return ret; 131e705c121SKalle Valo } 132e705c121SKalle Valo module_init(iwl_mvm_init); 133e705c121SKalle Valo 134e705c121SKalle Valo static void __exit iwl_mvm_exit(void) 135e705c121SKalle Valo { 136e705c121SKalle Valo iwl_opmode_deregister("iwlmvm"); 137e705c121SKalle Valo iwl_mvm_rate_control_unregister(); 138e705c121SKalle Valo } 139e705c121SKalle Valo module_exit(iwl_mvm_exit); 140e705c121SKalle Valo 141e705c121SKalle Valo static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) 142e705c121SKalle Valo { 143e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 144e705c121SKalle Valo u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; 145e705c121SKalle Valo u32 reg_val = 0; 146e705c121SKalle Valo u32 phy_config = iwl_mvm_get_phy_config(mvm); 147e705c121SKalle Valo 148e705c121SKalle Valo radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> 149e705c121SKalle Valo FW_PHY_CFG_RADIO_TYPE_POS; 150e705c121SKalle Valo radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> 151e705c121SKalle Valo FW_PHY_CFG_RADIO_STEP_POS; 152e705c121SKalle Valo radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> 153e705c121SKalle Valo FW_PHY_CFG_RADIO_DASH_POS; 154e705c121SKalle Valo 155e705c121SKalle Valo /* SKU control */ 156e705c121SKalle Valo reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << 157e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 158e705c121SKalle Valo reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << 159e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 160e705c121SKalle Valo 161e705c121SKalle Valo /* radio configuration */ 162e705c121SKalle Valo reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 163e705c121SKalle Valo reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 164e705c121SKalle Valo reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 165e705c121SKalle Valo 166e705c121SKalle Valo WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & 167e705c121SKalle Valo ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); 168e705c121SKalle Valo 169e705c121SKalle Valo /* 1706e584873SSara Sharon * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC 1716e584873SSara Sharon * sampling, and shouldn't be set to any non-zero value. 1726e584873SSara Sharon * The same is supposed to be true of the other HW, but unsetting 1736e584873SSara Sharon * them (such as the 7260) causes automatic tests to fail on seemingly 1746e584873SSara Sharon * unrelated errors. Need to further investigate this, but for now 1756e584873SSara Sharon * we'll separate cases. 176e705c121SKalle Valo */ 1776e584873SSara Sharon if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000) 178e705c121SKalle Valo reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; 179e705c121SKalle Valo 1802d8c2615SShahar S Matityahu if (iwl_fw_dbg_is_d3_debug_enabled(&mvm->fwrt)) 1812d8c2615SShahar S Matityahu reg_val |= CSR_HW_IF_CONFIG_REG_D3_DEBUG; 1822d8c2615SShahar S Matityahu 183e705c121SKalle Valo iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, 184e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | 185e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | 186e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | 187e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | 188e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | 189e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | 1902d8c2615SShahar S Matityahu CSR_HW_IF_CONFIG_REG_BIT_MAC_SI | 1912d8c2615SShahar S Matityahu CSR_HW_IF_CONFIG_REG_D3_DEBUG, 192e705c121SKalle Valo reg_val); 193e705c121SKalle Valo 194e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 195e705c121SKalle Valo radio_cfg_step, radio_cfg_dash); 196e705c121SKalle Valo 197e705c121SKalle Valo /* 198e705c121SKalle Valo * W/A : NIC is stuck in a reset state after Early PCIe power off 199e705c121SKalle Valo * (PCIe power is lost before PERST# is asserted), causing ME FW 200e705c121SKalle Valo * to lose ownership and not being able to obtain it back. 201e705c121SKalle Valo */ 202e705c121SKalle Valo if (!mvm->trans->cfg->apmg_not_supported) 203e705c121SKalle Valo iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, 204e705c121SKalle Valo APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 205e705c121SKalle Valo ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 206e705c121SKalle Valo } 207e705c121SKalle Valo 208c9cb14a6SChaya Rachel Ivgi /** 209c9cb14a6SChaya Rachel Ivgi * enum iwl_rx_handler_context context for Rx handler 210c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_SYNC : this means that it will be called in the Rx path 211c9cb14a6SChaya Rachel Ivgi * which can't acquire mvm->mutex. 212c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex 213c9cb14a6SChaya Rachel Ivgi * (and only in this case!), it should be set as ASYNC. In that case, 214c9cb14a6SChaya Rachel Ivgi * it will be called from a worker with mvm->mutex held. 215c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the 216c9cb14a6SChaya Rachel Ivgi * mutex itself, it will be called from a worker without mvm->mutex held. 217c9cb14a6SChaya Rachel Ivgi */ 218c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context { 219c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC, 220c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED, 221c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_UNLOCKED, 222c9cb14a6SChaya Rachel Ivgi }; 223c9cb14a6SChaya Rachel Ivgi 224c9cb14a6SChaya Rachel Ivgi /** 225c9cb14a6SChaya Rachel Ivgi * struct iwl_rx_handlers handler for FW notification 226c9cb14a6SChaya Rachel Ivgi * @cmd_id: command id 227c9cb14a6SChaya Rachel Ivgi * @context: see &iwl_rx_handler_context 228c9cb14a6SChaya Rachel Ivgi * @fn: the function is called when notification is received 229c9cb14a6SChaya Rachel Ivgi */ 230e705c121SKalle Valo struct iwl_rx_handlers { 231e705c121SKalle Valo u16 cmd_id; 232c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 233e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 234e705c121SKalle Valo }; 235e705c121SKalle Valo 236c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER(_cmd_id, _fn, _context) \ 237c9cb14a6SChaya Rachel Ivgi { .cmd_id = _cmd_id, .fn = _fn, .context = _context } 238c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ 239c9cb14a6SChaya Rachel Ivgi { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } 240e705c121SKalle Valo 241e705c121SKalle Valo /* 242e705c121SKalle Valo * Handlers for fw notifications 243e705c121SKalle Valo * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME 244e705c121SKalle Valo * This list should be in order of frequency for performance purposes. 245e705c121SKalle Valo * 246c9cb14a6SChaya Rachel Ivgi * The handler can be one from three contexts, see &iwl_rx_handler_context 247e705c121SKalle Valo */ 248e705c121SKalle Valo static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { 249c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), 250c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), 251e705c121SKalle Valo 25284226ca1SGregory Greenman RX_HANDLER_GRP(DATA_PATH_GROUP, TLC_MNG_UPDATE_NOTIF, 25384226ca1SGregory Greenman iwl_mvm_tlc_update_notif, RX_HANDLER_SYNC), 25484226ca1SGregory Greenman 255c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, 256c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 257c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, 258c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 259c9cb14a6SChaya Rachel Ivgi RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, 260c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 261e705c121SKalle Valo 2623af512d6SSara Sharon RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, 263c9cb14a6SChaya Rachel Ivgi iwl_mvm_window_status_notif, RX_HANDLER_SYNC), 2643af512d6SSara Sharon 265c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, 266c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 267c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, 268c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 269e705c121SKalle Valo 270c9cb14a6SChaya Rachel Ivgi RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), 271e705c121SKalle Valo 272e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE, 273c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), 274e705c121SKalle Valo RX_HANDLER(SCAN_OFFLOAD_COMPLETE, 275c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_complete_notif, 276c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 277e705c121SKalle Valo RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, 278c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 279e705c121SKalle Valo RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, 280c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 281e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, 282c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), 283e705c121SKalle Valo 284c9cb14a6SChaya Rachel Ivgi RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, 285c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 286e705c121SKalle Valo 287e705c121SKalle Valo RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, 288c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 289e705c121SKalle Valo 290c9cb14a6SChaya Rachel Ivgi RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), 291e705c121SKalle Valo RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, 292c9cb14a6SChaya Rachel Ivgi iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), 293c9cb14a6SChaya Rachel Ivgi RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, 294c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 295e705c121SKalle Valo RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, 296ec77a33eSChaya Rachel Ivgi iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), 2970a3b7119SChaya Rachel Ivgi RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, 298c9cb14a6SChaya Rachel Ivgi iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), 299e705c121SKalle Valo 300e705c121SKalle Valo RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, 301c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 302c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, 303c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 304c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, 305c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 306bdccdb85SGolan Ben-Ami RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, 307bdccdb85SGolan Ben-Ami iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), 3080db056d3SSara Sharon RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, 309c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), 310f92659a1SSara Sharon RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, 311c9cb14a6SChaya Rachel Ivgi iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), 31265e25482SJohannes Berg RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, 31365e25482SJohannes Berg iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), 314e705c121SKalle Valo }; 315e705c121SKalle Valo #undef RX_HANDLER 316e705c121SKalle Valo #undef RX_HANDLER_GRP 317e705c121SKalle Valo 31839bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 31939bdb17eSSharon Dvir * Access is done through binary search 32039bdb17eSSharon Dvir */ 32139bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { 32239bdb17eSSharon Dvir HCMD_NAME(MVM_ALIVE), 32339bdb17eSSharon Dvir HCMD_NAME(REPLY_ERROR), 32439bdb17eSSharon Dvir HCMD_NAME(ECHO_CMD), 32539bdb17eSSharon Dvir HCMD_NAME(INIT_COMPLETE_NOTIF), 32639bdb17eSSharon Dvir HCMD_NAME(PHY_CONTEXT_CMD), 32739bdb17eSSharon Dvir HCMD_NAME(DBG_CFG), 32839bdb17eSSharon Dvir HCMD_NAME(SCAN_CFG_CMD), 32939bdb17eSSharon Dvir HCMD_NAME(SCAN_REQ_UMAC), 33039bdb17eSSharon Dvir HCMD_NAME(SCAN_ABORT_UMAC), 33139bdb17eSSharon Dvir HCMD_NAME(SCAN_COMPLETE_UMAC), 33239bdb17eSSharon Dvir HCMD_NAME(TOF_CMD), 33339bdb17eSSharon Dvir HCMD_NAME(TOF_NOTIFICATION), 3343af512d6SSara Sharon HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), 33539bdb17eSSharon Dvir HCMD_NAME(ADD_STA_KEY), 33639bdb17eSSharon Dvir HCMD_NAME(ADD_STA), 33739bdb17eSSharon Dvir HCMD_NAME(REMOVE_STA), 33839bdb17eSSharon Dvir HCMD_NAME(FW_GET_ITEM_CMD), 33939bdb17eSSharon Dvir HCMD_NAME(TX_CMD), 34039bdb17eSSharon Dvir HCMD_NAME(SCD_QUEUE_CFG), 34139bdb17eSSharon Dvir HCMD_NAME(TXPATH_FLUSH), 34239bdb17eSSharon Dvir HCMD_NAME(MGMT_MCAST_KEY), 34339bdb17eSSharon Dvir HCMD_NAME(WEP_KEY), 34439bdb17eSSharon Dvir HCMD_NAME(SHARED_MEM_CFG), 34539bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), 34639bdb17eSSharon Dvir HCMD_NAME(MAC_CONTEXT_CMD), 34739bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_CMD), 34839bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_NOTIFICATION), 34939bdb17eSSharon Dvir HCMD_NAME(BINDING_CONTEXT_CMD), 35039bdb17eSSharon Dvir HCMD_NAME(TIME_QUOTA_CMD), 35139bdb17eSSharon Dvir HCMD_NAME(NON_QOS_TX_COUNTER_CMD), 3527089ae63SJohannes Berg HCMD_NAME(LEDS_CMD), 35339bdb17eSSharon Dvir HCMD_NAME(LQ_CMD), 35439bdb17eSSharon Dvir HCMD_NAME(FW_PAGING_BLOCK_CMD), 35539bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), 35639bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), 35739bdb17eSSharon Dvir HCMD_NAME(HOT_SPOT_CMD), 35839bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), 35939bdb17eSSharon Dvir HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), 36039bdb17eSSharon Dvir HCMD_NAME(BT_COEX_CI), 36139bdb17eSSharon Dvir HCMD_NAME(PHY_CONFIGURATION_CMD), 36239bdb17eSSharon Dvir HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), 363176aa60bSSara Sharon HCMD_NAME(PHY_DB_CMD), 36439bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_COMPLETE), 36539bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), 36639bdb17eSSharon Dvir HCMD_NAME(POWER_TABLE_CMD), 36739bdb17eSSharon Dvir HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), 36839bdb17eSSharon Dvir HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), 36939bdb17eSSharon Dvir HCMD_NAME(DC2DC_CONFIG_CMD), 37039bdb17eSSharon Dvir HCMD_NAME(NVM_ACCESS_CMD), 37139bdb17eSSharon Dvir HCMD_NAME(BEACON_NOTIFICATION), 37239bdb17eSSharon Dvir HCMD_NAME(BEACON_TEMPLATE_CMD), 37339bdb17eSSharon Dvir HCMD_NAME(TX_ANT_CONFIGURATION_CMD), 37439bdb17eSSharon Dvir HCMD_NAME(BT_CONFIG), 37539bdb17eSSharon Dvir HCMD_NAME(STATISTICS_CMD), 37639bdb17eSSharon Dvir HCMD_NAME(STATISTICS_NOTIFICATION), 37739bdb17eSSharon Dvir HCMD_NAME(EOSP_NOTIFICATION), 37839bdb17eSSharon Dvir HCMD_NAME(REDUCE_TX_POWER_CMD), 37939bdb17eSSharon Dvir HCMD_NAME(CARD_STATE_NOTIFICATION), 38039bdb17eSSharon Dvir HCMD_NAME(MISSED_BEACONS_NOTIFICATION), 38139bdb17eSSharon Dvir HCMD_NAME(TDLS_CONFIG_CMD), 38239bdb17eSSharon Dvir HCMD_NAME(MAC_PM_POWER_TABLE), 38339bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), 38439bdb17eSSharon Dvir HCMD_NAME(MFUART_LOAD_NOTIFICATION), 38543413a97SSara Sharon HCMD_NAME(RSS_CONFIG_CMD), 38639bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), 38739bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_PHY_CMD), 38839bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_MPDU_CMD), 3893e73aa3bSEmmanuel Grumbach HCMD_NAME(FRAME_RELEASE), 39039bdb17eSSharon Dvir HCMD_NAME(BA_NOTIF), 39139bdb17eSSharon Dvir HCMD_NAME(MCC_UPDATE_CMD), 39239bdb17eSSharon Dvir HCMD_NAME(MCC_CHUB_UPDATE_CMD), 39339bdb17eSSharon Dvir HCMD_NAME(MARKER_CMD), 39439bdb17eSSharon Dvir HCMD_NAME(BT_PROFILE_NOTIFICATION), 39539bdb17eSSharon Dvir HCMD_NAME(BCAST_FILTER_CMD), 39639bdb17eSSharon Dvir HCMD_NAME(MCAST_FILTER_CMD), 39739bdb17eSSharon Dvir HCMD_NAME(REPLY_SF_CFG_CMD), 39839bdb17eSSharon Dvir HCMD_NAME(REPLY_BEACON_FILTERING_CMD), 39939bdb17eSSharon Dvir HCMD_NAME(D3_CONFIG_CMD), 40039bdb17eSSharon Dvir HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), 40139bdb17eSSharon Dvir HCMD_NAME(OFFLOADS_QUERY_CMD), 40239bdb17eSSharon Dvir HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), 40339bdb17eSSharon Dvir HCMD_NAME(MATCH_FOUND_NOTIFICATION), 40439bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), 40539bdb17eSSharon Dvir HCMD_NAME(WOWLAN_PATTERNS), 40639bdb17eSSharon Dvir HCMD_NAME(WOWLAN_CONFIGURATION), 40739bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TSC_RSC_PARAM), 40839bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TKIP_PARAM), 40939bdb17eSSharon Dvir HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), 41039bdb17eSSharon Dvir HCMD_NAME(WOWLAN_GET_STATUSES), 41139bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE), 41239bdb17eSSharon Dvir HCMD_NAME(D0I3_END_CMD), 41339bdb17eSSharon Dvir HCMD_NAME(LTR_CONFIG), 414e705c121SKalle Valo }; 41539bdb17eSSharon Dvir 41639bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 41739bdb17eSSharon Dvir * Access is done through binary search 41839bdb17eSSharon Dvir */ 4195b086414SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_system_names[] = { 4205b086414SGolan Ben-Ami HCMD_NAME(SHARED_MEM_CFG_CMD), 4214399caaaSSara Sharon HCMD_NAME(INIT_EXTENDED_CFG_CMD), 4225b086414SGolan Ben-Ami }; 4235b086414SGolan Ben-Ami 4245b086414SGolan Ben-Ami /* Please keep this array *SORTED* by hex value. 4255b086414SGolan Ben-Ami * Access is done through binary search 4265b086414SGolan Ben-Ami */ 42703098268SAviya Erenfeld static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { 428d3a108a4SAndrei Otcheretianski HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), 42903098268SAviya Erenfeld }; 43003098268SAviya Erenfeld 43103098268SAviya Erenfeld /* Please keep this array *SORTED* by hex value. 43203098268SAviya Erenfeld * Access is done through binary search 43303098268SAviya Erenfeld */ 43439bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { 43539bdb17eSSharon Dvir HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), 4365c89e7bcSChaya Rachel Ivgi HCMD_NAME(CTDP_CONFIG_CMD), 437c221daf2SChaya Rachel Ivgi HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), 438a6bff3cbSHaim Dreyfuss HCMD_NAME(GEO_TX_POWER_LIMIT), 4390a3b7119SChaya Rachel Ivgi HCMD_NAME(CT_KILL_NOTIFICATION), 44039bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), 44139bdb17eSSharon Dvir }; 44239bdb17eSSharon Dvir 4430db056d3SSara Sharon /* Please keep this array *SORTED* by hex value. 4440db056d3SSara Sharon * Access is done through binary search 4450db056d3SSara Sharon */ 446e0d8fdecSSara Sharon static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { 447ddef2f98SEmmanuel Grumbach HCMD_NAME(DQA_ENABLE_CMD), 448e0d8fdecSSara Sharon HCMD_NAME(UPDATE_MU_GROUPS_CMD), 44994bb4481SSara Sharon HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), 450514c3069SLuca Coelho HCMD_NAME(STA_HE_CTXT_CMD), 4518edbfaa1SSara Sharon HCMD_NAME(RFH_QUEUE_CONFIG_CMD), 45265e25482SJohannes Berg HCMD_NAME(STA_PM_NOTIF), 453f92659a1SSara Sharon HCMD_NAME(MU_GROUP_MGMT_NOTIF), 45494bb4481SSara Sharon HCMD_NAME(RX_QUEUES_NOTIFICATION), 455e0d8fdecSSara Sharon }; 456e0d8fdecSSara Sharon 457e0d8fdecSSara Sharon /* Please keep this array *SORTED* by hex value. 458e0d8fdecSSara Sharon * Access is done through binary search 459e0d8fdecSSara Sharon */ 460bdccdb85SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_debug_names[] = { 461bdccdb85SGolan Ben-Ami HCMD_NAME(MFU_ASSERT_DUMP_NTF), 462bdccdb85SGolan Ben-Ami }; 463bdccdb85SGolan Ben-Ami 464bdccdb85SGolan Ben-Ami /* Please keep this array *SORTED* by hex value. 465bdccdb85SGolan Ben-Ami * Access is done through binary search 466bdccdb85SGolan Ben-Ami */ 4670db056d3SSara Sharon static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { 4680db056d3SSara Sharon HCMD_NAME(STORED_BEACON_NTF), 4690db056d3SSara Sharon }; 4700db056d3SSara Sharon 4711f370650SSara Sharon /* Please keep this array *SORTED* by hex value. 4721f370650SSara Sharon * Access is done through binary search 4731f370650SSara Sharon */ 4741f370650SSara Sharon static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { 4751f370650SSara Sharon HCMD_NAME(NVM_ACCESS_COMPLETE), 476e9e1ba3dSSara Sharon HCMD_NAME(NVM_GET_INFO), 4771f370650SSara Sharon }; 4781f370650SSara Sharon 47939bdb17eSSharon Dvir static const struct iwl_hcmd_arr iwl_mvm_groups[] = { 48039bdb17eSSharon Dvir [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 48139bdb17eSSharon Dvir [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 4825b086414SGolan Ben-Ami [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), 48303098268SAviya Erenfeld [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), 48439bdb17eSSharon Dvir [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), 485e0d8fdecSSara Sharon [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), 4860db056d3SSara Sharon [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), 4871f370650SSara Sharon [REGULATORY_AND_NVM_GROUP] = 4881f370650SSara Sharon HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), 48939bdb17eSSharon Dvir }; 49039bdb17eSSharon Dvir 491e705c121SKalle Valo /* this forward declaration can avoid to export the function */ 492e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk); 493a75b9b33SLuca Coelho #ifdef CONFIG_PM 494e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); 495a75b9b33SLuca Coelho #endif 496e705c121SKalle Valo 497f2abcfa6SLuca Coelho static u32 iwl_mvm_min_backoff(struct iwl_mvm *mvm) 498e705c121SKalle Valo { 499f2abcfa6SLuca Coelho const struct iwl_pwr_tx_backoff *backoff = mvm->cfg->pwr_tx_backoffs; 500f2abcfa6SLuca Coelho u64 dflt_pwr_limit; 501e705c121SKalle Valo 502f2abcfa6SLuca Coelho if (!backoff) 503e705c121SKalle Valo return 0; 504e705c121SKalle Valo 505f2abcfa6SLuca Coelho dflt_pwr_limit = iwl_acpi_get_pwr_limit(mvm->dev); 506e705c121SKalle Valo 507f2abcfa6SLuca Coelho while (backoff->pwr) { 508f2abcfa6SLuca Coelho if (dflt_pwr_limit >= backoff->pwr) 509f2abcfa6SLuca Coelho return backoff->backoff; 510f2abcfa6SLuca Coelho 511f2abcfa6SLuca Coelho backoff++; 512e705c121SKalle Valo } 513e705c121SKalle Valo 514e705c121SKalle Valo return 0; 515e705c121SKalle Valo } 516e705c121SKalle Valo 517d3a108a4SAndrei Otcheretianski static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) 518d3a108a4SAndrei Otcheretianski { 519d3a108a4SAndrei Otcheretianski struct iwl_mvm *mvm = 520d3a108a4SAndrei Otcheretianski container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); 521d3a108a4SAndrei Otcheretianski struct ieee80211_vif *tx_blocked_vif; 522d3a108a4SAndrei Otcheretianski struct iwl_mvm_vif *mvmvif; 523d3a108a4SAndrei Otcheretianski 524d3a108a4SAndrei Otcheretianski mutex_lock(&mvm->mutex); 525d3a108a4SAndrei Otcheretianski 526d3a108a4SAndrei Otcheretianski tx_blocked_vif = 527d3a108a4SAndrei Otcheretianski rcu_dereference_protected(mvm->csa_tx_blocked_vif, 528d3a108a4SAndrei Otcheretianski lockdep_is_held(&mvm->mutex)); 529d3a108a4SAndrei Otcheretianski 530d3a108a4SAndrei Otcheretianski if (!tx_blocked_vif) 531d3a108a4SAndrei Otcheretianski goto unlock; 532d3a108a4SAndrei Otcheretianski 533d3a108a4SAndrei Otcheretianski mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); 534d3a108a4SAndrei Otcheretianski iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); 535d3a108a4SAndrei Otcheretianski RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); 536d3a108a4SAndrei Otcheretianski unlock: 537d3a108a4SAndrei Otcheretianski mutex_unlock(&mvm->mutex); 538d3a108a4SAndrei Otcheretianski } 539d3a108a4SAndrei Otcheretianski 5407174beb6SJohannes Berg static int iwl_mvm_fwrt_dump_start(void *ctx) 5417174beb6SJohannes Berg { 5427174beb6SJohannes Berg struct iwl_mvm *mvm = ctx; 5437174beb6SJohannes Berg int ret; 5447174beb6SJohannes Berg 5457174beb6SJohannes Berg ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT); 5467174beb6SJohannes Berg if (ret) 5477174beb6SJohannes Berg return ret; 5487174beb6SJohannes Berg 5497174beb6SJohannes Berg mutex_lock(&mvm->mutex); 5507174beb6SJohannes Berg 5517174beb6SJohannes Berg return 0; 5527174beb6SJohannes Berg } 5537174beb6SJohannes Berg 5547174beb6SJohannes Berg static void iwl_mvm_fwrt_dump_end(void *ctx) 5557174beb6SJohannes Berg { 5567174beb6SJohannes Berg struct iwl_mvm *mvm = ctx; 5577174beb6SJohannes Berg 5587174beb6SJohannes Berg mutex_unlock(&mvm->mutex); 5597174beb6SJohannes Berg 5607174beb6SJohannes Berg iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); 5617174beb6SJohannes Berg } 5627174beb6SJohannes Berg 5638745f12aSShaul Triebitz static bool iwl_mvm_fwrt_fw_running(void *ctx) 5648745f12aSShaul Triebitz { 5658745f12aSShaul Triebitz return iwl_mvm_firmware_running(ctx); 5668745f12aSShaul Triebitz } 5678745f12aSShaul Triebitz 568d3f4b6deSShahar S Matityahu static int iwl_mvm_fwrt_send_hcmd(void *ctx, struct iwl_host_cmd *host_cmd) 569d3f4b6deSShahar S Matityahu { 570d3f4b6deSShahar S Matityahu struct iwl_mvm *mvm = (struct iwl_mvm *)ctx; 571d3f4b6deSShahar S Matityahu int ret; 572d3f4b6deSShahar S Matityahu 573d3f4b6deSShahar S Matityahu mutex_lock(&mvm->mutex); 574d3f4b6deSShahar S Matityahu ret = iwl_mvm_send_cmd(mvm, host_cmd); 575d3f4b6deSShahar S Matityahu mutex_unlock(&mvm->mutex); 576d3f4b6deSShahar S Matityahu 577d3f4b6deSShahar S Matityahu return ret; 578d3f4b6deSShahar S Matityahu } 579d3f4b6deSShahar S Matityahu 5807174beb6SJohannes Berg static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = { 5817174beb6SJohannes Berg .dump_start = iwl_mvm_fwrt_dump_start, 5827174beb6SJohannes Berg .dump_end = iwl_mvm_fwrt_dump_end, 5838745f12aSShaul Triebitz .fw_running = iwl_mvm_fwrt_fw_running, 584d3f4b6deSShahar S Matityahu .send_hcmd = iwl_mvm_fwrt_send_hcmd, 5857174beb6SJohannes Berg }; 5867174beb6SJohannes Berg 587e705c121SKalle Valo static struct iwl_op_mode * 588e705c121SKalle Valo iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, 589e705c121SKalle Valo const struct iwl_fw *fw, struct dentry *dbgfs_dir) 590e705c121SKalle Valo { 591e705c121SKalle Valo struct ieee80211_hw *hw; 592e705c121SKalle Valo struct iwl_op_mode *op_mode; 593e705c121SKalle Valo struct iwl_mvm *mvm; 594e705c121SKalle Valo struct iwl_trans_config trans_cfg = {}; 595e705c121SKalle Valo static const u8 no_reclaim_cmds[] = { 596e705c121SKalle Valo TX_CMD, 597e705c121SKalle Valo }; 598e705c121SKalle Valo int err, scan_size; 599e705c121SKalle Valo u32 min_backoff; 600034925cbSShaul Triebitz enum iwl_amsdu_size rb_size_default; 601e705c121SKalle Valo 602e705c121SKalle Valo /* 603e705c121SKalle Valo * We use IWL_MVM_STATION_COUNT to check the validity of the station 604e705c121SKalle Valo * index all over the driver - check that its value corresponds to the 605e705c121SKalle Valo * array size. 606e705c121SKalle Valo */ 607e705c121SKalle Valo BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); 608e705c121SKalle Valo 609e705c121SKalle Valo /******************************** 610e705c121SKalle Valo * 1. Allocating and configuring HW data 611e705c121SKalle Valo ********************************/ 612e705c121SKalle Valo hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + 613e705c121SKalle Valo sizeof(struct iwl_mvm), 614e705c121SKalle Valo &iwl_mvm_hw_ops); 615e705c121SKalle Valo if (!hw) 616e705c121SKalle Valo return NULL; 617e705c121SKalle Valo 618e705c121SKalle Valo if (cfg->max_rx_agg_size) 619e705c121SKalle Valo hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; 6201eda295fSJohannes Berg else 6211eda295fSJohannes Berg hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; 622e705c121SKalle Valo 623e705c121SKalle Valo if (cfg->max_tx_agg_size) 624e705c121SKalle Valo hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; 6251eda295fSJohannes Berg else 6261eda295fSJohannes Berg hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; 627e705c121SKalle Valo 628e705c121SKalle Valo op_mode = hw->priv; 629e705c121SKalle Valo 630e705c121SKalle Valo mvm = IWL_OP_MODE_GET_MVM(op_mode); 631e705c121SKalle Valo mvm->dev = trans->dev; 632e705c121SKalle Valo mvm->trans = trans; 633e705c121SKalle Valo mvm->cfg = cfg; 634e705c121SKalle Valo mvm->fw = fw; 635e705c121SKalle Valo mvm->hw = hw; 636e705c121SKalle Valo 63793b167c1SMordechay Goodstein iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm, 63893b167c1SMordechay Goodstein dbgfs_dir); 639235acb18SJohannes Berg 640de8ba41bSLiad Kaufman mvm->init_status = 0; 641de8ba41bSLiad Kaufman 642e705c121SKalle Valo if (iwl_mvm_has_new_rx_api(mvm)) { 643e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops_mq; 64418ead597SGolan Ben Ami trans->rx_mpdu_cmd_hdr_size = 64518ead597SGolan Ben Ami (trans->cfg->device_family >= 64618ead597SGolan Ben Ami IWL_DEVICE_FAMILY_22560) ? 64718ead597SGolan Ben Ami sizeof(struct iwl_rx_mpdu_desc) : 64818ead597SGolan Ben Ami IWL_RX_DESC_SIZE_V1; 649e705c121SKalle Valo } else { 650e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops; 65125c2b22cSSara Sharon trans->rx_mpdu_cmd_hdr_size = 65225c2b22cSSara Sharon sizeof(struct iwl_rx_mpdu_res_start); 653e705c121SKalle Valo 654e705c121SKalle Valo if (WARN_ON(trans->num_rx_queues > 1)) 655e705c121SKalle Valo goto out_free; 656e705c121SKalle Valo } 657e705c121SKalle Valo 6583b37f4c9SJohannes Berg mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; 659e705c121SKalle Valo 66028d0793eSLiad Kaufman mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; 661b13f43a4SEmmanuel Grumbach mvm->snif_queue = IWL_MVM_DQA_INJECT_MONITOR_QUEUE; 66249f71713SSara Sharon mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; 66349f71713SSara Sharon mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; 664c8f54701SJohannes Berg 665e705c121SKalle Valo mvm->sf_state = SF_UNINIT; 6667d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 667702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR); 6681f370650SSara Sharon else 669702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT); 670c89e333dSAndrei Otcheretianski mvm->drop_bcn_ap_mode = true; 671e705c121SKalle Valo 672e705c121SKalle Valo mutex_init(&mvm->mutex); 673e705c121SKalle Valo mutex_init(&mvm->d0i3_suspend_mutex); 674e705c121SKalle Valo spin_lock_init(&mvm->async_handlers_lock); 675e705c121SKalle Valo INIT_LIST_HEAD(&mvm->time_event_list); 676e705c121SKalle Valo INIT_LIST_HEAD(&mvm->aux_roc_te_list); 677e705c121SKalle Valo INIT_LIST_HEAD(&mvm->async_handlers_list); 678e705c121SKalle Valo spin_lock_init(&mvm->time_event_lock); 679e705c121SKalle Valo 680e705c121SKalle Valo INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); 681e705c121SKalle Valo INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); 682a75b9b33SLuca Coelho #ifdef CONFIG_PM 683e705c121SKalle Valo INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); 684a75b9b33SLuca Coelho #endif 685e705c121SKalle Valo INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); 68669e04642SLuca Coelho INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); 68724afba76SLiad Kaufman INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); 688e705c121SKalle Valo 689e705c121SKalle Valo spin_lock_init(&mvm->d0i3_tx_lock); 690e705c121SKalle Valo spin_lock_init(&mvm->refs_lock); 691e705c121SKalle Valo skb_queue_head_init(&mvm->d0i3_tx); 692e705c121SKalle Valo init_waitqueue_head(&mvm->d0i3_exit_waitq); 6933a732c65SSara Sharon init_waitqueue_head(&mvm->rx_sync_waitq); 694e705c121SKalle Valo 6950636b938SSara Sharon atomic_set(&mvm->queue_sync_counter, 0); 6960636b938SSara Sharon 697e705c121SKalle Valo SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); 698e705c121SKalle Valo 6997d9d0d56SLuca Coelho spin_lock_init(&mvm->tcm.lock); 7007d9d0d56SLuca Coelho INIT_DELAYED_WORK(&mvm->tcm.work, iwl_mvm_tcm_work); 7017d9d0d56SLuca Coelho mvm->tcm.ts = jiffies; 7027d9d0d56SLuca Coelho mvm->tcm.ll_ts = jiffies; 7037d9d0d56SLuca Coelho mvm->tcm.uapsd_nonagg_ts = jiffies; 7047d9d0d56SLuca Coelho 705d3a108a4SAndrei Otcheretianski INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); 706d3a108a4SAndrei Otcheretianski 707e705c121SKalle Valo /* 708e705c121SKalle Valo * Populate the state variables that the transport layer needs 709e705c121SKalle Valo * to know about. 710e705c121SKalle Valo */ 711e705c121SKalle Valo trans_cfg.op_mode = op_mode; 712e705c121SKalle Valo trans_cfg.no_reclaim_cmds = no_reclaim_cmds; 713e705c121SKalle Valo trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); 714034925cbSShaul Triebitz 715034925cbSShaul Triebitz if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560) 716034925cbSShaul Triebitz rb_size_default = IWL_AMSDU_2K; 717034925cbSShaul Triebitz else 718034925cbSShaul Triebitz rb_size_default = IWL_AMSDU_4K; 719034925cbSShaul Triebitz 7206c4fbcbcSEmmanuel Grumbach switch (iwlwifi_mod_params.amsdu_size) { 7214bdd4dfeSEmmanuel Grumbach case IWL_AMSDU_DEF: 722034925cbSShaul Triebitz trans_cfg.rx_buf_size = rb_size_default; 723034925cbSShaul Triebitz break; 7246c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_4K: 7256c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 7266c4fbcbcSEmmanuel Grumbach break; 7276c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_8K: 7286c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_8K; 7296c4fbcbcSEmmanuel Grumbach break; 7306c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_12K: 7316c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_12K; 7326c4fbcbcSEmmanuel Grumbach break; 7336c4fbcbcSEmmanuel Grumbach default: 7346c4fbcbcSEmmanuel Grumbach pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, 7356c4fbcbcSEmmanuel Grumbach iwlwifi_mod_params.amsdu_size); 736034925cbSShaul Triebitz trans_cfg.rx_buf_size = rb_size_default; 7376c4fbcbcSEmmanuel Grumbach } 7384bdd4dfeSEmmanuel Grumbach 7394b87e5afSLuca Coelho trans->wide_cmd_header = true; 7402a182fbbSGolan Ben Ami trans_cfg.bc_table_dword = 7412a182fbbSGolan Ben Ami mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_22560; 742e705c121SKalle Valo 74339bdb17eSSharon Dvir trans_cfg.command_groups = iwl_mvm_groups; 74439bdb17eSSharon Dvir trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); 745e705c121SKalle Valo 746097129c9SLiad Kaufman trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; 747e705c121SKalle Valo trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; 748e705c121SKalle Valo trans_cfg.scd_set_active = true; 749e705c121SKalle Valo 75021cb3222SJohannes Berg trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, 75121cb3222SJohannes Berg driver_data[2]); 75221cb3222SJohannes Berg 75341837ca9SEmmanuel Grumbach trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; 754e705c121SKalle Valo 755e705c121SKalle Valo /* Set a short watchdog for the command queue */ 756e705c121SKalle Valo trans_cfg.cmd_q_wdg_timeout = 757e705c121SKalle Valo iwl_mvm_get_wd_timeout(mvm, NULL, false, true); 758e705c121SKalle Valo 759e705c121SKalle Valo snprintf(mvm->hw->wiphy->fw_version, 760e705c121SKalle Valo sizeof(mvm->hw->wiphy->fw_version), 761e705c121SKalle Valo "%s", fw->fw_version); 762e705c121SKalle Valo 763e705c121SKalle Valo /* Configure transport layer */ 764e705c121SKalle Valo iwl_trans_configure(mvm->trans, &trans_cfg); 765e705c121SKalle Valo 766e705c121SKalle Valo trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; 76717b809c9SSara Sharon trans->dbg_dest_tlv = mvm->fw->dbg.dest_tlv; 76817b809c9SSara Sharon trans->dbg_n_dest_reg = mvm->fw->dbg.n_dest_reg; 76917b809c9SSara Sharon memcpy(trans->dbg_conf_tlv, mvm->fw->dbg.conf_tlv, 770e705c121SKalle Valo sizeof(trans->dbg_conf_tlv)); 77117b809c9SSara Sharon trans->dbg_trigger_tlv = mvm->fw->dbg.trigger_tlv; 77217b809c9SSara Sharon trans->dbg_dump_mask = mvm->fw->dbg.dump_mask; 773e705c121SKalle Valo 774132db31cSGolan Ben-Ami trans->iml = mvm->fw->iml; 775132db31cSGolan Ben-Ami trans->iml_len = mvm->fw->iml_len; 776132db31cSGolan Ben-Ami 777e705c121SKalle Valo /* set up notification wait support */ 778e705c121SKalle Valo iwl_notification_wait_init(&mvm->notif_wait); 779e705c121SKalle Valo 780e705c121SKalle Valo /* Init phy db */ 781e705c121SKalle Valo mvm->phy_db = iwl_phy_db_init(trans); 782e705c121SKalle Valo if (!mvm->phy_db) { 783e705c121SKalle Valo IWL_ERR(mvm, "Cannot init phy_db\n"); 784e705c121SKalle Valo goto out_free; 785e705c121SKalle Valo } 786e705c121SKalle Valo 787e705c121SKalle Valo IWL_INFO(mvm, "Detected %s, REV=0x%X\n", 788e705c121SKalle Valo mvm->cfg->name, mvm->trans->hw_rev); 789e705c121SKalle Valo 790e705c121SKalle Valo if (iwlwifi_mod_params.nvm_file) 791e705c121SKalle Valo mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; 792e705c121SKalle Valo else 793e705c121SKalle Valo IWL_DEBUG_EEPROM(mvm->trans->dev, 794e705c121SKalle Valo "working without external nvm file\n"); 795e705c121SKalle Valo 796e705c121SKalle Valo err = iwl_trans_start_hw(mvm->trans); 797e705c121SKalle Valo if (err) 798e705c121SKalle Valo goto out_free; 799e705c121SKalle Valo 800e705c121SKalle Valo mutex_lock(&mvm->mutex); 80108f0d23dSEliad Peller iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); 802e705c121SKalle Valo err = iwl_run_init_mvm_ucode(mvm, true); 803f38efdb2SShahar S Matityahu if (test_bit(IWL_FWRT_STATUS_WAIT_ALIVE, &mvm->fwrt.status)) 804f38efdb2SShahar S Matityahu iwl_fw_alive_error_dump(&mvm->fwrt); 805f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !err) 806fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 80708f0d23dSEliad Peller iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); 808e705c121SKalle Valo mutex_unlock(&mvm->mutex); 809de8ba41bSLiad Kaufman if (err < 0) { 810e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); 811e705c121SKalle Valo goto out_free; 812e705c121SKalle Valo } 813e705c121SKalle Valo 814e705c121SKalle Valo scan_size = iwl_mvm_scan_size(mvm); 815e705c121SKalle Valo 816e705c121SKalle Valo mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); 817e705c121SKalle Valo if (!mvm->scan_cmd) 818e705c121SKalle Valo goto out_free; 819e705c121SKalle Valo 820e705c121SKalle Valo /* Set EBS as successful as long as not stated otherwise by the FW. */ 821e705c121SKalle Valo mvm->last_ebs_successful = true; 822e705c121SKalle Valo 823e705c121SKalle Valo err = iwl_mvm_mac_setup_register(mvm); 824e705c121SKalle Valo if (err) 825e705c121SKalle Valo goto out_free; 8261f370650SSara Sharon mvm->hw_registered = true; 827e705c121SKalle Valo 828f2abcfa6SLuca Coelho min_backoff = iwl_mvm_min_backoff(mvm); 82904ddc2aaSChaya Rachel Ivgi iwl_mvm_thermal_initialize(mvm, min_backoff); 83004ddc2aaSChaya Rachel Ivgi 831e705c121SKalle Valo err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); 832e705c121SKalle Valo if (err) 833e705c121SKalle Valo goto out_unregister; 834e705c121SKalle Valo 835678d9b6dSLiad Kaufman if (!iwl_mvm_has_new_rx_stats_api(mvm)) 836678d9b6dSLiad Kaufman memset(&mvm->rx_stats_v3, 0, 837678d9b6dSLiad Kaufman sizeof(struct mvm_statistics_rx_v3)); 838678d9b6dSLiad Kaufman else 839e705c121SKalle Valo memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); 840e705c121SKalle Valo 84133c85eadSLuca Coelho /* The transport always starts with a taken reference, we can 84233c85eadSLuca Coelho * release it now if d0i3 is supported */ 84333c85eadSLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 844a42b2af3SLuca Coelho iwl_trans_unref(mvm->trans); 845e705c121SKalle Valo 846e705c121SKalle Valo iwl_mvm_tof_init(mvm); 847e705c121SKalle Valo 848*656fca00SAvraham Stern iwl_mvm_toggle_tx_ant(mvm, &mvm->mgmt_last_antenna_idx); 849*656fca00SAvraham Stern 850e705c121SKalle Valo return op_mode; 851e705c121SKalle Valo 852e705c121SKalle Valo out_unregister: 853de8ba41bSLiad Kaufman if (iwlmvm_mod_params.init_dbg) 854de8ba41bSLiad Kaufman return op_mode; 855de8ba41bSLiad Kaufman 856e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 8571f370650SSara Sharon mvm->hw_registered = false; 858e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 859c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 860e705c121SKalle Valo out_free: 8617174beb6SJohannes Berg iwl_fw_flush_dump(&mvm->fwrt); 862de8ba41bSLiad Kaufman 863de8ba41bSLiad Kaufman if (iwlmvm_mod_params.init_dbg) 864de8ba41bSLiad Kaufman return op_mode; 865e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 866e705c121SKalle Valo kfree(mvm->scan_cmd); 867e705c121SKalle Valo iwl_trans_op_mode_leave(trans); 86856f2929bSSara Sharon 869e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 870e705c121SKalle Valo return NULL; 871e705c121SKalle Valo } 872e705c121SKalle Valo 873e705c121SKalle Valo static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) 874e705c121SKalle Valo { 875e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 876e705c121SKalle Valo int i; 877e705c121SKalle Valo 878e27deb45SLuca Coelho /* If d0i3 is supported, we have released the reference that 879e27deb45SLuca Coelho * the transport started with, so we should take it back now 880e27deb45SLuca Coelho * that we are leaving. 881e27deb45SLuca Coelho */ 882e27deb45SLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 883e27deb45SLuca Coelho iwl_trans_ref(mvm->trans); 884e27deb45SLuca Coelho 885e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 886e705c121SKalle Valo 887c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 888e705c121SKalle Valo 889de8ba41bSLiad Kaufman if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) { 890e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 891de8ba41bSLiad Kaufman mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE; 892de8ba41bSLiad Kaufman } 893e705c121SKalle Valo 894e705c121SKalle Valo kfree(mvm->scan_cmd); 895e705c121SKalle Valo kfree(mvm->mcast_filter_cmd); 896e705c121SKalle Valo mvm->mcast_filter_cmd = NULL; 897e705c121SKalle Valo 898e705c121SKalle Valo #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) 899e705c121SKalle Valo kfree(mvm->d3_resume_sram); 900e705c121SKalle Valo #endif 901e705c121SKalle Valo iwl_trans_op_mode_leave(mvm->trans); 902e705c121SKalle Valo 903e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 904e705c121SKalle Valo mvm->phy_db = NULL; 905e705c121SKalle Valo 9061dad3e0aSLuca Coelho kfree(mvm->nvm_data); 907e705c121SKalle Valo for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) 908e705c121SKalle Valo kfree(mvm->nvm_sections[i].data); 909e705c121SKalle Valo 9107d9d0d56SLuca Coelho cancel_delayed_work_sync(&mvm->tcm.work); 9117d9d0d56SLuca Coelho 912e705c121SKalle Valo iwl_mvm_tof_clean(mvm); 913e705c121SKalle Valo 914a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->mutex); 915a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->d0i3_suspend_mutex); 916a2a57a35SEmmanuel Grumbach 917e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 918e705c121SKalle Valo } 919e705c121SKalle Valo 920e705c121SKalle Valo struct iwl_async_handler_entry { 921e705c121SKalle Valo struct list_head list; 922e705c121SKalle Valo struct iwl_rx_cmd_buffer rxb; 923c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 924e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 925e705c121SKalle Valo }; 926e705c121SKalle Valo 927e705c121SKalle Valo void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) 928e705c121SKalle Valo { 929e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 930e705c121SKalle Valo 931e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 932e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { 933e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 934e705c121SKalle Valo list_del(&entry->list); 935e705c121SKalle Valo kfree(entry); 936e705c121SKalle Valo } 937e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 938e705c121SKalle Valo } 939e705c121SKalle Valo 940e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk) 941e705c121SKalle Valo { 942e705c121SKalle Valo struct iwl_mvm *mvm = 943e705c121SKalle Valo container_of(wk, struct iwl_mvm, async_handlers_wk); 944e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 9458098203fSJohannes Berg LIST_HEAD(local_list); 946e705c121SKalle Valo 947e705c121SKalle Valo /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ 948e705c121SKalle Valo 949e705c121SKalle Valo /* 950e705c121SKalle Valo * Sync with Rx path with a lock. Remove all the entries from this list, 951e705c121SKalle Valo * add them to a local one (lock free), and then handle them. 952e705c121SKalle Valo */ 953e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 954e705c121SKalle Valo list_splice_init(&mvm->async_handlers_list, &local_list); 955e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 956e705c121SKalle Valo 957e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &local_list, list) { 958c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 959c9cb14a6SChaya Rachel Ivgi mutex_lock(&mvm->mutex); 960e705c121SKalle Valo entry->fn(mvm, &entry->rxb); 961e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 962e705c121SKalle Valo list_del(&entry->list); 963c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 964c9cb14a6SChaya Rachel Ivgi mutex_unlock(&mvm->mutex); 965e705c121SKalle Valo kfree(entry); 966e705c121SKalle Valo } 967e705c121SKalle Valo } 968e705c121SKalle Valo 969e705c121SKalle Valo static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, 970e705c121SKalle Valo struct iwl_rx_packet *pkt) 971e705c121SKalle Valo { 972e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trig; 973e705c121SKalle Valo struct iwl_fw_dbg_trigger_cmd *cmds_trig; 974e705c121SKalle Valo int i; 975e705c121SKalle Valo 9766c042d75SSara Sharon trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, NULL, 9776c042d75SSara Sharon FW_DBG_TRIGGER_FW_NOTIF); 9786c042d75SSara Sharon if (!trig) 979e705c121SKalle Valo return; 980e705c121SKalle Valo 981e705c121SKalle Valo cmds_trig = (void *)trig->data; 982e705c121SKalle Valo 983e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { 984e705c121SKalle Valo /* don't collect on CMD 0 */ 985e705c121SKalle Valo if (!cmds_trig->cmds[i].cmd_id) 986e705c121SKalle Valo break; 987e705c121SKalle Valo 988e705c121SKalle Valo if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || 989e705c121SKalle Valo cmds_trig->cmds[i].group_id != pkt->hdr.group_id) 990e705c121SKalle Valo continue; 991e705c121SKalle Valo 9927174beb6SJohannes Berg iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, 993e705c121SKalle Valo "CMD 0x%02x.%02x received", 994e705c121SKalle Valo pkt->hdr.group_id, pkt->hdr.cmd); 995e705c121SKalle Valo break; 996e705c121SKalle Valo } 997e705c121SKalle Valo } 998e705c121SKalle Valo 999e705c121SKalle Valo static void iwl_mvm_rx_common(struct iwl_mvm *mvm, 1000e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 1001e705c121SKalle Valo struct iwl_rx_packet *pkt) 1002e705c121SKalle Valo { 1003e705c121SKalle Valo int i; 1004e705c121SKalle Valo 1005e705c121SKalle Valo iwl_mvm_rx_check_trigger(mvm, pkt); 1006e705c121SKalle Valo 1007e705c121SKalle Valo /* 1008e705c121SKalle Valo * Do the notification wait before RX handlers so 1009e705c121SKalle Valo * even if the RX handler consumes the RXB we have 1010e705c121SKalle Valo * access to it in the notification wait entry. 1011e705c121SKalle Valo */ 1012e705c121SKalle Valo iwl_notification_wait_notify(&mvm->notif_wait, pkt); 1013e705c121SKalle Valo 1014e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { 1015e705c121SKalle Valo const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; 1016e705c121SKalle Valo struct iwl_async_handler_entry *entry; 1017e705c121SKalle Valo 1018e705c121SKalle Valo if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) 1019e705c121SKalle Valo continue; 1020e705c121SKalle Valo 1021c9cb14a6SChaya Rachel Ivgi if (rx_h->context == RX_HANDLER_SYNC) { 1022e705c121SKalle Valo rx_h->fn(mvm, rxb); 1023e705c121SKalle Valo return; 1024e705c121SKalle Valo } 1025e705c121SKalle Valo 1026e705c121SKalle Valo entry = kzalloc(sizeof(*entry), GFP_ATOMIC); 1027e705c121SKalle Valo /* we can't do much... */ 1028e705c121SKalle Valo if (!entry) 1029e705c121SKalle Valo return; 1030e705c121SKalle Valo 1031e705c121SKalle Valo entry->rxb._page = rxb_steal_page(rxb); 1032e705c121SKalle Valo entry->rxb._offset = rxb->_offset; 1033e705c121SKalle Valo entry->rxb._rx_page_order = rxb->_rx_page_order; 1034e705c121SKalle Valo entry->fn = rx_h->fn; 1035c9cb14a6SChaya Rachel Ivgi entry->context = rx_h->context; 1036e705c121SKalle Valo spin_lock(&mvm->async_handlers_lock); 1037e705c121SKalle Valo list_add_tail(&entry->list, &mvm->async_handlers_list); 1038e705c121SKalle Valo spin_unlock(&mvm->async_handlers_lock); 1039e705c121SKalle Valo schedule_work(&mvm->async_handlers_wk); 104007fb3299SSara Sharon break; 1041e705c121SKalle Valo } 1042e705c121SKalle Valo } 1043e705c121SKalle Valo 1044e705c121SKalle Valo static void iwl_mvm_rx(struct iwl_op_mode *op_mode, 1045e705c121SKalle Valo struct napi_struct *napi, 1046e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1047e705c121SKalle Valo { 1048e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1049e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 105061b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1051e705c121SKalle Valo 105261b0f5d7SJohannes Berg if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1053e705c121SKalle Valo iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); 105461b0f5d7SJohannes Berg else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) 1055e705c121SKalle Valo iwl_mvm_rx_rx_phy_cmd(mvm, rxb); 1056e705c121SKalle Valo else 1057e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 1058e705c121SKalle Valo } 1059e705c121SKalle Valo 1060e705c121SKalle Valo static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, 1061e705c121SKalle Valo struct napi_struct *napi, 1062e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1063e705c121SKalle Valo { 1064e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1065e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 106661b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1067e705c121SKalle Valo 106861b0f5d7SJohannes Berg if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1069780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); 107061b0f5d7SJohannes Berg else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, 107161b0f5d7SJohannes Berg RX_QUEUES_NOTIFICATION))) 107294bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, 0); 107361b0f5d7SJohannes Berg else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) 107458035432SJohannes Berg iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); 1075e705c121SKalle Valo else 1076e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 1077e705c121SKalle Valo } 1078e705c121SKalle Valo 1079b4f7a9d1SLiad Kaufman void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 1080e705c121SKalle Valo { 1081e705c121SKalle Valo int q; 1082e705c121SKalle Valo 1083e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 1084e705c121SKalle Valo return; 1085e705c121SKalle Valo 1086e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 1087e705c121SKalle Valo if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { 1088e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 1089b4f7a9d1SLiad Kaufman "mac80211 %d already stopped\n", q); 1090e705c121SKalle Valo continue; 1091e705c121SKalle Valo } 1092e705c121SKalle Valo 1093e705c121SKalle Valo ieee80211_stop_queue(mvm->hw, q); 1094e705c121SKalle Valo } 1095e705c121SKalle Valo } 1096e705c121SKalle Valo 1097156f92f2SEmmanuel Grumbach static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, 1098156f92f2SEmmanuel Grumbach const struct iwl_device_cmd *cmd) 1099156f92f2SEmmanuel Grumbach { 1100156f92f2SEmmanuel Grumbach struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1101156f92f2SEmmanuel Grumbach 1102156f92f2SEmmanuel Grumbach /* 1103156f92f2SEmmanuel Grumbach * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA 1104156f92f2SEmmanuel Grumbach * commands that need to block the Tx queues. 1105156f92f2SEmmanuel Grumbach */ 1106156f92f2SEmmanuel Grumbach iwl_trans_block_txq_ptrs(mvm->trans, false); 1107156f92f2SEmmanuel Grumbach } 1108156f92f2SEmmanuel Grumbach 1109b4f7a9d1SLiad Kaufman static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1110e705c121SKalle Valo { 1111e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1112f3f240f9SJohannes Berg unsigned long mq = mvm->hw_queue_to_mac80211[hw_queue]; 1113e705c121SKalle Valo 1114b4f7a9d1SLiad Kaufman iwl_mvm_stop_mac_queues(mvm, mq); 1115b4f7a9d1SLiad Kaufman } 1116b4f7a9d1SLiad Kaufman 1117b4f7a9d1SLiad Kaufman void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 1118b4f7a9d1SLiad Kaufman { 1119b4f7a9d1SLiad Kaufman int q; 1120b4f7a9d1SLiad Kaufman 1121e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 1122e705c121SKalle Valo return; 1123e705c121SKalle Valo 1124e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 1125e705c121SKalle Valo if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { 1126e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 1127b4f7a9d1SLiad Kaufman "mac80211 %d still stopped\n", q); 1128e705c121SKalle Valo continue; 1129e705c121SKalle Valo } 1130e705c121SKalle Valo 1131e705c121SKalle Valo ieee80211_wake_queue(mvm->hw, q); 1132e705c121SKalle Valo } 1133e705c121SKalle Valo } 1134e705c121SKalle Valo 1135b4f7a9d1SLiad Kaufman static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1136b4f7a9d1SLiad Kaufman { 1137b4f7a9d1SLiad Kaufman struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1138f3f240f9SJohannes Berg unsigned long mq = mvm->hw_queue_to_mac80211[hw_queue]; 1139b4f7a9d1SLiad Kaufman 1140b4f7a9d1SLiad Kaufman iwl_mvm_start_mac_queues(mvm, mq); 1141b4f7a9d1SLiad Kaufman } 1142b4f7a9d1SLiad Kaufman 11436ad04359SJohannes Berg static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) 11446ad04359SJohannes Berg { 11456ad04359SJohannes Berg bool state = iwl_mvm_is_radio_killed(mvm); 11466ad04359SJohannes Berg 11476ad04359SJohannes Berg if (state) 11486ad04359SJohannes Berg wake_up(&mvm->rx_sync_waitq); 11496ad04359SJohannes Berg 11506ad04359SJohannes Berg wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); 11516ad04359SJohannes Berg } 11526ad04359SJohannes Berg 1153e705c121SKalle Valo void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) 1154e705c121SKalle Valo { 1155e705c121SKalle Valo if (state) 1156e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1157e705c121SKalle Valo else 1158e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1159e705c121SKalle Valo 11606ad04359SJohannes Berg iwl_mvm_set_rfkill_state(mvm); 1161e705c121SKalle Valo } 1162e705c121SKalle Valo 1163e705c121SKalle Valo static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) 1164e705c121SKalle Valo { 1165e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 11666aa7de05SMark Rutland bool calibrating = READ_ONCE(mvm->calibrating); 1167e705c121SKalle Valo 1168e705c121SKalle Valo if (state) 1169e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1170e705c121SKalle Valo else 1171e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1172e705c121SKalle Valo 11736ad04359SJohannes Berg iwl_mvm_set_rfkill_state(mvm); 1174e705c121SKalle Valo 1175e705c121SKalle Valo /* iwl_run_init_mvm_ucode is waiting for results, abort it */ 1176e705c121SKalle Valo if (calibrating) 1177e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1178e705c121SKalle Valo 1179e705c121SKalle Valo /* 1180e705c121SKalle Valo * Stop the device if we run OPERATIONAL firmware or if we are in the 1181e705c121SKalle Valo * middle of the calibrations. 1182e705c121SKalle Valo */ 1183702e975dSJohannes Berg return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating); 1184e705c121SKalle Valo } 1185e705c121SKalle Valo 1186e705c121SKalle Valo static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) 1187e705c121SKalle Valo { 1188e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1189e705c121SKalle Valo struct ieee80211_tx_info *info; 1190e705c121SKalle Valo 1191e705c121SKalle Valo info = IEEE80211_SKB_CB(skb); 1192e705c121SKalle Valo iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); 1193e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1194e705c121SKalle Valo } 1195e705c121SKalle Valo 1196e705c121SKalle Valo struct iwl_mvm_reprobe { 1197e705c121SKalle Valo struct device *dev; 1198e705c121SKalle Valo struct work_struct work; 1199e705c121SKalle Valo }; 1200e705c121SKalle Valo 1201e705c121SKalle Valo static void iwl_mvm_reprobe_wk(struct work_struct *wk) 1202e705c121SKalle Valo { 1203e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1204e705c121SKalle Valo 1205e705c121SKalle Valo reprobe = container_of(wk, struct iwl_mvm_reprobe, work); 1206e705c121SKalle Valo if (device_reprobe(reprobe->dev)) 1207e705c121SKalle Valo dev_err(reprobe->dev, "reprobe failed!\n"); 1208e705c121SKalle Valo kfree(reprobe); 1209e705c121SKalle Valo module_put(THIS_MODULE); 1210e705c121SKalle Valo } 1211e705c121SKalle Valo 1212e705c121SKalle Valo void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) 1213e705c121SKalle Valo { 1214e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1215e705c121SKalle Valo 1216e705c121SKalle Valo /* 1217e705c121SKalle Valo * This is a bit racy, but worst case we tell mac80211 about 1218e705c121SKalle Valo * a stopped/aborted scan when that was already done which 1219e705c121SKalle Valo * is not a problem. It is necessary to abort any os scan 1220e705c121SKalle Valo * here because mac80211 requires having the scan cleared 1221e705c121SKalle Valo * before restarting. 1222e705c121SKalle Valo * We'll reset the scan_status to NONE in restart cleanup in 1223e705c121SKalle Valo * the next start() call from mac80211. If restart isn't called 1224e705c121SKalle Valo * (no fw restart) scan status will stay busy. 1225e705c121SKalle Valo */ 1226e705c121SKalle Valo iwl_mvm_report_scan_aborted(mvm); 1227e705c121SKalle Valo 1228e705c121SKalle Valo /* 1229e705c121SKalle Valo * If we're restarting already, don't cycle restarts. 1230e705c121SKalle Valo * If INIT fw asserted, it will likely fail again. 1231e705c121SKalle Valo * If WoWLAN fw asserted, don't restart either, mac80211 1232e705c121SKalle Valo * can't recover this since we're already half suspended. 1233e705c121SKalle Valo */ 12343b37f4c9SJohannes Berg if (!mvm->fw_restart && fw_error) { 12357174beb6SJohannes Berg iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert, 1236ea7cb829SSara Sharon NULL, 0); 1237bf8b286fSJohannes Berg } else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1238e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1239e705c121SKalle Valo 1240e705c121SKalle Valo IWL_ERR(mvm, 1241e705c121SKalle Valo "Firmware error during reconfiguration - reprobe!\n"); 1242e705c121SKalle Valo 1243e705c121SKalle Valo /* 1244e705c121SKalle Valo * get a module reference to avoid doing this while unloading 1245e705c121SKalle Valo * anyway and to avoid scheduling a work with code that's 1246e705c121SKalle Valo * being removed. 1247e705c121SKalle Valo */ 1248e705c121SKalle Valo if (!try_module_get(THIS_MODULE)) { 1249e705c121SKalle Valo IWL_ERR(mvm, "Module is being unloaded - abort\n"); 1250e705c121SKalle Valo return; 1251e705c121SKalle Valo } 1252e705c121SKalle Valo 1253e705c121SKalle Valo reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); 1254e705c121SKalle Valo if (!reprobe) { 1255e705c121SKalle Valo module_put(THIS_MODULE); 1256e705c121SKalle Valo return; 1257e705c121SKalle Valo } 1258e705c121SKalle Valo reprobe->dev = mvm->trans->dev; 1259e705c121SKalle Valo INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); 1260e705c121SKalle Valo schedule_work(&reprobe->work); 1261702e975dSJohannes Berg } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR && 1262f60c9e59SEmmanuel Grumbach mvm->hw_registered && 1263f60c9e59SEmmanuel Grumbach !test_bit(STATUS_TRANS_DEAD, &mvm->trans->status)) { 1264e705c121SKalle Valo /* don't let the transport/FW power down */ 1265e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); 1266e705c121SKalle Valo 12673b37f4c9SJohannes Berg if (fw_error && mvm->fw_restart > 0) 12683b37f4c9SJohannes Berg mvm->fw_restart--; 1269bf8b286fSJohannes Berg set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status); 1270e705c121SKalle Valo ieee80211_restart_hw(mvm->hw); 1271e705c121SKalle Valo } 1272e705c121SKalle Valo } 1273e705c121SKalle Valo 1274e705c121SKalle Valo static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) 1275e705c121SKalle Valo { 1276e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1277e705c121SKalle Valo 1278f60c9e59SEmmanuel Grumbach if (!test_bit(STATUS_TRANS_DEAD, &mvm->trans->status)) 1279e705c121SKalle Valo iwl_mvm_dump_nic_error_log(mvm); 1280e705c121SKalle Valo 1281e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1282e705c121SKalle Valo } 1283e705c121SKalle Valo 1284e705c121SKalle Valo static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) 1285e705c121SKalle Valo { 1286e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1287e705c121SKalle Valo 1288e705c121SKalle Valo WARN_ON(1); 1289e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1290e705c121SKalle Valo } 1291e705c121SKalle Valo 1292a75b9b33SLuca Coelho #ifdef CONFIG_PM 1293e705c121SKalle Valo struct iwl_d0i3_iter_data { 1294e705c121SKalle Valo struct iwl_mvm *mvm; 1295a3f7ba5cSEliad Peller struct ieee80211_vif *connected_vif; 1296e705c121SKalle Valo u8 ap_sta_id; 1297e705c121SKalle Valo u8 vif_count; 1298e705c121SKalle Valo u8 offloading_tid; 1299e705c121SKalle Valo bool disable_offloading; 1300e705c121SKalle Valo }; 1301e705c121SKalle Valo 1302e705c121SKalle Valo static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, 1303e705c121SKalle Valo struct ieee80211_vif *vif, 1304e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1305e705c121SKalle Valo { 1306e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1307e705c121SKalle Valo struct iwl_mvm_sta *mvmsta; 1308e705c121SKalle Valo u32 available_tids = 0; 1309e705c121SKalle Valo u8 tid; 1310e705c121SKalle Valo 1311e705c121SKalle Valo if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || 13120ae98812SSara Sharon mvmvif->ap_sta_id == IWL_MVM_INVALID_STA)) 1313e705c121SKalle Valo return false; 1314e705c121SKalle Valo 131513303c0fSSara Sharon mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); 131613303c0fSSara Sharon if (!mvmsta) 1317e705c121SKalle Valo return false; 1318e705c121SKalle Valo 1319e705c121SKalle Valo spin_lock_bh(&mvmsta->lock); 1320e705c121SKalle Valo for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { 1321e705c121SKalle Valo struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; 1322e705c121SKalle Valo 1323e705c121SKalle Valo /* 1324e705c121SKalle Valo * in case of pending tx packets, don't use this tid 1325e705c121SKalle Valo * for offloading in order to prevent reuse of the same 1326e705c121SKalle Valo * qos seq counters. 1327e705c121SKalle Valo */ 1328dd32162dSLiad Kaufman if (iwl_mvm_tid_queued(mvm, tid_data)) 1329e705c121SKalle Valo continue; 1330e705c121SKalle Valo 1331e705c121SKalle Valo if (tid_data->state != IWL_AGG_OFF) 1332e705c121SKalle Valo continue; 1333e705c121SKalle Valo 1334e705c121SKalle Valo available_tids |= BIT(tid); 1335e705c121SKalle Valo } 1336e705c121SKalle Valo spin_unlock_bh(&mvmsta->lock); 1337e705c121SKalle Valo 1338e705c121SKalle Valo /* 1339e705c121SKalle Valo * disallow protocol offloading if we have no available tid 1340e705c121SKalle Valo * (with no pending frames and no active aggregation, 1341e705c121SKalle Valo * as we don't handle "holes" properly - the scheduler needs the 1342e705c121SKalle Valo * frame's seq number and TFD index to match) 1343e705c121SKalle Valo */ 1344e705c121SKalle Valo if (!available_tids) 1345e705c121SKalle Valo return true; 1346e705c121SKalle Valo 1347e705c121SKalle Valo /* for simplicity, just use the first available tid */ 1348e705c121SKalle Valo iter_data->offloading_tid = ffs(available_tids) - 1; 1349e705c121SKalle Valo return false; 1350e705c121SKalle Valo } 1351e705c121SKalle Valo 1352e705c121SKalle Valo static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, 1353e705c121SKalle Valo struct ieee80211_vif *vif) 1354e705c121SKalle Valo { 1355e705c121SKalle Valo struct iwl_d0i3_iter_data *data = _data; 1356e705c121SKalle Valo struct iwl_mvm *mvm = data->mvm; 1357e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1358e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1359e705c121SKalle Valo 1360e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); 1361e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1362e705c121SKalle Valo !vif->bss_conf.assoc) 1363e705c121SKalle Valo return; 1364e705c121SKalle Valo 1365e705c121SKalle Valo /* 1366e705c121SKalle Valo * in case of pending tx packets or active aggregations, 1367e705c121SKalle Valo * avoid offloading features in order to prevent reuse of 1368e705c121SKalle Valo * the same qos seq counters. 1369e705c121SKalle Valo */ 1370e705c121SKalle Valo if (iwl_mvm_disallow_offloading(mvm, vif, data)) 1371e705c121SKalle Valo data->disable_offloading = true; 1372e705c121SKalle Valo 1373e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); 1374c97dab40SSara Sharon iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, 1375c97dab40SSara Sharon false, flags); 1376e705c121SKalle Valo 1377e705c121SKalle Valo /* 1378e705c121SKalle Valo * on init/association, mvm already configures POWER_TABLE_CMD 1379e705c121SKalle Valo * and REPLY_MCAST_FILTER_CMD, so currently don't 1380e705c121SKalle Valo * reconfigure them (we might want to use different 1381e705c121SKalle Valo * params later on, though). 1382e705c121SKalle Valo */ 1383e705c121SKalle Valo data->ap_sta_id = mvmvif->ap_sta_id; 1384e705c121SKalle Valo data->vif_count++; 1385a3f7ba5cSEliad Peller 1386a3f7ba5cSEliad Peller /* 1387a3f7ba5cSEliad Peller * no new commands can be sent at this stage, so it's safe 1388a3f7ba5cSEliad Peller * to save the vif pointer during d0i3 entrance. 1389a3f7ba5cSEliad Peller */ 1390a3f7ba5cSEliad Peller data->connected_vif = vif; 1391e705c121SKalle Valo } 1392e705c121SKalle Valo 1393e705c121SKalle Valo static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, 1394e705c121SKalle Valo struct iwl_wowlan_config_cmd *cmd, 1395e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1396e705c121SKalle Valo { 1397e705c121SKalle Valo struct ieee80211_sta *ap_sta; 1398e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1399e705c121SKalle Valo 14000ae98812SSara Sharon if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA) 1401e705c121SKalle Valo return; 1402e705c121SKalle Valo 1403e705c121SKalle Valo rcu_read_lock(); 1404e705c121SKalle Valo 1405e705c121SKalle Valo ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); 1406e705c121SKalle Valo if (IS_ERR_OR_NULL(ap_sta)) 1407e705c121SKalle Valo goto out; 1408e705c121SKalle Valo 1409e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); 1410e705c121SKalle Valo cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; 1411e705c121SKalle Valo cmd->offloading_tid = iter_data->offloading_tid; 141270b4c536SSara Sharon cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | 14130db056d3SSara Sharon ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; 1414e705c121SKalle Valo /* 1415e705c121SKalle Valo * The d0i3 uCode takes care of the nonqos counters, 1416e705c121SKalle Valo * so configure only the qos seq ones. 1417e705c121SKalle Valo */ 1418e705c121SKalle Valo iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); 1419e705c121SKalle Valo out: 1420e705c121SKalle Valo rcu_read_unlock(); 1421e705c121SKalle Valo } 1422e705c121SKalle Valo 1423e705c121SKalle Valo int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) 1424e705c121SKalle Valo { 1425e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1426e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1427e705c121SKalle Valo int ret; 1428e705c121SKalle Valo struct iwl_d0i3_iter_data d0i3_iter_data = { 1429e705c121SKalle Valo .mvm = mvm, 1430e705c121SKalle Valo }; 1431e705c121SKalle Valo struct iwl_wowlan_config_cmd wowlan_config_cmd = { 1432e705c121SKalle Valo .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | 1433e705c121SKalle Valo IWL_WOWLAN_WAKEUP_BEACON_MISS | 14340db056d3SSara Sharon IWL_WOWLAN_WAKEUP_LINK_CHANGE), 1435e705c121SKalle Valo }; 1436e705c121SKalle Valo struct iwl_d3_manager_config d3_cfg_cmd = { 1437e705c121SKalle Valo .min_sleep_time = cpu_to_le32(1000), 1438e705c121SKalle Valo .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), 1439e705c121SKalle Valo }; 1440e705c121SKalle Valo 1441e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); 1442e705c121SKalle Valo 1443702e975dSJohannes Berg if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) 144408f0d23dSEliad Peller return -EINVAL; 144508f0d23dSEliad Peller 1446e705c121SKalle Valo set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1447e705c121SKalle Valo 1448e705c121SKalle Valo /* 1449e705c121SKalle Valo * iwl_mvm_ref_sync takes a reference before checking the flag. 1450e705c121SKalle Valo * so by checking there is no held reference we prevent a state 1451e705c121SKalle Valo * in which iwl_mvm_ref_sync continues successfully while we 1452e705c121SKalle Valo * configure the firmware to enter d0i3 1453e705c121SKalle Valo */ 1454e705c121SKalle Valo if (iwl_mvm_ref_taken(mvm)) { 1455e705c121SKalle Valo IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); 1456e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1457e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 1458e705c121SKalle Valo return 1; 1459e705c121SKalle Valo } 1460e705c121SKalle Valo 1461e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1462e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1463e705c121SKalle Valo iwl_mvm_enter_d0i3_iterator, 1464e705c121SKalle Valo &d0i3_iter_data); 1465e705c121SKalle Valo if (d0i3_iter_data.vif_count == 1) { 1466e705c121SKalle Valo mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; 1467e705c121SKalle Valo mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; 1468e705c121SKalle Valo } else { 1469e705c121SKalle Valo WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); 14700ae98812SSara Sharon mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; 1471e705c121SKalle Valo mvm->d0i3_offloading = false; 1472e705c121SKalle Valo } 1473e705c121SKalle Valo 14747d9d0d56SLuca Coelho iwl_mvm_pause_tcm(mvm, true); 1475e705c121SKalle Valo /* make sure we have no running tx while configuring the seqno */ 1476e705c121SKalle Valo synchronize_net(); 1477e705c121SKalle Valo 1478eb3908d3SLuca Coelho /* Flush the hw queues, in case something got queued during entry */ 1479d167e81aSMordechai Goodstein /* TODO new tx api */ 1480d167e81aSMordechai Goodstein if (iwl_mvm_has_new_tx_api(mvm)) { 1481d167e81aSMordechai Goodstein WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n"); 1482d167e81aSMordechai Goodstein } else { 1483d167e81aSMordechai Goodstein ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), 1484d167e81aSMordechai Goodstein flags); 1485eb3908d3SLuca Coelho if (ret) 1486eb3908d3SLuca Coelho return ret; 1487d167e81aSMordechai Goodstein } 1488eb3908d3SLuca Coelho 1489e705c121SKalle Valo /* configure wowlan configuration only if needed */ 14900ae98812SSara Sharon if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) { 14910db056d3SSara Sharon /* wake on beacons only if beacon storing isn't supported */ 14920db056d3SSara Sharon if (!fw_has_capa(&mvm->fw->ucode_capa, 14930db056d3SSara Sharon IWL_UCODE_TLV_CAPA_BEACON_STORING)) 14940db056d3SSara Sharon wowlan_config_cmd.wakeup_filter |= 14950db056d3SSara Sharon cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); 14960db056d3SSara Sharon 1497a3f7ba5cSEliad Peller iwl_mvm_wowlan_config_key_params(mvm, 1498a3f7ba5cSEliad Peller d0i3_iter_data.connected_vif, 1499a3f7ba5cSEliad Peller true, flags); 1500a3f7ba5cSEliad Peller 1501e705c121SKalle Valo iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, 1502e705c121SKalle Valo &d0i3_iter_data); 1503e705c121SKalle Valo 1504e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, 1505e705c121SKalle Valo sizeof(wowlan_config_cmd), 1506e705c121SKalle Valo &wowlan_config_cmd); 1507e705c121SKalle Valo if (ret) 1508e705c121SKalle Valo return ret; 1509e705c121SKalle Valo } 1510e705c121SKalle Valo 1511e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, 1512e705c121SKalle Valo flags | CMD_MAKE_TRANS_IDLE, 1513e705c121SKalle Valo sizeof(d3_cfg_cmd), &d3_cfg_cmd); 1514e705c121SKalle Valo } 1515e705c121SKalle Valo 1516e705c121SKalle Valo static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, 1517e705c121SKalle Valo struct ieee80211_vif *vif) 1518e705c121SKalle Valo { 1519e705c121SKalle Valo struct iwl_mvm *mvm = _data; 1520e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; 1521e705c121SKalle Valo 1522e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); 1523e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1524e705c121SKalle Valo !vif->bss_conf.assoc) 1525e705c121SKalle Valo return; 1526e705c121SKalle Valo 1527e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); 1528e705c121SKalle Valo } 1529e705c121SKalle Valo 1530a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data { 1531e705c121SKalle Valo struct iwl_mvm *mvm; 1532a3f7ba5cSEliad Peller struct iwl_wowlan_status *status; 1533e705c121SKalle Valo u32 wakeup_reasons; 1534e705c121SKalle Valo }; 1535e705c121SKalle Valo 1536a3f7ba5cSEliad Peller static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, 1537e705c121SKalle Valo struct ieee80211_vif *vif) 1538e705c121SKalle Valo { 1539a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; 1540e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1541a3f7ba5cSEliad Peller u32 reasons = data->wakeup_reasons; 1542e705c121SKalle Valo 1543a3f7ba5cSEliad Peller /* consider only the relevant station interface */ 1544a3f7ba5cSEliad Peller if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || 1545a3f7ba5cSEliad Peller data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) 1546a3f7ba5cSEliad Peller return; 1547a3f7ba5cSEliad Peller 1548a3f7ba5cSEliad Peller if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) 1549e705c121SKalle Valo iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); 1550a3f7ba5cSEliad Peller else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) 1551e705c121SKalle Valo ieee80211_beacon_loss(vif); 1552a3f7ba5cSEliad Peller else 1553a3f7ba5cSEliad Peller iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); 1554e705c121SKalle Valo } 1555e705c121SKalle Valo 1556e705c121SKalle Valo void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) 1557e705c121SKalle Valo { 1558e705c121SKalle Valo struct ieee80211_sta *sta = NULL; 1559e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1560e705c121SKalle Valo int i; 1561e705c121SKalle Valo bool wake_queues = false; 1562e705c121SKalle Valo 1563e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1564e705c121SKalle Valo 1565e705c121SKalle Valo spin_lock_bh(&mvm->d0i3_tx_lock); 1566e705c121SKalle Valo 15670ae98812SSara Sharon if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA) 1568e705c121SKalle Valo goto out; 1569e705c121SKalle Valo 1570e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); 1571e705c121SKalle Valo 1572e705c121SKalle Valo /* get the sta in order to update seq numbers and re-enqueue skbs */ 1573e705c121SKalle Valo sta = rcu_dereference_protected( 1574e705c121SKalle Valo mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], 1575e705c121SKalle Valo lockdep_is_held(&mvm->mutex)); 1576e705c121SKalle Valo 1577e705c121SKalle Valo if (IS_ERR_OR_NULL(sta)) { 1578e705c121SKalle Valo sta = NULL; 1579e705c121SKalle Valo goto out; 1580e705c121SKalle Valo } 1581e705c121SKalle Valo 1582e705c121SKalle Valo if (mvm->d0i3_offloading && qos_seq) { 1583e705c121SKalle Valo /* update qos seq numbers if offloading was enabled */ 1584e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); 1585e705c121SKalle Valo for (i = 0; i < IWL_MAX_TID_COUNT; i++) { 1586e705c121SKalle Valo u16 seq = le16_to_cpu(qos_seq[i]); 1587e705c121SKalle Valo /* firmware stores last-used one, we store next one */ 1588e705c121SKalle Valo seq += 0x10; 1589e705c121SKalle Valo mvm_ap_sta->tid_data[i].seq_number = seq; 1590e705c121SKalle Valo } 1591e705c121SKalle Valo } 1592e705c121SKalle Valo out: 1593e705c121SKalle Valo /* re-enqueue (or drop) all packets */ 1594e705c121SKalle Valo while (!skb_queue_empty(&mvm->d0i3_tx)) { 1595e705c121SKalle Valo struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); 1596e705c121SKalle Valo 1597e705c121SKalle Valo if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) 1598e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1599e705c121SKalle Valo 1600e705c121SKalle Valo /* if the skb_queue is not empty, we need to wake queues */ 1601e705c121SKalle Valo wake_queues = true; 1602e705c121SKalle Valo } 1603e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1604e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 16050ae98812SSara Sharon mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; 1606e705c121SKalle Valo if (wake_queues) 1607e705c121SKalle Valo ieee80211_wake_queues(mvm->hw); 1608e705c121SKalle Valo 1609e705c121SKalle Valo spin_unlock_bh(&mvm->d0i3_tx_lock); 1610e705c121SKalle Valo } 1611e705c121SKalle Valo 1612e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) 1613e705c121SKalle Valo { 1614e705c121SKalle Valo struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); 1615a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { 1616a3f7ba5cSEliad Peller .mvm = mvm, 1617a3f7ba5cSEliad Peller }; 1618a3f7ba5cSEliad Peller 1619e705c121SKalle Valo struct iwl_wowlan_status *status; 1620a3f7ba5cSEliad Peller u32 wakeup_reasons = 0; 1621e705c121SKalle Valo __le16 *qos_seq = NULL; 1622e705c121SKalle Valo 1623e705c121SKalle Valo mutex_lock(&mvm->mutex); 1624e705c121SKalle Valo 16252afa6a73SLuca Coelho status = iwl_mvm_send_wowlan_get_status(mvm); 16262afa6a73SLuca Coelho if (IS_ERR_OR_NULL(status)) { 16272afa6a73SLuca Coelho /* set to NULL so we don't need to check before kfree'ing */ 16282afa6a73SLuca Coelho status = NULL; 16292afa6a73SLuca Coelho goto out; 16302afa6a73SLuca Coelho } 16312afa6a73SLuca Coelho 1632e705c121SKalle Valo wakeup_reasons = le32_to_cpu(status->wakeup_reasons); 1633e705c121SKalle Valo qos_seq = status->qos_seq_ctr; 1634e705c121SKalle Valo 1635e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); 1636e705c121SKalle Valo 1637a3f7ba5cSEliad Peller iter_data.wakeup_reasons = wakeup_reasons; 1638a3f7ba5cSEliad Peller iter_data.status = status; 1639a3f7ba5cSEliad Peller ieee80211_iterate_active_interfaces(mvm->hw, 1640a3f7ba5cSEliad Peller IEEE80211_IFACE_ITER_NORMAL, 1641a3f7ba5cSEliad Peller iwl_mvm_d0i3_exit_work_iter, 1642a3f7ba5cSEliad Peller &iter_data); 1643e705c121SKalle Valo out: 1644e705c121SKalle Valo iwl_mvm_d0i3_enable_tx(mvm, qos_seq); 1645e705c121SKalle Valo 1646e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", 1647e705c121SKalle Valo wakeup_reasons); 1648e705c121SKalle Valo 1649e705c121SKalle Valo /* qos_seq might point inside resp_pkt, so free it only now */ 16502afa6a73SLuca Coelho kfree(status); 1651e705c121SKalle Valo 1652e705c121SKalle Valo /* the FW might have updated the regdomain */ 1653e705c121SKalle Valo iwl_mvm_update_changed_regdom(mvm); 1654e705c121SKalle Valo 16557d9d0d56SLuca Coelho iwl_mvm_resume_tcm(mvm); 1656e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); 1657e705c121SKalle Valo mutex_unlock(&mvm->mutex); 1658e705c121SKalle Valo } 1659e705c121SKalle Valo 1660e705c121SKalle Valo int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) 1661e705c121SKalle Valo { 1662e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | 1663e705c121SKalle Valo CMD_WAKE_UP_TRANS; 1664e705c121SKalle Valo int ret; 1665e705c121SKalle Valo 1666e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); 1667e705c121SKalle Valo 1668702e975dSJohannes Berg if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) 166908f0d23dSEliad Peller return -EINVAL; 167008f0d23dSEliad Peller 1671e705c121SKalle Valo mutex_lock(&mvm->d0i3_suspend_mutex); 1672e705c121SKalle Valo if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { 1673e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); 1674e705c121SKalle Valo __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); 1675e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1676e705c121SKalle Valo return 0; 1677e705c121SKalle Valo } 1678e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1679e705c121SKalle Valo 1680e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); 1681e705c121SKalle Valo if (ret) 1682e705c121SKalle Valo goto out; 1683e705c121SKalle Valo 1684e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1685e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1686e705c121SKalle Valo iwl_mvm_exit_d0i3_iterator, 1687e705c121SKalle Valo mvm); 1688e705c121SKalle Valo out: 1689e705c121SKalle Valo schedule_work(&mvm->d0i3_exit_work); 1690e705c121SKalle Valo return ret; 1691e705c121SKalle Valo } 1692e705c121SKalle Valo 1693e705c121SKalle Valo int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) 1694e705c121SKalle Valo { 1695e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1696e705c121SKalle Valo 1697e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); 1698e705c121SKalle Valo return _iwl_mvm_exit_d0i3(mvm); 1699e705c121SKalle Valo } 1700e705c121SKalle Valo 1701a75b9b33SLuca Coelho #define IWL_MVM_D0I3_OPS \ 1702a75b9b33SLuca Coelho .enter_d0i3 = iwl_mvm_enter_d0i3, \ 1703a75b9b33SLuca Coelho .exit_d0i3 = iwl_mvm_exit_d0i3, 1704a75b9b33SLuca Coelho #else /* CONFIG_PM */ 1705a75b9b33SLuca Coelho #define IWL_MVM_D0I3_OPS 1706a75b9b33SLuca Coelho #endif /* CONFIG_PM */ 1707a75b9b33SLuca Coelho 1708e705c121SKalle Valo #define IWL_MVM_COMMON_OPS \ 1709e705c121SKalle Valo /* these could be differentiated */ \ 1710156f92f2SEmmanuel Grumbach .async_cb = iwl_mvm_async_cb, \ 1711e705c121SKalle Valo .queue_full = iwl_mvm_stop_sw_queue, \ 1712e705c121SKalle Valo .queue_not_full = iwl_mvm_wake_sw_queue, \ 1713e705c121SKalle Valo .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ 1714e705c121SKalle Valo .free_skb = iwl_mvm_free_skb, \ 1715e705c121SKalle Valo .nic_error = iwl_mvm_nic_error, \ 1716e705c121SKalle Valo .cmd_queue_full = iwl_mvm_cmd_queue_full, \ 1717e705c121SKalle Valo .nic_config = iwl_mvm_nic_config, \ 1718a75b9b33SLuca Coelho IWL_MVM_D0I3_OPS \ 1719e705c121SKalle Valo /* as we only register one, these MUST be common! */ \ 1720e705c121SKalle Valo .start = iwl_op_mode_mvm_start, \ 1721e705c121SKalle Valo .stop = iwl_op_mode_mvm_stop 1722e705c121SKalle Valo 1723e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops = { 1724e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1725e705c121SKalle Valo .rx = iwl_mvm_rx, 1726e705c121SKalle Valo }; 1727e705c121SKalle Valo 1728e705c121SKalle Valo static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, 1729e705c121SKalle Valo struct napi_struct *napi, 1730e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 1731e705c121SKalle Valo unsigned int queue) 1732e705c121SKalle Valo { 1733e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1734585a6fccSSara Sharon struct iwl_rx_packet *pkt = rxb_addr(rxb); 173561b0f5d7SJohannes Berg u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); 1736e705c121SKalle Valo 173761b0f5d7SJohannes Berg if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) 1738a338384bSSara Sharon iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); 173961b0f5d7SJohannes Berg else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, 174061b0f5d7SJohannes Berg RX_QUEUES_NOTIFICATION))) 174194bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, queue); 174261b0f5d7SJohannes Berg else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) 1743780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); 1744e705c121SKalle Valo } 1745e705c121SKalle Valo 1746e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { 1747e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1748e705c121SKalle Valo .rx = iwl_mvm_rx_mq, 1749e705c121SKalle Valo .rx_rss = iwl_mvm_rx_mq_rss, 1750e705c121SKalle Valo }; 1751