1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10e705c121SKalle Valo * 11e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 12e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 13e705c121SKalle Valo * published by the Free Software Foundation. 14e705c121SKalle Valo * 15e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 16e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 17e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18e705c121SKalle Valo * General Public License for more details. 19e705c121SKalle Valo * 20e705c121SKalle Valo * You should have received a copy of the GNU General Public License 21e705c121SKalle Valo * along with this program; if not, write to the Free Software 22e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 23e705c121SKalle Valo * USA 24e705c121SKalle Valo * 25e705c121SKalle Valo * The full GNU General Public License is included in this distribution 26e705c121SKalle Valo * in the file called COPYING. 27e705c121SKalle Valo * 28e705c121SKalle Valo * Contact Information: 29cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 30e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 31e705c121SKalle Valo * 32e705c121SKalle Valo * BSD LICENSE 33e705c121SKalle Valo * 34e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 35e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 360db056d3SSara Sharon * Copyright(c) 2016 Intel Deutschland GmbH 37e705c121SKalle Valo * All rights reserved. 38e705c121SKalle Valo * 39e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 40e705c121SKalle Valo * modification, are permitted provided that the following conditions 41e705c121SKalle Valo * are met: 42e705c121SKalle Valo * 43e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 45e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 46e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 47e705c121SKalle Valo * the documentation and/or other materials provided with the 48e705c121SKalle Valo * distribution. 49e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 50e705c121SKalle Valo * contributors may be used to endorse or promote products derived 51e705c121SKalle Valo * from this software without specific prior written permission. 52e705c121SKalle Valo * 53e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 54e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 55e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 56e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 57e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 58e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 59e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 63e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64e705c121SKalle Valo * 65e705c121SKalle Valo *****************************************************************************/ 66e705c121SKalle Valo #include <linux/module.h> 67e705c121SKalle Valo #include <linux/vmalloc.h> 68e705c121SKalle Valo #include <net/mac80211.h> 69e705c121SKalle Valo 70e705c121SKalle Valo #include "iwl-notif-wait.h" 71e705c121SKalle Valo #include "iwl-trans.h" 72e705c121SKalle Valo #include "iwl-op-mode.h" 73e705c121SKalle Valo #include "iwl-fw.h" 74e705c121SKalle Valo #include "iwl-debug.h" 75e705c121SKalle Valo #include "iwl-drv.h" 76e705c121SKalle Valo #include "iwl-modparams.h" 77e705c121SKalle Valo #include "mvm.h" 78e705c121SKalle Valo #include "iwl-phy-db.h" 79e705c121SKalle Valo #include "iwl-eeprom-parse.h" 80e705c121SKalle Valo #include "iwl-csr.h" 81e705c121SKalle Valo #include "iwl-io.h" 82e705c121SKalle Valo #include "iwl-prph.h" 83e705c121SKalle Valo #include "rs.h" 84e705c121SKalle Valo #include "fw-api-scan.h" 85e705c121SKalle Valo #include "time-event.h" 862f89a5d7SGolan Ben-Ami #include "fw-dbg.h" 8739bdb17eSSharon Dvir #include "fw-api.h" 8839bdb17eSSharon Dvir #include "fw-api-scan.h" 89e705c121SKalle Valo 90e705c121SKalle Valo #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" 91e705c121SKalle Valo MODULE_DESCRIPTION(DRV_DESCRIPTION); 92e705c121SKalle Valo MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 93e705c121SKalle Valo MODULE_LICENSE("GPL"); 94e705c121SKalle Valo 95e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops; 96e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq; 97e705c121SKalle Valo 98e705c121SKalle Valo struct iwl_mvm_mod_params iwlmvm_mod_params = { 99e705c121SKalle Valo .power_scheme = IWL_POWER_SCHEME_BPS, 100e705c121SKalle Valo .tfd_q_hang_detect = true 101e705c121SKalle Valo /* rest of fields are 0 by default */ 102e705c121SKalle Valo }; 103e705c121SKalle Valo 104e705c121SKalle Valo module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO); 105e705c121SKalle Valo MODULE_PARM_DESC(init_dbg, 106e705c121SKalle Valo "set to true to debug an ASSERT in INIT fw (default: false"); 107e705c121SKalle Valo module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO); 108e705c121SKalle Valo MODULE_PARM_DESC(power_scheme, 109e705c121SKalle Valo "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); 110e705c121SKalle Valo module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, 111e705c121SKalle Valo bool, S_IRUGO); 112e705c121SKalle Valo MODULE_PARM_DESC(tfd_q_hang_detect, 113e705c121SKalle Valo "TFD queues hang detection (default: true"); 114e705c121SKalle Valo 115e705c121SKalle Valo /* 116e705c121SKalle Valo * module init and exit functions 117e705c121SKalle Valo */ 118e705c121SKalle Valo static int __init iwl_mvm_init(void) 119e705c121SKalle Valo { 120e705c121SKalle Valo int ret; 121e705c121SKalle Valo 122e705c121SKalle Valo ret = iwl_mvm_rate_control_register(); 123e705c121SKalle Valo if (ret) { 124e705c121SKalle Valo pr_err("Unable to register rate control algorithm: %d\n", ret); 125e705c121SKalle Valo return ret; 126e705c121SKalle Valo } 127e705c121SKalle Valo 128e705c121SKalle Valo ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); 129e705c121SKalle Valo 130e705c121SKalle Valo if (ret) { 131e705c121SKalle Valo pr_err("Unable to register MVM op_mode: %d\n", ret); 132e705c121SKalle Valo iwl_mvm_rate_control_unregister(); 133e705c121SKalle Valo } 134e705c121SKalle Valo 135e705c121SKalle Valo return ret; 136e705c121SKalle Valo } 137e705c121SKalle Valo module_init(iwl_mvm_init); 138e705c121SKalle Valo 139e705c121SKalle Valo static void __exit iwl_mvm_exit(void) 140e705c121SKalle Valo { 141e705c121SKalle Valo iwl_opmode_deregister("iwlmvm"); 142e705c121SKalle Valo iwl_mvm_rate_control_unregister(); 143e705c121SKalle Valo } 144e705c121SKalle Valo module_exit(iwl_mvm_exit); 145e705c121SKalle Valo 146e705c121SKalle Valo static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) 147e705c121SKalle Valo { 148e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 149e705c121SKalle Valo u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; 150e705c121SKalle Valo u32 reg_val = 0; 151e705c121SKalle Valo u32 phy_config = iwl_mvm_get_phy_config(mvm); 152e705c121SKalle Valo 153e705c121SKalle Valo radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> 154e705c121SKalle Valo FW_PHY_CFG_RADIO_TYPE_POS; 155e705c121SKalle Valo radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> 156e705c121SKalle Valo FW_PHY_CFG_RADIO_STEP_POS; 157e705c121SKalle Valo radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> 158e705c121SKalle Valo FW_PHY_CFG_RADIO_DASH_POS; 159e705c121SKalle Valo 160e705c121SKalle Valo /* SKU control */ 161e705c121SKalle Valo reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << 162e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; 163e705c121SKalle Valo reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << 164e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; 165e705c121SKalle Valo 166e705c121SKalle Valo /* radio configuration */ 167e705c121SKalle Valo reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 168e705c121SKalle Valo reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 169e705c121SKalle Valo reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 170e705c121SKalle Valo 171e705c121SKalle Valo WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & 172e705c121SKalle Valo ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); 173e705c121SKalle Valo 174e705c121SKalle Valo /* 175e705c121SKalle Valo * TODO: Bits 7-8 of CSR in 8000 HW family set the ADC sampling, and 176e705c121SKalle Valo * shouldn't be set to any non-zero value. The same is supposed to be 177e705c121SKalle Valo * true of the other HW, but unsetting them (such as the 7260) causes 178e705c121SKalle Valo * automatic tests to fail on seemingly unrelated errors. Need to 179e705c121SKalle Valo * further investigate this, but for now we'll separate cases. 180e705c121SKalle Valo */ 181e705c121SKalle Valo if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) 182e705c121SKalle Valo reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; 183e705c121SKalle Valo 184e705c121SKalle Valo iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, 185e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | 186e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | 187e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | 188e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | 189e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | 190e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | 191e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_MAC_SI, 192e705c121SKalle Valo reg_val); 193e705c121SKalle Valo 194e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, 195e705c121SKalle Valo radio_cfg_step, radio_cfg_dash); 196e705c121SKalle Valo 197e705c121SKalle Valo /* 198e705c121SKalle Valo * W/A : NIC is stuck in a reset state after Early PCIe power off 199e705c121SKalle Valo * (PCIe power is lost before PERST# is asserted), causing ME FW 200e705c121SKalle Valo * to lose ownership and not being able to obtain it back. 201e705c121SKalle Valo */ 202e705c121SKalle Valo if (!mvm->trans->cfg->apmg_not_supported) 203e705c121SKalle Valo iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, 204e705c121SKalle Valo APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 205e705c121SKalle Valo ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 206e705c121SKalle Valo } 207e705c121SKalle Valo 208c9cb14a6SChaya Rachel Ivgi /** 209c9cb14a6SChaya Rachel Ivgi * enum iwl_rx_handler_context context for Rx handler 210c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_SYNC : this means that it will be called in the Rx path 211c9cb14a6SChaya Rachel Ivgi * which can't acquire mvm->mutex. 212c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex 213c9cb14a6SChaya Rachel Ivgi * (and only in this case!), it should be set as ASYNC. In that case, 214c9cb14a6SChaya Rachel Ivgi * it will be called from a worker with mvm->mutex held. 215c9cb14a6SChaya Rachel Ivgi * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the 216c9cb14a6SChaya Rachel Ivgi * mutex itself, it will be called from a worker without mvm->mutex held. 217c9cb14a6SChaya Rachel Ivgi */ 218c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context { 219c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC, 220c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED, 221c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_UNLOCKED, 222c9cb14a6SChaya Rachel Ivgi }; 223c9cb14a6SChaya Rachel Ivgi 224c9cb14a6SChaya Rachel Ivgi /** 225c9cb14a6SChaya Rachel Ivgi * struct iwl_rx_handlers handler for FW notification 226c9cb14a6SChaya Rachel Ivgi * @cmd_id: command id 227c9cb14a6SChaya Rachel Ivgi * @context: see &iwl_rx_handler_context 228c9cb14a6SChaya Rachel Ivgi * @fn: the function is called when notification is received 229c9cb14a6SChaya Rachel Ivgi */ 230e705c121SKalle Valo struct iwl_rx_handlers { 231e705c121SKalle Valo u16 cmd_id; 232c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 233e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 234e705c121SKalle Valo }; 235e705c121SKalle Valo 236c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER(_cmd_id, _fn, _context) \ 237c9cb14a6SChaya Rachel Ivgi { .cmd_id = _cmd_id, .fn = _fn, .context = _context } 238c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ 239c9cb14a6SChaya Rachel Ivgi { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } 240e705c121SKalle Valo 241e705c121SKalle Valo /* 242e705c121SKalle Valo * Handlers for fw notifications 243e705c121SKalle Valo * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME 244e705c121SKalle Valo * This list should be in order of frequency for performance purposes. 245e705c121SKalle Valo * 246c9cb14a6SChaya Rachel Ivgi * The handler can be one from three contexts, see &iwl_rx_handler_context 247e705c121SKalle Valo */ 248e705c121SKalle Valo static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { 249c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), 250c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), 251e705c121SKalle Valo 252c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, 253c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 254c9cb14a6SChaya Rachel Ivgi RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, 255c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 256c9cb14a6SChaya Rachel Ivgi RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, 257c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 258e705c121SKalle Valo RX_HANDLER(ANTENNA_COUPLING_NOTIFICATION, 259c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_ant_coupling_notif, RX_HANDLER_ASYNC_LOCKED), 260e705c121SKalle Valo 2613af512d6SSara Sharon RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, 262c9cb14a6SChaya Rachel Ivgi iwl_mvm_window_status_notif, RX_HANDLER_SYNC), 2633af512d6SSara Sharon 264c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, 265c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 266c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, 267c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 268e705c121SKalle Valo 269c9cb14a6SChaya Rachel Ivgi RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), 270e705c121SKalle Valo 271e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE, 272c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), 273e705c121SKalle Valo RX_HANDLER(SCAN_OFFLOAD_COMPLETE, 274c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_lmac_scan_complete_notif, 275c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 276e705c121SKalle Valo RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, 277c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 278e705c121SKalle Valo RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, 279c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 280e705c121SKalle Valo RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, 281c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), 282e705c121SKalle Valo 283c9cb14a6SChaya Rachel Ivgi RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, 284c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 285e705c121SKalle Valo 286e705c121SKalle Valo RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, 287c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 288e705c121SKalle Valo 289c9cb14a6SChaya Rachel Ivgi RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), 290e705c121SKalle Valo RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, 291c9cb14a6SChaya Rachel Ivgi iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), 292c9cb14a6SChaya Rachel Ivgi RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, 293c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 294e705c121SKalle Valo RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, 295ec77a33eSChaya Rachel Ivgi iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), 2960a3b7119SChaya Rachel Ivgi RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, 297c9cb14a6SChaya Rachel Ivgi iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), 298e705c121SKalle Valo 299e705c121SKalle Valo RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, 300c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 301c9cb14a6SChaya Rachel Ivgi RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, 302c9cb14a6SChaya Rachel Ivgi RX_HANDLER_SYNC), 303c9cb14a6SChaya Rachel Ivgi RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, 304c9cb14a6SChaya Rachel Ivgi RX_HANDLER_ASYNC_LOCKED), 3050db056d3SSara Sharon RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, 306c9cb14a6SChaya Rachel Ivgi iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), 307f92659a1SSara Sharon RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, 308c9cb14a6SChaya Rachel Ivgi iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), 309e705c121SKalle Valo }; 310e705c121SKalle Valo #undef RX_HANDLER 311e705c121SKalle Valo #undef RX_HANDLER_GRP 312e705c121SKalle Valo 31339bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 31439bdb17eSSharon Dvir * Access is done through binary search 31539bdb17eSSharon Dvir */ 31639bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { 31739bdb17eSSharon Dvir HCMD_NAME(MVM_ALIVE), 31839bdb17eSSharon Dvir HCMD_NAME(REPLY_ERROR), 31939bdb17eSSharon Dvir HCMD_NAME(ECHO_CMD), 32039bdb17eSSharon Dvir HCMD_NAME(INIT_COMPLETE_NOTIF), 32139bdb17eSSharon Dvir HCMD_NAME(PHY_CONTEXT_CMD), 32239bdb17eSSharon Dvir HCMD_NAME(DBG_CFG), 32339bdb17eSSharon Dvir HCMD_NAME(ANTENNA_COUPLING_NOTIFICATION), 32439bdb17eSSharon Dvir HCMD_NAME(SCAN_CFG_CMD), 32539bdb17eSSharon Dvir HCMD_NAME(SCAN_REQ_UMAC), 32639bdb17eSSharon Dvir HCMD_NAME(SCAN_ABORT_UMAC), 32739bdb17eSSharon Dvir HCMD_NAME(SCAN_COMPLETE_UMAC), 32839bdb17eSSharon Dvir HCMD_NAME(TOF_CMD), 32939bdb17eSSharon Dvir HCMD_NAME(TOF_NOTIFICATION), 3303af512d6SSara Sharon HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), 33139bdb17eSSharon Dvir HCMD_NAME(ADD_STA_KEY), 33239bdb17eSSharon Dvir HCMD_NAME(ADD_STA), 33339bdb17eSSharon Dvir HCMD_NAME(REMOVE_STA), 33439bdb17eSSharon Dvir HCMD_NAME(FW_GET_ITEM_CMD), 33539bdb17eSSharon Dvir HCMD_NAME(TX_CMD), 33639bdb17eSSharon Dvir HCMD_NAME(SCD_QUEUE_CFG), 33739bdb17eSSharon Dvir HCMD_NAME(TXPATH_FLUSH), 33839bdb17eSSharon Dvir HCMD_NAME(MGMT_MCAST_KEY), 33939bdb17eSSharon Dvir HCMD_NAME(WEP_KEY), 34039bdb17eSSharon Dvir HCMD_NAME(SHARED_MEM_CFG), 34139bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), 34239bdb17eSSharon Dvir HCMD_NAME(MAC_CONTEXT_CMD), 34339bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_CMD), 34439bdb17eSSharon Dvir HCMD_NAME(TIME_EVENT_NOTIFICATION), 34539bdb17eSSharon Dvir HCMD_NAME(BINDING_CONTEXT_CMD), 34639bdb17eSSharon Dvir HCMD_NAME(TIME_QUOTA_CMD), 34739bdb17eSSharon Dvir HCMD_NAME(NON_QOS_TX_COUNTER_CMD), 34839bdb17eSSharon Dvir HCMD_NAME(LQ_CMD), 34939bdb17eSSharon Dvir HCMD_NAME(FW_PAGING_BLOCK_CMD), 35039bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), 35139bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), 35239bdb17eSSharon Dvir HCMD_NAME(HOT_SPOT_CMD), 35339bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), 35439bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD), 35539bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD), 35639bdb17eSSharon Dvir HCMD_NAME(BT_COEX_UPDATE_SW_BOOST), 35739bdb17eSSharon Dvir HCMD_NAME(BT_COEX_UPDATE_CORUN_LUT), 35839bdb17eSSharon Dvir HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), 35939bdb17eSSharon Dvir HCMD_NAME(BT_COEX_CI), 36039bdb17eSSharon Dvir HCMD_NAME(PHY_CONFIGURATION_CMD), 36139bdb17eSSharon Dvir HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), 36239bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_COMPLETE), 36339bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), 36439bdb17eSSharon Dvir HCMD_NAME(SCAN_OFFLOAD_CONFIG_CMD), 36539bdb17eSSharon Dvir HCMD_NAME(POWER_TABLE_CMD), 36639bdb17eSSharon Dvir HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), 36739bdb17eSSharon Dvir HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), 36839bdb17eSSharon Dvir HCMD_NAME(DC2DC_CONFIG_CMD), 36939bdb17eSSharon Dvir HCMD_NAME(NVM_ACCESS_CMD), 37039bdb17eSSharon Dvir HCMD_NAME(SET_CALIB_DEFAULT_CMD), 37139bdb17eSSharon Dvir HCMD_NAME(BEACON_NOTIFICATION), 37239bdb17eSSharon Dvir HCMD_NAME(BEACON_TEMPLATE_CMD), 37339bdb17eSSharon Dvir HCMD_NAME(TX_ANT_CONFIGURATION_CMD), 37439bdb17eSSharon Dvir HCMD_NAME(BT_CONFIG), 37539bdb17eSSharon Dvir HCMD_NAME(STATISTICS_CMD), 37639bdb17eSSharon Dvir HCMD_NAME(STATISTICS_NOTIFICATION), 37739bdb17eSSharon Dvir HCMD_NAME(EOSP_NOTIFICATION), 37839bdb17eSSharon Dvir HCMD_NAME(REDUCE_TX_POWER_CMD), 37939bdb17eSSharon Dvir HCMD_NAME(CARD_STATE_CMD), 38039bdb17eSSharon Dvir HCMD_NAME(CARD_STATE_NOTIFICATION), 38139bdb17eSSharon Dvir HCMD_NAME(MISSED_BEACONS_NOTIFICATION), 38239bdb17eSSharon Dvir HCMD_NAME(TDLS_CONFIG_CMD), 38339bdb17eSSharon Dvir HCMD_NAME(MAC_PM_POWER_TABLE), 38439bdb17eSSharon Dvir HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), 38539bdb17eSSharon Dvir HCMD_NAME(MFUART_LOAD_NOTIFICATION), 38643413a97SSara Sharon HCMD_NAME(RSS_CONFIG_CMD), 38739bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), 38839bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_PHY_CMD), 38939bdb17eSSharon Dvir HCMD_NAME(REPLY_RX_MPDU_CMD), 39039bdb17eSSharon Dvir HCMD_NAME(BA_NOTIF), 39139bdb17eSSharon Dvir HCMD_NAME(MCC_UPDATE_CMD), 39239bdb17eSSharon Dvir HCMD_NAME(MCC_CHUB_UPDATE_CMD), 39339bdb17eSSharon Dvir HCMD_NAME(MARKER_CMD), 39439bdb17eSSharon Dvir HCMD_NAME(BT_COEX_PRIO_TABLE), 39539bdb17eSSharon Dvir HCMD_NAME(BT_COEX_PROT_ENV), 39639bdb17eSSharon Dvir HCMD_NAME(BT_PROFILE_NOTIFICATION), 39739bdb17eSSharon Dvir HCMD_NAME(BCAST_FILTER_CMD), 39839bdb17eSSharon Dvir HCMD_NAME(MCAST_FILTER_CMD), 39939bdb17eSSharon Dvir HCMD_NAME(REPLY_SF_CFG_CMD), 40039bdb17eSSharon Dvir HCMD_NAME(REPLY_BEACON_FILTERING_CMD), 40139bdb17eSSharon Dvir HCMD_NAME(D3_CONFIG_CMD), 40239bdb17eSSharon Dvir HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), 40339bdb17eSSharon Dvir HCMD_NAME(OFFLOADS_QUERY_CMD), 40439bdb17eSSharon Dvir HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), 40539bdb17eSSharon Dvir HCMD_NAME(MATCH_FOUND_NOTIFICATION), 40639bdb17eSSharon Dvir HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER), 40739bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), 40839bdb17eSSharon Dvir HCMD_NAME(WOWLAN_PATTERNS), 40939bdb17eSSharon Dvir HCMD_NAME(WOWLAN_CONFIGURATION), 41039bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TSC_RSC_PARAM), 41139bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TKIP_PARAM), 41239bdb17eSSharon Dvir HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), 41339bdb17eSSharon Dvir HCMD_NAME(WOWLAN_GET_STATUSES), 41439bdb17eSSharon Dvir HCMD_NAME(WOWLAN_TX_POWER_PER_DB), 41539bdb17eSSharon Dvir HCMD_NAME(SCAN_ITERATION_COMPLETE), 41639bdb17eSSharon Dvir HCMD_NAME(D0I3_END_CMD), 41739bdb17eSSharon Dvir HCMD_NAME(LTR_CONFIG), 41839bdb17eSSharon Dvir HCMD_NAME(REPLY_DEBUG_CMD), 419e705c121SKalle Valo }; 42039bdb17eSSharon Dvir 42139bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value. 42239bdb17eSSharon Dvir * Access is done through binary search 42339bdb17eSSharon Dvir */ 4245b086414SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_system_names[] = { 4255b086414SGolan Ben-Ami HCMD_NAME(SHARED_MEM_CFG_CMD), 4265b086414SGolan Ben-Ami }; 4275b086414SGolan Ben-Ami 4285b086414SGolan Ben-Ami /* Please keep this array *SORTED* by hex value. 4295b086414SGolan Ben-Ami * Access is done through binary search 4305b086414SGolan Ben-Ami */ 43103098268SAviya Erenfeld static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { 43203098268SAviya Erenfeld HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD), 43303098268SAviya Erenfeld HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF), 43403098268SAviya Erenfeld }; 43503098268SAviya Erenfeld 43603098268SAviya Erenfeld /* Please keep this array *SORTED* by hex value. 43703098268SAviya Erenfeld * Access is done through binary search 43803098268SAviya Erenfeld */ 43939bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { 44039bdb17eSSharon Dvir HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), 4415c89e7bcSChaya Rachel Ivgi HCMD_NAME(CTDP_CONFIG_CMD), 442c221daf2SChaya Rachel Ivgi HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), 4430a3b7119SChaya Rachel Ivgi HCMD_NAME(CT_KILL_NOTIFICATION), 44439bdb17eSSharon Dvir HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), 44539bdb17eSSharon Dvir }; 44639bdb17eSSharon Dvir 4470db056d3SSara Sharon /* Please keep this array *SORTED* by hex value. 4480db056d3SSara Sharon * Access is done through binary search 4490db056d3SSara Sharon */ 450e0d8fdecSSara Sharon static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { 451e0d8fdecSSara Sharon HCMD_NAME(UPDATE_MU_GROUPS_CMD), 45294bb4481SSara Sharon HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), 453f92659a1SSara Sharon HCMD_NAME(MU_GROUP_MGMT_NOTIF), 45494bb4481SSara Sharon HCMD_NAME(RX_QUEUES_NOTIFICATION), 455e0d8fdecSSara Sharon }; 456e0d8fdecSSara Sharon 457e0d8fdecSSara Sharon /* Please keep this array *SORTED* by hex value. 458e0d8fdecSSara Sharon * Access is done through binary search 459e0d8fdecSSara Sharon */ 4600db056d3SSara Sharon static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { 4610db056d3SSara Sharon HCMD_NAME(STORED_BEACON_NTF), 4620db056d3SSara Sharon }; 4630db056d3SSara Sharon 46439bdb17eSSharon Dvir static const struct iwl_hcmd_arr iwl_mvm_groups[] = { 46539bdb17eSSharon Dvir [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 46639bdb17eSSharon Dvir [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), 4675b086414SGolan Ben-Ami [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), 46803098268SAviya Erenfeld [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), 46939bdb17eSSharon Dvir [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), 470e0d8fdecSSara Sharon [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), 4710db056d3SSara Sharon [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), 47239bdb17eSSharon Dvir }; 47339bdb17eSSharon Dvir 474e705c121SKalle Valo /* this forward declaration can avoid to export the function */ 475e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk); 476e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); 477e705c121SKalle Valo 478e705c121SKalle Valo static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg) 479e705c121SKalle Valo { 480e705c121SKalle Valo const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs; 481e705c121SKalle Valo 482e705c121SKalle Valo if (!pwr_tx_backoff) 483e705c121SKalle Valo return 0; 484e705c121SKalle Valo 485e705c121SKalle Valo while (pwr_tx_backoff->pwr) { 486e705c121SKalle Valo if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr) 487e705c121SKalle Valo return pwr_tx_backoff->backoff; 488e705c121SKalle Valo 489e705c121SKalle Valo pwr_tx_backoff++; 490e705c121SKalle Valo } 491e705c121SKalle Valo 492e705c121SKalle Valo return 0; 493e705c121SKalle Valo } 494e705c121SKalle Valo 495e705c121SKalle Valo static void iwl_mvm_fw_error_dump_wk(struct work_struct *work); 496e705c121SKalle Valo 497e705c121SKalle Valo static struct iwl_op_mode * 498e705c121SKalle Valo iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, 499e705c121SKalle Valo const struct iwl_fw *fw, struct dentry *dbgfs_dir) 500e705c121SKalle Valo { 501e705c121SKalle Valo struct ieee80211_hw *hw; 502e705c121SKalle Valo struct iwl_op_mode *op_mode; 503e705c121SKalle Valo struct iwl_mvm *mvm; 504e705c121SKalle Valo struct iwl_trans_config trans_cfg = {}; 505e705c121SKalle Valo static const u8 no_reclaim_cmds[] = { 506e705c121SKalle Valo TX_CMD, 507e705c121SKalle Valo }; 508e705c121SKalle Valo int err, scan_size; 509e705c121SKalle Valo u32 min_backoff; 510e705c121SKalle Valo 511e705c121SKalle Valo /* 512e705c121SKalle Valo * We use IWL_MVM_STATION_COUNT to check the validity of the station 513e705c121SKalle Valo * index all over the driver - check that its value corresponds to the 514e705c121SKalle Valo * array size. 515e705c121SKalle Valo */ 516e705c121SKalle Valo BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); 517e705c121SKalle Valo 518e705c121SKalle Valo /******************************** 519e705c121SKalle Valo * 1. Allocating and configuring HW data 520e705c121SKalle Valo ********************************/ 521e705c121SKalle Valo hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + 522e705c121SKalle Valo sizeof(struct iwl_mvm), 523e705c121SKalle Valo &iwl_mvm_hw_ops); 524e705c121SKalle Valo if (!hw) 525e705c121SKalle Valo return NULL; 526e705c121SKalle Valo 527e705c121SKalle Valo if (cfg->max_rx_agg_size) 528e705c121SKalle Valo hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; 529e705c121SKalle Valo 530e705c121SKalle Valo if (cfg->max_tx_agg_size) 531e705c121SKalle Valo hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; 532e705c121SKalle Valo 533e705c121SKalle Valo op_mode = hw->priv; 534e705c121SKalle Valo 535e705c121SKalle Valo mvm = IWL_OP_MODE_GET_MVM(op_mode); 536e705c121SKalle Valo mvm->dev = trans->dev; 537e705c121SKalle Valo mvm->trans = trans; 538e705c121SKalle Valo mvm->cfg = cfg; 539e705c121SKalle Valo mvm->fw = fw; 540e705c121SKalle Valo mvm->hw = hw; 541e705c121SKalle Valo 542e705c121SKalle Valo if (iwl_mvm_has_new_rx_api(mvm)) { 543e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops_mq; 54425c2b22cSSara Sharon trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc); 545e705c121SKalle Valo } else { 546e705c121SKalle Valo op_mode->ops = &iwl_mvm_ops; 54725c2b22cSSara Sharon trans->rx_mpdu_cmd_hdr_size = 54825c2b22cSSara Sharon sizeof(struct iwl_rx_mpdu_res_start); 549e705c121SKalle Valo 550e705c121SKalle Valo if (WARN_ON(trans->num_rx_queues > 1)) 551e705c121SKalle Valo goto out_free; 552e705c121SKalle Valo } 553e705c121SKalle Valo 554e705c121SKalle Valo mvm->restart_fw = iwlwifi_mod_params.restart_fw ? -1 : 0; 555e705c121SKalle Valo 556e705c121SKalle Valo mvm->aux_queue = 15; 557cf961e16SLiad Kaufman if (!iwl_mvm_is_dqa_supported(mvm)) { 558e705c121SKalle Valo mvm->first_agg_queue = 16; 559e705c121SKalle Valo mvm->last_agg_queue = mvm->cfg->base_params->num_of_queues - 1; 560cf961e16SLiad Kaufman } else { 561cf961e16SLiad Kaufman mvm->first_agg_queue = IWL_MVM_DQA_MIN_DATA_QUEUE; 562cf961e16SLiad Kaufman mvm->last_agg_queue = IWL_MVM_DQA_MAX_DATA_QUEUE; 563cf961e16SLiad Kaufman } 564e705c121SKalle Valo if (mvm->cfg->base_params->num_of_queues == 16) { 565e705c121SKalle Valo mvm->aux_queue = 11; 566e705c121SKalle Valo mvm->first_agg_queue = 12; 567e705c121SKalle Valo } 568e705c121SKalle Valo mvm->sf_state = SF_UNINIT; 569e705c121SKalle Valo mvm->cur_ucode = IWL_UCODE_INIT; 570c89e333dSAndrei Otcheretianski mvm->drop_bcn_ap_mode = true; 571e705c121SKalle Valo 572e705c121SKalle Valo mutex_init(&mvm->mutex); 573e705c121SKalle Valo mutex_init(&mvm->d0i3_suspend_mutex); 574e705c121SKalle Valo spin_lock_init(&mvm->async_handlers_lock); 575e705c121SKalle Valo INIT_LIST_HEAD(&mvm->time_event_list); 576e705c121SKalle Valo INIT_LIST_HEAD(&mvm->aux_roc_te_list); 577e705c121SKalle Valo INIT_LIST_HEAD(&mvm->async_handlers_list); 578e705c121SKalle Valo spin_lock_init(&mvm->time_event_lock); 579e705c121SKalle Valo spin_lock_init(&mvm->queue_info_lock); 580e705c121SKalle Valo 581e705c121SKalle Valo INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); 582e705c121SKalle Valo INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); 583e705c121SKalle Valo INIT_WORK(&mvm->sta_drained_wk, iwl_mvm_sta_drained_wk); 584e705c121SKalle Valo INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); 585e705c121SKalle Valo INIT_DELAYED_WORK(&mvm->fw_dump_wk, iwl_mvm_fw_error_dump_wk); 586e705c121SKalle Valo INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); 58724afba76SLiad Kaufman INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); 588e705c121SKalle Valo 589e705c121SKalle Valo spin_lock_init(&mvm->d0i3_tx_lock); 590e705c121SKalle Valo spin_lock_init(&mvm->refs_lock); 591e705c121SKalle Valo skb_queue_head_init(&mvm->d0i3_tx); 592e705c121SKalle Valo init_waitqueue_head(&mvm->d0i3_exit_waitq); 593e705c121SKalle Valo 5940636b938SSara Sharon atomic_set(&mvm->queue_sync_counter, 0); 5950636b938SSara Sharon 596e705c121SKalle Valo SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); 597e705c121SKalle Valo 598e705c121SKalle Valo /* 599e705c121SKalle Valo * Populate the state variables that the transport layer needs 600e705c121SKalle Valo * to know about. 601e705c121SKalle Valo */ 602e705c121SKalle Valo trans_cfg.op_mode = op_mode; 603e705c121SKalle Valo trans_cfg.no_reclaim_cmds = no_reclaim_cmds; 604e705c121SKalle Valo trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); 6056c4fbcbcSEmmanuel Grumbach switch (iwlwifi_mod_params.amsdu_size) { 6064bdd4dfeSEmmanuel Grumbach case IWL_AMSDU_DEF: 6076c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_4K: 6086c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 6096c4fbcbcSEmmanuel Grumbach break; 6106c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_8K: 6116c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_8K; 6126c4fbcbcSEmmanuel Grumbach break; 6136c4fbcbcSEmmanuel Grumbach case IWL_AMSDU_12K: 6146c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_12K; 6156c4fbcbcSEmmanuel Grumbach break; 6166c4fbcbcSEmmanuel Grumbach default: 6176c4fbcbcSEmmanuel Grumbach pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, 6186c4fbcbcSEmmanuel Grumbach iwlwifi_mod_params.amsdu_size); 6196c4fbcbcSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 6206c4fbcbcSEmmanuel Grumbach } 6214bdd4dfeSEmmanuel Grumbach 6224bdd4dfeSEmmanuel Grumbach /* the hardware splits the A-MSDU */ 6234bdd4dfeSEmmanuel Grumbach if (mvm->cfg->mq_rx_supported) 6244bdd4dfeSEmmanuel Grumbach trans_cfg.rx_buf_size = IWL_AMSDU_4K; 625e705c121SKalle Valo trans_cfg.wide_cmd_header = fw_has_api(&mvm->fw->ucode_capa, 626e705c121SKalle Valo IWL_UCODE_TLV_API_WIDE_CMD_HDR); 627e705c121SKalle Valo 628e705c121SKalle Valo if (mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_DW_BC_TABLE) 629e705c121SKalle Valo trans_cfg.bc_table_dword = true; 630e705c121SKalle Valo 63139bdb17eSSharon Dvir trans_cfg.command_groups = iwl_mvm_groups; 63239bdb17eSSharon Dvir trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); 633e705c121SKalle Valo 634097129c9SLiad Kaufman if (iwl_mvm_is_dqa_supported(mvm)) 635097129c9SLiad Kaufman trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; 636097129c9SLiad Kaufman else 637e705c121SKalle Valo trans_cfg.cmd_queue = IWL_MVM_CMD_QUEUE; 638e705c121SKalle Valo trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; 639e705c121SKalle Valo trans_cfg.scd_set_active = true; 640e705c121SKalle Valo 641e705c121SKalle Valo trans_cfg.sdio_adma_addr = fw->sdio_adma_addr; 64241837ca9SEmmanuel Grumbach trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; 643e705c121SKalle Valo 644e705c121SKalle Valo /* Set a short watchdog for the command queue */ 645e705c121SKalle Valo trans_cfg.cmd_q_wdg_timeout = 646e705c121SKalle Valo iwl_mvm_get_wd_timeout(mvm, NULL, false, true); 647e705c121SKalle Valo 648e705c121SKalle Valo snprintf(mvm->hw->wiphy->fw_version, 649e705c121SKalle Valo sizeof(mvm->hw->wiphy->fw_version), 650e705c121SKalle Valo "%s", fw->fw_version); 651e705c121SKalle Valo 652e705c121SKalle Valo /* Configure transport layer */ 653e705c121SKalle Valo iwl_trans_configure(mvm->trans, &trans_cfg); 654e705c121SKalle Valo 655e705c121SKalle Valo trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; 656e705c121SKalle Valo trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv; 657e705c121SKalle Valo trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num; 658e705c121SKalle Valo memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv, 659e705c121SKalle Valo sizeof(trans->dbg_conf_tlv)); 660e705c121SKalle Valo trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv; 661e705c121SKalle Valo 662e705c121SKalle Valo /* set up notification wait support */ 663e705c121SKalle Valo iwl_notification_wait_init(&mvm->notif_wait); 664e705c121SKalle Valo 665e705c121SKalle Valo /* Init phy db */ 666e705c121SKalle Valo mvm->phy_db = iwl_phy_db_init(trans); 667e705c121SKalle Valo if (!mvm->phy_db) { 668e705c121SKalle Valo IWL_ERR(mvm, "Cannot init phy_db\n"); 669e705c121SKalle Valo goto out_free; 670e705c121SKalle Valo } 671e705c121SKalle Valo 672e705c121SKalle Valo IWL_INFO(mvm, "Detected %s, REV=0x%X\n", 673e705c121SKalle Valo mvm->cfg->name, mvm->trans->hw_rev); 674e705c121SKalle Valo 675e705c121SKalle Valo if (iwlwifi_mod_params.nvm_file) 676e705c121SKalle Valo mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; 677e705c121SKalle Valo else 678e705c121SKalle Valo IWL_DEBUG_EEPROM(mvm->trans->dev, 679e705c121SKalle Valo "working without external nvm file\n"); 680e705c121SKalle Valo 681e705c121SKalle Valo if (WARN(cfg->no_power_up_nic_in_init && !mvm->nvm_file_name, 682e705c121SKalle Valo "not allowing power-up and not having nvm_file\n")) 683e705c121SKalle Valo goto out_free; 684e705c121SKalle Valo 685e705c121SKalle Valo /* 686e705c121SKalle Valo * Even if nvm exists in the nvm_file driver should read again the nvm 687e705c121SKalle Valo * from the nic because there might be entries that exist in the OTP 688e705c121SKalle Valo * and not in the file. 689e705c121SKalle Valo * for nics with no_power_up_nic_in_init: rely completley on nvm_file 690e705c121SKalle Valo */ 691e705c121SKalle Valo if (cfg->no_power_up_nic_in_init && mvm->nvm_file_name) { 692e705c121SKalle Valo err = iwl_nvm_init(mvm, false); 693e705c121SKalle Valo if (err) 694e705c121SKalle Valo goto out_free; 695e705c121SKalle Valo } else { 696e705c121SKalle Valo err = iwl_trans_start_hw(mvm->trans); 697e705c121SKalle Valo if (err) 698e705c121SKalle Valo goto out_free; 699e705c121SKalle Valo 700e705c121SKalle Valo mutex_lock(&mvm->mutex); 70108f0d23dSEliad Peller iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); 702e705c121SKalle Valo err = iwl_run_init_mvm_ucode(mvm, true); 703e705c121SKalle Valo if (!err || !iwlmvm_mod_params.init_dbg) 704fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 70508f0d23dSEliad Peller iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); 706e705c121SKalle Valo mutex_unlock(&mvm->mutex); 707e705c121SKalle Valo /* returns 0 if successful, 1 if success but in rfkill */ 708e705c121SKalle Valo if (err < 0 && !iwlmvm_mod_params.init_dbg) { 709e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); 710e705c121SKalle Valo goto out_free; 711e705c121SKalle Valo } 712e705c121SKalle Valo } 713e705c121SKalle Valo 714e705c121SKalle Valo scan_size = iwl_mvm_scan_size(mvm); 715e705c121SKalle Valo 716e705c121SKalle Valo mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); 717e705c121SKalle Valo if (!mvm->scan_cmd) 718e705c121SKalle Valo goto out_free; 719e705c121SKalle Valo 720e705c121SKalle Valo /* Set EBS as successful as long as not stated otherwise by the FW. */ 721e705c121SKalle Valo mvm->last_ebs_successful = true; 722e705c121SKalle Valo 723e705c121SKalle Valo err = iwl_mvm_mac_setup_register(mvm); 724e705c121SKalle Valo if (err) 725e705c121SKalle Valo goto out_free; 726e705c121SKalle Valo 72704ddc2aaSChaya Rachel Ivgi min_backoff = calc_min_backoff(trans, cfg); 72804ddc2aaSChaya Rachel Ivgi iwl_mvm_thermal_initialize(mvm, min_backoff); 72904ddc2aaSChaya Rachel Ivgi 730e705c121SKalle Valo err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); 731e705c121SKalle Valo if (err) 732e705c121SKalle Valo goto out_unregister; 733e705c121SKalle Valo 734e705c121SKalle Valo memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); 735e705c121SKalle Valo 73633c85eadSLuca Coelho /* The transport always starts with a taken reference, we can 73733c85eadSLuca Coelho * release it now if d0i3 is supported */ 73833c85eadSLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 739a42b2af3SLuca Coelho iwl_trans_unref(mvm->trans); 740e705c121SKalle Valo 741e705c121SKalle Valo iwl_mvm_tof_init(mvm); 742e705c121SKalle Valo 743728e825fSLuca Coelho setup_timer(&mvm->scan_timer, iwl_mvm_scan_timeout, 744728e825fSLuca Coelho (unsigned long)mvm); 745728e825fSLuca Coelho 746e705c121SKalle Valo return op_mode; 747e705c121SKalle Valo 748e705c121SKalle Valo out_unregister: 749e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 750e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 751c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 752e705c121SKalle Valo out_free: 753e705c121SKalle Valo flush_delayed_work(&mvm->fw_dump_wk); 754e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 755e705c121SKalle Valo kfree(mvm->scan_cmd); 756e705c121SKalle Valo if (!cfg->no_power_up_nic_in_init || !mvm->nvm_file_name) 757e705c121SKalle Valo iwl_trans_op_mode_leave(trans); 758e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 759e705c121SKalle Valo return NULL; 760e705c121SKalle Valo } 761e705c121SKalle Valo 762e705c121SKalle Valo static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) 763e705c121SKalle Valo { 764e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 765e705c121SKalle Valo int i; 766e705c121SKalle Valo 767e27deb45SLuca Coelho /* If d0i3 is supported, we have released the reference that 768e27deb45SLuca Coelho * the transport started with, so we should take it back now 769e27deb45SLuca Coelho * that we are leaving. 770e27deb45SLuca Coelho */ 771e27deb45SLuca Coelho if (iwl_mvm_is_d0i3_supported(mvm)) 772e27deb45SLuca Coelho iwl_trans_ref(mvm->trans); 773e27deb45SLuca Coelho 774e705c121SKalle Valo iwl_mvm_leds_exit(mvm); 775e705c121SKalle Valo 776c221daf2SChaya Rachel Ivgi iwl_mvm_thermal_exit(mvm); 777e705c121SKalle Valo 778e705c121SKalle Valo ieee80211_unregister_hw(mvm->hw); 779e705c121SKalle Valo 780e705c121SKalle Valo kfree(mvm->scan_cmd); 781e705c121SKalle Valo kfree(mvm->mcast_filter_cmd); 782e705c121SKalle Valo mvm->mcast_filter_cmd = NULL; 783e705c121SKalle Valo 784e705c121SKalle Valo #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) 785e705c121SKalle Valo kfree(mvm->d3_resume_sram); 786e705c121SKalle Valo #endif 787e705c121SKalle Valo 788e705c121SKalle Valo iwl_trans_op_mode_leave(mvm->trans); 789e705c121SKalle Valo 790e705c121SKalle Valo iwl_phy_db_free(mvm->phy_db); 791e705c121SKalle Valo mvm->phy_db = NULL; 792e705c121SKalle Valo 793e705c121SKalle Valo iwl_free_nvm_data(mvm->nvm_data); 794e705c121SKalle Valo for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) 795e705c121SKalle Valo kfree(mvm->nvm_sections[i].data); 796e705c121SKalle Valo 797e705c121SKalle Valo iwl_mvm_tof_clean(mvm); 798e705c121SKalle Valo 799728e825fSLuca Coelho del_timer_sync(&mvm->scan_timer); 800728e825fSLuca Coelho 801a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->mutex); 802a2a57a35SEmmanuel Grumbach mutex_destroy(&mvm->d0i3_suspend_mutex); 803a2a57a35SEmmanuel Grumbach 804e705c121SKalle Valo ieee80211_free_hw(mvm->hw); 805e705c121SKalle Valo } 806e705c121SKalle Valo 807e705c121SKalle Valo struct iwl_async_handler_entry { 808e705c121SKalle Valo struct list_head list; 809e705c121SKalle Valo struct iwl_rx_cmd_buffer rxb; 810c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context context; 811e705c121SKalle Valo void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); 812e705c121SKalle Valo }; 813e705c121SKalle Valo 814e705c121SKalle Valo void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) 815e705c121SKalle Valo { 816e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 817e705c121SKalle Valo 818e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 819e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { 820e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 821e705c121SKalle Valo list_del(&entry->list); 822e705c121SKalle Valo kfree(entry); 823e705c121SKalle Valo } 824e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 825e705c121SKalle Valo } 826e705c121SKalle Valo 827e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk) 828e705c121SKalle Valo { 829e705c121SKalle Valo struct iwl_mvm *mvm = 830e705c121SKalle Valo container_of(wk, struct iwl_mvm, async_handlers_wk); 831e705c121SKalle Valo struct iwl_async_handler_entry *entry, *tmp; 832e705c121SKalle Valo struct list_head local_list; 833e705c121SKalle Valo 834e705c121SKalle Valo INIT_LIST_HEAD(&local_list); 835e705c121SKalle Valo 836e705c121SKalle Valo /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ 837e705c121SKalle Valo 838e705c121SKalle Valo /* 839e705c121SKalle Valo * Sync with Rx path with a lock. Remove all the entries from this list, 840e705c121SKalle Valo * add them to a local one (lock free), and then handle them. 841e705c121SKalle Valo */ 842e705c121SKalle Valo spin_lock_bh(&mvm->async_handlers_lock); 843e705c121SKalle Valo list_splice_init(&mvm->async_handlers_list, &local_list); 844e705c121SKalle Valo spin_unlock_bh(&mvm->async_handlers_lock); 845e705c121SKalle Valo 846e705c121SKalle Valo list_for_each_entry_safe(entry, tmp, &local_list, list) { 847c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 848c9cb14a6SChaya Rachel Ivgi mutex_lock(&mvm->mutex); 849e705c121SKalle Valo entry->fn(mvm, &entry->rxb); 850e705c121SKalle Valo iwl_free_rxb(&entry->rxb); 851e705c121SKalle Valo list_del(&entry->list); 852c9cb14a6SChaya Rachel Ivgi if (entry->context == RX_HANDLER_ASYNC_LOCKED) 853c9cb14a6SChaya Rachel Ivgi mutex_unlock(&mvm->mutex); 854e705c121SKalle Valo kfree(entry); 855e705c121SKalle Valo } 856e705c121SKalle Valo } 857e705c121SKalle Valo 858e705c121SKalle Valo static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, 859e705c121SKalle Valo struct iwl_rx_packet *pkt) 860e705c121SKalle Valo { 861e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trig; 862e705c121SKalle Valo struct iwl_fw_dbg_trigger_cmd *cmds_trig; 863e705c121SKalle Valo int i; 864e705c121SKalle Valo 865e705c121SKalle Valo if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF)) 866e705c121SKalle Valo return; 867e705c121SKalle Valo 868e705c121SKalle Valo trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF); 869e705c121SKalle Valo cmds_trig = (void *)trig->data; 870e705c121SKalle Valo 871e705c121SKalle Valo if (!iwl_fw_dbg_trigger_check_stop(mvm, NULL, trig)) 872e705c121SKalle Valo return; 873e705c121SKalle Valo 874e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { 875e705c121SKalle Valo /* don't collect on CMD 0 */ 876e705c121SKalle Valo if (!cmds_trig->cmds[i].cmd_id) 877e705c121SKalle Valo break; 878e705c121SKalle Valo 879e705c121SKalle Valo if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || 880e705c121SKalle Valo cmds_trig->cmds[i].group_id != pkt->hdr.group_id) 881e705c121SKalle Valo continue; 882e705c121SKalle Valo 883e705c121SKalle Valo iwl_mvm_fw_dbg_collect_trig(mvm, trig, 884e705c121SKalle Valo "CMD 0x%02x.%02x received", 885e705c121SKalle Valo pkt->hdr.group_id, pkt->hdr.cmd); 886e705c121SKalle Valo break; 887e705c121SKalle Valo } 888e705c121SKalle Valo } 889e705c121SKalle Valo 890e705c121SKalle Valo static void iwl_mvm_rx_common(struct iwl_mvm *mvm, 891e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 892e705c121SKalle Valo struct iwl_rx_packet *pkt) 893e705c121SKalle Valo { 894e705c121SKalle Valo int i; 895e705c121SKalle Valo 896e705c121SKalle Valo iwl_mvm_rx_check_trigger(mvm, pkt); 897e705c121SKalle Valo 898e705c121SKalle Valo /* 899e705c121SKalle Valo * Do the notification wait before RX handlers so 900e705c121SKalle Valo * even if the RX handler consumes the RXB we have 901e705c121SKalle Valo * access to it in the notification wait entry. 902e705c121SKalle Valo */ 903e705c121SKalle Valo iwl_notification_wait_notify(&mvm->notif_wait, pkt); 904e705c121SKalle Valo 905e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { 906e705c121SKalle Valo const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; 907e705c121SKalle Valo struct iwl_async_handler_entry *entry; 908e705c121SKalle Valo 909e705c121SKalle Valo if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) 910e705c121SKalle Valo continue; 911e705c121SKalle Valo 912c9cb14a6SChaya Rachel Ivgi if (rx_h->context == RX_HANDLER_SYNC) { 913e705c121SKalle Valo rx_h->fn(mvm, rxb); 914e705c121SKalle Valo return; 915e705c121SKalle Valo } 916e705c121SKalle Valo 917e705c121SKalle Valo entry = kzalloc(sizeof(*entry), GFP_ATOMIC); 918e705c121SKalle Valo /* we can't do much... */ 919e705c121SKalle Valo if (!entry) 920e705c121SKalle Valo return; 921e705c121SKalle Valo 922e705c121SKalle Valo entry->rxb._page = rxb_steal_page(rxb); 923e705c121SKalle Valo entry->rxb._offset = rxb->_offset; 924e705c121SKalle Valo entry->rxb._rx_page_order = rxb->_rx_page_order; 925e705c121SKalle Valo entry->fn = rx_h->fn; 926c9cb14a6SChaya Rachel Ivgi entry->context = rx_h->context; 927e705c121SKalle Valo spin_lock(&mvm->async_handlers_lock); 928e705c121SKalle Valo list_add_tail(&entry->list, &mvm->async_handlers_list); 929e705c121SKalle Valo spin_unlock(&mvm->async_handlers_lock); 930e705c121SKalle Valo schedule_work(&mvm->async_handlers_wk); 931e705c121SKalle Valo break; 932e705c121SKalle Valo } 933e705c121SKalle Valo } 934e705c121SKalle Valo 935e705c121SKalle Valo static void iwl_mvm_rx(struct iwl_op_mode *op_mode, 936e705c121SKalle Valo struct napi_struct *napi, 937e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 938e705c121SKalle Valo { 939e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 940e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 941e705c121SKalle Valo 942e705c121SKalle Valo if (likely(pkt->hdr.cmd == REPLY_RX_MPDU_CMD)) 943e705c121SKalle Valo iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); 944585a6fccSSara Sharon else if (pkt->hdr.cmd == FRAME_RELEASE) 945a338384bSSara Sharon iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); 946e705c121SKalle Valo else if (pkt->hdr.cmd == REPLY_RX_PHY_CMD) 947e705c121SKalle Valo iwl_mvm_rx_rx_phy_cmd(mvm, rxb); 948e705c121SKalle Valo else 949e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 950e705c121SKalle Valo } 951e705c121SKalle Valo 952e705c121SKalle Valo static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, 953e705c121SKalle Valo struct napi_struct *napi, 954e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 955e705c121SKalle Valo { 956e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 957e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 958e705c121SKalle Valo 959e705c121SKalle Valo if (likely(pkt->hdr.cmd == REPLY_RX_MPDU_CMD)) 960780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); 961e705c121SKalle Valo else if (pkt->hdr.cmd == REPLY_RX_PHY_CMD) 962780e87c2SJohannes Berg iwl_mvm_rx_phy_cmd_mq(mvm, rxb); 96394bb4481SSara Sharon else if (unlikely(pkt->hdr.group_id == DATA_PATH_GROUP && 96494bb4481SSara Sharon pkt->hdr.cmd == RX_QUEUES_NOTIFICATION)) 96594bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, 0); 966e705c121SKalle Valo else 967e705c121SKalle Valo iwl_mvm_rx_common(mvm, rxb, pkt); 968e705c121SKalle Valo } 969e705c121SKalle Valo 970b4f7a9d1SLiad Kaufman void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 971e705c121SKalle Valo { 972e705c121SKalle Valo int q; 973e705c121SKalle Valo 974e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 975e705c121SKalle Valo return; 976e705c121SKalle Valo 977e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 978e705c121SKalle Valo if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { 979e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 980b4f7a9d1SLiad Kaufman "mac80211 %d already stopped\n", q); 981e705c121SKalle Valo continue; 982e705c121SKalle Valo } 983e705c121SKalle Valo 984e705c121SKalle Valo ieee80211_stop_queue(mvm->hw, q); 985e705c121SKalle Valo } 986e705c121SKalle Valo } 987e705c121SKalle Valo 988156f92f2SEmmanuel Grumbach static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, 989156f92f2SEmmanuel Grumbach const struct iwl_device_cmd *cmd) 990156f92f2SEmmanuel Grumbach { 991156f92f2SEmmanuel Grumbach struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 992156f92f2SEmmanuel Grumbach 993156f92f2SEmmanuel Grumbach /* 994156f92f2SEmmanuel Grumbach * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA 995156f92f2SEmmanuel Grumbach * commands that need to block the Tx queues. 996156f92f2SEmmanuel Grumbach */ 997156f92f2SEmmanuel Grumbach iwl_trans_block_txq_ptrs(mvm->trans, false); 998156f92f2SEmmanuel Grumbach } 999156f92f2SEmmanuel Grumbach 1000b4f7a9d1SLiad Kaufman static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1001e705c121SKalle Valo { 1002e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1003e705c121SKalle Valo unsigned long mq; 1004e705c121SKalle Valo 1005e705c121SKalle Valo spin_lock_bh(&mvm->queue_info_lock); 1006b4f7a9d1SLiad Kaufman mq = mvm->queue_info[hw_queue].hw_queue_to_mac80211; 1007e705c121SKalle Valo spin_unlock_bh(&mvm->queue_info_lock); 1008e705c121SKalle Valo 1009b4f7a9d1SLiad Kaufman iwl_mvm_stop_mac_queues(mvm, mq); 1010b4f7a9d1SLiad Kaufman } 1011b4f7a9d1SLiad Kaufman 1012b4f7a9d1SLiad Kaufman void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) 1013b4f7a9d1SLiad Kaufman { 1014b4f7a9d1SLiad Kaufman int q; 1015b4f7a9d1SLiad Kaufman 1016e705c121SKalle Valo if (WARN_ON_ONCE(!mq)) 1017e705c121SKalle Valo return; 1018e705c121SKalle Valo 1019e705c121SKalle Valo for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { 1020e705c121SKalle Valo if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { 1021e705c121SKalle Valo IWL_DEBUG_TX_QUEUES(mvm, 1022b4f7a9d1SLiad Kaufman "mac80211 %d still stopped\n", q); 1023e705c121SKalle Valo continue; 1024e705c121SKalle Valo } 1025e705c121SKalle Valo 1026e705c121SKalle Valo ieee80211_wake_queue(mvm->hw, q); 1027e705c121SKalle Valo } 1028e705c121SKalle Valo } 1029e705c121SKalle Valo 1030b4f7a9d1SLiad Kaufman static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) 1031b4f7a9d1SLiad Kaufman { 1032b4f7a9d1SLiad Kaufman struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1033b4f7a9d1SLiad Kaufman unsigned long mq; 1034b4f7a9d1SLiad Kaufman 1035b4f7a9d1SLiad Kaufman spin_lock_bh(&mvm->queue_info_lock); 1036b4f7a9d1SLiad Kaufman mq = mvm->queue_info[hw_queue].hw_queue_to_mac80211; 1037b4f7a9d1SLiad Kaufman spin_unlock_bh(&mvm->queue_info_lock); 1038b4f7a9d1SLiad Kaufman 1039b4f7a9d1SLiad Kaufman iwl_mvm_start_mac_queues(mvm, mq); 1040b4f7a9d1SLiad Kaufman } 1041b4f7a9d1SLiad Kaufman 1042e705c121SKalle Valo void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) 1043e705c121SKalle Valo { 1044e705c121SKalle Valo if (state) 1045e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1046e705c121SKalle Valo else 1047e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); 1048e705c121SKalle Valo 1049e705c121SKalle Valo wiphy_rfkill_set_hw_state(mvm->hw->wiphy, iwl_mvm_is_radio_killed(mvm)); 1050e705c121SKalle Valo } 1051e705c121SKalle Valo 1052e705c121SKalle Valo static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) 1053e705c121SKalle Valo { 1054e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1055e705c121SKalle Valo bool calibrating = ACCESS_ONCE(mvm->calibrating); 1056e705c121SKalle Valo 1057e705c121SKalle Valo if (state) 1058e705c121SKalle Valo set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1059e705c121SKalle Valo else 1060e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); 1061e705c121SKalle Valo 1062e705c121SKalle Valo wiphy_rfkill_set_hw_state(mvm->hw->wiphy, iwl_mvm_is_radio_killed(mvm)); 1063e705c121SKalle Valo 1064e705c121SKalle Valo /* iwl_run_init_mvm_ucode is waiting for results, abort it */ 1065e705c121SKalle Valo if (calibrating) 1066e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1067e705c121SKalle Valo 1068e705c121SKalle Valo /* 1069e705c121SKalle Valo * Stop the device if we run OPERATIONAL firmware or if we are in the 1070e705c121SKalle Valo * middle of the calibrations. 1071e705c121SKalle Valo */ 1072e705c121SKalle Valo return state && (mvm->cur_ucode != IWL_UCODE_INIT || calibrating); 1073e705c121SKalle Valo } 1074e705c121SKalle Valo 1075e705c121SKalle Valo static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) 1076e705c121SKalle Valo { 1077e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1078e705c121SKalle Valo struct ieee80211_tx_info *info; 1079e705c121SKalle Valo 1080e705c121SKalle Valo info = IEEE80211_SKB_CB(skb); 1081e705c121SKalle Valo iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); 1082e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1083e705c121SKalle Valo } 1084e705c121SKalle Valo 1085e705c121SKalle Valo struct iwl_mvm_reprobe { 1086e705c121SKalle Valo struct device *dev; 1087e705c121SKalle Valo struct work_struct work; 1088e705c121SKalle Valo }; 1089e705c121SKalle Valo 1090e705c121SKalle Valo static void iwl_mvm_reprobe_wk(struct work_struct *wk) 1091e705c121SKalle Valo { 1092e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1093e705c121SKalle Valo 1094e705c121SKalle Valo reprobe = container_of(wk, struct iwl_mvm_reprobe, work); 1095e705c121SKalle Valo if (device_reprobe(reprobe->dev)) 1096e705c121SKalle Valo dev_err(reprobe->dev, "reprobe failed!\n"); 1097e705c121SKalle Valo kfree(reprobe); 1098e705c121SKalle Valo module_put(THIS_MODULE); 1099e705c121SKalle Valo } 1100e705c121SKalle Valo 1101e705c121SKalle Valo static void iwl_mvm_fw_error_dump_wk(struct work_struct *work) 1102e705c121SKalle Valo { 1103e705c121SKalle Valo struct iwl_mvm *mvm = 1104e705c121SKalle Valo container_of(work, struct iwl_mvm, fw_dump_wk.work); 1105e705c121SKalle Valo 1106e705c121SKalle Valo if (iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT)) 1107e705c121SKalle Valo return; 1108e705c121SKalle Valo 1109e705c121SKalle Valo mutex_lock(&mvm->mutex); 1110e705c121SKalle Valo 1111e705c121SKalle Valo /* stop recording */ 1112e705c121SKalle Valo if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) { 1113e705c121SKalle Valo iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100); 1114e705c121SKalle Valo } else { 1115e705c121SKalle Valo iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0); 1116e705c121SKalle Valo /* wait before we collect the data till the DBGC stop */ 1117e705c121SKalle Valo udelay(100); 1118e705c121SKalle Valo } 1119e705c121SKalle Valo 1120e705c121SKalle Valo iwl_mvm_fw_error_dump(mvm); 1121e705c121SKalle Valo 1122e705c121SKalle Valo /* start recording again if the firmware is not crashed */ 1123e705c121SKalle Valo WARN_ON_ONCE((!test_bit(STATUS_FW_ERROR, &mvm->trans->status)) && 1124e705c121SKalle Valo mvm->fw->dbg_dest_tlv && 1125e705c121SKalle Valo iwl_mvm_start_fw_dbg_conf(mvm, mvm->fw_dbg_conf)); 1126e705c121SKalle Valo 1127e705c121SKalle Valo mutex_unlock(&mvm->mutex); 1128e705c121SKalle Valo 1129e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); 1130e705c121SKalle Valo } 1131e705c121SKalle Valo 1132e705c121SKalle Valo void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) 1133e705c121SKalle Valo { 1134e705c121SKalle Valo iwl_abort_notification_waits(&mvm->notif_wait); 1135e705c121SKalle Valo 1136e705c121SKalle Valo /* 1137e705c121SKalle Valo * This is a bit racy, but worst case we tell mac80211 about 1138e705c121SKalle Valo * a stopped/aborted scan when that was already done which 1139e705c121SKalle Valo * is not a problem. It is necessary to abort any os scan 1140e705c121SKalle Valo * here because mac80211 requires having the scan cleared 1141e705c121SKalle Valo * before restarting. 1142e705c121SKalle Valo * We'll reset the scan_status to NONE in restart cleanup in 1143e705c121SKalle Valo * the next start() call from mac80211. If restart isn't called 1144e705c121SKalle Valo * (no fw restart) scan status will stay busy. 1145e705c121SKalle Valo */ 1146e705c121SKalle Valo iwl_mvm_report_scan_aborted(mvm); 1147e705c121SKalle Valo 1148e705c121SKalle Valo /* 1149e705c121SKalle Valo * If we're restarting already, don't cycle restarts. 1150e705c121SKalle Valo * If INIT fw asserted, it will likely fail again. 1151e705c121SKalle Valo * If WoWLAN fw asserted, don't restart either, mac80211 1152e705c121SKalle Valo * can't recover this since we're already half suspended. 1153e705c121SKalle Valo */ 1154e705c121SKalle Valo if (!mvm->restart_fw && fw_error) { 1155e705c121SKalle Valo iwl_mvm_fw_dbg_collect_desc(mvm, &iwl_mvm_dump_desc_assert, 1156e705c121SKalle Valo NULL); 1157e705c121SKalle Valo } else if (test_and_set_bit(IWL_MVM_STATUS_IN_HW_RESTART, 1158e705c121SKalle Valo &mvm->status)) { 1159e705c121SKalle Valo struct iwl_mvm_reprobe *reprobe; 1160e705c121SKalle Valo 1161e705c121SKalle Valo IWL_ERR(mvm, 1162e705c121SKalle Valo "Firmware error during reconfiguration - reprobe!\n"); 1163e705c121SKalle Valo 1164e705c121SKalle Valo /* 1165e705c121SKalle Valo * get a module reference to avoid doing this while unloading 1166e705c121SKalle Valo * anyway and to avoid scheduling a work with code that's 1167e705c121SKalle Valo * being removed. 1168e705c121SKalle Valo */ 1169e705c121SKalle Valo if (!try_module_get(THIS_MODULE)) { 1170e705c121SKalle Valo IWL_ERR(mvm, "Module is being unloaded - abort\n"); 1171e705c121SKalle Valo return; 1172e705c121SKalle Valo } 1173e705c121SKalle Valo 1174e705c121SKalle Valo reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); 1175e705c121SKalle Valo if (!reprobe) { 1176e705c121SKalle Valo module_put(THIS_MODULE); 1177e705c121SKalle Valo return; 1178e705c121SKalle Valo } 1179e705c121SKalle Valo reprobe->dev = mvm->trans->dev; 1180e705c121SKalle Valo INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); 1181e705c121SKalle Valo schedule_work(&reprobe->work); 1182e705c121SKalle Valo } else if (mvm->cur_ucode == IWL_UCODE_REGULAR) { 1183e705c121SKalle Valo /* don't let the transport/FW power down */ 1184e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); 1185e705c121SKalle Valo 1186e705c121SKalle Valo if (fw_error && mvm->restart_fw > 0) 1187e705c121SKalle Valo mvm->restart_fw--; 1188e705c121SKalle Valo ieee80211_restart_hw(mvm->hw); 1189e705c121SKalle Valo } 1190e705c121SKalle Valo } 1191e705c121SKalle Valo 1192e705c121SKalle Valo static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) 1193e705c121SKalle Valo { 1194e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1195e705c121SKalle Valo 1196e705c121SKalle Valo iwl_mvm_dump_nic_error_log(mvm); 1197e705c121SKalle Valo 1198e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1199e705c121SKalle Valo } 1200e705c121SKalle Valo 1201e705c121SKalle Valo static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) 1202e705c121SKalle Valo { 1203e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1204e705c121SKalle Valo 1205e705c121SKalle Valo WARN_ON(1); 1206e705c121SKalle Valo iwl_mvm_nic_restart(mvm, true); 1207e705c121SKalle Valo } 1208e705c121SKalle Valo 1209e705c121SKalle Valo struct iwl_d0i3_iter_data { 1210e705c121SKalle Valo struct iwl_mvm *mvm; 1211a3f7ba5cSEliad Peller struct ieee80211_vif *connected_vif; 1212e705c121SKalle Valo u8 ap_sta_id; 1213e705c121SKalle Valo u8 vif_count; 1214e705c121SKalle Valo u8 offloading_tid; 1215e705c121SKalle Valo bool disable_offloading; 1216e705c121SKalle Valo }; 1217e705c121SKalle Valo 1218e705c121SKalle Valo static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, 1219e705c121SKalle Valo struct ieee80211_vif *vif, 1220e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1221e705c121SKalle Valo { 1222e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1223e705c121SKalle Valo struct iwl_mvm_sta *mvmsta; 1224e705c121SKalle Valo u32 available_tids = 0; 1225e705c121SKalle Valo u8 tid; 1226e705c121SKalle Valo 1227e705c121SKalle Valo if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || 1228e705c121SKalle Valo mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)) 1229e705c121SKalle Valo return false; 1230e705c121SKalle Valo 123113303c0fSSara Sharon mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); 123213303c0fSSara Sharon if (!mvmsta) 1233e705c121SKalle Valo return false; 1234e705c121SKalle Valo 1235e705c121SKalle Valo spin_lock_bh(&mvmsta->lock); 1236e705c121SKalle Valo for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { 1237e705c121SKalle Valo struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; 1238e705c121SKalle Valo 1239e705c121SKalle Valo /* 1240e705c121SKalle Valo * in case of pending tx packets, don't use this tid 1241e705c121SKalle Valo * for offloading in order to prevent reuse of the same 1242e705c121SKalle Valo * qos seq counters. 1243e705c121SKalle Valo */ 1244e705c121SKalle Valo if (iwl_mvm_tid_queued(tid_data)) 1245e705c121SKalle Valo continue; 1246e705c121SKalle Valo 1247e705c121SKalle Valo if (tid_data->state != IWL_AGG_OFF) 1248e705c121SKalle Valo continue; 1249e705c121SKalle Valo 1250e705c121SKalle Valo available_tids |= BIT(tid); 1251e705c121SKalle Valo } 1252e705c121SKalle Valo spin_unlock_bh(&mvmsta->lock); 1253e705c121SKalle Valo 1254e705c121SKalle Valo /* 1255e705c121SKalle Valo * disallow protocol offloading if we have no available tid 1256e705c121SKalle Valo * (with no pending frames and no active aggregation, 1257e705c121SKalle Valo * as we don't handle "holes" properly - the scheduler needs the 1258e705c121SKalle Valo * frame's seq number and TFD index to match) 1259e705c121SKalle Valo */ 1260e705c121SKalle Valo if (!available_tids) 1261e705c121SKalle Valo return true; 1262e705c121SKalle Valo 1263e705c121SKalle Valo /* for simplicity, just use the first available tid */ 1264e705c121SKalle Valo iter_data->offloading_tid = ffs(available_tids) - 1; 1265e705c121SKalle Valo return false; 1266e705c121SKalle Valo } 1267e705c121SKalle Valo 1268e705c121SKalle Valo static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, 1269e705c121SKalle Valo struct ieee80211_vif *vif) 1270e705c121SKalle Valo { 1271e705c121SKalle Valo struct iwl_d0i3_iter_data *data = _data; 1272e705c121SKalle Valo struct iwl_mvm *mvm = data->mvm; 1273e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1274e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1275e705c121SKalle Valo 1276e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); 1277e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1278e705c121SKalle Valo !vif->bss_conf.assoc) 1279e705c121SKalle Valo return; 1280e705c121SKalle Valo 1281e705c121SKalle Valo /* 1282e705c121SKalle Valo * in case of pending tx packets or active aggregations, 1283e705c121SKalle Valo * avoid offloading features in order to prevent reuse of 1284e705c121SKalle Valo * the same qos seq counters. 1285e705c121SKalle Valo */ 1286e705c121SKalle Valo if (iwl_mvm_disallow_offloading(mvm, vif, data)) 1287e705c121SKalle Valo data->disable_offloading = true; 1288e705c121SKalle Valo 1289e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); 1290c97dab40SSara Sharon iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, 1291c97dab40SSara Sharon false, flags); 1292e705c121SKalle Valo 1293e705c121SKalle Valo /* 1294e705c121SKalle Valo * on init/association, mvm already configures POWER_TABLE_CMD 1295e705c121SKalle Valo * and REPLY_MCAST_FILTER_CMD, so currently don't 1296e705c121SKalle Valo * reconfigure them (we might want to use different 1297e705c121SKalle Valo * params later on, though). 1298e705c121SKalle Valo */ 1299e705c121SKalle Valo data->ap_sta_id = mvmvif->ap_sta_id; 1300e705c121SKalle Valo data->vif_count++; 1301a3f7ba5cSEliad Peller 1302a3f7ba5cSEliad Peller /* 1303a3f7ba5cSEliad Peller * no new commands can be sent at this stage, so it's safe 1304a3f7ba5cSEliad Peller * to save the vif pointer during d0i3 entrance. 1305a3f7ba5cSEliad Peller */ 1306a3f7ba5cSEliad Peller data->connected_vif = vif; 1307e705c121SKalle Valo } 1308e705c121SKalle Valo 1309e705c121SKalle Valo static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, 1310e705c121SKalle Valo struct iwl_wowlan_config_cmd *cmd, 1311e705c121SKalle Valo struct iwl_d0i3_iter_data *iter_data) 1312e705c121SKalle Valo { 1313e705c121SKalle Valo struct ieee80211_sta *ap_sta; 1314e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1315e705c121SKalle Valo 1316e705c121SKalle Valo if (iter_data->ap_sta_id == IWL_MVM_STATION_COUNT) 1317e705c121SKalle Valo return; 1318e705c121SKalle Valo 1319e705c121SKalle Valo rcu_read_lock(); 1320e705c121SKalle Valo 1321e705c121SKalle Valo ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); 1322e705c121SKalle Valo if (IS_ERR_OR_NULL(ap_sta)) 1323e705c121SKalle Valo goto out; 1324e705c121SKalle Valo 1325e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); 1326e705c121SKalle Valo cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; 1327e705c121SKalle Valo cmd->offloading_tid = iter_data->offloading_tid; 132870b4c536SSara Sharon cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | 13290db056d3SSara Sharon ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; 1330e705c121SKalle Valo /* 1331e705c121SKalle Valo * The d0i3 uCode takes care of the nonqos counters, 1332e705c121SKalle Valo * so configure only the qos seq ones. 1333e705c121SKalle Valo */ 1334e705c121SKalle Valo iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); 1335e705c121SKalle Valo out: 1336e705c121SKalle Valo rcu_read_unlock(); 1337e705c121SKalle Valo } 1338e705c121SKalle Valo 1339e705c121SKalle Valo int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) 1340e705c121SKalle Valo { 1341e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1342e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; 1343e705c121SKalle Valo int ret; 1344e705c121SKalle Valo struct iwl_d0i3_iter_data d0i3_iter_data = { 1345e705c121SKalle Valo .mvm = mvm, 1346e705c121SKalle Valo }; 1347e705c121SKalle Valo struct iwl_wowlan_config_cmd wowlan_config_cmd = { 1348e705c121SKalle Valo .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | 1349e705c121SKalle Valo IWL_WOWLAN_WAKEUP_BEACON_MISS | 13500db056d3SSara Sharon IWL_WOWLAN_WAKEUP_LINK_CHANGE), 1351e705c121SKalle Valo }; 1352e705c121SKalle Valo struct iwl_d3_manager_config d3_cfg_cmd = { 1353e705c121SKalle Valo .min_sleep_time = cpu_to_le32(1000), 1354e705c121SKalle Valo .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), 1355e705c121SKalle Valo }; 1356e705c121SKalle Valo 1357e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); 1358e705c121SKalle Valo 135908f0d23dSEliad Peller if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR)) 136008f0d23dSEliad Peller return -EINVAL; 136108f0d23dSEliad Peller 1362e705c121SKalle Valo set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1363e705c121SKalle Valo 1364e705c121SKalle Valo /* 1365e705c121SKalle Valo * iwl_mvm_ref_sync takes a reference before checking the flag. 1366e705c121SKalle Valo * so by checking there is no held reference we prevent a state 1367e705c121SKalle Valo * in which iwl_mvm_ref_sync continues successfully while we 1368e705c121SKalle Valo * configure the firmware to enter d0i3 1369e705c121SKalle Valo */ 1370e705c121SKalle Valo if (iwl_mvm_ref_taken(mvm)) { 1371e705c121SKalle Valo IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); 1372e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1373e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 1374e705c121SKalle Valo return 1; 1375e705c121SKalle Valo } 1376e705c121SKalle Valo 1377e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1378e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1379e705c121SKalle Valo iwl_mvm_enter_d0i3_iterator, 1380e705c121SKalle Valo &d0i3_iter_data); 1381e705c121SKalle Valo if (d0i3_iter_data.vif_count == 1) { 1382e705c121SKalle Valo mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; 1383e705c121SKalle Valo mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; 1384e705c121SKalle Valo } else { 1385e705c121SKalle Valo WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); 1386e705c121SKalle Valo mvm->d0i3_ap_sta_id = IWL_MVM_STATION_COUNT; 1387e705c121SKalle Valo mvm->d0i3_offloading = false; 1388e705c121SKalle Valo } 1389e705c121SKalle Valo 1390e705c121SKalle Valo /* make sure we have no running tx while configuring the seqno */ 1391e705c121SKalle Valo synchronize_net(); 1392e705c121SKalle Valo 1393eb3908d3SLuca Coelho /* Flush the hw queues, in case something got queued during entry */ 1394eb3908d3SLuca Coelho ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), flags); 1395eb3908d3SLuca Coelho if (ret) 1396eb3908d3SLuca Coelho return ret; 1397eb3908d3SLuca Coelho 1398e705c121SKalle Valo /* configure wowlan configuration only if needed */ 1399e705c121SKalle Valo if (mvm->d0i3_ap_sta_id != IWL_MVM_STATION_COUNT) { 14000db056d3SSara Sharon /* wake on beacons only if beacon storing isn't supported */ 14010db056d3SSara Sharon if (!fw_has_capa(&mvm->fw->ucode_capa, 14020db056d3SSara Sharon IWL_UCODE_TLV_CAPA_BEACON_STORING)) 14030db056d3SSara Sharon wowlan_config_cmd.wakeup_filter |= 14040db056d3SSara Sharon cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); 14050db056d3SSara Sharon 1406a3f7ba5cSEliad Peller iwl_mvm_wowlan_config_key_params(mvm, 1407a3f7ba5cSEliad Peller d0i3_iter_data.connected_vif, 1408a3f7ba5cSEliad Peller true, flags); 1409a3f7ba5cSEliad Peller 1410e705c121SKalle Valo iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, 1411e705c121SKalle Valo &d0i3_iter_data); 1412e705c121SKalle Valo 1413e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, 1414e705c121SKalle Valo sizeof(wowlan_config_cmd), 1415e705c121SKalle Valo &wowlan_config_cmd); 1416e705c121SKalle Valo if (ret) 1417e705c121SKalle Valo return ret; 1418e705c121SKalle Valo } 1419e705c121SKalle Valo 1420e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, 1421e705c121SKalle Valo flags | CMD_MAKE_TRANS_IDLE, 1422e705c121SKalle Valo sizeof(d3_cfg_cmd), &d3_cfg_cmd); 1423e705c121SKalle Valo } 1424e705c121SKalle Valo 1425e705c121SKalle Valo static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, 1426e705c121SKalle Valo struct ieee80211_vif *vif) 1427e705c121SKalle Valo { 1428e705c121SKalle Valo struct iwl_mvm *mvm = _data; 1429e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; 1430e705c121SKalle Valo 1431e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); 1432e705c121SKalle Valo if (vif->type != NL80211_IFTYPE_STATION || 1433e705c121SKalle Valo !vif->bss_conf.assoc) 1434e705c121SKalle Valo return; 1435e705c121SKalle Valo 1436e705c121SKalle Valo iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); 1437e705c121SKalle Valo } 1438e705c121SKalle Valo 1439a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data { 1440e705c121SKalle Valo struct iwl_mvm *mvm; 1441a3f7ba5cSEliad Peller struct iwl_wowlan_status *status; 1442e705c121SKalle Valo u32 wakeup_reasons; 1443e705c121SKalle Valo }; 1444e705c121SKalle Valo 1445a3f7ba5cSEliad Peller static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, 1446e705c121SKalle Valo struct ieee80211_vif *vif) 1447e705c121SKalle Valo { 1448a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; 1449e705c121SKalle Valo struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 1450a3f7ba5cSEliad Peller u32 reasons = data->wakeup_reasons; 1451e705c121SKalle Valo 1452a3f7ba5cSEliad Peller /* consider only the relevant station interface */ 1453a3f7ba5cSEliad Peller if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || 1454a3f7ba5cSEliad Peller data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) 1455a3f7ba5cSEliad Peller return; 1456a3f7ba5cSEliad Peller 1457a3f7ba5cSEliad Peller if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) 1458e705c121SKalle Valo iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); 1459a3f7ba5cSEliad Peller else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) 1460e705c121SKalle Valo ieee80211_beacon_loss(vif); 1461a3f7ba5cSEliad Peller else 1462a3f7ba5cSEliad Peller iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); 1463e705c121SKalle Valo } 1464e705c121SKalle Valo 1465e705c121SKalle Valo void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) 1466e705c121SKalle Valo { 1467e705c121SKalle Valo struct ieee80211_sta *sta = NULL; 1468e705c121SKalle Valo struct iwl_mvm_sta *mvm_ap_sta; 1469e705c121SKalle Valo int i; 1470e705c121SKalle Valo bool wake_queues = false; 1471e705c121SKalle Valo 1472e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1473e705c121SKalle Valo 1474e705c121SKalle Valo spin_lock_bh(&mvm->d0i3_tx_lock); 1475e705c121SKalle Valo 1476e705c121SKalle Valo if (mvm->d0i3_ap_sta_id == IWL_MVM_STATION_COUNT) 1477e705c121SKalle Valo goto out; 1478e705c121SKalle Valo 1479e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); 1480e705c121SKalle Valo 1481e705c121SKalle Valo /* get the sta in order to update seq numbers and re-enqueue skbs */ 1482e705c121SKalle Valo sta = rcu_dereference_protected( 1483e705c121SKalle Valo mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], 1484e705c121SKalle Valo lockdep_is_held(&mvm->mutex)); 1485e705c121SKalle Valo 1486e705c121SKalle Valo if (IS_ERR_OR_NULL(sta)) { 1487e705c121SKalle Valo sta = NULL; 1488e705c121SKalle Valo goto out; 1489e705c121SKalle Valo } 1490e705c121SKalle Valo 1491e705c121SKalle Valo if (mvm->d0i3_offloading && qos_seq) { 1492e705c121SKalle Valo /* update qos seq numbers if offloading was enabled */ 1493e705c121SKalle Valo mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); 1494e705c121SKalle Valo for (i = 0; i < IWL_MAX_TID_COUNT; i++) { 1495e705c121SKalle Valo u16 seq = le16_to_cpu(qos_seq[i]); 1496e705c121SKalle Valo /* firmware stores last-used one, we store next one */ 1497e705c121SKalle Valo seq += 0x10; 1498e705c121SKalle Valo mvm_ap_sta->tid_data[i].seq_number = seq; 1499e705c121SKalle Valo } 1500e705c121SKalle Valo } 1501e705c121SKalle Valo out: 1502e705c121SKalle Valo /* re-enqueue (or drop) all packets */ 1503e705c121SKalle Valo while (!skb_queue_empty(&mvm->d0i3_tx)) { 1504e705c121SKalle Valo struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); 1505e705c121SKalle Valo 1506e705c121SKalle Valo if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) 1507e705c121SKalle Valo ieee80211_free_txskb(mvm->hw, skb); 1508e705c121SKalle Valo 1509e705c121SKalle Valo /* if the skb_queue is not empty, we need to wake queues */ 1510e705c121SKalle Valo wake_queues = true; 1511e705c121SKalle Valo } 1512e705c121SKalle Valo clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); 1513e705c121SKalle Valo wake_up(&mvm->d0i3_exit_waitq); 1514e705c121SKalle Valo mvm->d0i3_ap_sta_id = IWL_MVM_STATION_COUNT; 1515e705c121SKalle Valo if (wake_queues) 1516e705c121SKalle Valo ieee80211_wake_queues(mvm->hw); 1517e705c121SKalle Valo 1518e705c121SKalle Valo spin_unlock_bh(&mvm->d0i3_tx_lock); 1519e705c121SKalle Valo } 1520e705c121SKalle Valo 1521e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) 1522e705c121SKalle Valo { 1523e705c121SKalle Valo struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); 1524e705c121SKalle Valo struct iwl_host_cmd get_status_cmd = { 1525e705c121SKalle Valo .id = WOWLAN_GET_STATUSES, 1526e705c121SKalle Valo .flags = CMD_HIGH_PRIO | CMD_WANT_SKB, 1527e705c121SKalle Valo }; 1528a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { 1529a3f7ba5cSEliad Peller .mvm = mvm, 1530a3f7ba5cSEliad Peller }; 1531a3f7ba5cSEliad Peller 1532e705c121SKalle Valo struct iwl_wowlan_status *status; 1533e705c121SKalle Valo int ret; 1534a3f7ba5cSEliad Peller u32 wakeup_reasons = 0; 1535e705c121SKalle Valo __le16 *qos_seq = NULL; 1536e705c121SKalle Valo 1537e705c121SKalle Valo mutex_lock(&mvm->mutex); 1538e705c121SKalle Valo ret = iwl_mvm_send_cmd(mvm, &get_status_cmd); 1539e705c121SKalle Valo if (ret) 1540e705c121SKalle Valo goto out; 1541e705c121SKalle Valo 1542e705c121SKalle Valo if (!get_status_cmd.resp_pkt) 1543e705c121SKalle Valo goto out; 1544e705c121SKalle Valo 1545e705c121SKalle Valo status = (void *)get_status_cmd.resp_pkt->data; 1546e705c121SKalle Valo wakeup_reasons = le32_to_cpu(status->wakeup_reasons); 1547e705c121SKalle Valo qos_seq = status->qos_seq_ctr; 1548e705c121SKalle Valo 1549e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); 1550e705c121SKalle Valo 1551a3f7ba5cSEliad Peller iter_data.wakeup_reasons = wakeup_reasons; 1552a3f7ba5cSEliad Peller iter_data.status = status; 1553a3f7ba5cSEliad Peller ieee80211_iterate_active_interfaces(mvm->hw, 1554a3f7ba5cSEliad Peller IEEE80211_IFACE_ITER_NORMAL, 1555a3f7ba5cSEliad Peller iwl_mvm_d0i3_exit_work_iter, 1556a3f7ba5cSEliad Peller &iter_data); 1557e705c121SKalle Valo out: 1558e705c121SKalle Valo iwl_mvm_d0i3_enable_tx(mvm, qos_seq); 1559e705c121SKalle Valo 1560e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", 1561e705c121SKalle Valo wakeup_reasons); 1562e705c121SKalle Valo 1563e705c121SKalle Valo /* qos_seq might point inside resp_pkt, so free it only now */ 1564e705c121SKalle Valo if (get_status_cmd.resp_pkt) 1565e705c121SKalle Valo iwl_free_resp(&get_status_cmd); 1566e705c121SKalle Valo 1567e705c121SKalle Valo /* the FW might have updated the regdomain */ 1568e705c121SKalle Valo iwl_mvm_update_changed_regdom(mvm); 1569e705c121SKalle Valo 1570e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); 1571e705c121SKalle Valo mutex_unlock(&mvm->mutex); 1572e705c121SKalle Valo } 1573e705c121SKalle Valo 1574e705c121SKalle Valo int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) 1575e705c121SKalle Valo { 1576e705c121SKalle Valo u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | 1577e705c121SKalle Valo CMD_WAKE_UP_TRANS; 1578e705c121SKalle Valo int ret; 1579e705c121SKalle Valo 1580e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); 1581e705c121SKalle Valo 158208f0d23dSEliad Peller if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR)) 158308f0d23dSEliad Peller return -EINVAL; 158408f0d23dSEliad Peller 1585e705c121SKalle Valo mutex_lock(&mvm->d0i3_suspend_mutex); 1586e705c121SKalle Valo if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { 1587e705c121SKalle Valo IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); 1588e705c121SKalle Valo __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); 1589e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1590e705c121SKalle Valo return 0; 1591e705c121SKalle Valo } 1592e705c121SKalle Valo mutex_unlock(&mvm->d0i3_suspend_mutex); 1593e705c121SKalle Valo 1594e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); 1595e705c121SKalle Valo if (ret) 1596e705c121SKalle Valo goto out; 1597e705c121SKalle Valo 1598e705c121SKalle Valo ieee80211_iterate_active_interfaces_atomic(mvm->hw, 1599e705c121SKalle Valo IEEE80211_IFACE_ITER_NORMAL, 1600e705c121SKalle Valo iwl_mvm_exit_d0i3_iterator, 1601e705c121SKalle Valo mvm); 1602e705c121SKalle Valo out: 1603e705c121SKalle Valo schedule_work(&mvm->d0i3_exit_work); 1604e705c121SKalle Valo return ret; 1605e705c121SKalle Valo } 1606e705c121SKalle Valo 1607e705c121SKalle Valo int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) 1608e705c121SKalle Valo { 1609e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1610e705c121SKalle Valo 1611e705c121SKalle Valo iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); 1612e705c121SKalle Valo return _iwl_mvm_exit_d0i3(mvm); 1613e705c121SKalle Valo } 1614e705c121SKalle Valo 1615e705c121SKalle Valo #define IWL_MVM_COMMON_OPS \ 1616e705c121SKalle Valo /* these could be differentiated */ \ 1617156f92f2SEmmanuel Grumbach .async_cb = iwl_mvm_async_cb, \ 1618e705c121SKalle Valo .queue_full = iwl_mvm_stop_sw_queue, \ 1619e705c121SKalle Valo .queue_not_full = iwl_mvm_wake_sw_queue, \ 1620e705c121SKalle Valo .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ 1621e705c121SKalle Valo .free_skb = iwl_mvm_free_skb, \ 1622e705c121SKalle Valo .nic_error = iwl_mvm_nic_error, \ 1623e705c121SKalle Valo .cmd_queue_full = iwl_mvm_cmd_queue_full, \ 1624e705c121SKalle Valo .nic_config = iwl_mvm_nic_config, \ 1625e705c121SKalle Valo .enter_d0i3 = iwl_mvm_enter_d0i3, \ 1626e705c121SKalle Valo .exit_d0i3 = iwl_mvm_exit_d0i3, \ 1627e705c121SKalle Valo /* as we only register one, these MUST be common! */ \ 1628e705c121SKalle Valo .start = iwl_op_mode_mvm_start, \ 1629e705c121SKalle Valo .stop = iwl_op_mode_mvm_stop 1630e705c121SKalle Valo 1631e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops = { 1632e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1633e705c121SKalle Valo .rx = iwl_mvm_rx, 1634e705c121SKalle Valo }; 1635e705c121SKalle Valo 1636e705c121SKalle Valo static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, 1637e705c121SKalle Valo struct napi_struct *napi, 1638e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb, 1639e705c121SKalle Valo unsigned int queue) 1640e705c121SKalle Valo { 1641e705c121SKalle Valo struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); 1642585a6fccSSara Sharon struct iwl_rx_packet *pkt = rxb_addr(rxb); 1643e705c121SKalle Valo 1644585a6fccSSara Sharon if (unlikely(pkt->hdr.cmd == FRAME_RELEASE)) 1645a338384bSSara Sharon iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); 164694bb4481SSara Sharon else if (unlikely(pkt->hdr.cmd == RX_QUEUES_NOTIFICATION && 164794bb4481SSara Sharon pkt->hdr.group_id == DATA_PATH_GROUP)) 164894bb4481SSara Sharon iwl_mvm_rx_queue_notif(mvm, rxb, queue); 1649585a6fccSSara Sharon else 1650780e87c2SJohannes Berg iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); 1651e705c121SKalle Valo } 1652e705c121SKalle Valo 1653e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { 1654e705c121SKalle Valo IWL_MVM_COMMON_OPS, 1655e705c121SKalle Valo .rx = iwl_mvm_rx_mq, 1656e705c121SKalle Valo .rx_rss = iwl_mvm_rx_mq_rss, 1657e705c121SKalle Valo }; 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