1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10de8ba41bSLiad Kaufman  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11e705c121SKalle Valo  *
12e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
13e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
14e705c121SKalle Valo  * published by the Free Software Foundation.
15e705c121SKalle Valo  *
16e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
17e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
18e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19e705c121SKalle Valo  * General Public License for more details.
20e705c121SKalle Valo  *
21e705c121SKalle Valo  * You should have received a copy of the GNU General Public License
22e705c121SKalle Valo  * along with this program; if not, write to the Free Software
23e705c121SKalle Valo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24e705c121SKalle Valo  * USA
25e705c121SKalle Valo  *
26e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
27e705c121SKalle Valo  * in the file called COPYING.
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * Contact Information:
30cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
31e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32e705c121SKalle Valo  *
33e705c121SKalle Valo  * BSD LICENSE
34e705c121SKalle Valo  *
35e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37de8ba41bSLiad Kaufman  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
38e705c121SKalle Valo  * All rights reserved.
39e705c121SKalle Valo  *
40e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
41e705c121SKalle Valo  * modification, are permitted provided that the following conditions
42e705c121SKalle Valo  * are met:
43e705c121SKalle Valo  *
44e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
45e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
46e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
47e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
48e705c121SKalle Valo  *    the documentation and/or other materials provided with the
49e705c121SKalle Valo  *    distribution.
50e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
51e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
52e705c121SKalle Valo  *    from this software without specific prior written permission.
53e705c121SKalle Valo  *
54e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65e705c121SKalle Valo  *
66e705c121SKalle Valo  *****************************************************************************/
67e705c121SKalle Valo #include <linux/module.h>
68e705c121SKalle Valo #include <linux/vmalloc.h>
69e705c121SKalle Valo #include <net/mac80211.h>
70e705c121SKalle Valo 
719fca9d5cSJohannes Berg #include "fw/notif-wait.h"
72e705c121SKalle Valo #include "iwl-trans.h"
73e705c121SKalle Valo #include "iwl-op-mode.h"
74d962f9b1SJohannes Berg #include "fw/img.h"
75e705c121SKalle Valo #include "iwl-debug.h"
76e705c121SKalle Valo #include "iwl-drv.h"
77e705c121SKalle Valo #include "iwl-modparams.h"
78e705c121SKalle Valo #include "mvm.h"
79e705c121SKalle Valo #include "iwl-phy-db.h"
80e705c121SKalle Valo #include "iwl-eeprom-parse.h"
81e705c121SKalle Valo #include "iwl-csr.h"
82e705c121SKalle Valo #include "iwl-io.h"
83e705c121SKalle Valo #include "iwl-prph.h"
84e705c121SKalle Valo #include "rs.h"
85d172a5efSJohannes Berg #include "fw/api/scan.h"
86e705c121SKalle Valo #include "time-event.h"
8739bdb17eSSharon Dvir #include "fw-api.h"
88d172a5efSJohannes Berg #include "fw/api/scan.h"
89e705c121SKalle Valo 
90e705c121SKalle Valo #define DRV_DESCRIPTION	"The new Intel(R) wireless AGN driver for Linux"
91e705c121SKalle Valo MODULE_DESCRIPTION(DRV_DESCRIPTION);
92e705c121SKalle Valo MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
93e705c121SKalle Valo MODULE_LICENSE("GPL");
94e705c121SKalle Valo 
95e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops;
96e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq;
97e705c121SKalle Valo 
98e705c121SKalle Valo struct iwl_mvm_mod_params iwlmvm_mod_params = {
99e705c121SKalle Valo 	.power_scheme = IWL_POWER_SCHEME_BPS,
100e705c121SKalle Valo 	.tfd_q_hang_detect = true
101e705c121SKalle Valo 	/* rest of fields are 0 by default */
102e705c121SKalle Valo };
103e705c121SKalle Valo 
104e705c121SKalle Valo module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO);
105e705c121SKalle Valo MODULE_PARM_DESC(init_dbg,
106e705c121SKalle Valo 		 "set to true to debug an ASSERT in INIT fw (default: false");
107e705c121SKalle Valo module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO);
108e705c121SKalle Valo MODULE_PARM_DESC(power_scheme,
109e705c121SKalle Valo 		 "power management scheme: 1-active, 2-balanced, 3-low power, default: 2");
110e705c121SKalle Valo module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect,
111e705c121SKalle Valo 		   bool, S_IRUGO);
112e705c121SKalle Valo MODULE_PARM_DESC(tfd_q_hang_detect,
113e705c121SKalle Valo 		 "TFD queues hang detection (default: true");
114e705c121SKalle Valo 
115e705c121SKalle Valo /*
116e705c121SKalle Valo  * module init and exit functions
117e705c121SKalle Valo  */
118e705c121SKalle Valo static int __init iwl_mvm_init(void)
119e705c121SKalle Valo {
120e705c121SKalle Valo 	int ret;
121e705c121SKalle Valo 
122e705c121SKalle Valo 	ret = iwl_mvm_rate_control_register();
123e705c121SKalle Valo 	if (ret) {
124e705c121SKalle Valo 		pr_err("Unable to register rate control algorithm: %d\n", ret);
125e705c121SKalle Valo 		return ret;
126e705c121SKalle Valo 	}
127e705c121SKalle Valo 
128e705c121SKalle Valo 	ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops);
129e705c121SKalle Valo 
130e705c121SKalle Valo 	if (ret) {
131e705c121SKalle Valo 		pr_err("Unable to register MVM op_mode: %d\n", ret);
132e705c121SKalle Valo 		iwl_mvm_rate_control_unregister();
133e705c121SKalle Valo 	}
134e705c121SKalle Valo 
135e705c121SKalle Valo 	return ret;
136e705c121SKalle Valo }
137e705c121SKalle Valo module_init(iwl_mvm_init);
138e705c121SKalle Valo 
139e705c121SKalle Valo static void __exit iwl_mvm_exit(void)
140e705c121SKalle Valo {
141e705c121SKalle Valo 	iwl_opmode_deregister("iwlmvm");
142e705c121SKalle Valo 	iwl_mvm_rate_control_unregister();
143e705c121SKalle Valo }
144e705c121SKalle Valo module_exit(iwl_mvm_exit);
145e705c121SKalle Valo 
146e705c121SKalle Valo static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
147e705c121SKalle Valo {
148e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
149e705c121SKalle Valo 	u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash;
150e705c121SKalle Valo 	u32 reg_val = 0;
151e705c121SKalle Valo 	u32 phy_config = iwl_mvm_get_phy_config(mvm);
152e705c121SKalle Valo 
153e705c121SKalle Valo 	radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >>
154e705c121SKalle Valo 			 FW_PHY_CFG_RADIO_TYPE_POS;
155e705c121SKalle Valo 	radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >>
156e705c121SKalle Valo 			 FW_PHY_CFG_RADIO_STEP_POS;
157e705c121SKalle Valo 	radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >>
158e705c121SKalle Valo 			 FW_PHY_CFG_RADIO_DASH_POS;
159e705c121SKalle Valo 
160e705c121SKalle Valo 	/* SKU control */
161e705c121SKalle Valo 	reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) <<
162e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
163e705c121SKalle Valo 	reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) <<
164e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
165e705c121SKalle Valo 
166e705c121SKalle Valo 	/* radio configuration */
167e705c121SKalle Valo 	reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
168e705c121SKalle Valo 	reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
169e705c121SKalle Valo 	reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
170e705c121SKalle Valo 
171e705c121SKalle Valo 	WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) &
172e705c121SKalle Valo 		 ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE);
173e705c121SKalle Valo 
174e705c121SKalle Valo 	/*
1756e584873SSara Sharon 	 * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC
1766e584873SSara Sharon 	 * sampling, and shouldn't be set to any non-zero value.
1776e584873SSara Sharon 	 * The same is supposed to be true of the other HW, but unsetting
1786e584873SSara Sharon 	 * them (such as the 7260) causes automatic tests to fail on seemingly
1796e584873SSara Sharon 	 * unrelated errors. Need to further investigate this, but for now
1806e584873SSara Sharon 	 * we'll separate cases.
181e705c121SKalle Valo 	 */
1826e584873SSara Sharon 	if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000)
183e705c121SKalle Valo 		reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
184e705c121SKalle Valo 
185e705c121SKalle Valo 	iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
186e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
187e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
188e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
189e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
190e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH |
191e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
192e705c121SKalle Valo 				CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,
193e705c121SKalle Valo 				reg_val);
194e705c121SKalle Valo 
195e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
196e705c121SKalle Valo 		       radio_cfg_step, radio_cfg_dash);
197e705c121SKalle Valo 
198e705c121SKalle Valo 	/*
199e705c121SKalle Valo 	 * W/A : NIC is stuck in a reset state after Early PCIe power off
200e705c121SKalle Valo 	 * (PCIe power is lost before PERST# is asserted), causing ME FW
201e705c121SKalle Valo 	 * to lose ownership and not being able to obtain it back.
202e705c121SKalle Valo 	 */
203e705c121SKalle Valo 	if (!mvm->trans->cfg->apmg_not_supported)
204e705c121SKalle Valo 		iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
205e705c121SKalle Valo 				       APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
206e705c121SKalle Valo 				       ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
207e705c121SKalle Valo }
208e705c121SKalle Valo 
209c9cb14a6SChaya Rachel Ivgi /**
210c9cb14a6SChaya Rachel Ivgi  * enum iwl_rx_handler_context context for Rx handler
211c9cb14a6SChaya Rachel Ivgi  * @RX_HANDLER_SYNC : this means that it will be called in the Rx path
212c9cb14a6SChaya Rachel Ivgi  *	which can't acquire mvm->mutex.
213c9cb14a6SChaya Rachel Ivgi  * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex
214c9cb14a6SChaya Rachel Ivgi  *	(and only in this case!), it should be set as ASYNC. In that case,
215c9cb14a6SChaya Rachel Ivgi  *	it will be called from a worker with mvm->mutex held.
216c9cb14a6SChaya Rachel Ivgi  * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the
217c9cb14a6SChaya Rachel Ivgi  *	mutex itself, it will be called from a worker without mvm->mutex held.
218c9cb14a6SChaya Rachel Ivgi  */
219c9cb14a6SChaya Rachel Ivgi enum iwl_rx_handler_context {
220c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER_SYNC,
221c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER_ASYNC_LOCKED,
222c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER_ASYNC_UNLOCKED,
223c9cb14a6SChaya Rachel Ivgi };
224c9cb14a6SChaya Rachel Ivgi 
225c9cb14a6SChaya Rachel Ivgi /**
226c9cb14a6SChaya Rachel Ivgi  * struct iwl_rx_handlers handler for FW notification
227c9cb14a6SChaya Rachel Ivgi  * @cmd_id: command id
228c9cb14a6SChaya Rachel Ivgi  * @context: see &iwl_rx_handler_context
229c9cb14a6SChaya Rachel Ivgi  * @fn: the function is called when notification is received
230c9cb14a6SChaya Rachel Ivgi  */
231e705c121SKalle Valo struct iwl_rx_handlers {
232e705c121SKalle Valo 	u16 cmd_id;
233c9cb14a6SChaya Rachel Ivgi 	enum iwl_rx_handler_context context;
234e705c121SKalle Valo 	void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
235e705c121SKalle Valo };
236e705c121SKalle Valo 
237c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER(_cmd_id, _fn, _context)	\
238c9cb14a6SChaya Rachel Ivgi 	{ .cmd_id = _cmd_id, .fn = _fn, .context = _context }
239c9cb14a6SChaya Rachel Ivgi #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context)	\
240c9cb14a6SChaya Rachel Ivgi 	{ .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context }
241e705c121SKalle Valo 
242e705c121SKalle Valo /*
243e705c121SKalle Valo  * Handlers for fw notifications
244e705c121SKalle Valo  * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME
245e705c121SKalle Valo  * This list should be in order of frequency for performance purposes.
246e705c121SKalle Valo  *
247c9cb14a6SChaya Rachel Ivgi  * The handler can be one from three contexts, see &iwl_rx_handler_context
248e705c121SKalle Valo  */
249e705c121SKalle Valo static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = {
250c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC),
251c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC),
252e705c121SKalle Valo 
253c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif,
254c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
255c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif,
256c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
257c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics,
258c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
259e705c121SKalle Valo 
2603af512d6SSara Sharon 	RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID,
261c9cb14a6SChaya Rachel Ivgi 		   iwl_mvm_window_status_notif, RX_HANDLER_SYNC),
2623af512d6SSara Sharon 
263c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif,
264c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_SYNC),
265c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc,
266c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
267e705c121SKalle Valo 
268c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC),
269e705c121SKalle Valo 
270e705c121SKalle Valo 	RX_HANDLER(SCAN_ITERATION_COMPLETE,
271c9cb14a6SChaya Rachel Ivgi 		   iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC),
272e705c121SKalle Valo 	RX_HANDLER(SCAN_OFFLOAD_COMPLETE,
273c9cb14a6SChaya Rachel Ivgi 		   iwl_mvm_rx_lmac_scan_complete_notif,
274c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
275e705c121SKalle Valo 	RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found,
276c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_SYNC),
277e705c121SKalle Valo 	RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif,
278c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
279e705c121SKalle Valo 	RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC,
280c9cb14a6SChaya Rachel Ivgi 		   iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC),
281e705c121SKalle Valo 
282c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif,
283c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_SYNC),
284e705c121SKalle Valo 
285e705c121SKalle Valo 	RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif,
286c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_SYNC),
287e705c121SKalle Valo 
288c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC),
289e705c121SKalle Valo 	RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION,
290c9cb14a6SChaya Rachel Ivgi 		   iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC),
291c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif,
292c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
293e705c121SKalle Valo 	RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE,
294ec77a33eSChaya Rachel Ivgi 		       iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED),
2950a3b7119SChaya Rachel Ivgi 	RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION,
296c9cb14a6SChaya Rachel Ivgi 		       iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC),
297e705c121SKalle Valo 
298e705c121SKalle Valo 	RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif,
299c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
300c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif,
301c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_SYNC),
302c9cb14a6SChaya Rachel Ivgi 	RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler,
303c9cb14a6SChaya Rachel Ivgi 		   RX_HANDLER_ASYNC_LOCKED),
304bdccdb85SGolan Ben-Ami 	RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF,
305bdccdb85SGolan Ben-Ami 		       iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC),
3060db056d3SSara Sharon 	RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF,
307c9cb14a6SChaya Rachel Ivgi 		       iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC),
308f92659a1SSara Sharon 	RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF,
309c9cb14a6SChaya Rachel Ivgi 		       iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC),
31065e25482SJohannes Berg 	RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF,
31165e25482SJohannes Berg 		       iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC),
312e705c121SKalle Valo };
313e705c121SKalle Valo #undef RX_HANDLER
314e705c121SKalle Valo #undef RX_HANDLER_GRP
315e705c121SKalle Valo 
31639bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value.
31739bdb17eSSharon Dvir  * Access is done through binary search
31839bdb17eSSharon Dvir  */
31939bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = {
32039bdb17eSSharon Dvir 	HCMD_NAME(MVM_ALIVE),
32139bdb17eSSharon Dvir 	HCMD_NAME(REPLY_ERROR),
32239bdb17eSSharon Dvir 	HCMD_NAME(ECHO_CMD),
32339bdb17eSSharon Dvir 	HCMD_NAME(INIT_COMPLETE_NOTIF),
32439bdb17eSSharon Dvir 	HCMD_NAME(PHY_CONTEXT_CMD),
32539bdb17eSSharon Dvir 	HCMD_NAME(DBG_CFG),
32639bdb17eSSharon Dvir 	HCMD_NAME(SCAN_CFG_CMD),
32739bdb17eSSharon Dvir 	HCMD_NAME(SCAN_REQ_UMAC),
32839bdb17eSSharon Dvir 	HCMD_NAME(SCAN_ABORT_UMAC),
32939bdb17eSSharon Dvir 	HCMD_NAME(SCAN_COMPLETE_UMAC),
33039bdb17eSSharon Dvir 	HCMD_NAME(TOF_CMD),
33139bdb17eSSharon Dvir 	HCMD_NAME(TOF_NOTIFICATION),
3323af512d6SSara Sharon 	HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID),
33339bdb17eSSharon Dvir 	HCMD_NAME(ADD_STA_KEY),
33439bdb17eSSharon Dvir 	HCMD_NAME(ADD_STA),
33539bdb17eSSharon Dvir 	HCMD_NAME(REMOVE_STA),
33639bdb17eSSharon Dvir 	HCMD_NAME(FW_GET_ITEM_CMD),
33739bdb17eSSharon Dvir 	HCMD_NAME(TX_CMD),
33839bdb17eSSharon Dvir 	HCMD_NAME(SCD_QUEUE_CFG),
33939bdb17eSSharon Dvir 	HCMD_NAME(TXPATH_FLUSH),
34039bdb17eSSharon Dvir 	HCMD_NAME(MGMT_MCAST_KEY),
34139bdb17eSSharon Dvir 	HCMD_NAME(WEP_KEY),
34239bdb17eSSharon Dvir 	HCMD_NAME(SHARED_MEM_CFG),
34339bdb17eSSharon Dvir 	HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD),
34439bdb17eSSharon Dvir 	HCMD_NAME(MAC_CONTEXT_CMD),
34539bdb17eSSharon Dvir 	HCMD_NAME(TIME_EVENT_CMD),
34639bdb17eSSharon Dvir 	HCMD_NAME(TIME_EVENT_NOTIFICATION),
34739bdb17eSSharon Dvir 	HCMD_NAME(BINDING_CONTEXT_CMD),
34839bdb17eSSharon Dvir 	HCMD_NAME(TIME_QUOTA_CMD),
34939bdb17eSSharon Dvir 	HCMD_NAME(NON_QOS_TX_COUNTER_CMD),
3507089ae63SJohannes Berg 	HCMD_NAME(LEDS_CMD),
35139bdb17eSSharon Dvir 	HCMD_NAME(LQ_CMD),
35239bdb17eSSharon Dvir 	HCMD_NAME(FW_PAGING_BLOCK_CMD),
35339bdb17eSSharon Dvir 	HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD),
35439bdb17eSSharon Dvir 	HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD),
35539bdb17eSSharon Dvir 	HCMD_NAME(HOT_SPOT_CMD),
35639bdb17eSSharon Dvir 	HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD),
35739bdb17eSSharon Dvir 	HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP),
35839bdb17eSSharon Dvir 	HCMD_NAME(BT_COEX_CI),
35939bdb17eSSharon Dvir 	HCMD_NAME(PHY_CONFIGURATION_CMD),
36039bdb17eSSharon Dvir 	HCMD_NAME(CALIB_RES_NOTIF_PHY_DB),
361176aa60bSSara Sharon 	HCMD_NAME(PHY_DB_CMD),
36239bdb17eSSharon Dvir 	HCMD_NAME(SCAN_OFFLOAD_COMPLETE),
36339bdb17eSSharon Dvir 	HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD),
36439bdb17eSSharon Dvir 	HCMD_NAME(POWER_TABLE_CMD),
36539bdb17eSSharon Dvir 	HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION),
36639bdb17eSSharon Dvir 	HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF),
36739bdb17eSSharon Dvir 	HCMD_NAME(DC2DC_CONFIG_CMD),
36839bdb17eSSharon Dvir 	HCMD_NAME(NVM_ACCESS_CMD),
36939bdb17eSSharon Dvir 	HCMD_NAME(BEACON_NOTIFICATION),
37039bdb17eSSharon Dvir 	HCMD_NAME(BEACON_TEMPLATE_CMD),
37139bdb17eSSharon Dvir 	HCMD_NAME(TX_ANT_CONFIGURATION_CMD),
37239bdb17eSSharon Dvir 	HCMD_NAME(BT_CONFIG),
37339bdb17eSSharon Dvir 	HCMD_NAME(STATISTICS_CMD),
37439bdb17eSSharon Dvir 	HCMD_NAME(STATISTICS_NOTIFICATION),
37539bdb17eSSharon Dvir 	HCMD_NAME(EOSP_NOTIFICATION),
37639bdb17eSSharon Dvir 	HCMD_NAME(REDUCE_TX_POWER_CMD),
37739bdb17eSSharon Dvir 	HCMD_NAME(CARD_STATE_NOTIFICATION),
37839bdb17eSSharon Dvir 	HCMD_NAME(MISSED_BEACONS_NOTIFICATION),
37939bdb17eSSharon Dvir 	HCMD_NAME(TDLS_CONFIG_CMD),
38039bdb17eSSharon Dvir 	HCMD_NAME(MAC_PM_POWER_TABLE),
38139bdb17eSSharon Dvir 	HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION),
38239bdb17eSSharon Dvir 	HCMD_NAME(MFUART_LOAD_NOTIFICATION),
38343413a97SSara Sharon 	HCMD_NAME(RSS_CONFIG_CMD),
38439bdb17eSSharon Dvir 	HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC),
38539bdb17eSSharon Dvir 	HCMD_NAME(REPLY_RX_PHY_CMD),
38639bdb17eSSharon Dvir 	HCMD_NAME(REPLY_RX_MPDU_CMD),
3873e73aa3bSEmmanuel Grumbach 	HCMD_NAME(FRAME_RELEASE),
38839bdb17eSSharon Dvir 	HCMD_NAME(BA_NOTIF),
38939bdb17eSSharon Dvir 	HCMD_NAME(MCC_UPDATE_CMD),
39039bdb17eSSharon Dvir 	HCMD_NAME(MCC_CHUB_UPDATE_CMD),
39139bdb17eSSharon Dvir 	HCMD_NAME(MARKER_CMD),
39239bdb17eSSharon Dvir 	HCMD_NAME(BT_PROFILE_NOTIFICATION),
39339bdb17eSSharon Dvir 	HCMD_NAME(BCAST_FILTER_CMD),
39439bdb17eSSharon Dvir 	HCMD_NAME(MCAST_FILTER_CMD),
39539bdb17eSSharon Dvir 	HCMD_NAME(REPLY_SF_CFG_CMD),
39639bdb17eSSharon Dvir 	HCMD_NAME(REPLY_BEACON_FILTERING_CMD),
39739bdb17eSSharon Dvir 	HCMD_NAME(D3_CONFIG_CMD),
39839bdb17eSSharon Dvir 	HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD),
39939bdb17eSSharon Dvir 	HCMD_NAME(OFFLOADS_QUERY_CMD),
40039bdb17eSSharon Dvir 	HCMD_NAME(REMOTE_WAKE_CONFIG_CMD),
40139bdb17eSSharon Dvir 	HCMD_NAME(MATCH_FOUND_NOTIFICATION),
40239bdb17eSSharon Dvir 	HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION),
40339bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_PATTERNS),
40439bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_CONFIGURATION),
40539bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_TSC_RSC_PARAM),
40639bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_TKIP_PARAM),
40739bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL),
40839bdb17eSSharon Dvir 	HCMD_NAME(WOWLAN_GET_STATUSES),
40939bdb17eSSharon Dvir 	HCMD_NAME(SCAN_ITERATION_COMPLETE),
41039bdb17eSSharon Dvir 	HCMD_NAME(D0I3_END_CMD),
41139bdb17eSSharon Dvir 	HCMD_NAME(LTR_CONFIG),
412e705c121SKalle Valo };
41339bdb17eSSharon Dvir 
41439bdb17eSSharon Dvir /* Please keep this array *SORTED* by hex value.
41539bdb17eSSharon Dvir  * Access is done through binary search
41639bdb17eSSharon Dvir  */
4175b086414SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_system_names[] = {
4185b086414SGolan Ben-Ami 	HCMD_NAME(SHARED_MEM_CFG_CMD),
4194399caaaSSara Sharon 	HCMD_NAME(INIT_EXTENDED_CFG_CMD),
4205b086414SGolan Ben-Ami };
4215b086414SGolan Ben-Ami 
4225b086414SGolan Ben-Ami /* Please keep this array *SORTED* by hex value.
4235b086414SGolan Ben-Ami  * Access is done through binary search
4245b086414SGolan Ben-Ami  */
42503098268SAviya Erenfeld static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = {
42603098268SAviya Erenfeld 	HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD),
42703098268SAviya Erenfeld 	HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF),
428d3a108a4SAndrei Otcheretianski 	HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF),
42903098268SAviya Erenfeld };
43003098268SAviya Erenfeld 
43103098268SAviya Erenfeld /* Please keep this array *SORTED* by hex value.
43203098268SAviya Erenfeld  * Access is done through binary search
43303098268SAviya Erenfeld  */
43439bdb17eSSharon Dvir static const struct iwl_hcmd_names iwl_mvm_phy_names[] = {
43539bdb17eSSharon Dvir 	HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE),
4365c89e7bcSChaya Rachel Ivgi 	HCMD_NAME(CTDP_CONFIG_CMD),
437c221daf2SChaya Rachel Ivgi 	HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD),
438a6bff3cbSHaim Dreyfuss 	HCMD_NAME(GEO_TX_POWER_LIMIT),
4390a3b7119SChaya Rachel Ivgi 	HCMD_NAME(CT_KILL_NOTIFICATION),
44039bdb17eSSharon Dvir 	HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE),
44139bdb17eSSharon Dvir };
44239bdb17eSSharon Dvir 
4430db056d3SSara Sharon /* Please keep this array *SORTED* by hex value.
4440db056d3SSara Sharon  * Access is done through binary search
4450db056d3SSara Sharon  */
446e0d8fdecSSara Sharon static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = {
447ddef2f98SEmmanuel Grumbach 	HCMD_NAME(DQA_ENABLE_CMD),
448e0d8fdecSSara Sharon 	HCMD_NAME(UPDATE_MU_GROUPS_CMD),
44994bb4481SSara Sharon 	HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD),
45065e25482SJohannes Berg 	HCMD_NAME(STA_PM_NOTIF),
451f92659a1SSara Sharon 	HCMD_NAME(MU_GROUP_MGMT_NOTIF),
45294bb4481SSara Sharon 	HCMD_NAME(RX_QUEUES_NOTIFICATION),
453e0d8fdecSSara Sharon };
454e0d8fdecSSara Sharon 
455e0d8fdecSSara Sharon /* Please keep this array *SORTED* by hex value.
456e0d8fdecSSara Sharon  * Access is done through binary search
457e0d8fdecSSara Sharon  */
458bdccdb85SGolan Ben-Ami static const struct iwl_hcmd_names iwl_mvm_debug_names[] = {
459bdccdb85SGolan Ben-Ami 	HCMD_NAME(MFU_ASSERT_DUMP_NTF),
460bdccdb85SGolan Ben-Ami };
461bdccdb85SGolan Ben-Ami 
462bdccdb85SGolan Ben-Ami /* Please keep this array *SORTED* by hex value.
463bdccdb85SGolan Ben-Ami  * Access is done through binary search
464bdccdb85SGolan Ben-Ami  */
4650db056d3SSara Sharon static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = {
4660db056d3SSara Sharon 	HCMD_NAME(STORED_BEACON_NTF),
4670db056d3SSara Sharon };
4680db056d3SSara Sharon 
4691f370650SSara Sharon /* Please keep this array *SORTED* by hex value.
4701f370650SSara Sharon  * Access is done through binary search
4711f370650SSara Sharon  */
4721f370650SSara Sharon static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = {
4731f370650SSara Sharon 	HCMD_NAME(NVM_ACCESS_COMPLETE),
474e9e1ba3dSSara Sharon 	HCMD_NAME(NVM_GET_INFO),
4751f370650SSara Sharon };
4761f370650SSara Sharon 
47739bdb17eSSharon Dvir static const struct iwl_hcmd_arr iwl_mvm_groups[] = {
47839bdb17eSSharon Dvir 	[LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
47939bdb17eSSharon Dvir 	[LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
4805b086414SGolan Ben-Ami 	[SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names),
48103098268SAviya Erenfeld 	[MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names),
48239bdb17eSSharon Dvir 	[PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names),
483e0d8fdecSSara Sharon 	[DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names),
4840db056d3SSara Sharon 	[PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names),
4851f370650SSara Sharon 	[REGULATORY_AND_NVM_GROUP] =
4861f370650SSara Sharon 		HCMD_ARR(iwl_mvm_regulatory_and_nvm_names),
48739bdb17eSSharon Dvir };
48839bdb17eSSharon Dvir 
489e705c121SKalle Valo /* this forward declaration can avoid to export the function */
490e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk);
491e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk);
492e705c121SKalle Valo 
493e705c121SKalle Valo static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg)
494e705c121SKalle Valo {
495e705c121SKalle Valo 	const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs;
496e705c121SKalle Valo 
497e705c121SKalle Valo 	if (!pwr_tx_backoff)
498e705c121SKalle Valo 		return 0;
499e705c121SKalle Valo 
500e705c121SKalle Valo 	while (pwr_tx_backoff->pwr) {
501e705c121SKalle Valo 		if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr)
502e705c121SKalle Valo 			return pwr_tx_backoff->backoff;
503e705c121SKalle Valo 
504e705c121SKalle Valo 		pwr_tx_backoff++;
505e705c121SKalle Valo 	}
506e705c121SKalle Valo 
507e705c121SKalle Valo 	return 0;
508e705c121SKalle Valo }
509e705c121SKalle Valo 
510d3a108a4SAndrei Otcheretianski static void iwl_mvm_tx_unblock_dwork(struct work_struct *work)
511d3a108a4SAndrei Otcheretianski {
512d3a108a4SAndrei Otcheretianski 	struct iwl_mvm *mvm =
513d3a108a4SAndrei Otcheretianski 		container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work);
514d3a108a4SAndrei Otcheretianski 	struct ieee80211_vif *tx_blocked_vif;
515d3a108a4SAndrei Otcheretianski 	struct iwl_mvm_vif *mvmvif;
516d3a108a4SAndrei Otcheretianski 
517d3a108a4SAndrei Otcheretianski 	mutex_lock(&mvm->mutex);
518d3a108a4SAndrei Otcheretianski 
519d3a108a4SAndrei Otcheretianski 	tx_blocked_vif =
520d3a108a4SAndrei Otcheretianski 		rcu_dereference_protected(mvm->csa_tx_blocked_vif,
521d3a108a4SAndrei Otcheretianski 					  lockdep_is_held(&mvm->mutex));
522d3a108a4SAndrei Otcheretianski 
523d3a108a4SAndrei Otcheretianski 	if (!tx_blocked_vif)
524d3a108a4SAndrei Otcheretianski 		goto unlock;
525d3a108a4SAndrei Otcheretianski 
526d3a108a4SAndrei Otcheretianski 	mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif);
527d3a108a4SAndrei Otcheretianski 	iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false);
528d3a108a4SAndrei Otcheretianski 	RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL);
529d3a108a4SAndrei Otcheretianski unlock:
530d3a108a4SAndrei Otcheretianski 	mutex_unlock(&mvm->mutex);
531d3a108a4SAndrei Otcheretianski }
532d3a108a4SAndrei Otcheretianski 
5337174beb6SJohannes Berg static int iwl_mvm_fwrt_dump_start(void *ctx)
5347174beb6SJohannes Berg {
5357174beb6SJohannes Berg 	struct iwl_mvm *mvm = ctx;
5367174beb6SJohannes Berg 	int ret;
5377174beb6SJohannes Berg 
5387174beb6SJohannes Berg 	ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
5397174beb6SJohannes Berg 	if (ret)
5407174beb6SJohannes Berg 		return ret;
5417174beb6SJohannes Berg 
5427174beb6SJohannes Berg 	mutex_lock(&mvm->mutex);
5437174beb6SJohannes Berg 
5447174beb6SJohannes Berg 	return 0;
5457174beb6SJohannes Berg }
5467174beb6SJohannes Berg 
5477174beb6SJohannes Berg static void iwl_mvm_fwrt_dump_end(void *ctx)
5487174beb6SJohannes Berg {
5497174beb6SJohannes Berg 	struct iwl_mvm *mvm = ctx;
5507174beb6SJohannes Berg 
5517174beb6SJohannes Berg 	mutex_unlock(&mvm->mutex);
5527174beb6SJohannes Berg 
5537174beb6SJohannes Berg 	iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
5547174beb6SJohannes Berg }
5557174beb6SJohannes Berg 
5567174beb6SJohannes Berg static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = {
5577174beb6SJohannes Berg 	.dump_start = iwl_mvm_fwrt_dump_start,
5587174beb6SJohannes Berg 	.dump_end = iwl_mvm_fwrt_dump_end,
5597174beb6SJohannes Berg };
5607174beb6SJohannes Berg 
561e705c121SKalle Valo static struct iwl_op_mode *
562e705c121SKalle Valo iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
563e705c121SKalle Valo 		      const struct iwl_fw *fw, struct dentry *dbgfs_dir)
564e705c121SKalle Valo {
565e705c121SKalle Valo 	struct ieee80211_hw *hw;
566e705c121SKalle Valo 	struct iwl_op_mode *op_mode;
567e705c121SKalle Valo 	struct iwl_mvm *mvm;
568e705c121SKalle Valo 	struct iwl_trans_config trans_cfg = {};
569e705c121SKalle Valo 	static const u8 no_reclaim_cmds[] = {
570e705c121SKalle Valo 		TX_CMD,
571e705c121SKalle Valo 	};
572e705c121SKalle Valo 	int err, scan_size;
573e705c121SKalle Valo 	u32 min_backoff;
574e705c121SKalle Valo 
575e705c121SKalle Valo 	/*
576e705c121SKalle Valo 	 * We use IWL_MVM_STATION_COUNT to check the validity of the station
577e705c121SKalle Valo 	 * index all over the driver - check that its value corresponds to the
578e705c121SKalle Valo 	 * array size.
579e705c121SKalle Valo 	 */
580e705c121SKalle Valo 	BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT);
581e705c121SKalle Valo 
582e705c121SKalle Valo 	/********************************
583e705c121SKalle Valo 	 * 1. Allocating and configuring HW data
584e705c121SKalle Valo 	 ********************************/
585e705c121SKalle Valo 	hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) +
586e705c121SKalle Valo 				sizeof(struct iwl_mvm),
587e705c121SKalle Valo 				&iwl_mvm_hw_ops);
588e705c121SKalle Valo 	if (!hw)
589e705c121SKalle Valo 		return NULL;
590e705c121SKalle Valo 
591e705c121SKalle Valo 	if (cfg->max_rx_agg_size)
592e705c121SKalle Valo 		hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size;
593e705c121SKalle Valo 
594e705c121SKalle Valo 	if (cfg->max_tx_agg_size)
595e705c121SKalle Valo 		hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size;
596e705c121SKalle Valo 
597e705c121SKalle Valo 	op_mode = hw->priv;
598e705c121SKalle Valo 
599e705c121SKalle Valo 	mvm = IWL_OP_MODE_GET_MVM(op_mode);
600e705c121SKalle Valo 	mvm->dev = trans->dev;
601e705c121SKalle Valo 	mvm->trans = trans;
602e705c121SKalle Valo 	mvm->cfg = cfg;
603e705c121SKalle Valo 	mvm->fw = fw;
604e705c121SKalle Valo 	mvm->hw = hw;
605e705c121SKalle Valo 
6067174beb6SJohannes Berg 	iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm);
607235acb18SJohannes Berg 
608de8ba41bSLiad Kaufman 	mvm->init_status = 0;
609de8ba41bSLiad Kaufman 
610e705c121SKalle Valo 	if (iwl_mvm_has_new_rx_api(mvm)) {
611e705c121SKalle Valo 		op_mode->ops = &iwl_mvm_ops_mq;
61225c2b22cSSara Sharon 		trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc);
613e705c121SKalle Valo 	} else {
614e705c121SKalle Valo 		op_mode->ops = &iwl_mvm_ops;
61525c2b22cSSara Sharon 		trans->rx_mpdu_cmd_hdr_size =
61625c2b22cSSara Sharon 			sizeof(struct iwl_rx_mpdu_res_start);
617e705c121SKalle Valo 
618e705c121SKalle Valo 		if (WARN_ON(trans->num_rx_queues > 1))
619e705c121SKalle Valo 			goto out_free;
620e705c121SKalle Valo 	}
621e705c121SKalle Valo 
6223b37f4c9SJohannes Berg 	mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0;
623e705c121SKalle Valo 
62428d0793eSLiad Kaufman 	mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE;
62549f71713SSara Sharon 	mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
62649f71713SSara Sharon 	mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE;
627c8f54701SJohannes Berg 
628e705c121SKalle Valo 	mvm->sf_state = SF_UNINIT;
6297d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
630702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR);
6311f370650SSara Sharon 	else
632702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT);
633c89e333dSAndrei Otcheretianski 	mvm->drop_bcn_ap_mode = true;
634e705c121SKalle Valo 
635e705c121SKalle Valo 	mutex_init(&mvm->mutex);
636e705c121SKalle Valo 	mutex_init(&mvm->d0i3_suspend_mutex);
637e705c121SKalle Valo 	spin_lock_init(&mvm->async_handlers_lock);
638e705c121SKalle Valo 	INIT_LIST_HEAD(&mvm->time_event_list);
639e705c121SKalle Valo 	INIT_LIST_HEAD(&mvm->aux_roc_te_list);
640e705c121SKalle Valo 	INIT_LIST_HEAD(&mvm->async_handlers_list);
641e705c121SKalle Valo 	spin_lock_init(&mvm->time_event_lock);
642e705c121SKalle Valo 	spin_lock_init(&mvm->queue_info_lock);
643e705c121SKalle Valo 
644e705c121SKalle Valo 	INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk);
645e705c121SKalle Valo 	INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk);
646e705c121SKalle Valo 	INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work);
647e705c121SKalle Valo 	INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work);
64869e04642SLuca Coelho 	INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk);
64924afba76SLiad Kaufman 	INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk);
650e705c121SKalle Valo 
651e705c121SKalle Valo 	spin_lock_init(&mvm->d0i3_tx_lock);
652e705c121SKalle Valo 	spin_lock_init(&mvm->refs_lock);
653e705c121SKalle Valo 	skb_queue_head_init(&mvm->d0i3_tx);
654e705c121SKalle Valo 	init_waitqueue_head(&mvm->d0i3_exit_waitq);
6553a732c65SSara Sharon 	init_waitqueue_head(&mvm->rx_sync_waitq);
656e705c121SKalle Valo 
6570636b938SSara Sharon 	atomic_set(&mvm->queue_sync_counter, 0);
6580636b938SSara Sharon 
659e705c121SKalle Valo 	SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev);
660e705c121SKalle Valo 
661d3a108a4SAndrei Otcheretianski 	INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork);
662d3a108a4SAndrei Otcheretianski 
663e705c121SKalle Valo 	/*
664e705c121SKalle Valo 	 * Populate the state variables that the transport layer needs
665e705c121SKalle Valo 	 * to know about.
666e705c121SKalle Valo 	 */
667e705c121SKalle Valo 	trans_cfg.op_mode = op_mode;
668e705c121SKalle Valo 	trans_cfg.no_reclaim_cmds = no_reclaim_cmds;
669e705c121SKalle Valo 	trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds);
6706c4fbcbcSEmmanuel Grumbach 	switch (iwlwifi_mod_params.amsdu_size) {
6714bdd4dfeSEmmanuel Grumbach 	case IWL_AMSDU_DEF:
6726c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_4K:
6736c4fbcbcSEmmanuel Grumbach 		trans_cfg.rx_buf_size = IWL_AMSDU_4K;
6746c4fbcbcSEmmanuel Grumbach 		break;
6756c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_8K:
6766c4fbcbcSEmmanuel Grumbach 		trans_cfg.rx_buf_size = IWL_AMSDU_8K;
6776c4fbcbcSEmmanuel Grumbach 		break;
6786c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_12K:
6796c4fbcbcSEmmanuel Grumbach 		trans_cfg.rx_buf_size = IWL_AMSDU_12K;
6806c4fbcbcSEmmanuel Grumbach 		break;
6816c4fbcbcSEmmanuel Grumbach 	default:
6826c4fbcbcSEmmanuel Grumbach 		pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME,
6836c4fbcbcSEmmanuel Grumbach 		       iwlwifi_mod_params.amsdu_size);
6846c4fbcbcSEmmanuel Grumbach 		trans_cfg.rx_buf_size = IWL_AMSDU_4K;
6856c4fbcbcSEmmanuel Grumbach 	}
6864bdd4dfeSEmmanuel Grumbach 
6874bdd4dfeSEmmanuel Grumbach 	/* the hardware splits the A-MSDU */
6884bdd4dfeSEmmanuel Grumbach 	if (mvm->cfg->mq_rx_supported)
6894bdd4dfeSEmmanuel Grumbach 		trans_cfg.rx_buf_size = IWL_AMSDU_4K;
690e705c121SKalle Valo 
6914b87e5afSLuca Coelho 	trans->wide_cmd_header = true;
692e705c121SKalle Valo 	trans_cfg.bc_table_dword = true;
693e705c121SKalle Valo 
69439bdb17eSSharon Dvir 	trans_cfg.command_groups = iwl_mvm_groups;
69539bdb17eSSharon Dvir 	trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups);
696e705c121SKalle Valo 
697097129c9SLiad Kaufman 	trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE;
698e705c121SKalle Valo 	trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD;
699e705c121SKalle Valo 	trans_cfg.scd_set_active = true;
700e705c121SKalle Valo 
70121cb3222SJohannes Berg 	trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info,
70221cb3222SJohannes Berg 					  driver_data[2]);
70321cb3222SJohannes Berg 
704e705c121SKalle Valo 	trans_cfg.sdio_adma_addr = fw->sdio_adma_addr;
70541837ca9SEmmanuel Grumbach 	trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD;
706e705c121SKalle Valo 
707e705c121SKalle Valo 	/* Set a short watchdog for the command queue */
708e705c121SKalle Valo 	trans_cfg.cmd_q_wdg_timeout =
709e705c121SKalle Valo 		iwl_mvm_get_wd_timeout(mvm, NULL, false, true);
710e705c121SKalle Valo 
711e705c121SKalle Valo 	snprintf(mvm->hw->wiphy->fw_version,
712e705c121SKalle Valo 		 sizeof(mvm->hw->wiphy->fw_version),
713e705c121SKalle Valo 		 "%s", fw->fw_version);
714e705c121SKalle Valo 
715e705c121SKalle Valo 	/* Configure transport layer */
716e705c121SKalle Valo 	iwl_trans_configure(mvm->trans, &trans_cfg);
717e705c121SKalle Valo 
718e705c121SKalle Valo 	trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD;
719e705c121SKalle Valo 	trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv;
720e705c121SKalle Valo 	trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num;
721e705c121SKalle Valo 	memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv,
722e705c121SKalle Valo 	       sizeof(trans->dbg_conf_tlv));
723e705c121SKalle Valo 	trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
724e705c121SKalle Valo 
725e705c121SKalle Valo 	/* set up notification wait support */
726e705c121SKalle Valo 	iwl_notification_wait_init(&mvm->notif_wait);
727e705c121SKalle Valo 
728e705c121SKalle Valo 	/* Init phy db */
729e705c121SKalle Valo 	mvm->phy_db = iwl_phy_db_init(trans);
730e705c121SKalle Valo 	if (!mvm->phy_db) {
731e705c121SKalle Valo 		IWL_ERR(mvm, "Cannot init phy_db\n");
732e705c121SKalle Valo 		goto out_free;
733e705c121SKalle Valo 	}
734e705c121SKalle Valo 
735e705c121SKalle Valo 	IWL_INFO(mvm, "Detected %s, REV=0x%X\n",
736e705c121SKalle Valo 		 mvm->cfg->name, mvm->trans->hw_rev);
737e705c121SKalle Valo 
738e705c121SKalle Valo 	if (iwlwifi_mod_params.nvm_file)
739e705c121SKalle Valo 		mvm->nvm_file_name = iwlwifi_mod_params.nvm_file;
740e705c121SKalle Valo 	else
741e705c121SKalle Valo 		IWL_DEBUG_EEPROM(mvm->trans->dev,
742e705c121SKalle Valo 				 "working without external nvm file\n");
743e705c121SKalle Valo 
744e705c121SKalle Valo 	err = iwl_trans_start_hw(mvm->trans);
745e705c121SKalle Valo 	if (err)
746e705c121SKalle Valo 		goto out_free;
747e705c121SKalle Valo 
748e705c121SKalle Valo 	mutex_lock(&mvm->mutex);
74908f0d23dSEliad Peller 	iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE);
750e705c121SKalle Valo 	err = iwl_run_init_mvm_ucode(mvm, true);
751b092c9f2SJohannes Berg 	if (!iwlmvm_mod_params.init_dbg)
752fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
75308f0d23dSEliad Peller 	iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE);
754e705c121SKalle Valo 	mutex_unlock(&mvm->mutex);
755de8ba41bSLiad Kaufman 	if (err < 0) {
756e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err);
757e705c121SKalle Valo 		goto out_free;
758e705c121SKalle Valo 	}
759e705c121SKalle Valo 
760e705c121SKalle Valo 	scan_size = iwl_mvm_scan_size(mvm);
761e705c121SKalle Valo 
762e705c121SKalle Valo 	mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL);
763e705c121SKalle Valo 	if (!mvm->scan_cmd)
764e705c121SKalle Valo 		goto out_free;
765e705c121SKalle Valo 
766e705c121SKalle Valo 	/* Set EBS as successful as long as not stated otherwise by the FW. */
767e705c121SKalle Valo 	mvm->last_ebs_successful = true;
768e705c121SKalle Valo 
769e705c121SKalle Valo 	err = iwl_mvm_mac_setup_register(mvm);
770e705c121SKalle Valo 	if (err)
771e705c121SKalle Valo 		goto out_free;
7721f370650SSara Sharon 	mvm->hw_registered = true;
773e705c121SKalle Valo 
77404ddc2aaSChaya Rachel Ivgi 	min_backoff = calc_min_backoff(trans, cfg);
77504ddc2aaSChaya Rachel Ivgi 	iwl_mvm_thermal_initialize(mvm, min_backoff);
77604ddc2aaSChaya Rachel Ivgi 
777e705c121SKalle Valo 	err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
778e705c121SKalle Valo 	if (err)
779e705c121SKalle Valo 		goto out_unregister;
780e705c121SKalle Valo 
781678d9b6dSLiad Kaufman 	if (!iwl_mvm_has_new_rx_stats_api(mvm))
782678d9b6dSLiad Kaufman 		memset(&mvm->rx_stats_v3, 0,
783678d9b6dSLiad Kaufman 		       sizeof(struct mvm_statistics_rx_v3));
784678d9b6dSLiad Kaufman 	else
785e705c121SKalle Valo 		memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx));
786e705c121SKalle Valo 
78733c85eadSLuca Coelho 	/* The transport always starts with a taken reference, we can
78833c85eadSLuca Coelho 	 * release it now if d0i3 is supported */
78933c85eadSLuca Coelho 	if (iwl_mvm_is_d0i3_supported(mvm))
790a42b2af3SLuca Coelho 		iwl_trans_unref(mvm->trans);
791e705c121SKalle Valo 
792e705c121SKalle Valo 	iwl_mvm_tof_init(mvm);
793e705c121SKalle Valo 
794e705c121SKalle Valo 	return op_mode;
795e705c121SKalle Valo 
796e705c121SKalle Valo  out_unregister:
797de8ba41bSLiad Kaufman 	if (iwlmvm_mod_params.init_dbg)
798de8ba41bSLiad Kaufman 		return op_mode;
799de8ba41bSLiad Kaufman 
800e705c121SKalle Valo 	ieee80211_unregister_hw(mvm->hw);
8011f370650SSara Sharon 	mvm->hw_registered = false;
802e705c121SKalle Valo 	iwl_mvm_leds_exit(mvm);
803c221daf2SChaya Rachel Ivgi 	iwl_mvm_thermal_exit(mvm);
804e705c121SKalle Valo  out_free:
8057174beb6SJohannes Berg 	iwl_fw_flush_dump(&mvm->fwrt);
806de8ba41bSLiad Kaufman 
807de8ba41bSLiad Kaufman 	if (iwlmvm_mod_params.init_dbg)
808de8ba41bSLiad Kaufman 		return op_mode;
809e705c121SKalle Valo 	iwl_phy_db_free(mvm->phy_db);
810e705c121SKalle Valo 	kfree(mvm->scan_cmd);
811e705c121SKalle Valo 	iwl_trans_op_mode_leave(trans);
81256f2929bSSara Sharon 
813e705c121SKalle Valo 	ieee80211_free_hw(mvm->hw);
814e705c121SKalle Valo 	return NULL;
815e705c121SKalle Valo }
816e705c121SKalle Valo 
817e705c121SKalle Valo static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode)
818e705c121SKalle Valo {
819e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
820e705c121SKalle Valo 	int i;
821e705c121SKalle Valo 
822e27deb45SLuca Coelho 	/* If d0i3 is supported, we have released the reference that
823e27deb45SLuca Coelho 	 * the transport started with, so we should take it back now
824e27deb45SLuca Coelho 	 * that we are leaving.
825e27deb45SLuca Coelho 	 */
826e27deb45SLuca Coelho 	if (iwl_mvm_is_d0i3_supported(mvm))
827e27deb45SLuca Coelho 		iwl_trans_ref(mvm->trans);
828e27deb45SLuca Coelho 
829e705c121SKalle Valo 	iwl_mvm_leds_exit(mvm);
830e705c121SKalle Valo 
831c221daf2SChaya Rachel Ivgi 	iwl_mvm_thermal_exit(mvm);
832e705c121SKalle Valo 
833de8ba41bSLiad Kaufman 	if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) {
834e705c121SKalle Valo 		ieee80211_unregister_hw(mvm->hw);
835de8ba41bSLiad Kaufman 		mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE;
836de8ba41bSLiad Kaufman 	}
837e705c121SKalle Valo 
838e705c121SKalle Valo 	kfree(mvm->scan_cmd);
839e705c121SKalle Valo 	kfree(mvm->mcast_filter_cmd);
840e705c121SKalle Valo 	mvm->mcast_filter_cmd = NULL;
841e705c121SKalle Valo 
842e705c121SKalle Valo #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS)
843e705c121SKalle Valo 	kfree(mvm->d3_resume_sram);
844e705c121SKalle Valo #endif
845e705c121SKalle Valo 
846e705c121SKalle Valo 	iwl_trans_op_mode_leave(mvm->trans);
847e705c121SKalle Valo 
848e705c121SKalle Valo 	iwl_phy_db_free(mvm->phy_db);
849e705c121SKalle Valo 	mvm->phy_db = NULL;
850e705c121SKalle Valo 
8511dad3e0aSLuca Coelho 	kfree(mvm->nvm_data);
852e705c121SKalle Valo 	for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++)
853e705c121SKalle Valo 		kfree(mvm->nvm_sections[i].data);
854e705c121SKalle Valo 
855e705c121SKalle Valo 	iwl_mvm_tof_clean(mvm);
856e705c121SKalle Valo 
857a2a57a35SEmmanuel Grumbach 	mutex_destroy(&mvm->mutex);
858a2a57a35SEmmanuel Grumbach 	mutex_destroy(&mvm->d0i3_suspend_mutex);
859a2a57a35SEmmanuel Grumbach 
860e705c121SKalle Valo 	ieee80211_free_hw(mvm->hw);
861e705c121SKalle Valo }
862e705c121SKalle Valo 
863e705c121SKalle Valo struct iwl_async_handler_entry {
864e705c121SKalle Valo 	struct list_head list;
865e705c121SKalle Valo 	struct iwl_rx_cmd_buffer rxb;
866c9cb14a6SChaya Rachel Ivgi 	enum iwl_rx_handler_context context;
867e705c121SKalle Valo 	void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
868e705c121SKalle Valo };
869e705c121SKalle Valo 
870e705c121SKalle Valo void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm)
871e705c121SKalle Valo {
872e705c121SKalle Valo 	struct iwl_async_handler_entry *entry, *tmp;
873e705c121SKalle Valo 
874e705c121SKalle Valo 	spin_lock_bh(&mvm->async_handlers_lock);
875e705c121SKalle Valo 	list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) {
876e705c121SKalle Valo 		iwl_free_rxb(&entry->rxb);
877e705c121SKalle Valo 		list_del(&entry->list);
878e705c121SKalle Valo 		kfree(entry);
879e705c121SKalle Valo 	}
880e705c121SKalle Valo 	spin_unlock_bh(&mvm->async_handlers_lock);
881e705c121SKalle Valo }
882e705c121SKalle Valo 
883e705c121SKalle Valo static void iwl_mvm_async_handlers_wk(struct work_struct *wk)
884e705c121SKalle Valo {
885e705c121SKalle Valo 	struct iwl_mvm *mvm =
886e705c121SKalle Valo 		container_of(wk, struct iwl_mvm, async_handlers_wk);
887e705c121SKalle Valo 	struct iwl_async_handler_entry *entry, *tmp;
8888098203fSJohannes Berg 	LIST_HEAD(local_list);
889e705c121SKalle Valo 
890e705c121SKalle Valo 	/* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */
891e705c121SKalle Valo 
892e705c121SKalle Valo 	/*
893e705c121SKalle Valo 	 * Sync with Rx path with a lock. Remove all the entries from this list,
894e705c121SKalle Valo 	 * add them to a local one (lock free), and then handle them.
895e705c121SKalle Valo 	 */
896e705c121SKalle Valo 	spin_lock_bh(&mvm->async_handlers_lock);
897e705c121SKalle Valo 	list_splice_init(&mvm->async_handlers_list, &local_list);
898e705c121SKalle Valo 	spin_unlock_bh(&mvm->async_handlers_lock);
899e705c121SKalle Valo 
900e705c121SKalle Valo 	list_for_each_entry_safe(entry, tmp, &local_list, list) {
901c9cb14a6SChaya Rachel Ivgi 		if (entry->context == RX_HANDLER_ASYNC_LOCKED)
902c9cb14a6SChaya Rachel Ivgi 			mutex_lock(&mvm->mutex);
903e705c121SKalle Valo 		entry->fn(mvm, &entry->rxb);
904e705c121SKalle Valo 		iwl_free_rxb(&entry->rxb);
905e705c121SKalle Valo 		list_del(&entry->list);
906c9cb14a6SChaya Rachel Ivgi 		if (entry->context == RX_HANDLER_ASYNC_LOCKED)
907c9cb14a6SChaya Rachel Ivgi 			mutex_unlock(&mvm->mutex);
908e705c121SKalle Valo 		kfree(entry);
909e705c121SKalle Valo 	}
910e705c121SKalle Valo }
911e705c121SKalle Valo 
912e705c121SKalle Valo static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm,
913e705c121SKalle Valo 					    struct iwl_rx_packet *pkt)
914e705c121SKalle Valo {
915e705c121SKalle Valo 	struct iwl_fw_dbg_trigger_tlv *trig;
916e705c121SKalle Valo 	struct iwl_fw_dbg_trigger_cmd *cmds_trig;
917e705c121SKalle Valo 	int i;
918e705c121SKalle Valo 
919e705c121SKalle Valo 	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF))
920e705c121SKalle Valo 		return;
921e705c121SKalle Valo 
922e705c121SKalle Valo 	trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF);
923e705c121SKalle Valo 	cmds_trig = (void *)trig->data;
924e705c121SKalle Valo 
9257174beb6SJohannes Berg 	if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, NULL, trig))
926e705c121SKalle Valo 		return;
927e705c121SKalle Valo 
928e705c121SKalle Valo 	for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) {
929e705c121SKalle Valo 		/* don't collect on CMD 0 */
930e705c121SKalle Valo 		if (!cmds_trig->cmds[i].cmd_id)
931e705c121SKalle Valo 			break;
932e705c121SKalle Valo 
933e705c121SKalle Valo 		if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd ||
934e705c121SKalle Valo 		    cmds_trig->cmds[i].group_id != pkt->hdr.group_id)
935e705c121SKalle Valo 			continue;
936e705c121SKalle Valo 
9377174beb6SJohannes Berg 		iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
938e705c121SKalle Valo 					"CMD 0x%02x.%02x received",
939e705c121SKalle Valo 					pkt->hdr.group_id, pkt->hdr.cmd);
940e705c121SKalle Valo 		break;
941e705c121SKalle Valo 	}
942e705c121SKalle Valo }
943e705c121SKalle Valo 
944e705c121SKalle Valo static void iwl_mvm_rx_common(struct iwl_mvm *mvm,
945e705c121SKalle Valo 			      struct iwl_rx_cmd_buffer *rxb,
946e705c121SKalle Valo 			      struct iwl_rx_packet *pkt)
947e705c121SKalle Valo {
948e705c121SKalle Valo 	int i;
949e705c121SKalle Valo 
950e705c121SKalle Valo 	iwl_mvm_rx_check_trigger(mvm, pkt);
951e705c121SKalle Valo 
952e705c121SKalle Valo 	/*
953e705c121SKalle Valo 	 * Do the notification wait before RX handlers so
954e705c121SKalle Valo 	 * even if the RX handler consumes the RXB we have
955e705c121SKalle Valo 	 * access to it in the notification wait entry.
956e705c121SKalle Valo 	 */
957e705c121SKalle Valo 	iwl_notification_wait_notify(&mvm->notif_wait, pkt);
958e705c121SKalle Valo 
959e705c121SKalle Valo 	for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) {
960e705c121SKalle Valo 		const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i];
961e705c121SKalle Valo 		struct iwl_async_handler_entry *entry;
962e705c121SKalle Valo 
963e705c121SKalle Valo 		if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd))
964e705c121SKalle Valo 			continue;
965e705c121SKalle Valo 
966c9cb14a6SChaya Rachel Ivgi 		if (rx_h->context == RX_HANDLER_SYNC) {
967e705c121SKalle Valo 			rx_h->fn(mvm, rxb);
968e705c121SKalle Valo 			return;
969e705c121SKalle Valo 		}
970e705c121SKalle Valo 
971e705c121SKalle Valo 		entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
972e705c121SKalle Valo 		/* we can't do much... */
973e705c121SKalle Valo 		if (!entry)
974e705c121SKalle Valo 			return;
975e705c121SKalle Valo 
976e705c121SKalle Valo 		entry->rxb._page = rxb_steal_page(rxb);
977e705c121SKalle Valo 		entry->rxb._offset = rxb->_offset;
978e705c121SKalle Valo 		entry->rxb._rx_page_order = rxb->_rx_page_order;
979e705c121SKalle Valo 		entry->fn = rx_h->fn;
980c9cb14a6SChaya Rachel Ivgi 		entry->context = rx_h->context;
981e705c121SKalle Valo 		spin_lock(&mvm->async_handlers_lock);
982e705c121SKalle Valo 		list_add_tail(&entry->list, &mvm->async_handlers_list);
983e705c121SKalle Valo 		spin_unlock(&mvm->async_handlers_lock);
984e705c121SKalle Valo 		schedule_work(&mvm->async_handlers_wk);
985f2e66c8dSMordechai Goodstein 		return;
986e705c121SKalle Valo 	}
987f2e66c8dSMordechai Goodstein 
988f2e66c8dSMordechai Goodstein 	iwl_fwrt_handle_notification(&mvm->fwrt, rxb);
989e705c121SKalle Valo }
990e705c121SKalle Valo 
991e705c121SKalle Valo static void iwl_mvm_rx(struct iwl_op_mode *op_mode,
992e705c121SKalle Valo 		       struct napi_struct *napi,
993e705c121SKalle Valo 		       struct iwl_rx_cmd_buffer *rxb)
994e705c121SKalle Valo {
995e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
996e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
99761b0f5d7SJohannes Berg 	u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
998e705c121SKalle Valo 
99961b0f5d7SJohannes Berg 	if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
1000e705c121SKalle Valo 		iwl_mvm_rx_rx_mpdu(mvm, napi, rxb);
100161b0f5d7SJohannes Berg 	else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD))
1002e705c121SKalle Valo 		iwl_mvm_rx_rx_phy_cmd(mvm, rxb);
1003e705c121SKalle Valo 	else
1004e705c121SKalle Valo 		iwl_mvm_rx_common(mvm, rxb, pkt);
1005e705c121SKalle Valo }
1006e705c121SKalle Valo 
1007e705c121SKalle Valo static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode,
1008e705c121SKalle Valo 			  struct napi_struct *napi,
1009e705c121SKalle Valo 			  struct iwl_rx_cmd_buffer *rxb)
1010e705c121SKalle Valo {
1011e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1012e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
101361b0f5d7SJohannes Berg 	u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
1014e705c121SKalle Valo 
101561b0f5d7SJohannes Berg 	if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
1016780e87c2SJohannes Berg 		iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);
101761b0f5d7SJohannes Berg 	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
101861b0f5d7SJohannes Berg 					 RX_QUEUES_NOTIFICATION)))
101994bb4481SSara Sharon 		iwl_mvm_rx_queue_notif(mvm, rxb, 0);
102061b0f5d7SJohannes Berg 	else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))
102158035432SJohannes Berg 		iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);
1022e705c121SKalle Valo 	else
1023e705c121SKalle Valo 		iwl_mvm_rx_common(mvm, rxb, pkt);
1024e705c121SKalle Valo }
1025e705c121SKalle Valo 
1026b4f7a9d1SLiad Kaufman void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
1027e705c121SKalle Valo {
1028e705c121SKalle Valo 	int q;
1029e705c121SKalle Valo 
1030e705c121SKalle Valo 	if (WARN_ON_ONCE(!mq))
1031e705c121SKalle Valo 		return;
1032e705c121SKalle Valo 
1033e705c121SKalle Valo 	for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1034e705c121SKalle Valo 		if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) {
1035e705c121SKalle Valo 			IWL_DEBUG_TX_QUEUES(mvm,
1036b4f7a9d1SLiad Kaufman 					    "mac80211 %d already stopped\n", q);
1037e705c121SKalle Valo 			continue;
1038e705c121SKalle Valo 		}
1039e705c121SKalle Valo 
1040e705c121SKalle Valo 		ieee80211_stop_queue(mvm->hw, q);
1041e705c121SKalle Valo 	}
1042e705c121SKalle Valo }
1043e705c121SKalle Valo 
1044156f92f2SEmmanuel Grumbach static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode,
1045156f92f2SEmmanuel Grumbach 			     const struct iwl_device_cmd *cmd)
1046156f92f2SEmmanuel Grumbach {
1047156f92f2SEmmanuel Grumbach 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1048156f92f2SEmmanuel Grumbach 
1049156f92f2SEmmanuel Grumbach 	/*
1050156f92f2SEmmanuel Grumbach 	 * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA
1051156f92f2SEmmanuel Grumbach 	 * commands that need to block the Tx queues.
1052156f92f2SEmmanuel Grumbach 	 */
1053156f92f2SEmmanuel Grumbach 	iwl_trans_block_txq_ptrs(mvm->trans, false);
1054156f92f2SEmmanuel Grumbach }
1055156f92f2SEmmanuel Grumbach 
1056b4f7a9d1SLiad Kaufman static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
1057e705c121SKalle Valo {
1058e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1059e705c121SKalle Valo 	unsigned long mq;
1060e705c121SKalle Valo 
1061e705c121SKalle Valo 	spin_lock_bh(&mvm->queue_info_lock);
106234e10860SSara Sharon 	mq = mvm->hw_queue_to_mac80211[hw_queue];
1063e705c121SKalle Valo 	spin_unlock_bh(&mvm->queue_info_lock);
1064e705c121SKalle Valo 
1065b4f7a9d1SLiad Kaufman 	iwl_mvm_stop_mac_queues(mvm, mq);
1066b4f7a9d1SLiad Kaufman }
1067b4f7a9d1SLiad Kaufman 
1068b4f7a9d1SLiad Kaufman void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
1069b4f7a9d1SLiad Kaufman {
1070b4f7a9d1SLiad Kaufman 	int q;
1071b4f7a9d1SLiad Kaufman 
1072e705c121SKalle Valo 	if (WARN_ON_ONCE(!mq))
1073e705c121SKalle Valo 		return;
1074e705c121SKalle Valo 
1075e705c121SKalle Valo 	for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1076e705c121SKalle Valo 		if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) {
1077e705c121SKalle Valo 			IWL_DEBUG_TX_QUEUES(mvm,
1078b4f7a9d1SLiad Kaufman 					    "mac80211 %d still stopped\n", q);
1079e705c121SKalle Valo 			continue;
1080e705c121SKalle Valo 		}
1081e705c121SKalle Valo 
1082e705c121SKalle Valo 		ieee80211_wake_queue(mvm->hw, q);
1083e705c121SKalle Valo 	}
1084e705c121SKalle Valo }
1085e705c121SKalle Valo 
1086b4f7a9d1SLiad Kaufman static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
1087b4f7a9d1SLiad Kaufman {
1088b4f7a9d1SLiad Kaufman 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1089b4f7a9d1SLiad Kaufman 	unsigned long mq;
1090b4f7a9d1SLiad Kaufman 
1091b4f7a9d1SLiad Kaufman 	spin_lock_bh(&mvm->queue_info_lock);
109234e10860SSara Sharon 	mq = mvm->hw_queue_to_mac80211[hw_queue];
1093b4f7a9d1SLiad Kaufman 	spin_unlock_bh(&mvm->queue_info_lock);
1094b4f7a9d1SLiad Kaufman 
1095b4f7a9d1SLiad Kaufman 	iwl_mvm_start_mac_queues(mvm, mq);
1096b4f7a9d1SLiad Kaufman }
1097b4f7a9d1SLiad Kaufman 
10986ad04359SJohannes Berg static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm)
10996ad04359SJohannes Berg {
11006ad04359SJohannes Berg 	bool state = iwl_mvm_is_radio_killed(mvm);
11016ad04359SJohannes Berg 
11026ad04359SJohannes Berg 	if (state)
11036ad04359SJohannes Berg 		wake_up(&mvm->rx_sync_waitq);
11046ad04359SJohannes Berg 
11056ad04359SJohannes Berg 	wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state);
11066ad04359SJohannes Berg }
11076ad04359SJohannes Berg 
1108e705c121SKalle Valo void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
1109e705c121SKalle Valo {
1110e705c121SKalle Valo 	if (state)
1111e705c121SKalle Valo 		set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1112e705c121SKalle Valo 	else
1113e705c121SKalle Valo 		clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1114e705c121SKalle Valo 
11156ad04359SJohannes Berg 	iwl_mvm_set_rfkill_state(mvm);
1116e705c121SKalle Valo }
1117e705c121SKalle Valo 
1118e705c121SKalle Valo static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
1119e705c121SKalle Valo {
1120e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1121e705c121SKalle Valo 	bool calibrating = ACCESS_ONCE(mvm->calibrating);
1122e705c121SKalle Valo 
1123e705c121SKalle Valo 	if (state)
1124e705c121SKalle Valo 		set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1125e705c121SKalle Valo 	else
1126e705c121SKalle Valo 		clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1127e705c121SKalle Valo 
11286ad04359SJohannes Berg 	iwl_mvm_set_rfkill_state(mvm);
1129e705c121SKalle Valo 
1130e705c121SKalle Valo 	/* iwl_run_init_mvm_ucode is waiting for results, abort it */
1131e705c121SKalle Valo 	if (calibrating)
1132e705c121SKalle Valo 		iwl_abort_notification_waits(&mvm->notif_wait);
1133e705c121SKalle Valo 
1134e705c121SKalle Valo 	/*
1135e705c121SKalle Valo 	 * Stop the device if we run OPERATIONAL firmware or if we are in the
1136e705c121SKalle Valo 	 * middle of the calibrations.
1137e705c121SKalle Valo 	 */
1138702e975dSJohannes Berg 	return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating);
1139e705c121SKalle Valo }
1140e705c121SKalle Valo 
1141e705c121SKalle Valo static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
1142e705c121SKalle Valo {
1143e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1144e705c121SKalle Valo 	struct ieee80211_tx_info *info;
1145e705c121SKalle Valo 
1146e705c121SKalle Valo 	info = IEEE80211_SKB_CB(skb);
1147e705c121SKalle Valo 	iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]);
1148e705c121SKalle Valo 	ieee80211_free_txskb(mvm->hw, skb);
1149e705c121SKalle Valo }
1150e705c121SKalle Valo 
1151e705c121SKalle Valo struct iwl_mvm_reprobe {
1152e705c121SKalle Valo 	struct device *dev;
1153e705c121SKalle Valo 	struct work_struct work;
1154e705c121SKalle Valo };
1155e705c121SKalle Valo 
1156e705c121SKalle Valo static void iwl_mvm_reprobe_wk(struct work_struct *wk)
1157e705c121SKalle Valo {
1158e705c121SKalle Valo 	struct iwl_mvm_reprobe *reprobe;
1159e705c121SKalle Valo 
1160e705c121SKalle Valo 	reprobe = container_of(wk, struct iwl_mvm_reprobe, work);
1161e705c121SKalle Valo 	if (device_reprobe(reprobe->dev))
1162e705c121SKalle Valo 		dev_err(reprobe->dev, "reprobe failed!\n");
1163e705c121SKalle Valo 	kfree(reprobe);
1164e705c121SKalle Valo 	module_put(THIS_MODULE);
1165e705c121SKalle Valo }
1166e705c121SKalle Valo 
1167e705c121SKalle Valo void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
1168e705c121SKalle Valo {
1169e705c121SKalle Valo 	iwl_abort_notification_waits(&mvm->notif_wait);
1170e705c121SKalle Valo 
1171e705c121SKalle Valo 	/*
1172e705c121SKalle Valo 	 * This is a bit racy, but worst case we tell mac80211 about
1173e705c121SKalle Valo 	 * a stopped/aborted scan when that was already done which
1174e705c121SKalle Valo 	 * is not a problem. It is necessary to abort any os scan
1175e705c121SKalle Valo 	 * here because mac80211 requires having the scan cleared
1176e705c121SKalle Valo 	 * before restarting.
1177e705c121SKalle Valo 	 * We'll reset the scan_status to NONE in restart cleanup in
1178e705c121SKalle Valo 	 * the next start() call from mac80211. If restart isn't called
1179e705c121SKalle Valo 	 * (no fw restart) scan status will stay busy.
1180e705c121SKalle Valo 	 */
1181e705c121SKalle Valo 	iwl_mvm_report_scan_aborted(mvm);
1182e705c121SKalle Valo 
1183e705c121SKalle Valo 	/*
1184e705c121SKalle Valo 	 * If we're restarting already, don't cycle restarts.
1185e705c121SKalle Valo 	 * If INIT fw asserted, it will likely fail again.
1186e705c121SKalle Valo 	 * If WoWLAN fw asserted, don't restart either, mac80211
1187e705c121SKalle Valo 	 * can't recover this since we're already half suspended.
1188e705c121SKalle Valo 	 */
11893b37f4c9SJohannes Berg 	if (!mvm->fw_restart && fw_error) {
11907174beb6SJohannes Berg 		iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert,
1191e705c121SKalle Valo 					NULL);
1192bf8b286fSJohannes Berg 	} else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1193e705c121SKalle Valo 		struct iwl_mvm_reprobe *reprobe;
1194e705c121SKalle Valo 
1195e705c121SKalle Valo 		IWL_ERR(mvm,
1196e705c121SKalle Valo 			"Firmware error during reconfiguration - reprobe!\n");
1197e705c121SKalle Valo 
1198e705c121SKalle Valo 		/*
1199e705c121SKalle Valo 		 * get a module reference to avoid doing this while unloading
1200e705c121SKalle Valo 		 * anyway and to avoid scheduling a work with code that's
1201e705c121SKalle Valo 		 * being removed.
1202e705c121SKalle Valo 		 */
1203e705c121SKalle Valo 		if (!try_module_get(THIS_MODULE)) {
1204e705c121SKalle Valo 			IWL_ERR(mvm, "Module is being unloaded - abort\n");
1205e705c121SKalle Valo 			return;
1206e705c121SKalle Valo 		}
1207e705c121SKalle Valo 
1208e705c121SKalle Valo 		reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC);
1209e705c121SKalle Valo 		if (!reprobe) {
1210e705c121SKalle Valo 			module_put(THIS_MODULE);
1211e705c121SKalle Valo 			return;
1212e705c121SKalle Valo 		}
1213e705c121SKalle Valo 		reprobe->dev = mvm->trans->dev;
1214e705c121SKalle Valo 		INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk);
1215e705c121SKalle Valo 		schedule_work(&reprobe->work);
1216702e975dSJohannes Berg 	} else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR &&
12171f370650SSara Sharon 		   mvm->hw_registered) {
1218e705c121SKalle Valo 		/* don't let the transport/FW power down */
1219e705c121SKalle Valo 		iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN);
1220e705c121SKalle Valo 
12213b37f4c9SJohannes Berg 		if (fw_error && mvm->fw_restart > 0)
12223b37f4c9SJohannes Berg 			mvm->fw_restart--;
1223bf8b286fSJohannes Berg 		set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status);
1224e705c121SKalle Valo 		ieee80211_restart_hw(mvm->hw);
1225e705c121SKalle Valo 	}
1226e705c121SKalle Valo }
1227e705c121SKalle Valo 
1228e705c121SKalle Valo static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode)
1229e705c121SKalle Valo {
1230e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1231e705c121SKalle Valo 
1232e705c121SKalle Valo 	iwl_mvm_dump_nic_error_log(mvm);
1233e705c121SKalle Valo 
1234e705c121SKalle Valo 	iwl_mvm_nic_restart(mvm, true);
1235e705c121SKalle Valo }
1236e705c121SKalle Valo 
1237e705c121SKalle Valo static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode)
1238e705c121SKalle Valo {
1239e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1240e705c121SKalle Valo 
1241e705c121SKalle Valo 	WARN_ON(1);
1242e705c121SKalle Valo 	iwl_mvm_nic_restart(mvm, true);
1243e705c121SKalle Valo }
1244e705c121SKalle Valo 
1245e705c121SKalle Valo struct iwl_d0i3_iter_data {
1246e705c121SKalle Valo 	struct iwl_mvm *mvm;
1247a3f7ba5cSEliad Peller 	struct ieee80211_vif *connected_vif;
1248e705c121SKalle Valo 	u8 ap_sta_id;
1249e705c121SKalle Valo 	u8 vif_count;
1250e705c121SKalle Valo 	u8 offloading_tid;
1251e705c121SKalle Valo 	bool disable_offloading;
1252e705c121SKalle Valo };
1253e705c121SKalle Valo 
1254e705c121SKalle Valo static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm,
1255e705c121SKalle Valo 					struct ieee80211_vif *vif,
1256e705c121SKalle Valo 					struct iwl_d0i3_iter_data *iter_data)
1257e705c121SKalle Valo {
1258e705c121SKalle Valo 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1259e705c121SKalle Valo 	struct iwl_mvm_sta *mvmsta;
1260e705c121SKalle Valo 	u32 available_tids = 0;
1261e705c121SKalle Valo 	u8 tid;
1262e705c121SKalle Valo 
1263e705c121SKalle Valo 	if (WARN_ON(vif->type != NL80211_IFTYPE_STATION ||
12640ae98812SSara Sharon 		    mvmvif->ap_sta_id == IWL_MVM_INVALID_STA))
1265e705c121SKalle Valo 		return false;
1266e705c121SKalle Valo 
126713303c0fSSara Sharon 	mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id);
126813303c0fSSara Sharon 	if (!mvmsta)
1269e705c121SKalle Valo 		return false;
1270e705c121SKalle Valo 
1271e705c121SKalle Valo 	spin_lock_bh(&mvmsta->lock);
1272e705c121SKalle Valo 	for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) {
1273e705c121SKalle Valo 		struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
1274e705c121SKalle Valo 
1275e705c121SKalle Valo 		/*
1276e705c121SKalle Valo 		 * in case of pending tx packets, don't use this tid
1277e705c121SKalle Valo 		 * for offloading in order to prevent reuse of the same
1278e705c121SKalle Valo 		 * qos seq counters.
1279e705c121SKalle Valo 		 */
1280dd32162dSLiad Kaufman 		if (iwl_mvm_tid_queued(mvm, tid_data))
1281e705c121SKalle Valo 			continue;
1282e705c121SKalle Valo 
1283e705c121SKalle Valo 		if (tid_data->state != IWL_AGG_OFF)
1284e705c121SKalle Valo 			continue;
1285e705c121SKalle Valo 
1286e705c121SKalle Valo 		available_tids |= BIT(tid);
1287e705c121SKalle Valo 	}
1288e705c121SKalle Valo 	spin_unlock_bh(&mvmsta->lock);
1289e705c121SKalle Valo 
1290e705c121SKalle Valo 	/*
1291e705c121SKalle Valo 	 * disallow protocol offloading if we have no available tid
1292e705c121SKalle Valo 	 * (with no pending frames and no active aggregation,
1293e705c121SKalle Valo 	 * as we don't handle "holes" properly - the scheduler needs the
1294e705c121SKalle Valo 	 * frame's seq number and TFD index to match)
1295e705c121SKalle Valo 	 */
1296e705c121SKalle Valo 	if (!available_tids)
1297e705c121SKalle Valo 		return true;
1298e705c121SKalle Valo 
1299e705c121SKalle Valo 	/* for simplicity, just use the first available tid */
1300e705c121SKalle Valo 	iter_data->offloading_tid = ffs(available_tids) - 1;
1301e705c121SKalle Valo 	return false;
1302e705c121SKalle Valo }
1303e705c121SKalle Valo 
1304e705c121SKalle Valo static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac,
1305e705c121SKalle Valo 					struct ieee80211_vif *vif)
1306e705c121SKalle Valo {
1307e705c121SKalle Valo 	struct iwl_d0i3_iter_data *data = _data;
1308e705c121SKalle Valo 	struct iwl_mvm *mvm = data->mvm;
1309e705c121SKalle Valo 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1310e705c121SKalle Valo 	u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
1311e705c121SKalle Valo 
1312e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr);
1313e705c121SKalle Valo 	if (vif->type != NL80211_IFTYPE_STATION ||
1314e705c121SKalle Valo 	    !vif->bss_conf.assoc)
1315e705c121SKalle Valo 		return;
1316e705c121SKalle Valo 
1317e705c121SKalle Valo 	/*
1318e705c121SKalle Valo 	 * in case of pending tx packets or active aggregations,
1319e705c121SKalle Valo 	 * avoid offloading features in order to prevent reuse of
1320e705c121SKalle Valo 	 * the same qos seq counters.
1321e705c121SKalle Valo 	 */
1322e705c121SKalle Valo 	if (iwl_mvm_disallow_offloading(mvm, vif, data))
1323e705c121SKalle Valo 		data->disable_offloading = true;
1324e705c121SKalle Valo 
1325e705c121SKalle Valo 	iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags);
1326c97dab40SSara Sharon 	iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading,
1327c97dab40SSara Sharon 				   false, flags);
1328e705c121SKalle Valo 
1329e705c121SKalle Valo 	/*
1330e705c121SKalle Valo 	 * on init/association, mvm already configures POWER_TABLE_CMD
1331e705c121SKalle Valo 	 * and REPLY_MCAST_FILTER_CMD, so currently don't
1332e705c121SKalle Valo 	 * reconfigure them (we might want to use different
1333e705c121SKalle Valo 	 * params later on, though).
1334e705c121SKalle Valo 	 */
1335e705c121SKalle Valo 	data->ap_sta_id = mvmvif->ap_sta_id;
1336e705c121SKalle Valo 	data->vif_count++;
1337a3f7ba5cSEliad Peller 
1338a3f7ba5cSEliad Peller 	/*
1339a3f7ba5cSEliad Peller 	 * no new commands can be sent at this stage, so it's safe
1340a3f7ba5cSEliad Peller 	 * to save the vif pointer during d0i3 entrance.
1341a3f7ba5cSEliad Peller 	 */
1342a3f7ba5cSEliad Peller 	data->connected_vif = vif;
1343e705c121SKalle Valo }
1344e705c121SKalle Valo 
1345e705c121SKalle Valo static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm,
1346e705c121SKalle Valo 				    struct iwl_wowlan_config_cmd *cmd,
1347e705c121SKalle Valo 				    struct iwl_d0i3_iter_data *iter_data)
1348e705c121SKalle Valo {
1349e705c121SKalle Valo 	struct ieee80211_sta *ap_sta;
1350e705c121SKalle Valo 	struct iwl_mvm_sta *mvm_ap_sta;
1351e705c121SKalle Valo 
13520ae98812SSara Sharon 	if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA)
1353e705c121SKalle Valo 		return;
1354e705c121SKalle Valo 
1355e705c121SKalle Valo 	rcu_read_lock();
1356e705c121SKalle Valo 
1357e705c121SKalle Valo 	ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]);
1358e705c121SKalle Valo 	if (IS_ERR_OR_NULL(ap_sta))
1359e705c121SKalle Valo 		goto out;
1360e705c121SKalle Valo 
1361e705c121SKalle Valo 	mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta);
1362e705c121SKalle Valo 	cmd->is_11n_connection = ap_sta->ht_cap.ht_supported;
1363e705c121SKalle Valo 	cmd->offloading_tid = iter_data->offloading_tid;
136470b4c536SSara Sharon 	cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING |
13650db056d3SSara Sharon 		ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON;
1366e705c121SKalle Valo 	/*
1367e705c121SKalle Valo 	 * The d0i3 uCode takes care of the nonqos counters,
1368e705c121SKalle Valo 	 * so configure only the qos seq ones.
1369e705c121SKalle Valo 	 */
1370e705c121SKalle Valo 	iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd);
1371e705c121SKalle Valo out:
1372e705c121SKalle Valo 	rcu_read_unlock();
1373e705c121SKalle Valo }
1374e705c121SKalle Valo 
1375e705c121SKalle Valo int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode)
1376e705c121SKalle Valo {
1377e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1378e705c121SKalle Valo 	u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
1379e705c121SKalle Valo 	int ret;
1380e705c121SKalle Valo 	struct iwl_d0i3_iter_data d0i3_iter_data = {
1381e705c121SKalle Valo 		.mvm = mvm,
1382e705c121SKalle Valo 	};
1383e705c121SKalle Valo 	struct iwl_wowlan_config_cmd wowlan_config_cmd = {
1384e705c121SKalle Valo 		.wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME |
1385e705c121SKalle Valo 					     IWL_WOWLAN_WAKEUP_BEACON_MISS |
13860db056d3SSara Sharon 					     IWL_WOWLAN_WAKEUP_LINK_CHANGE),
1387e705c121SKalle Valo 	};
1388e705c121SKalle Valo 	struct iwl_d3_manager_config d3_cfg_cmd = {
1389e705c121SKalle Valo 		.min_sleep_time = cpu_to_le32(1000),
1390e705c121SKalle Valo 		.wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR),
1391e705c121SKalle Valo 	};
1392e705c121SKalle Valo 
1393e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n");
1394e705c121SKalle Valo 
1395702e975dSJohannes Berg 	if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR))
139608f0d23dSEliad Peller 		return -EINVAL;
139708f0d23dSEliad Peller 
1398e705c121SKalle Valo 	set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
1399e705c121SKalle Valo 
1400e705c121SKalle Valo 	/*
1401e705c121SKalle Valo 	 * iwl_mvm_ref_sync takes a reference before checking the flag.
1402e705c121SKalle Valo 	 * so by checking there is no held reference we prevent a state
1403e705c121SKalle Valo 	 * in which iwl_mvm_ref_sync continues successfully while we
1404e705c121SKalle Valo 	 * configure the firmware to enter d0i3
1405e705c121SKalle Valo 	 */
1406e705c121SKalle Valo 	if (iwl_mvm_ref_taken(mvm)) {
1407e705c121SKalle Valo 		IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n");
1408e705c121SKalle Valo 		clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
1409e705c121SKalle Valo 		wake_up(&mvm->d0i3_exit_waitq);
1410e705c121SKalle Valo 		return 1;
1411e705c121SKalle Valo 	}
1412e705c121SKalle Valo 
1413e705c121SKalle Valo 	ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1414e705c121SKalle Valo 						   IEEE80211_IFACE_ITER_NORMAL,
1415e705c121SKalle Valo 						   iwl_mvm_enter_d0i3_iterator,
1416e705c121SKalle Valo 						   &d0i3_iter_data);
1417e705c121SKalle Valo 	if (d0i3_iter_data.vif_count == 1) {
1418e705c121SKalle Valo 		mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id;
1419e705c121SKalle Valo 		mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading;
1420e705c121SKalle Valo 	} else {
1421e705c121SKalle Valo 		WARN_ON_ONCE(d0i3_iter_data.vif_count > 1);
14220ae98812SSara Sharon 		mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
1423e705c121SKalle Valo 		mvm->d0i3_offloading = false;
1424e705c121SKalle Valo 	}
1425e705c121SKalle Valo 
1426e705c121SKalle Valo 	/* make sure we have no running tx while configuring the seqno */
1427e705c121SKalle Valo 	synchronize_net();
1428e705c121SKalle Valo 
1429eb3908d3SLuca Coelho 	/* Flush the hw queues, in case something got queued during entry */
1430d167e81aSMordechai Goodstein 	/* TODO new tx api */
1431d167e81aSMordechai Goodstein 	if (iwl_mvm_has_new_tx_api(mvm)) {
1432d167e81aSMordechai Goodstein 		WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n");
1433d167e81aSMordechai Goodstein 	} else {
1434d167e81aSMordechai Goodstein 		ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm),
1435d167e81aSMordechai Goodstein 					    flags);
1436eb3908d3SLuca Coelho 		if (ret)
1437eb3908d3SLuca Coelho 			return ret;
1438d167e81aSMordechai Goodstein 	}
1439eb3908d3SLuca Coelho 
1440e705c121SKalle Valo 	/* configure wowlan configuration only if needed */
14410ae98812SSara Sharon 	if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) {
14420db056d3SSara Sharon 		/* wake on beacons only if beacon storing isn't supported */
14430db056d3SSara Sharon 		if (!fw_has_capa(&mvm->fw->ucode_capa,
14440db056d3SSara Sharon 				 IWL_UCODE_TLV_CAPA_BEACON_STORING))
14450db056d3SSara Sharon 			wowlan_config_cmd.wakeup_filter |=
14460db056d3SSara Sharon 				cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING);
14470db056d3SSara Sharon 
1448a3f7ba5cSEliad Peller 		iwl_mvm_wowlan_config_key_params(mvm,
1449a3f7ba5cSEliad Peller 						 d0i3_iter_data.connected_vif,
1450a3f7ba5cSEliad Peller 						 true, flags);
1451a3f7ba5cSEliad Peller 
1452e705c121SKalle Valo 		iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd,
1453e705c121SKalle Valo 					&d0i3_iter_data);
1454e705c121SKalle Valo 
1455e705c121SKalle Valo 		ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags,
1456e705c121SKalle Valo 					   sizeof(wowlan_config_cmd),
1457e705c121SKalle Valo 					   &wowlan_config_cmd);
1458e705c121SKalle Valo 		if (ret)
1459e705c121SKalle Valo 			return ret;
1460e705c121SKalle Valo 	}
1461e705c121SKalle Valo 
1462e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD,
1463e705c121SKalle Valo 				    flags | CMD_MAKE_TRANS_IDLE,
1464e705c121SKalle Valo 				    sizeof(d3_cfg_cmd), &d3_cfg_cmd);
1465e705c121SKalle Valo }
1466e705c121SKalle Valo 
1467e705c121SKalle Valo static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac,
1468e705c121SKalle Valo 				       struct ieee80211_vif *vif)
1469e705c121SKalle Valo {
1470e705c121SKalle Valo 	struct iwl_mvm *mvm = _data;
1471e705c121SKalle Valo 	u32 flags = CMD_ASYNC | CMD_HIGH_PRIO;
1472e705c121SKalle Valo 
1473e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr);
1474e705c121SKalle Valo 	if (vif->type != NL80211_IFTYPE_STATION ||
1475e705c121SKalle Valo 	    !vif->bss_conf.assoc)
1476e705c121SKalle Valo 		return;
1477e705c121SKalle Valo 
1478e705c121SKalle Valo 	iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags);
1479e705c121SKalle Valo }
1480e705c121SKalle Valo 
1481a3f7ba5cSEliad Peller struct iwl_mvm_d0i3_exit_work_iter_data {
1482e705c121SKalle Valo 	struct iwl_mvm *mvm;
1483a3f7ba5cSEliad Peller 	struct iwl_wowlan_status *status;
1484e705c121SKalle Valo 	u32 wakeup_reasons;
1485e705c121SKalle Valo };
1486e705c121SKalle Valo 
1487a3f7ba5cSEliad Peller static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac,
1488e705c121SKalle Valo 					struct ieee80211_vif *vif)
1489e705c121SKalle Valo {
1490a3f7ba5cSEliad Peller 	struct iwl_mvm_d0i3_exit_work_iter_data *data = _data;
1491e705c121SKalle Valo 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1492a3f7ba5cSEliad Peller 	u32 reasons = data->wakeup_reasons;
1493e705c121SKalle Valo 
1494a3f7ba5cSEliad Peller 	/* consider only the relevant station interface */
1495a3f7ba5cSEliad Peller 	if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc ||
1496a3f7ba5cSEliad Peller 	    data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id)
1497a3f7ba5cSEliad Peller 		return;
1498a3f7ba5cSEliad Peller 
1499a3f7ba5cSEliad Peller 	if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH)
1500e705c121SKalle Valo 		iwl_mvm_connection_loss(data->mvm, vif, "D0i3");
1501a3f7ba5cSEliad Peller 	else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON)
1502e705c121SKalle Valo 		ieee80211_beacon_loss(vif);
1503a3f7ba5cSEliad Peller 	else
1504a3f7ba5cSEliad Peller 		iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status);
1505e705c121SKalle Valo }
1506e705c121SKalle Valo 
1507e705c121SKalle Valo void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq)
1508e705c121SKalle Valo {
1509e705c121SKalle Valo 	struct ieee80211_sta *sta = NULL;
1510e705c121SKalle Valo 	struct iwl_mvm_sta *mvm_ap_sta;
1511e705c121SKalle Valo 	int i;
1512e705c121SKalle Valo 	bool wake_queues = false;
1513e705c121SKalle Valo 
1514e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1515e705c121SKalle Valo 
1516e705c121SKalle Valo 	spin_lock_bh(&mvm->d0i3_tx_lock);
1517e705c121SKalle Valo 
15180ae98812SSara Sharon 	if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA)
1519e705c121SKalle Valo 		goto out;
1520e705c121SKalle Valo 
1521e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "re-enqueue packets\n");
1522e705c121SKalle Valo 
1523e705c121SKalle Valo 	/* get the sta in order to update seq numbers and re-enqueue skbs */
1524e705c121SKalle Valo 	sta = rcu_dereference_protected(
1525e705c121SKalle Valo 			mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id],
1526e705c121SKalle Valo 			lockdep_is_held(&mvm->mutex));
1527e705c121SKalle Valo 
1528e705c121SKalle Valo 	if (IS_ERR_OR_NULL(sta)) {
1529e705c121SKalle Valo 		sta = NULL;
1530e705c121SKalle Valo 		goto out;
1531e705c121SKalle Valo 	}
1532e705c121SKalle Valo 
1533e705c121SKalle Valo 	if (mvm->d0i3_offloading && qos_seq) {
1534e705c121SKalle Valo 		/* update qos seq numbers if offloading was enabled */
1535e705c121SKalle Valo 		mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta);
1536e705c121SKalle Valo 		for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
1537e705c121SKalle Valo 			u16 seq = le16_to_cpu(qos_seq[i]);
1538e705c121SKalle Valo 			/* firmware stores last-used one, we store next one */
1539e705c121SKalle Valo 			seq += 0x10;
1540e705c121SKalle Valo 			mvm_ap_sta->tid_data[i].seq_number = seq;
1541e705c121SKalle Valo 		}
1542e705c121SKalle Valo 	}
1543e705c121SKalle Valo out:
1544e705c121SKalle Valo 	/* re-enqueue (or drop) all packets */
1545e705c121SKalle Valo 	while (!skb_queue_empty(&mvm->d0i3_tx)) {
1546e705c121SKalle Valo 		struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx);
1547e705c121SKalle Valo 
1548e705c121SKalle Valo 		if (!sta || iwl_mvm_tx_skb(mvm, skb, sta))
1549e705c121SKalle Valo 			ieee80211_free_txskb(mvm->hw, skb);
1550e705c121SKalle Valo 
1551e705c121SKalle Valo 		/* if the skb_queue is not empty, we need to wake queues */
1552e705c121SKalle Valo 		wake_queues = true;
1553e705c121SKalle Valo 	}
1554e705c121SKalle Valo 	clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
1555e705c121SKalle Valo 	wake_up(&mvm->d0i3_exit_waitq);
15560ae98812SSara Sharon 	mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
1557e705c121SKalle Valo 	if (wake_queues)
1558e705c121SKalle Valo 		ieee80211_wake_queues(mvm->hw);
1559e705c121SKalle Valo 
1560e705c121SKalle Valo 	spin_unlock_bh(&mvm->d0i3_tx_lock);
1561e705c121SKalle Valo }
1562e705c121SKalle Valo 
1563e705c121SKalle Valo static void iwl_mvm_d0i3_exit_work(struct work_struct *wk)
1564e705c121SKalle Valo {
1565e705c121SKalle Valo 	struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work);
1566e705c121SKalle Valo 	struct iwl_host_cmd get_status_cmd = {
1567e705c121SKalle Valo 		.id = WOWLAN_GET_STATUSES,
1568e705c121SKalle Valo 		.flags = CMD_HIGH_PRIO | CMD_WANT_SKB,
1569e705c121SKalle Valo 	};
1570a3f7ba5cSEliad Peller 	struct iwl_mvm_d0i3_exit_work_iter_data iter_data = {
1571a3f7ba5cSEliad Peller 		.mvm = mvm,
1572a3f7ba5cSEliad Peller 	};
1573a3f7ba5cSEliad Peller 
1574e705c121SKalle Valo 	struct iwl_wowlan_status *status;
1575e705c121SKalle Valo 	int ret;
1576a3f7ba5cSEliad Peller 	u32 wakeup_reasons = 0;
1577e705c121SKalle Valo 	__le16 *qos_seq = NULL;
1578e705c121SKalle Valo 
1579e705c121SKalle Valo 	mutex_lock(&mvm->mutex);
1580e705c121SKalle Valo 	ret = iwl_mvm_send_cmd(mvm, &get_status_cmd);
1581e705c121SKalle Valo 	if (ret)
1582e705c121SKalle Valo 		goto out;
1583e705c121SKalle Valo 
1584e705c121SKalle Valo 	status = (void *)get_status_cmd.resp_pkt->data;
1585e705c121SKalle Valo 	wakeup_reasons = le32_to_cpu(status->wakeup_reasons);
1586e705c121SKalle Valo 	qos_seq = status->qos_seq_ctr;
1587e705c121SKalle Valo 
1588e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons);
1589e705c121SKalle Valo 
1590a3f7ba5cSEliad Peller 	iter_data.wakeup_reasons = wakeup_reasons;
1591a3f7ba5cSEliad Peller 	iter_data.status = status;
1592a3f7ba5cSEliad Peller 	ieee80211_iterate_active_interfaces(mvm->hw,
1593a3f7ba5cSEliad Peller 					    IEEE80211_IFACE_ITER_NORMAL,
1594a3f7ba5cSEliad Peller 					    iwl_mvm_d0i3_exit_work_iter,
1595a3f7ba5cSEliad Peller 					    &iter_data);
1596e705c121SKalle Valo out:
1597e705c121SKalle Valo 	iwl_mvm_d0i3_enable_tx(mvm, qos_seq);
1598e705c121SKalle Valo 
1599e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n",
1600e705c121SKalle Valo 		       wakeup_reasons);
1601e705c121SKalle Valo 
1602e705c121SKalle Valo 	/* qos_seq might point inside resp_pkt, so free it only now */
1603e705c121SKalle Valo 	if (get_status_cmd.resp_pkt)
1604e705c121SKalle Valo 		iwl_free_resp(&get_status_cmd);
1605e705c121SKalle Valo 
1606e705c121SKalle Valo 	/* the FW might have updated the regdomain */
1607e705c121SKalle Valo 	iwl_mvm_update_changed_regdom(mvm);
1608e705c121SKalle Valo 
1609e705c121SKalle Valo 	iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK);
1610e705c121SKalle Valo 	mutex_unlock(&mvm->mutex);
1611e705c121SKalle Valo }
1612e705c121SKalle Valo 
1613e705c121SKalle Valo int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm)
1614e705c121SKalle Valo {
1615e705c121SKalle Valo 	u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE |
1616e705c121SKalle Valo 		    CMD_WAKE_UP_TRANS;
1617e705c121SKalle Valo 	int ret;
1618e705c121SKalle Valo 
1619e705c121SKalle Valo 	IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n");
1620e705c121SKalle Valo 
1621702e975dSJohannes Berg 	if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR))
162208f0d23dSEliad Peller 		return -EINVAL;
162308f0d23dSEliad Peller 
1624e705c121SKalle Valo 	mutex_lock(&mvm->d0i3_suspend_mutex);
1625e705c121SKalle Valo 	if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) {
1626e705c121SKalle Valo 		IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n");
1627e705c121SKalle Valo 		__set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags);
1628e705c121SKalle Valo 		mutex_unlock(&mvm->d0i3_suspend_mutex);
1629e705c121SKalle Valo 		return 0;
1630e705c121SKalle Valo 	}
1631e705c121SKalle Valo 	mutex_unlock(&mvm->d0i3_suspend_mutex);
1632e705c121SKalle Valo 
1633e705c121SKalle Valo 	ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL);
1634e705c121SKalle Valo 	if (ret)
1635e705c121SKalle Valo 		goto out;
1636e705c121SKalle Valo 
1637e705c121SKalle Valo 	ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1638e705c121SKalle Valo 						   IEEE80211_IFACE_ITER_NORMAL,
1639e705c121SKalle Valo 						   iwl_mvm_exit_d0i3_iterator,
1640e705c121SKalle Valo 						   mvm);
1641e705c121SKalle Valo out:
1642e705c121SKalle Valo 	schedule_work(&mvm->d0i3_exit_work);
1643e705c121SKalle Valo 	return ret;
1644e705c121SKalle Valo }
1645e705c121SKalle Valo 
1646e705c121SKalle Valo int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode)
1647e705c121SKalle Valo {
1648e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1649e705c121SKalle Valo 
1650e705c121SKalle Valo 	iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK);
1651e705c121SKalle Valo 	return _iwl_mvm_exit_d0i3(mvm);
1652e705c121SKalle Valo }
1653e705c121SKalle Valo 
1654e705c121SKalle Valo #define IWL_MVM_COMMON_OPS					\
1655e705c121SKalle Valo 	/* these could be differentiated */			\
1656156f92f2SEmmanuel Grumbach 	.async_cb = iwl_mvm_async_cb,				\
1657e705c121SKalle Valo 	.queue_full = iwl_mvm_stop_sw_queue,			\
1658e705c121SKalle Valo 	.queue_not_full = iwl_mvm_wake_sw_queue,		\
1659e705c121SKalle Valo 	.hw_rf_kill = iwl_mvm_set_hw_rfkill_state,		\
1660e705c121SKalle Valo 	.free_skb = iwl_mvm_free_skb,				\
1661e705c121SKalle Valo 	.nic_error = iwl_mvm_nic_error,				\
1662e705c121SKalle Valo 	.cmd_queue_full = iwl_mvm_cmd_queue_full,		\
1663e705c121SKalle Valo 	.nic_config = iwl_mvm_nic_config,			\
1664e705c121SKalle Valo 	.enter_d0i3 = iwl_mvm_enter_d0i3,			\
1665e705c121SKalle Valo 	.exit_d0i3 = iwl_mvm_exit_d0i3,				\
1666e705c121SKalle Valo 	/* as we only register one, these MUST be common! */	\
1667e705c121SKalle Valo 	.start = iwl_op_mode_mvm_start,				\
1668e705c121SKalle Valo 	.stop = iwl_op_mode_mvm_stop
1669e705c121SKalle Valo 
1670e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops = {
1671e705c121SKalle Valo 	IWL_MVM_COMMON_OPS,
1672e705c121SKalle Valo 	.rx = iwl_mvm_rx,
1673e705c121SKalle Valo };
1674e705c121SKalle Valo 
1675e705c121SKalle Valo static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode,
1676e705c121SKalle Valo 			      struct napi_struct *napi,
1677e705c121SKalle Valo 			      struct iwl_rx_cmd_buffer *rxb,
1678e705c121SKalle Valo 			      unsigned int queue)
1679e705c121SKalle Valo {
1680e705c121SKalle Valo 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1681585a6fccSSara Sharon 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
168261b0f5d7SJohannes Berg 	u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
1683e705c121SKalle Valo 
168461b0f5d7SJohannes Berg 	if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)))
1685a338384bSSara Sharon 		iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);
168661b0f5d7SJohannes Berg 	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
168761b0f5d7SJohannes Berg 					 RX_QUEUES_NOTIFICATION)))
168894bb4481SSara Sharon 		iwl_mvm_rx_queue_notif(mvm, rxb, queue);
168961b0f5d7SJohannes Berg 	else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
1690780e87c2SJohannes Berg 		iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);
1691e705c121SKalle Valo }
1692e705c121SKalle Valo 
1693e705c121SKalle Valo static const struct iwl_op_mode_ops iwl_mvm_ops_mq = {
1694e705c121SKalle Valo 	IWL_MVM_COMMON_OPS,
1695e705c121SKalle Valo 	.rx = iwl_mvm_rx_mq,
1696e705c121SKalle Valo 	.rx_rss = iwl_mvm_rx_mq_rss,
1697e705c121SKalle Valo };
1698