1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 Intel Deutschland GmbH 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24 * USA 25 * 26 * The full GNU General Public License is included in this distribution 27 * in the file called COPYING. 28 * 29 * Contact Information: 30 * Intel Linux Wireless <linuxwifi@intel.com> 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32 * 33 * BSD LICENSE 34 * 35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 37 * Copyright(c) 2016 Intel Deutschland GmbH 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 44 * * Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * * Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in 48 * the documentation and/or other materials provided with the 49 * distribution. 50 * * Neither the name Intel Corporation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 *****************************************************************************/ 67 #include <linux/firmware.h> 68 #include <linux/rtnetlink.h> 69 #include <linux/acpi.h> 70 #include "iwl-trans.h" 71 #include "iwl-csr.h" 72 #include "mvm.h" 73 #include "iwl-eeprom-parse.h" 74 #include "iwl-eeprom-read.h" 75 #include "iwl-nvm-parse.h" 76 #include "iwl-prph.h" 77 78 /* Default NVM size to read */ 79 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024) 80 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 81 #define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc 82 83 #define NVM_WRITE_OPCODE 1 84 #define NVM_READ_OPCODE 0 85 86 /* load nvm chunk response */ 87 enum { 88 READ_NVM_CHUNK_SUCCEED = 0, 89 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1 90 }; 91 92 /* 93 * prepare the NVM host command w/ the pointers to the nvm buffer 94 * and send it to fw 95 */ 96 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section, 97 u16 offset, u16 length, const u8 *data) 98 { 99 struct iwl_nvm_access_cmd nvm_access_cmd = { 100 .offset = cpu_to_le16(offset), 101 .length = cpu_to_le16(length), 102 .type = cpu_to_le16(section), 103 .op_code = NVM_WRITE_OPCODE, 104 }; 105 struct iwl_host_cmd cmd = { 106 .id = NVM_ACCESS_CMD, 107 .len = { sizeof(struct iwl_nvm_access_cmd), length }, 108 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 109 .data = { &nvm_access_cmd, data }, 110 /* data may come from vmalloc, so use _DUP */ 111 .dataflags = { 0, IWL_HCMD_DFL_DUP }, 112 }; 113 struct iwl_rx_packet *pkt; 114 struct iwl_nvm_access_resp *nvm_resp; 115 int ret; 116 117 ret = iwl_mvm_send_cmd(mvm, &cmd); 118 if (ret) 119 return ret; 120 121 pkt = cmd.resp_pkt; 122 if (!pkt) { 123 IWL_ERR(mvm, "Error in NVM_ACCESS response\n"); 124 return -EINVAL; 125 } 126 /* Extract & check NVM write response */ 127 nvm_resp = (void *)pkt->data; 128 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) { 129 IWL_ERR(mvm, 130 "NVM access write command failed for section %u (status = 0x%x)\n", 131 section, le16_to_cpu(nvm_resp->status)); 132 ret = -EIO; 133 } 134 135 iwl_free_resp(&cmd); 136 return ret; 137 } 138 139 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section, 140 u16 offset, u16 length, u8 *data) 141 { 142 struct iwl_nvm_access_cmd nvm_access_cmd = { 143 .offset = cpu_to_le16(offset), 144 .length = cpu_to_le16(length), 145 .type = cpu_to_le16(section), 146 .op_code = NVM_READ_OPCODE, 147 }; 148 struct iwl_nvm_access_resp *nvm_resp; 149 struct iwl_rx_packet *pkt; 150 struct iwl_host_cmd cmd = { 151 .id = NVM_ACCESS_CMD, 152 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 153 .data = { &nvm_access_cmd, }, 154 }; 155 int ret, bytes_read, offset_read; 156 u8 *resp_data; 157 158 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd); 159 160 ret = iwl_mvm_send_cmd(mvm, &cmd); 161 if (ret) 162 return ret; 163 164 pkt = cmd.resp_pkt; 165 166 /* Extract NVM response */ 167 nvm_resp = (void *)pkt->data; 168 ret = le16_to_cpu(nvm_resp->status); 169 bytes_read = le16_to_cpu(nvm_resp->length); 170 offset_read = le16_to_cpu(nvm_resp->offset); 171 resp_data = nvm_resp->data; 172 if (ret) { 173 if ((offset != 0) && 174 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) { 175 /* 176 * meaning of NOT_VALID_ADDRESS: 177 * driver try to read chunk from address that is 178 * multiple of 2K and got an error since addr is empty. 179 * meaning of (offset != 0): driver already 180 * read valid data from another chunk so this case 181 * is not an error. 182 */ 183 IWL_DEBUG_EEPROM(mvm->trans->dev, 184 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n", 185 offset); 186 ret = 0; 187 } else { 188 IWL_DEBUG_EEPROM(mvm->trans->dev, 189 "NVM access command failed with status %d (device: %s)\n", 190 ret, mvm->cfg->name); 191 ret = -EIO; 192 } 193 goto exit; 194 } 195 196 if (offset_read != offset) { 197 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n", 198 offset_read); 199 ret = -EINVAL; 200 goto exit; 201 } 202 203 /* Write data to NVM */ 204 memcpy(data + offset, resp_data, bytes_read); 205 ret = bytes_read; 206 207 exit: 208 iwl_free_resp(&cmd); 209 return ret; 210 } 211 212 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section, 213 const u8 *data, u16 length) 214 { 215 int offset = 0; 216 217 /* copy data in chunks of 2k (and remainder if any) */ 218 219 while (offset < length) { 220 int chunk_size, ret; 221 222 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE, 223 length - offset); 224 225 ret = iwl_nvm_write_chunk(mvm, section, offset, 226 chunk_size, data + offset); 227 if (ret < 0) 228 return ret; 229 230 offset += chunk_size; 231 } 232 233 return 0; 234 } 235 236 static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section, 237 u8 *data, unsigned int len) 238 { 239 #define IWL_4165_DEVICE_ID 0x5501 240 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 241 242 if (section == NVM_SECTION_TYPE_PHY_SKU && 243 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 244 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 245 /* OTP 0x52 bug work around: it's a 1x1 device */ 246 data[3] = ANT_B | (ANT_B << 4); 247 } 248 249 /* 250 * Reads an NVM section completely. 251 * NICs prior to 7000 family doesn't have a real NVM, but just read 252 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 253 * by uCode, we need to manually check in this case that we don't 254 * overflow and try to read more than the EEPROM size. 255 * For 7000 family NICs, we supply the maximal size we can read, and 256 * the uCode fills the response with as much data as we can, 257 * without overflowing, so no check is needed. 258 */ 259 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section, 260 u8 *data, u32 size_read) 261 { 262 u16 length, offset = 0; 263 int ret; 264 265 /* Set nvm section read length */ 266 length = IWL_NVM_DEFAULT_CHUNK_SIZE; 267 268 ret = length; 269 270 /* Read the NVM until exhausted (reading less than requested) */ 271 while (ret == length) { 272 /* Check no memory assumptions fail and cause an overflow */ 273 if ((size_read + offset + length) > 274 mvm->cfg->base_params->eeprom_size) { 275 IWL_ERR(mvm, "EEPROM size is too small for NVM\n"); 276 return -ENOBUFS; 277 } 278 279 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data); 280 if (ret < 0) { 281 IWL_DEBUG_EEPROM(mvm->trans->dev, 282 "Cannot read NVM from section %d offset %d, length %d\n", 283 section, offset, length); 284 return ret; 285 } 286 offset += ret; 287 } 288 289 iwl_mvm_nvm_fixups(mvm, section, data, offset); 290 291 IWL_DEBUG_EEPROM(mvm->trans->dev, 292 "NVM section %d read completed\n", section); 293 return offset; 294 } 295 296 static struct iwl_nvm_data * 297 iwl_parse_nvm_sections(struct iwl_mvm *mvm) 298 { 299 struct iwl_nvm_section *sections = mvm->nvm_sections; 300 const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku; 301 bool lar_enabled; 302 303 /* Checking for required sections */ 304 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) { 305 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 306 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) { 307 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n"); 308 return NULL; 309 } 310 } else { 311 /* SW and REGULATORY sections are mandatory */ 312 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 313 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) { 314 IWL_ERR(mvm, 315 "Can't parse empty family 8000 OTP/NVM sections\n"); 316 return NULL; 317 } 318 /* MAC_OVERRIDE or at least HW section must exist */ 319 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data && 320 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) { 321 IWL_ERR(mvm, 322 "Can't parse mac_address, empty sections\n"); 323 return NULL; 324 } 325 326 /* PHY_SKU section is mandatory in B0 */ 327 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) { 328 IWL_ERR(mvm, 329 "Can't parse phy_sku in B0, empty sections\n"); 330 return NULL; 331 } 332 } 333 334 if (WARN_ON(!mvm->cfg)) 335 return NULL; 336 337 hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data; 338 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data; 339 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data; 340 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data; 341 mac_override = 342 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data; 343 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data; 344 345 lar_enabled = !iwlwifi_mod_params.lar_disable && 346 fw_has_capa(&mvm->fw->ucode_capa, 347 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 348 349 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib, 350 regulatory, mac_override, phy_sku, 351 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant, 352 lar_enabled); 353 } 354 355 #define MAX_NVM_FILE_LEN 16384 356 357 /* 358 * Reads external NVM from a file into mvm->nvm_sections 359 * 360 * HOW TO CREATE THE NVM FILE FORMAT: 361 * ------------------------------ 362 * 1. create hex file, format: 363 * 3800 -> header 364 * 0000 -> header 365 * 5a40 -> data 366 * 367 * rev - 6 bit (word1) 368 * len - 10 bit (word1) 369 * id - 4 bit (word2) 370 * rsv - 12 bit (word2) 371 * 372 * 2. flip 8bits with 8 bits per line to get the right NVM file format 373 * 374 * 3. create binary file from the hex file 375 * 376 * 4. save as "iNVM_xxx.bin" under /lib/firmware 377 */ 378 static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm) 379 { 380 int ret, section_size; 381 u16 section_id; 382 const struct firmware *fw_entry; 383 const struct { 384 __le16 word1; 385 __le16 word2; 386 u8 data[]; 387 } *file_sec; 388 const u8 *eof; 389 u8 *temp; 390 int max_section_size; 391 const __le32 *dword_buff; 392 393 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 394 #define NVM_WORD2_ID(x) (x >> 12) 395 #define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8)) 396 #define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4) 397 #define NVM_HEADER_0 (0x2A504C54) 398 #define NVM_HEADER_1 (0x4E564D2A) 399 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 400 401 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n"); 402 403 /* Maximal size depends on HW family and step */ 404 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) 405 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 406 else 407 max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE; 408 409 /* 410 * Obtain NVM image via request_firmware. Since we already used 411 * request_firmware_nowait() for the firmware binary load and only 412 * get here after that we assume the NVM request can be satisfied 413 * synchronously. 414 */ 415 ret = request_firmware(&fw_entry, mvm->nvm_file_name, 416 mvm->trans->dev); 417 if (ret) { 418 IWL_ERR(mvm, "ERROR: %s isn't available %d\n", 419 mvm->nvm_file_name, ret); 420 return ret; 421 } 422 423 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n", 424 mvm->nvm_file_name, fw_entry->size); 425 426 if (fw_entry->size > MAX_NVM_FILE_LEN) { 427 IWL_ERR(mvm, "NVM file too large\n"); 428 ret = -EINVAL; 429 goto out; 430 } 431 432 eof = fw_entry->data + fw_entry->size; 433 dword_buff = (__le32 *)fw_entry->data; 434 435 /* some NVM file will contain a header. 436 * The header is identified by 2 dwords header as follow: 437 * dword[0] = 0x2A504C54 438 * dword[1] = 0x4E564D2A 439 * 440 * This header must be skipped when providing the NVM data to the FW. 441 */ 442 if (fw_entry->size > NVM_HEADER_SIZE && 443 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 444 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 445 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE); 446 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 447 IWL_INFO(mvm, "NVM Manufacturing date %08X\n", 448 le32_to_cpu(dword_buff[3])); 449 450 /* nvm file validation, dword_buff[2] holds the file version */ 451 if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP && 452 le32_to_cpu(dword_buff[2]) < 0xE4A) || 453 (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP && 454 le32_to_cpu(dword_buff[2]) >= 0xE4A)) { 455 ret = -EFAULT; 456 goto out; 457 } 458 } else { 459 file_sec = (void *)fw_entry->data; 460 } 461 462 while (true) { 463 if (file_sec->data > eof) { 464 IWL_ERR(mvm, 465 "ERROR - NVM file too short for section header\n"); 466 ret = -EINVAL; 467 break; 468 } 469 470 /* check for EOF marker */ 471 if (!file_sec->word1 && !file_sec->word2) { 472 ret = 0; 473 break; 474 } 475 476 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) { 477 section_size = 478 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 479 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 480 } else { 481 section_size = 2 * NVM_WORD2_LEN_FAMILY_8000( 482 le16_to_cpu(file_sec->word2)); 483 section_id = NVM_WORD1_ID_FAMILY_8000( 484 le16_to_cpu(file_sec->word1)); 485 } 486 487 if (section_size > max_section_size) { 488 IWL_ERR(mvm, "ERROR - section too large (%d)\n", 489 section_size); 490 ret = -EINVAL; 491 break; 492 } 493 494 if (!section_size) { 495 IWL_ERR(mvm, "ERROR - section empty\n"); 496 ret = -EINVAL; 497 break; 498 } 499 500 if (file_sec->data + section_size > eof) { 501 IWL_ERR(mvm, 502 "ERROR - NVM file too short for section (%d bytes)\n", 503 section_size); 504 ret = -EINVAL; 505 break; 506 } 507 508 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 509 "Invalid NVM section ID %d\n", section_id)) { 510 ret = -EINVAL; 511 break; 512 } 513 514 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 515 if (!temp) { 516 ret = -ENOMEM; 517 break; 518 } 519 520 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size); 521 522 kfree(mvm->nvm_sections[section_id].data); 523 mvm->nvm_sections[section_id].data = temp; 524 mvm->nvm_sections[section_id].length = section_size; 525 526 /* advance to the next section */ 527 file_sec = (void *)(file_sec->data + section_size); 528 } 529 out: 530 release_firmware(fw_entry); 531 return ret; 532 } 533 534 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */ 535 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm) 536 { 537 int i, ret = 0; 538 struct iwl_nvm_section *sections = mvm->nvm_sections; 539 540 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n"); 541 542 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) { 543 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length) 544 continue; 545 ret = iwl_nvm_write_section(mvm, i, sections[i].data, 546 sections[i].length); 547 if (ret < 0) { 548 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret); 549 break; 550 } 551 } 552 return ret; 553 } 554 555 int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic) 556 { 557 int ret, section; 558 u32 size_read = 0; 559 u8 *nvm_buffer, *temp; 560 const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step; 561 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step; 562 563 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS)) 564 return -EINVAL; 565 566 /* load NVM values from nic */ 567 if (read_nvm_from_nic) { 568 /* Read From FW NVM */ 569 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n"); 570 571 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size, 572 GFP_KERNEL); 573 if (!nvm_buffer) 574 return -ENOMEM; 575 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) { 576 /* we override the constness for initial read */ 577 ret = iwl_nvm_read_section(mvm, section, nvm_buffer, 578 size_read); 579 if (ret < 0) 580 continue; 581 size_read += ret; 582 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL); 583 if (!temp) { 584 ret = -ENOMEM; 585 break; 586 } 587 588 iwl_mvm_nvm_fixups(mvm, section, temp, ret); 589 590 mvm->nvm_sections[section].data = temp; 591 mvm->nvm_sections[section].length = ret; 592 593 #ifdef CONFIG_IWLWIFI_DEBUGFS 594 switch (section) { 595 case NVM_SECTION_TYPE_SW: 596 mvm->nvm_sw_blob.data = temp; 597 mvm->nvm_sw_blob.size = ret; 598 break; 599 case NVM_SECTION_TYPE_CALIBRATION: 600 mvm->nvm_calib_blob.data = temp; 601 mvm->nvm_calib_blob.size = ret; 602 break; 603 case NVM_SECTION_TYPE_PRODUCTION: 604 mvm->nvm_prod_blob.data = temp; 605 mvm->nvm_prod_blob.size = ret; 606 break; 607 case NVM_SECTION_TYPE_PHY_SKU: 608 mvm->nvm_phy_sku_blob.data = temp; 609 mvm->nvm_phy_sku_blob.size = ret; 610 break; 611 default: 612 if (section == mvm->cfg->nvm_hw_section_num) { 613 mvm->nvm_hw_blob.data = temp; 614 mvm->nvm_hw_blob.size = ret; 615 break; 616 } 617 } 618 #endif 619 } 620 if (!size_read) 621 IWL_ERR(mvm, "OTP is blank\n"); 622 kfree(nvm_buffer); 623 } 624 625 /* Only if PNVM selected in the mod param - load external NVM */ 626 if (mvm->nvm_file_name) { 627 /* read External NVM file from the mod param */ 628 ret = iwl_mvm_read_external_nvm(mvm); 629 if (ret) { 630 /* choose the nvm_file name according to the 631 * HW step 632 */ 633 if (CSR_HW_REV_STEP(mvm->trans->hw_rev) == 634 SILICON_B_STEP) 635 mvm->nvm_file_name = nvm_file_B; 636 else 637 mvm->nvm_file_name = nvm_file_C; 638 639 if ((ret == -EFAULT || ret == -ENOENT) && 640 mvm->nvm_file_name) { 641 /* in case nvm file was failed try again */ 642 ret = iwl_mvm_read_external_nvm(mvm); 643 if (ret) 644 return ret; 645 } else { 646 return ret; 647 } 648 } 649 } 650 651 /* parse the relevant nvm sections */ 652 mvm->nvm_data = iwl_parse_nvm_sections(mvm); 653 if (!mvm->nvm_data) 654 return -ENODATA; 655 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n", 656 mvm->nvm_data->nvm_version); 657 658 return 0; 659 } 660 661 struct iwl_mcc_update_resp * 662 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2, 663 enum iwl_mcc_source src_id) 664 { 665 struct iwl_mcc_update_cmd mcc_update_cmd = { 666 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]), 667 .source_id = (u8)src_id, 668 }; 669 struct iwl_mcc_update_resp *resp_cp; 670 struct iwl_rx_packet *pkt; 671 struct iwl_host_cmd cmd = { 672 .id = MCC_UPDATE_CMD, 673 .flags = CMD_WANT_SKB, 674 .data = { &mcc_update_cmd }, 675 }; 676 677 int ret; 678 u32 status; 679 int resp_len, n_channels; 680 u16 mcc; 681 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa, 682 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2); 683 684 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 685 return ERR_PTR(-EOPNOTSUPP); 686 687 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd); 688 if (!resp_v2) 689 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1); 690 691 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n", 692 alpha2[0], alpha2[1], src_id); 693 694 ret = iwl_mvm_send_cmd(mvm, &cmd); 695 if (ret) 696 return ERR_PTR(ret); 697 698 pkt = cmd.resp_pkt; 699 700 /* Extract MCC response */ 701 if (resp_v2) { 702 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data; 703 704 n_channels = __le32_to_cpu(mcc_resp->n_channels); 705 resp_len = sizeof(struct iwl_mcc_update_resp) + 706 n_channels * sizeof(__le32); 707 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL); 708 } else { 709 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data; 710 711 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels); 712 resp_len = sizeof(struct iwl_mcc_update_resp) + 713 n_channels * sizeof(__le32); 714 resp_cp = kzalloc(resp_len, GFP_KERNEL); 715 716 if (resp_cp) { 717 resp_cp->status = mcc_resp_v1->status; 718 resp_cp->mcc = mcc_resp_v1->mcc; 719 resp_cp->cap = mcc_resp_v1->cap; 720 resp_cp->source_id = mcc_resp_v1->source_id; 721 resp_cp->n_channels = mcc_resp_v1->n_channels; 722 memcpy(resp_cp->channels, mcc_resp_v1->channels, 723 n_channels * sizeof(__le32)); 724 } 725 } 726 727 if (!resp_cp) { 728 ret = -ENOMEM; 729 goto exit; 730 } 731 732 status = le32_to_cpu(resp_cp->status); 733 734 mcc = le16_to_cpu(resp_cp->mcc); 735 736 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */ 737 if (mcc == 0) { 738 mcc = 0x3030; /* "00" - world */ 739 resp_cp->mcc = cpu_to_le16(mcc); 740 } 741 742 IWL_DEBUG_LAR(mvm, 743 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n", 744 status, mcc, mcc >> 8, mcc & 0xff, 745 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels); 746 747 exit: 748 iwl_free_resp(&cmd); 749 if (ret) 750 return ERR_PTR(ret); 751 return resp_cp; 752 } 753 754 #ifdef CONFIG_ACPI 755 #define WRD_METHOD "WRDD" 756 #define WRDD_WIFI (0x07) 757 #define WRDD_WIGIG (0x10) 758 759 static u32 iwl_mvm_wrdd_get_mcc(struct iwl_mvm *mvm, union acpi_object *wrdd) 760 { 761 union acpi_object *mcc_pkg, *domain_type, *mcc_value; 762 u32 i; 763 764 if (wrdd->type != ACPI_TYPE_PACKAGE || 765 wrdd->package.count < 2 || 766 wrdd->package.elements[0].type != ACPI_TYPE_INTEGER || 767 wrdd->package.elements[0].integer.value != 0) { 768 IWL_DEBUG_LAR(mvm, "Unsupported wrdd structure\n"); 769 return 0; 770 } 771 772 for (i = 1 ; i < wrdd->package.count ; ++i) { 773 mcc_pkg = &wrdd->package.elements[i]; 774 775 if (mcc_pkg->type != ACPI_TYPE_PACKAGE || 776 mcc_pkg->package.count < 2 || 777 mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER || 778 mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { 779 mcc_pkg = NULL; 780 continue; 781 } 782 783 domain_type = &mcc_pkg->package.elements[0]; 784 if (domain_type->integer.value == WRDD_WIFI) 785 break; 786 787 mcc_pkg = NULL; 788 } 789 790 if (mcc_pkg) { 791 mcc_value = &mcc_pkg->package.elements[1]; 792 return mcc_value->integer.value; 793 } 794 795 return 0; 796 } 797 798 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc) 799 { 800 acpi_handle root_handle; 801 acpi_handle handle; 802 struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL}; 803 acpi_status status; 804 u32 mcc_val; 805 806 root_handle = ACPI_HANDLE(mvm->dev); 807 if (!root_handle) { 808 IWL_DEBUG_LAR(mvm, 809 "Could not retrieve root port ACPI handle\n"); 810 return -ENOENT; 811 } 812 813 /* Get the method's handle */ 814 status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle); 815 if (ACPI_FAILURE(status)) { 816 IWL_DEBUG_LAR(mvm, "WRD method not found\n"); 817 return -ENOENT; 818 } 819 820 /* Call WRDD with no arguments */ 821 status = acpi_evaluate_object(handle, NULL, NULL, &wrdd); 822 if (ACPI_FAILURE(status)) { 823 IWL_DEBUG_LAR(mvm, "WRDC invocation failed (0x%x)\n", status); 824 return -ENOENT; 825 } 826 827 mcc_val = iwl_mvm_wrdd_get_mcc(mvm, wrdd.pointer); 828 kfree(wrdd.pointer); 829 if (!mcc_val) 830 return -ENOENT; 831 832 mcc[0] = (mcc_val >> 8) & 0xff; 833 mcc[1] = mcc_val & 0xff; 834 mcc[2] = '\0'; 835 return 0; 836 } 837 #else /* CONFIG_ACPI */ 838 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc) 839 { 840 return -ENOENT; 841 } 842 #endif 843 844 int iwl_mvm_init_mcc(struct iwl_mvm *mvm) 845 { 846 bool tlv_lar; 847 bool nvm_lar; 848 int retval; 849 struct ieee80211_regdomain *regd; 850 char mcc[3]; 851 852 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) { 853 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa, 854 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 855 nvm_lar = mvm->nvm_data->lar_enabled; 856 if (tlv_lar != nvm_lar) 857 IWL_INFO(mvm, 858 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n", 859 tlv_lar ? "enabled" : "disabled", 860 nvm_lar ? "enabled" : "disabled"); 861 } 862 863 if (!iwl_mvm_is_lar_supported(mvm)) 864 return 0; 865 866 /* 867 * try to replay the last set MCC to FW. If it doesn't exist, 868 * queue an update to cfg80211 to retrieve the default alpha2 from FW. 869 */ 870 retval = iwl_mvm_init_fw_regd(mvm); 871 if (retval != -ENOENT) 872 return retval; 873 874 /* 875 * Driver regulatory hint for initial update, this also informs the 876 * firmware we support wifi location updates. 877 * Disallow scans that might crash the FW while the LAR regdomain 878 * is not set. 879 */ 880 mvm->lar_regdom_set = false; 881 882 regd = iwl_mvm_get_current_regdomain(mvm, NULL); 883 if (IS_ERR_OR_NULL(regd)) 884 return -EIO; 885 886 if (iwl_mvm_is_wifi_mcc_supported(mvm) && 887 !iwl_mvm_get_bios_mcc(mvm, mcc)) { 888 kfree(regd); 889 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, 890 MCC_SOURCE_BIOS, NULL); 891 if (IS_ERR_OR_NULL(regd)) 892 return -EIO; 893 } 894 895 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd); 896 kfree(regd); 897 return retval; 898 } 899 900 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm, 901 struct iwl_rx_cmd_buffer *rxb) 902 { 903 struct iwl_rx_packet *pkt = rxb_addr(rxb); 904 struct iwl_mcc_chub_notif *notif = (void *)pkt->data; 905 enum iwl_mcc_source src; 906 char mcc[3]; 907 struct ieee80211_regdomain *regd; 908 909 lockdep_assert_held(&mvm->mutex); 910 911 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 912 return; 913 914 mcc[0] = notif->mcc >> 8; 915 mcc[1] = notif->mcc & 0xff; 916 mcc[2] = '\0'; 917 src = notif->source_id; 918 919 IWL_DEBUG_LAR(mvm, 920 "RX: received chub update mcc cmd (mcc '%s' src %d)\n", 921 mcc, src); 922 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL); 923 if (IS_ERR_OR_NULL(regd)) 924 return; 925 926 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd); 927 kfree(regd); 928 } 929