1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 25 * USA 26 * 27 * The full GNU General Public License is included in this distribution 28 * in the file called COPYING. 29 * 30 * Contact Information: 31 * Intel Linux Wireless <linuxwifi@intel.com> 32 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33 * 34 * BSD LICENSE 35 * 36 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 37 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 38 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 39 * Copyright(c) 2018 Intel Corporation 40 * All rights reserved. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 46 * * Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * * Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in 50 * the documentation and/or other materials provided with the 51 * distribution. 52 * * Neither the name Intel Corporation nor the names of its 53 * contributors may be used to endorse or promote products derived 54 * from this software without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 57 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 58 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 59 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 60 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 62 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 66 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 * 68 *****************************************************************************/ 69 #include <linux/firmware.h> 70 #include <linux/rtnetlink.h> 71 #include "iwl-trans.h" 72 #include "iwl-csr.h" 73 #include "mvm.h" 74 #include "iwl-eeprom-parse.h" 75 #include "iwl-eeprom-read.h" 76 #include "iwl-nvm-parse.h" 77 #include "iwl-prph.h" 78 #include "fw/acpi.h" 79 80 /* Default NVM size to read */ 81 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024) 82 83 #define NVM_WRITE_OPCODE 1 84 #define NVM_READ_OPCODE 0 85 86 /* load nvm chunk response */ 87 enum { 88 READ_NVM_CHUNK_SUCCEED = 0, 89 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1 90 }; 91 92 /* 93 * prepare the NVM host command w/ the pointers to the nvm buffer 94 * and send it to fw 95 */ 96 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section, 97 u16 offset, u16 length, const u8 *data) 98 { 99 struct iwl_nvm_access_cmd nvm_access_cmd = { 100 .offset = cpu_to_le16(offset), 101 .length = cpu_to_le16(length), 102 .type = cpu_to_le16(section), 103 .op_code = NVM_WRITE_OPCODE, 104 }; 105 struct iwl_host_cmd cmd = { 106 .id = NVM_ACCESS_CMD, 107 .len = { sizeof(struct iwl_nvm_access_cmd), length }, 108 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 109 .data = { &nvm_access_cmd, data }, 110 /* data may come from vmalloc, so use _DUP */ 111 .dataflags = { 0, IWL_HCMD_DFL_DUP }, 112 }; 113 struct iwl_rx_packet *pkt; 114 struct iwl_nvm_access_resp *nvm_resp; 115 int ret; 116 117 ret = iwl_mvm_send_cmd(mvm, &cmd); 118 if (ret) 119 return ret; 120 121 pkt = cmd.resp_pkt; 122 /* Extract & check NVM write response */ 123 nvm_resp = (void *)pkt->data; 124 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) { 125 IWL_ERR(mvm, 126 "NVM access write command failed for section %u (status = 0x%x)\n", 127 section, le16_to_cpu(nvm_resp->status)); 128 ret = -EIO; 129 } 130 131 iwl_free_resp(&cmd); 132 return ret; 133 } 134 135 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section, 136 u16 offset, u16 length, u8 *data) 137 { 138 struct iwl_nvm_access_cmd nvm_access_cmd = { 139 .offset = cpu_to_le16(offset), 140 .length = cpu_to_le16(length), 141 .type = cpu_to_le16(section), 142 .op_code = NVM_READ_OPCODE, 143 }; 144 struct iwl_nvm_access_resp *nvm_resp; 145 struct iwl_rx_packet *pkt; 146 struct iwl_host_cmd cmd = { 147 .id = NVM_ACCESS_CMD, 148 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 149 .data = { &nvm_access_cmd, }, 150 }; 151 int ret, bytes_read, offset_read; 152 u8 *resp_data; 153 154 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd); 155 156 ret = iwl_mvm_send_cmd(mvm, &cmd); 157 if (ret) 158 return ret; 159 160 pkt = cmd.resp_pkt; 161 162 /* Extract NVM response */ 163 nvm_resp = (void *)pkt->data; 164 ret = le16_to_cpu(nvm_resp->status); 165 bytes_read = le16_to_cpu(nvm_resp->length); 166 offset_read = le16_to_cpu(nvm_resp->offset); 167 resp_data = nvm_resp->data; 168 if (ret) { 169 if ((offset != 0) && 170 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) { 171 /* 172 * meaning of NOT_VALID_ADDRESS: 173 * driver try to read chunk from address that is 174 * multiple of 2K and got an error since addr is empty. 175 * meaning of (offset != 0): driver already 176 * read valid data from another chunk so this case 177 * is not an error. 178 */ 179 IWL_DEBUG_EEPROM(mvm->trans->dev, 180 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n", 181 offset); 182 ret = 0; 183 } else { 184 IWL_DEBUG_EEPROM(mvm->trans->dev, 185 "NVM access command failed with status %d (device: %s)\n", 186 ret, mvm->cfg->name); 187 ret = -EIO; 188 } 189 goto exit; 190 } 191 192 if (offset_read != offset) { 193 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n", 194 offset_read); 195 ret = -EINVAL; 196 goto exit; 197 } 198 199 /* Write data to NVM */ 200 memcpy(data + offset, resp_data, bytes_read); 201 ret = bytes_read; 202 203 exit: 204 iwl_free_resp(&cmd); 205 return ret; 206 } 207 208 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section, 209 const u8 *data, u16 length) 210 { 211 int offset = 0; 212 213 /* copy data in chunks of 2k (and remainder if any) */ 214 215 while (offset < length) { 216 int chunk_size, ret; 217 218 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE, 219 length - offset); 220 221 ret = iwl_nvm_write_chunk(mvm, section, offset, 222 chunk_size, data + offset); 223 if (ret < 0) 224 return ret; 225 226 offset += chunk_size; 227 } 228 229 return 0; 230 } 231 232 /* 233 * Reads an NVM section completely. 234 * NICs prior to 7000 family doesn't have a real NVM, but just read 235 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 236 * by uCode, we need to manually check in this case that we don't 237 * overflow and try to read more than the EEPROM size. 238 * For 7000 family NICs, we supply the maximal size we can read, and 239 * the uCode fills the response with as much data as we can, 240 * without overflowing, so no check is needed. 241 */ 242 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section, 243 u8 *data, u32 size_read) 244 { 245 u16 length, offset = 0; 246 int ret; 247 248 /* Set nvm section read length */ 249 length = IWL_NVM_DEFAULT_CHUNK_SIZE; 250 251 ret = length; 252 253 /* Read the NVM until exhausted (reading less than requested) */ 254 while (ret == length) { 255 /* Check no memory assumptions fail and cause an overflow */ 256 if ((size_read + offset + length) > 257 mvm->cfg->base_params->eeprom_size) { 258 IWL_ERR(mvm, "EEPROM size is too small for NVM\n"); 259 return -ENOBUFS; 260 } 261 262 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data); 263 if (ret < 0) { 264 IWL_DEBUG_EEPROM(mvm->trans->dev, 265 "Cannot read NVM from section %d offset %d, length %d\n", 266 section, offset, length); 267 return ret; 268 } 269 offset += ret; 270 } 271 272 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset); 273 274 IWL_DEBUG_EEPROM(mvm->trans->dev, 275 "NVM section %d read completed\n", section); 276 return offset; 277 } 278 279 static struct iwl_nvm_data * 280 iwl_parse_nvm_sections(struct iwl_mvm *mvm) 281 { 282 struct iwl_nvm_section *sections = mvm->nvm_sections; 283 const __be16 *hw; 284 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku; 285 bool lar_enabled; 286 int regulatory_type; 287 288 /* Checking for required sections */ 289 if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) { 290 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 291 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) { 292 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n"); 293 return NULL; 294 } 295 } else { 296 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP) 297 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP; 298 else 299 regulatory_type = NVM_SECTION_TYPE_REGULATORY; 300 301 /* SW and REGULATORY sections are mandatory */ 302 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 303 !mvm->nvm_sections[regulatory_type].data) { 304 IWL_ERR(mvm, 305 "Can't parse empty family 8000 OTP/NVM sections\n"); 306 return NULL; 307 } 308 /* MAC_OVERRIDE or at least HW section must exist */ 309 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data && 310 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) { 311 IWL_ERR(mvm, 312 "Can't parse mac_address, empty sections\n"); 313 return NULL; 314 } 315 316 /* PHY_SKU section is mandatory in B0 */ 317 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) { 318 IWL_ERR(mvm, 319 "Can't parse phy_sku in B0, empty sections\n"); 320 return NULL; 321 } 322 } 323 324 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data; 325 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data; 326 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data; 327 mac_override = 328 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data; 329 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data; 330 331 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ? 332 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data : 333 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data; 334 335 lar_enabled = !iwlwifi_mod_params.lar_disable && 336 fw_has_capa(&mvm->fw->ucode_capa, 337 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 338 339 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib, 340 regulatory, mac_override, phy_sku, 341 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant, 342 lar_enabled); 343 } 344 345 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */ 346 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm) 347 { 348 int i, ret = 0; 349 struct iwl_nvm_section *sections = mvm->nvm_sections; 350 351 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n"); 352 353 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) { 354 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length) 355 continue; 356 ret = iwl_nvm_write_section(mvm, i, sections[i].data, 357 sections[i].length); 358 if (ret < 0) { 359 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret); 360 break; 361 } 362 } 363 return ret; 364 } 365 366 int iwl_nvm_init(struct iwl_mvm *mvm) 367 { 368 int ret, section; 369 u32 size_read = 0; 370 u8 *nvm_buffer, *temp; 371 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step; 372 373 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS)) 374 return -EINVAL; 375 376 /* load NVM values from nic */ 377 /* Read From FW NVM */ 378 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n"); 379 380 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size, 381 GFP_KERNEL); 382 if (!nvm_buffer) 383 return -ENOMEM; 384 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) { 385 /* we override the constness for initial read */ 386 ret = iwl_nvm_read_section(mvm, section, nvm_buffer, 387 size_read); 388 if (ret < 0) 389 continue; 390 size_read += ret; 391 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL); 392 if (!temp) { 393 ret = -ENOMEM; 394 break; 395 } 396 397 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret); 398 399 mvm->nvm_sections[section].data = temp; 400 mvm->nvm_sections[section].length = ret; 401 402 #ifdef CONFIG_IWLWIFI_DEBUGFS 403 switch (section) { 404 case NVM_SECTION_TYPE_SW: 405 mvm->nvm_sw_blob.data = temp; 406 mvm->nvm_sw_blob.size = ret; 407 break; 408 case NVM_SECTION_TYPE_CALIBRATION: 409 mvm->nvm_calib_blob.data = temp; 410 mvm->nvm_calib_blob.size = ret; 411 break; 412 case NVM_SECTION_TYPE_PRODUCTION: 413 mvm->nvm_prod_blob.data = temp; 414 mvm->nvm_prod_blob.size = ret; 415 break; 416 case NVM_SECTION_TYPE_PHY_SKU: 417 mvm->nvm_phy_sku_blob.data = temp; 418 mvm->nvm_phy_sku_blob.size = ret; 419 break; 420 default: 421 if (section == mvm->cfg->nvm_hw_section_num) { 422 mvm->nvm_hw_blob.data = temp; 423 mvm->nvm_hw_blob.size = ret; 424 break; 425 } 426 } 427 #endif 428 } 429 if (!size_read) 430 IWL_ERR(mvm, "OTP is blank\n"); 431 kfree(nvm_buffer); 432 433 /* Only if PNVM selected in the mod param - load external NVM */ 434 if (mvm->nvm_file_name) { 435 /* read External NVM file from the mod param */ 436 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 437 mvm->nvm_sections); 438 if (ret) { 439 mvm->nvm_file_name = nvm_file_C; 440 441 if ((ret == -EFAULT || ret == -ENOENT) && 442 mvm->nvm_file_name) { 443 /* in case nvm file was failed try again */ 444 ret = iwl_read_external_nvm(mvm->trans, 445 mvm->nvm_file_name, 446 mvm->nvm_sections); 447 if (ret) 448 return ret; 449 } else { 450 return ret; 451 } 452 } 453 } 454 455 /* parse the relevant nvm sections */ 456 mvm->nvm_data = iwl_parse_nvm_sections(mvm); 457 if (!mvm->nvm_data) 458 return -ENODATA; 459 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n", 460 mvm->nvm_data->nvm_version); 461 462 return 0; 463 } 464 465 struct iwl_mcc_update_resp * 466 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2, 467 enum iwl_mcc_source src_id) 468 { 469 struct iwl_mcc_update_cmd mcc_update_cmd = { 470 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]), 471 .source_id = (u8)src_id, 472 }; 473 struct iwl_mcc_update_resp *resp_cp; 474 struct iwl_rx_packet *pkt; 475 struct iwl_host_cmd cmd = { 476 .id = MCC_UPDATE_CMD, 477 .flags = CMD_WANT_SKB, 478 .data = { &mcc_update_cmd }, 479 }; 480 481 int ret; 482 u32 status; 483 int resp_len, n_channels; 484 u16 mcc; 485 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa, 486 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2); 487 488 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 489 return ERR_PTR(-EOPNOTSUPP); 490 491 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd); 492 if (!resp_v2) 493 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1); 494 495 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n", 496 alpha2[0], alpha2[1], src_id); 497 498 ret = iwl_mvm_send_cmd(mvm, &cmd); 499 if (ret) 500 return ERR_PTR(ret); 501 502 pkt = cmd.resp_pkt; 503 504 /* Extract MCC response */ 505 if (resp_v2) { 506 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data; 507 508 n_channels = __le32_to_cpu(mcc_resp->n_channels); 509 resp_len = sizeof(struct iwl_mcc_update_resp) + 510 n_channels * sizeof(__le32); 511 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL); 512 if (!resp_cp) { 513 resp_cp = ERR_PTR(-ENOMEM); 514 goto exit; 515 } 516 } else { 517 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data; 518 519 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels); 520 resp_len = sizeof(struct iwl_mcc_update_resp) + 521 n_channels * sizeof(__le32); 522 resp_cp = kzalloc(resp_len, GFP_KERNEL); 523 if (!resp_cp) { 524 resp_cp = ERR_PTR(-ENOMEM); 525 goto exit; 526 } 527 528 resp_cp->status = mcc_resp_v1->status; 529 resp_cp->mcc = mcc_resp_v1->mcc; 530 resp_cp->cap = mcc_resp_v1->cap; 531 resp_cp->source_id = mcc_resp_v1->source_id; 532 resp_cp->n_channels = mcc_resp_v1->n_channels; 533 memcpy(resp_cp->channels, mcc_resp_v1->channels, 534 n_channels * sizeof(__le32)); 535 } 536 537 status = le32_to_cpu(resp_cp->status); 538 539 mcc = le16_to_cpu(resp_cp->mcc); 540 541 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */ 542 if (mcc == 0) { 543 mcc = 0x3030; /* "00" - world */ 544 resp_cp->mcc = cpu_to_le16(mcc); 545 } 546 547 IWL_DEBUG_LAR(mvm, 548 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n", 549 status, mcc, mcc >> 8, mcc & 0xff, 550 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels); 551 552 exit: 553 iwl_free_resp(&cmd); 554 return resp_cp; 555 } 556 557 int iwl_mvm_init_mcc(struct iwl_mvm *mvm) 558 { 559 bool tlv_lar; 560 bool nvm_lar; 561 int retval; 562 struct ieee80211_regdomain *regd; 563 char mcc[3]; 564 565 if (mvm->cfg->nvm_type == IWL_NVM_EXT) { 566 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa, 567 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 568 nvm_lar = mvm->nvm_data->lar_enabled; 569 if (tlv_lar != nvm_lar) 570 IWL_INFO(mvm, 571 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n", 572 tlv_lar ? "enabled" : "disabled", 573 nvm_lar ? "enabled" : "disabled"); 574 } 575 576 if (!iwl_mvm_is_lar_supported(mvm)) 577 return 0; 578 579 /* 580 * try to replay the last set MCC to FW. If it doesn't exist, 581 * queue an update to cfg80211 to retrieve the default alpha2 from FW. 582 */ 583 retval = iwl_mvm_init_fw_regd(mvm); 584 if (retval != -ENOENT) 585 return retval; 586 587 /* 588 * Driver regulatory hint for initial update, this also informs the 589 * firmware we support wifi location updates. 590 * Disallow scans that might crash the FW while the LAR regdomain 591 * is not set. 592 */ 593 mvm->lar_regdom_set = false; 594 595 regd = iwl_mvm_get_current_regdomain(mvm, NULL); 596 if (IS_ERR_OR_NULL(regd)) 597 return -EIO; 598 599 if (iwl_mvm_is_wifi_mcc_supported(mvm) && 600 !iwl_acpi_get_mcc(mvm->dev, mcc)) { 601 kfree(regd); 602 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, 603 MCC_SOURCE_BIOS, NULL); 604 if (IS_ERR_OR_NULL(regd)) 605 return -EIO; 606 } 607 608 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd); 609 kfree(regd); 610 return retval; 611 } 612 613 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm, 614 struct iwl_rx_cmd_buffer *rxb) 615 { 616 struct iwl_rx_packet *pkt = rxb_addr(rxb); 617 struct iwl_mcc_chub_notif *notif = (void *)pkt->data; 618 enum iwl_mcc_source src; 619 char mcc[3]; 620 struct ieee80211_regdomain *regd; 621 622 lockdep_assert_held(&mvm->mutex); 623 624 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) { 625 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n"); 626 return; 627 } 628 629 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 630 return; 631 632 mcc[0] = le16_to_cpu(notif->mcc) >> 8; 633 mcc[1] = le16_to_cpu(notif->mcc) & 0xff; 634 mcc[2] = '\0'; 635 src = notif->source_id; 636 637 IWL_DEBUG_LAR(mvm, 638 "RX: received chub update mcc cmd (mcc '%s' src %d)\n", 639 mcc, src); 640 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL); 641 if (IS_ERR_OR_NULL(regd)) 642 return; 643 644 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd); 645 kfree(regd); 646 } 647