1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24 * USA 25 * 26 * The full GNU General Public License is included in this distribution 27 * in the file called COPYING. 28 * 29 * Contact Information: 30 * Intel Linux Wireless <linuxwifi@intel.com> 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32 * 33 * BSD LICENSE 34 * 35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 37 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 44 * * Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * * Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in 48 * the documentation and/or other materials provided with the 49 * distribution. 50 * * Neither the name Intel Corporation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 *****************************************************************************/ 67 #include <linux/firmware.h> 68 #include <linux/rtnetlink.h> 69 #include "iwl-trans.h" 70 #include "iwl-csr.h" 71 #include "mvm.h" 72 #include "iwl-eeprom-parse.h" 73 #include "iwl-eeprom-read.h" 74 #include "iwl-nvm-parse.h" 75 #include "iwl-prph.h" 76 77 /* Default NVM size to read */ 78 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024) 79 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58 80 #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc 81 82 #define NVM_WRITE_OPCODE 1 83 #define NVM_READ_OPCODE 0 84 85 /* load nvm chunk response */ 86 enum { 87 READ_NVM_CHUNK_SUCCEED = 0, 88 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1 89 }; 90 91 /* 92 * prepare the NVM host command w/ the pointers to the nvm buffer 93 * and send it to fw 94 */ 95 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section, 96 u16 offset, u16 length, const u8 *data) 97 { 98 struct iwl_nvm_access_cmd nvm_access_cmd = { 99 .offset = cpu_to_le16(offset), 100 .length = cpu_to_le16(length), 101 .type = cpu_to_le16(section), 102 .op_code = NVM_WRITE_OPCODE, 103 }; 104 struct iwl_host_cmd cmd = { 105 .id = NVM_ACCESS_CMD, 106 .len = { sizeof(struct iwl_nvm_access_cmd), length }, 107 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 108 .data = { &nvm_access_cmd, data }, 109 /* data may come from vmalloc, so use _DUP */ 110 .dataflags = { 0, IWL_HCMD_DFL_DUP }, 111 }; 112 struct iwl_rx_packet *pkt; 113 struct iwl_nvm_access_resp *nvm_resp; 114 int ret; 115 116 ret = iwl_mvm_send_cmd(mvm, &cmd); 117 if (ret) 118 return ret; 119 120 pkt = cmd.resp_pkt; 121 /* Extract & check NVM write response */ 122 nvm_resp = (void *)pkt->data; 123 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) { 124 IWL_ERR(mvm, 125 "NVM access write command failed for section %u (status = 0x%x)\n", 126 section, le16_to_cpu(nvm_resp->status)); 127 ret = -EIO; 128 } 129 130 iwl_free_resp(&cmd); 131 return ret; 132 } 133 134 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section, 135 u16 offset, u16 length, u8 *data) 136 { 137 struct iwl_nvm_access_cmd nvm_access_cmd = { 138 .offset = cpu_to_le16(offset), 139 .length = cpu_to_le16(length), 140 .type = cpu_to_le16(section), 141 .op_code = NVM_READ_OPCODE, 142 }; 143 struct iwl_nvm_access_resp *nvm_resp; 144 struct iwl_rx_packet *pkt; 145 struct iwl_host_cmd cmd = { 146 .id = NVM_ACCESS_CMD, 147 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 148 .data = { &nvm_access_cmd, }, 149 }; 150 int ret, bytes_read, offset_read; 151 u8 *resp_data; 152 153 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd); 154 155 ret = iwl_mvm_send_cmd(mvm, &cmd); 156 if (ret) 157 return ret; 158 159 pkt = cmd.resp_pkt; 160 161 /* Extract NVM response */ 162 nvm_resp = (void *)pkt->data; 163 ret = le16_to_cpu(nvm_resp->status); 164 bytes_read = le16_to_cpu(nvm_resp->length); 165 offset_read = le16_to_cpu(nvm_resp->offset); 166 resp_data = nvm_resp->data; 167 if (ret) { 168 if ((offset != 0) && 169 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) { 170 /* 171 * meaning of NOT_VALID_ADDRESS: 172 * driver try to read chunk from address that is 173 * multiple of 2K and got an error since addr is empty. 174 * meaning of (offset != 0): driver already 175 * read valid data from another chunk so this case 176 * is not an error. 177 */ 178 IWL_DEBUG_EEPROM(mvm->trans->dev, 179 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n", 180 offset); 181 ret = 0; 182 } else { 183 IWL_DEBUG_EEPROM(mvm->trans->dev, 184 "NVM access command failed with status %d (device: %s)\n", 185 ret, mvm->cfg->name); 186 ret = -EIO; 187 } 188 goto exit; 189 } 190 191 if (offset_read != offset) { 192 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n", 193 offset_read); 194 ret = -EINVAL; 195 goto exit; 196 } 197 198 /* Write data to NVM */ 199 memcpy(data + offset, resp_data, bytes_read); 200 ret = bytes_read; 201 202 exit: 203 iwl_free_resp(&cmd); 204 return ret; 205 } 206 207 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section, 208 const u8 *data, u16 length) 209 { 210 int offset = 0; 211 212 /* copy data in chunks of 2k (and remainder if any) */ 213 214 while (offset < length) { 215 int chunk_size, ret; 216 217 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE, 218 length - offset); 219 220 ret = iwl_nvm_write_chunk(mvm, section, offset, 221 chunk_size, data + offset); 222 if (ret < 0) 223 return ret; 224 225 offset += chunk_size; 226 } 227 228 return 0; 229 } 230 231 static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section, 232 u8 *data, unsigned int len) 233 { 234 #define IWL_4165_DEVICE_ID 0x5501 235 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5) 236 237 if (section == NVM_SECTION_TYPE_PHY_SKU && 238 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 && 239 (data[4] & NVM_SKU_CAP_MIMO_DISABLE)) 240 /* OTP 0x52 bug work around: it's a 1x1 device */ 241 data[3] = ANT_B | (ANT_B << 4); 242 } 243 244 /* 245 * Reads an NVM section completely. 246 * NICs prior to 7000 family doesn't have a real NVM, but just read 247 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited 248 * by uCode, we need to manually check in this case that we don't 249 * overflow and try to read more than the EEPROM size. 250 * For 7000 family NICs, we supply the maximal size we can read, and 251 * the uCode fills the response with as much data as we can, 252 * without overflowing, so no check is needed. 253 */ 254 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section, 255 u8 *data, u32 size_read) 256 { 257 u16 length, offset = 0; 258 int ret; 259 260 /* Set nvm section read length */ 261 length = IWL_NVM_DEFAULT_CHUNK_SIZE; 262 263 ret = length; 264 265 /* Read the NVM until exhausted (reading less than requested) */ 266 while (ret == length) { 267 /* Check no memory assumptions fail and cause an overflow */ 268 if ((size_read + offset + length) > 269 mvm->cfg->base_params->eeprom_size) { 270 IWL_ERR(mvm, "EEPROM size is too small for NVM\n"); 271 return -ENOBUFS; 272 } 273 274 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data); 275 if (ret < 0) { 276 IWL_DEBUG_EEPROM(mvm->trans->dev, 277 "Cannot read NVM from section %d offset %d, length %d\n", 278 section, offset, length); 279 return ret; 280 } 281 offset += ret; 282 } 283 284 iwl_mvm_nvm_fixups(mvm, section, data, offset); 285 286 IWL_DEBUG_EEPROM(mvm->trans->dev, 287 "NVM section %d read completed\n", section); 288 return offset; 289 } 290 291 static struct iwl_nvm_data * 292 iwl_parse_nvm_sections(struct iwl_mvm *mvm) 293 { 294 struct iwl_nvm_section *sections = mvm->nvm_sections; 295 const __be16 *hw; 296 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku; 297 bool lar_enabled; 298 299 /* Checking for required sections */ 300 if (!mvm->trans->cfg->ext_nvm) { 301 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 302 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) { 303 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n"); 304 return NULL; 305 } 306 } else { 307 /* SW and REGULATORY sections are mandatory */ 308 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || 309 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) { 310 IWL_ERR(mvm, 311 "Can't parse empty family 8000 OTP/NVM sections\n"); 312 return NULL; 313 } 314 /* MAC_OVERRIDE or at least HW section must exist */ 315 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data && 316 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) { 317 IWL_ERR(mvm, 318 "Can't parse mac_address, empty sections\n"); 319 return NULL; 320 } 321 322 /* PHY_SKU section is mandatory in B0 */ 323 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) { 324 IWL_ERR(mvm, 325 "Can't parse phy_sku in B0, empty sections\n"); 326 return NULL; 327 } 328 } 329 330 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data; 331 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data; 332 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data; 333 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data; 334 mac_override = 335 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data; 336 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data; 337 338 lar_enabled = !iwlwifi_mod_params.lar_disable && 339 fw_has_capa(&mvm->fw->ucode_capa, 340 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 341 342 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib, 343 regulatory, mac_override, phy_sku, 344 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant, 345 lar_enabled); 346 } 347 348 #define MAX_NVM_FILE_LEN 16384 349 350 /* 351 * Reads external NVM from a file into mvm->nvm_sections 352 * 353 * HOW TO CREATE THE NVM FILE FORMAT: 354 * ------------------------------ 355 * 1. create hex file, format: 356 * 3800 -> header 357 * 0000 -> header 358 * 5a40 -> data 359 * 360 * rev - 6 bit (word1) 361 * len - 10 bit (word1) 362 * id - 4 bit (word2) 363 * rsv - 12 bit (word2) 364 * 365 * 2. flip 8bits with 8 bits per line to get the right NVM file format 366 * 367 * 3. create binary file from the hex file 368 * 369 * 4. save as "iNVM_xxx.bin" under /lib/firmware 370 */ 371 int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm) 372 { 373 int ret, section_size; 374 u16 section_id; 375 const struct firmware *fw_entry; 376 const struct { 377 __le16 word1; 378 __le16 word2; 379 u8 data[]; 380 } *file_sec; 381 const u8 *eof; 382 u8 *temp; 383 int max_section_size; 384 const __le32 *dword_buff; 385 386 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) 387 #define NVM_WORD2_ID(x) (x >> 12) 388 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) 389 #define EXT_NVM_WORD1_ID(x) ((x) >> 4) 390 #define NVM_HEADER_0 (0x2A504C54) 391 #define NVM_HEADER_1 (0x4E564D2A) 392 #define NVM_HEADER_SIZE (4 * sizeof(u32)) 393 394 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n"); 395 396 /* Maximal size depends on NVM version */ 397 if (!mvm->trans->cfg->ext_nvm) 398 max_section_size = IWL_MAX_NVM_SECTION_SIZE; 399 else 400 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE; 401 402 /* 403 * Obtain NVM image via request_firmware. Since we already used 404 * request_firmware_nowait() for the firmware binary load and only 405 * get here after that we assume the NVM request can be satisfied 406 * synchronously. 407 */ 408 ret = request_firmware(&fw_entry, mvm->nvm_file_name, 409 mvm->trans->dev); 410 if (ret) { 411 IWL_ERR(mvm, "ERROR: %s isn't available %d\n", 412 mvm->nvm_file_name, ret); 413 return ret; 414 } 415 416 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n", 417 mvm->nvm_file_name, fw_entry->size); 418 419 if (fw_entry->size > MAX_NVM_FILE_LEN) { 420 IWL_ERR(mvm, "NVM file too large\n"); 421 ret = -EINVAL; 422 goto out; 423 } 424 425 eof = fw_entry->data + fw_entry->size; 426 dword_buff = (__le32 *)fw_entry->data; 427 428 /* some NVM file will contain a header. 429 * The header is identified by 2 dwords header as follow: 430 * dword[0] = 0x2A504C54 431 * dword[1] = 0x4E564D2A 432 * 433 * This header must be skipped when providing the NVM data to the FW. 434 */ 435 if (fw_entry->size > NVM_HEADER_SIZE && 436 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && 437 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { 438 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE); 439 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); 440 IWL_INFO(mvm, "NVM Manufacturing date %08X\n", 441 le32_to_cpu(dword_buff[3])); 442 443 /* nvm file validation, dword_buff[2] holds the file version */ 444 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 && 445 CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP && 446 le32_to_cpu(dword_buff[2]) < 0xE4A) { 447 ret = -EFAULT; 448 goto out; 449 } 450 } else { 451 file_sec = (void *)fw_entry->data; 452 } 453 454 while (true) { 455 if (file_sec->data > eof) { 456 IWL_ERR(mvm, 457 "ERROR - NVM file too short for section header\n"); 458 ret = -EINVAL; 459 break; 460 } 461 462 /* check for EOF marker */ 463 if (!file_sec->word1 && !file_sec->word2) { 464 ret = 0; 465 break; 466 } 467 468 if (!mvm->trans->cfg->ext_nvm) { 469 section_size = 470 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 471 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); 472 } else { 473 section_size = 2 * EXT_NVM_WORD2_LEN( 474 le16_to_cpu(file_sec->word2)); 475 section_id = EXT_NVM_WORD1_ID( 476 le16_to_cpu(file_sec->word1)); 477 } 478 479 if (section_size > max_section_size) { 480 IWL_ERR(mvm, "ERROR - section too large (%d)\n", 481 section_size); 482 ret = -EINVAL; 483 break; 484 } 485 486 if (!section_size) { 487 IWL_ERR(mvm, "ERROR - section empty\n"); 488 ret = -EINVAL; 489 break; 490 } 491 492 if (file_sec->data + section_size > eof) { 493 IWL_ERR(mvm, 494 "ERROR - NVM file too short for section (%d bytes)\n", 495 section_size); 496 ret = -EINVAL; 497 break; 498 } 499 500 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS, 501 "Invalid NVM section ID %d\n", section_id)) { 502 ret = -EINVAL; 503 break; 504 } 505 506 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL); 507 if (!temp) { 508 ret = -ENOMEM; 509 break; 510 } 511 512 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size); 513 514 kfree(mvm->nvm_sections[section_id].data); 515 mvm->nvm_sections[section_id].data = temp; 516 mvm->nvm_sections[section_id].length = section_size; 517 518 /* advance to the next section */ 519 file_sec = (void *)(file_sec->data + section_size); 520 } 521 out: 522 release_firmware(fw_entry); 523 return ret; 524 } 525 526 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */ 527 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm) 528 { 529 int i, ret = 0; 530 struct iwl_nvm_section *sections = mvm->nvm_sections; 531 532 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n"); 533 534 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) { 535 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length) 536 continue; 537 ret = iwl_nvm_write_section(mvm, i, sections[i].data, 538 sections[i].length); 539 if (ret < 0) { 540 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret); 541 break; 542 } 543 } 544 return ret; 545 } 546 547 int iwl_nvm_init(struct iwl_mvm *mvm) 548 { 549 int ret, section; 550 u32 size_read = 0; 551 u8 *nvm_buffer, *temp; 552 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step; 553 554 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS)) 555 return -EINVAL; 556 557 /* load NVM values from nic */ 558 /* Read From FW NVM */ 559 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n"); 560 561 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size, 562 GFP_KERNEL); 563 if (!nvm_buffer) 564 return -ENOMEM; 565 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) { 566 /* we override the constness for initial read */ 567 ret = iwl_nvm_read_section(mvm, section, nvm_buffer, 568 size_read); 569 if (ret < 0) 570 continue; 571 size_read += ret; 572 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL); 573 if (!temp) { 574 ret = -ENOMEM; 575 break; 576 } 577 578 iwl_mvm_nvm_fixups(mvm, section, temp, ret); 579 580 mvm->nvm_sections[section].data = temp; 581 mvm->nvm_sections[section].length = ret; 582 583 #ifdef CONFIG_IWLWIFI_DEBUGFS 584 switch (section) { 585 case NVM_SECTION_TYPE_SW: 586 mvm->nvm_sw_blob.data = temp; 587 mvm->nvm_sw_blob.size = ret; 588 break; 589 case NVM_SECTION_TYPE_CALIBRATION: 590 mvm->nvm_calib_blob.data = temp; 591 mvm->nvm_calib_blob.size = ret; 592 break; 593 case NVM_SECTION_TYPE_PRODUCTION: 594 mvm->nvm_prod_blob.data = temp; 595 mvm->nvm_prod_blob.size = ret; 596 break; 597 case NVM_SECTION_TYPE_PHY_SKU: 598 mvm->nvm_phy_sku_blob.data = temp; 599 mvm->nvm_phy_sku_blob.size = ret; 600 break; 601 default: 602 if (section == mvm->cfg->nvm_hw_section_num) { 603 mvm->nvm_hw_blob.data = temp; 604 mvm->nvm_hw_blob.size = ret; 605 break; 606 } 607 } 608 #endif 609 } 610 if (!size_read) 611 IWL_ERR(mvm, "OTP is blank\n"); 612 kfree(nvm_buffer); 613 614 /* Only if PNVM selected in the mod param - load external NVM */ 615 if (mvm->nvm_file_name) { 616 /* read External NVM file from the mod param */ 617 ret = iwl_mvm_read_external_nvm(mvm); 618 if (ret) { 619 mvm->nvm_file_name = nvm_file_C; 620 621 if ((ret == -EFAULT || ret == -ENOENT) && 622 mvm->nvm_file_name) { 623 /* in case nvm file was failed try again */ 624 ret = iwl_mvm_read_external_nvm(mvm); 625 if (ret) 626 return ret; 627 } else { 628 return ret; 629 } 630 } 631 } 632 633 /* parse the relevant nvm sections */ 634 mvm->nvm_data = iwl_parse_nvm_sections(mvm); 635 if (!mvm->nvm_data) 636 return -ENODATA; 637 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n", 638 mvm->nvm_data->nvm_version); 639 640 return 0; 641 } 642 643 struct iwl_mcc_update_resp * 644 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2, 645 enum iwl_mcc_source src_id) 646 { 647 struct iwl_mcc_update_cmd mcc_update_cmd = { 648 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]), 649 .source_id = (u8)src_id, 650 }; 651 struct iwl_mcc_update_resp *resp_cp; 652 struct iwl_rx_packet *pkt; 653 struct iwl_host_cmd cmd = { 654 .id = MCC_UPDATE_CMD, 655 .flags = CMD_WANT_SKB, 656 .data = { &mcc_update_cmd }, 657 }; 658 659 int ret; 660 u32 status; 661 int resp_len, n_channels; 662 u16 mcc; 663 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa, 664 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2); 665 666 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 667 return ERR_PTR(-EOPNOTSUPP); 668 669 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd); 670 if (!resp_v2) 671 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1); 672 673 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n", 674 alpha2[0], alpha2[1], src_id); 675 676 ret = iwl_mvm_send_cmd(mvm, &cmd); 677 if (ret) 678 return ERR_PTR(ret); 679 680 pkt = cmd.resp_pkt; 681 682 /* Extract MCC response */ 683 if (resp_v2) { 684 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data; 685 686 n_channels = __le32_to_cpu(mcc_resp->n_channels); 687 resp_len = sizeof(struct iwl_mcc_update_resp) + 688 n_channels * sizeof(__le32); 689 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL); 690 if (!resp_cp) { 691 resp_cp = ERR_PTR(-ENOMEM); 692 goto exit; 693 } 694 } else { 695 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data; 696 697 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels); 698 resp_len = sizeof(struct iwl_mcc_update_resp) + 699 n_channels * sizeof(__le32); 700 resp_cp = kzalloc(resp_len, GFP_KERNEL); 701 if (!resp_cp) { 702 resp_cp = ERR_PTR(-ENOMEM); 703 goto exit; 704 } 705 706 resp_cp->status = mcc_resp_v1->status; 707 resp_cp->mcc = mcc_resp_v1->mcc; 708 resp_cp->cap = mcc_resp_v1->cap; 709 resp_cp->source_id = mcc_resp_v1->source_id; 710 resp_cp->n_channels = mcc_resp_v1->n_channels; 711 memcpy(resp_cp->channels, mcc_resp_v1->channels, 712 n_channels * sizeof(__le32)); 713 } 714 715 status = le32_to_cpu(resp_cp->status); 716 717 mcc = le16_to_cpu(resp_cp->mcc); 718 719 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */ 720 if (mcc == 0) { 721 mcc = 0x3030; /* "00" - world */ 722 resp_cp->mcc = cpu_to_le16(mcc); 723 } 724 725 IWL_DEBUG_LAR(mvm, 726 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n", 727 status, mcc, mcc >> 8, mcc & 0xff, 728 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels); 729 730 exit: 731 iwl_free_resp(&cmd); 732 return resp_cp; 733 } 734 735 int iwl_mvm_init_mcc(struct iwl_mvm *mvm) 736 { 737 bool tlv_lar; 738 bool nvm_lar; 739 int retval; 740 struct ieee80211_regdomain *regd; 741 char mcc[3]; 742 743 if (mvm->cfg->ext_nvm) { 744 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa, 745 IWL_UCODE_TLV_CAPA_LAR_SUPPORT); 746 nvm_lar = mvm->nvm_data->lar_enabled; 747 if (tlv_lar != nvm_lar) 748 IWL_INFO(mvm, 749 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n", 750 tlv_lar ? "enabled" : "disabled", 751 nvm_lar ? "enabled" : "disabled"); 752 } 753 754 if (!iwl_mvm_is_lar_supported(mvm)) 755 return 0; 756 757 /* 758 * try to replay the last set MCC to FW. If it doesn't exist, 759 * queue an update to cfg80211 to retrieve the default alpha2 from FW. 760 */ 761 retval = iwl_mvm_init_fw_regd(mvm); 762 if (retval != -ENOENT) 763 return retval; 764 765 /* 766 * Driver regulatory hint for initial update, this also informs the 767 * firmware we support wifi location updates. 768 * Disallow scans that might crash the FW while the LAR regdomain 769 * is not set. 770 */ 771 mvm->lar_regdom_set = false; 772 773 regd = iwl_mvm_get_current_regdomain(mvm, NULL); 774 if (IS_ERR_OR_NULL(regd)) 775 return -EIO; 776 777 if (iwl_mvm_is_wifi_mcc_supported(mvm) && 778 !iwl_get_bios_mcc(mvm->dev, mcc)) { 779 kfree(regd); 780 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, 781 MCC_SOURCE_BIOS, NULL); 782 if (IS_ERR_OR_NULL(regd)) 783 return -EIO; 784 } 785 786 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd); 787 kfree(regd); 788 return retval; 789 } 790 791 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm, 792 struct iwl_rx_cmd_buffer *rxb) 793 { 794 struct iwl_rx_packet *pkt = rxb_addr(rxb); 795 struct iwl_mcc_chub_notif *notif = (void *)pkt->data; 796 enum iwl_mcc_source src; 797 char mcc[3]; 798 struct ieee80211_regdomain *regd; 799 800 lockdep_assert_held(&mvm->mutex); 801 802 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) { 803 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n"); 804 return; 805 } 806 807 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm))) 808 return; 809 810 mcc[0] = le16_to_cpu(notif->mcc) >> 8; 811 mcc[1] = le16_to_cpu(notif->mcc) & 0xff; 812 mcc[2] = '\0'; 813 src = notif->source_id; 814 815 IWL_DEBUG_LAR(mvm, 816 "RX: received chub update mcc cmd (mcc '%s' src %d)\n", 817 mcc, src); 818 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL); 819 if (IS_ERR_OR_NULL(regd)) 820 return; 821 822 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd); 823 kfree(regd); 824 } 825