1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 25 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 26 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 27 28 #define IWL_TAS_US_MCC 0x5553 29 #define IWL_TAS_CANADA_MCC 0x4341 30 31 struct iwl_mvm_alive_data { 32 bool valid; 33 u32 scd_base_addr; 34 }; 35 36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 37 { 38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 39 .valid = cpu_to_le32(valid_tx_ant), 40 }; 41 42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 44 sizeof(tx_ant_cmd), &tx_ant_cmd); 45 } 46 47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 48 { 49 int i; 50 struct iwl_rss_config_cmd cmd = { 51 .flags = cpu_to_le32(IWL_RSS_ENABLE), 52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 58 }; 59 60 if (mvm->trans->num_rx_queues == 1) 61 return 0; 62 63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 65 cmd.indirection_table[i] = 66 1 + (i % (mvm->trans->num_rx_queues - 1)); 67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 68 69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 70 } 71 72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 73 { 74 struct iwl_dqa_enable_cmd dqa_cmd = { 75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 76 }; 77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 78 int ret; 79 80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 81 if (ret) 82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 83 else 84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 85 86 return ret; 87 } 88 89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 90 struct iwl_rx_cmd_buffer *rxb) 91 { 92 struct iwl_rx_packet *pkt = rxb_addr(rxb); 93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 94 __le32 *dump_data = mfu_dump_notif->data; 95 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 96 int i; 97 98 if (mfu_dump_notif->index_num == 0) 99 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 100 le32_to_cpu(mfu_dump_notif->assert_id)); 101 102 for (i = 0; i < n_words; i++) 103 IWL_DEBUG_INFO(mvm, 104 "MFUART assert dump, dword %u: 0x%08x\n", 105 le16_to_cpu(mfu_dump_notif->index_num) * 106 n_words + i, 107 le32_to_cpu(dump_data[i])); 108 } 109 110 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 111 struct iwl_rx_packet *pkt, void *data) 112 { 113 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 114 struct iwl_mvm *mvm = 115 container_of(notif_wait, struct iwl_mvm, notif_wait); 116 struct iwl_mvm_alive_data *alive_data = data; 117 struct iwl_umac_alive *umac; 118 struct iwl_lmac_alive *lmac1; 119 struct iwl_lmac_alive *lmac2 = NULL; 120 u16 status; 121 u32 lmac_error_event_table, umac_error_table; 122 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 123 UCODE_ALIVE_NTFY, 0); 124 u32 i; 125 126 if (version == 6) { 127 struct iwl_alive_ntf_v6 *palive; 128 129 if (pkt_len < sizeof(*palive)) 130 return false; 131 132 palive = (void *)pkt->data; 133 mvm->trans->dbg.imr_data.imr_enable = 134 le32_to_cpu(palive->imr.enabled); 135 mvm->trans->dbg.imr_data.imr_size = 136 le32_to_cpu(palive->imr.size); 137 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 138 mvm->trans->dbg.imr_data.imr_size; 139 mvm->trans->dbg.imr_data.imr_base_addr = 140 palive->imr.base_addr; 141 mvm->trans->dbg.imr_data.imr_curr_addr = 142 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 143 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 144 mvm->trans->dbg.imr_data.imr_enable, 145 mvm->trans->dbg.imr_data.imr_size, 146 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 147 148 if (!mvm->trans->dbg.imr_data.imr_enable) { 149 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 150 struct iwl_ucode_tlv *reg_tlv; 151 struct iwl_fw_ini_region_tlv *reg; 152 153 reg_tlv = mvm->trans->dbg.active_regions[i]; 154 if (!reg_tlv) 155 continue; 156 157 reg = (void *)reg_tlv->data; 158 /* 159 * We have only one DRAM IMR region, so we 160 * can break as soon as we find the first 161 * one. 162 */ 163 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 164 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 165 break; 166 } 167 } 168 } 169 } 170 171 if (version >= 5) { 172 struct iwl_alive_ntf_v5 *palive; 173 174 if (pkt_len < sizeof(*palive)) 175 return false; 176 177 palive = (void *)pkt->data; 178 umac = &palive->umac_data; 179 lmac1 = &palive->lmac_data[0]; 180 lmac2 = &palive->lmac_data[1]; 181 status = le16_to_cpu(palive->status); 182 183 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 184 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 185 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 186 187 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 188 mvm->trans->sku_id[0], 189 mvm->trans->sku_id[1], 190 mvm->trans->sku_id[2]); 191 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 192 struct iwl_alive_ntf_v4 *palive; 193 194 if (pkt_len < sizeof(*palive)) 195 return false; 196 197 palive = (void *)pkt->data; 198 umac = &palive->umac_data; 199 lmac1 = &palive->lmac_data[0]; 200 lmac2 = &palive->lmac_data[1]; 201 status = le16_to_cpu(palive->status); 202 } else if (iwl_rx_packet_payload_len(pkt) == 203 sizeof(struct iwl_alive_ntf_v3)) { 204 struct iwl_alive_ntf_v3 *palive3; 205 206 if (pkt_len < sizeof(*palive3)) 207 return false; 208 209 palive3 = (void *)pkt->data; 210 umac = &palive3->umac_data; 211 lmac1 = &palive3->lmac_data; 212 status = le16_to_cpu(palive3->status); 213 } else { 214 WARN(1, "unsupported alive notification (size %d)\n", 215 iwl_rx_packet_payload_len(pkt)); 216 /* get timeout later */ 217 return false; 218 } 219 220 lmac_error_event_table = 221 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 222 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 223 224 if (lmac2) 225 mvm->trans->dbg.lmac_error_event_table[1] = 226 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 227 228 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 229 ~FW_ADDR_CACHE_CONTROL; 230 231 if (umac_error_table) { 232 if (umac_error_table >= 233 mvm->trans->cfg->min_umac_error_event_table) { 234 iwl_fw_umac_set_alive_err_table(mvm->trans, 235 umac_error_table); 236 } else { 237 IWL_ERR(mvm, 238 "Not valid error log pointer 0x%08X for %s uCode\n", 239 umac_error_table, 240 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 241 "Init" : "RT"); 242 } 243 } 244 245 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 246 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 247 248 IWL_DEBUG_FW(mvm, 249 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 250 status, lmac1->ver_type, lmac1->ver_subtype); 251 252 if (lmac2) 253 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 254 255 IWL_DEBUG_FW(mvm, 256 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 257 le32_to_cpu(umac->umac_major), 258 le32_to_cpu(umac->umac_minor)); 259 260 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 261 262 return true; 263 } 264 265 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 266 struct iwl_rx_packet *pkt, void *data) 267 { 268 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 269 270 return true; 271 } 272 273 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 274 struct iwl_rx_packet *pkt, void *data) 275 { 276 struct iwl_phy_db *phy_db = data; 277 278 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 279 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 280 return true; 281 } 282 283 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 284 285 return false; 286 } 287 288 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 289 { 290 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 291 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 292 293 struct iwl_trans *trans = mvm->trans; 294 enum iwl_device_family device_family = trans->trans_cfg->device_family; 295 296 if (device_family < IWL_DEVICE_FAMILY_8000) 297 return; 298 299 if (device_family <= IWL_DEVICE_FAMILY_9000) 300 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 301 else 302 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 303 304 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 305 306 /* print OPT info */ 307 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 308 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 309 } 310 311 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 312 enum iwl_ucode_type ucode_type) 313 { 314 struct iwl_notification_wait alive_wait; 315 struct iwl_mvm_alive_data alive_data = {}; 316 const struct fw_img *fw; 317 int ret; 318 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 319 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 320 bool run_in_rfkill = 321 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 322 323 if (ucode_type == IWL_UCODE_REGULAR && 324 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 325 !(fw_has_capa(&mvm->fw->ucode_capa, 326 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 327 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 328 else 329 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 330 if (WARN_ON(!fw)) 331 return -EINVAL; 332 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 333 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 334 335 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 336 alive_cmd, ARRAY_SIZE(alive_cmd), 337 iwl_alive_fn, &alive_data); 338 339 /* 340 * We want to load the INIT firmware even in RFKILL 341 * For the unified firmware case, the ucode_type is not 342 * INIT, but we still need to run it. 343 */ 344 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 345 if (ret) { 346 iwl_fw_set_current_image(&mvm->fwrt, old_type); 347 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 348 return ret; 349 } 350 351 /* 352 * Some things may run in the background now, but we 353 * just wait for the ALIVE notification here. 354 */ 355 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 356 MVM_UCODE_ALIVE_TIMEOUT); 357 if (ret) { 358 struct iwl_trans *trans = mvm->trans; 359 360 /* SecBoot info */ 361 if (trans->trans_cfg->device_family >= 362 IWL_DEVICE_FAMILY_22000) { 363 IWL_ERR(mvm, 364 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 365 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 366 iwl_read_umac_prph(trans, 367 UMAG_SB_CPU_2_STATUS)); 368 } else if (trans->trans_cfg->device_family >= 369 IWL_DEVICE_FAMILY_8000) { 370 IWL_ERR(mvm, 371 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 372 iwl_read_prph(trans, SB_CPU_1_STATUS), 373 iwl_read_prph(trans, SB_CPU_2_STATUS)); 374 } 375 376 iwl_mvm_print_pd_notification(mvm); 377 378 /* LMAC/UMAC PC info */ 379 if (trans->trans_cfg->device_family >= 380 IWL_DEVICE_FAMILY_9000) { 381 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 382 iwl_read_umac_prph(trans, 383 UREG_UMAC_CURRENT_PC)); 384 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 385 iwl_read_umac_prph(trans, 386 UREG_LMAC1_CURRENT_PC)); 387 if (iwl_mvm_is_cdb_supported(mvm)) 388 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 389 iwl_read_umac_prph(trans, 390 UREG_LMAC2_CURRENT_PC)); 391 } 392 393 if (ret == -ETIMEDOUT) 394 iwl_fw_dbg_error_collect(&mvm->fwrt, 395 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 396 397 iwl_fw_set_current_image(&mvm->fwrt, old_type); 398 return ret; 399 } 400 401 if (!alive_data.valid) { 402 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 403 iwl_fw_set_current_image(&mvm->fwrt, old_type); 404 return -EIO; 405 } 406 407 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 408 if (ret) { 409 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 410 iwl_fw_set_current_image(&mvm->fwrt, old_type); 411 return ret; 412 } 413 414 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 415 416 /* 417 * Note: all the queues are enabled as part of the interface 418 * initialization, but in firmware restart scenarios they 419 * could be stopped, so wake them up. In firmware restart, 420 * mac80211 will have the queues stopped as well until the 421 * reconfiguration completes. During normal startup, they 422 * will be empty. 423 */ 424 425 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 426 /* 427 * Set a 'fake' TID for the command queue, since we use the 428 * hweight() of the tid_bitmap as a refcount now. Not that 429 * we ever even consider the command queue as one we might 430 * want to reuse, but be safe nevertheless. 431 */ 432 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 433 BIT(IWL_MAX_TID_COUNT + 2); 434 435 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 436 #ifdef CONFIG_IWLWIFI_DEBUGFS 437 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 438 #endif 439 440 /* 441 * All the BSSes in the BSS table include the GP2 in the system 442 * at the beacon Rx time, this is of course no longer relevant 443 * since we are resetting the firmware. 444 * Purge all the BSS table. 445 */ 446 cfg80211_bss_flush(mvm->hw->wiphy); 447 448 return 0; 449 } 450 451 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 452 { 453 struct iwl_notification_wait init_wait; 454 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 455 struct iwl_init_extended_cfg_cmd init_cfg = { 456 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 457 }; 458 static const u16 init_complete[] = { 459 INIT_COMPLETE_NOTIF, 460 }; 461 int ret; 462 463 if (mvm->trans->cfg->tx_with_siso_diversity) 464 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 465 466 lockdep_assert_held(&mvm->mutex); 467 468 mvm->rfkill_safe_init_done = false; 469 470 iwl_init_notification_wait(&mvm->notif_wait, 471 &init_wait, 472 init_complete, 473 ARRAY_SIZE(init_complete), 474 iwl_wait_init_complete, 475 NULL); 476 477 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 478 479 /* Will also start the device */ 480 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 481 if (ret) { 482 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 483 goto error; 484 } 485 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 486 NULL); 487 488 /* Send init config command to mark that we are sending NVM access 489 * commands 490 */ 491 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 492 INIT_EXTENDED_CFG_CMD), 493 CMD_SEND_IN_RFKILL, 494 sizeof(init_cfg), &init_cfg); 495 if (ret) { 496 IWL_ERR(mvm, "Failed to run init config command: %d\n", 497 ret); 498 goto error; 499 } 500 501 /* Load NVM to NIC if needed */ 502 if (mvm->nvm_file_name) { 503 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 504 mvm->nvm_sections); 505 if (ret) 506 goto error; 507 ret = iwl_mvm_load_nvm_to_nic(mvm); 508 if (ret) 509 goto error; 510 } 511 512 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 513 ret = iwl_nvm_init(mvm); 514 if (ret) { 515 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 516 goto error; 517 } 518 } 519 520 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 521 NVM_ACCESS_COMPLETE), 522 CMD_SEND_IN_RFKILL, 523 sizeof(nvm_complete), &nvm_complete); 524 if (ret) { 525 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 526 ret); 527 goto error; 528 } 529 530 /* We wait for the INIT complete notification */ 531 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 532 MVM_UCODE_ALIVE_TIMEOUT); 533 if (ret) 534 return ret; 535 536 /* Read the NVM only at driver load time, no need to do this twice */ 537 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 538 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 539 if (IS_ERR(mvm->nvm_data)) { 540 ret = PTR_ERR(mvm->nvm_data); 541 mvm->nvm_data = NULL; 542 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 543 return ret; 544 } 545 } 546 547 mvm->rfkill_safe_init_done = true; 548 549 return 0; 550 551 error: 552 iwl_remove_notification(&mvm->notif_wait, &init_wait); 553 return ret; 554 } 555 556 #ifdef CONFIG_ACPI 557 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 558 struct iwl_phy_specific_cfg *phy_filters) 559 { 560 /* 561 * TODO: read specific phy config from BIOS 562 * ACPI table for this feature has not been defined yet, 563 * so for now we use hardcoded values. 564 */ 565 566 if (IWL_MVM_PHY_FILTER_CHAIN_A) { 567 phy_filters->filter_cfg_chain_a = 568 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 569 } 570 if (IWL_MVM_PHY_FILTER_CHAIN_B) { 571 phy_filters->filter_cfg_chain_b = 572 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 573 } 574 if (IWL_MVM_PHY_FILTER_CHAIN_C) { 575 phy_filters->filter_cfg_chain_c = 576 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 577 } 578 if (IWL_MVM_PHY_FILTER_CHAIN_D) { 579 phy_filters->filter_cfg_chain_d = 580 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 581 } 582 } 583 #else /* CONFIG_ACPI */ 584 585 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 586 struct iwl_phy_specific_cfg *phy_filters) 587 { 588 } 589 #endif /* CONFIG_ACPI */ 590 591 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 592 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 593 { 594 u8 cmd_ver; 595 int ret; 596 struct iwl_host_cmd cmd = { 597 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 598 SAR_OFFSET_MAPPING_TABLE_CMD), 599 .flags = 0, 600 .data[0] = &mvm->fwrt.sgom_table, 601 .len[0] = sizeof(mvm->fwrt.sgom_table), 602 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 603 }; 604 605 if (!mvm->fwrt.sgom_enabled) { 606 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 607 return 0; 608 } 609 610 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 611 IWL_FW_CMD_VER_UNKNOWN); 612 613 if (cmd_ver != 2) { 614 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 615 cmd_ver); 616 return 0; 617 } 618 619 ret = iwl_mvm_send_cmd(mvm, &cmd); 620 if (ret < 0) 621 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 622 623 return ret; 624 } 625 #else 626 627 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 628 { 629 return 0; 630 } 631 #endif 632 633 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 634 { 635 u32 cmd_id = PHY_CONFIGURATION_CMD; 636 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 637 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 638 struct iwl_phy_specific_cfg phy_filters = {}; 639 u8 cmd_ver; 640 size_t cmd_size; 641 642 if (iwl_mvm_has_unified_ucode(mvm) && 643 !mvm->trans->cfg->tx_with_siso_diversity) 644 return 0; 645 646 if (mvm->trans->cfg->tx_with_siso_diversity) { 647 /* 648 * TODO: currently we don't set the antenna but letting the NIC 649 * to decide which antenna to use. This should come from BIOS. 650 */ 651 phy_cfg_cmd.phy_cfg = 652 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 653 } 654 655 /* Set parameters */ 656 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 657 658 /* set flags extra PHY configuration flags from the device's cfg */ 659 phy_cfg_cmd.phy_cfg |= 660 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 661 662 phy_cfg_cmd.calib_control.event_trigger = 663 mvm->fw->default_calib[ucode_type].event_trigger; 664 phy_cfg_cmd.calib_control.flow_trigger = 665 mvm->fw->default_calib[ucode_type].flow_trigger; 666 667 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 668 IWL_FW_CMD_VER_UNKNOWN); 669 if (cmd_ver == 3) { 670 iwl_mvm_phy_filter_init(mvm, &phy_filters); 671 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 672 sizeof(struct iwl_phy_specific_cfg)); 673 } 674 675 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 676 phy_cfg_cmd.phy_cfg); 677 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 678 sizeof(struct iwl_phy_cfg_cmd_v1); 679 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 680 } 681 682 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 683 { 684 struct iwl_notification_wait calib_wait; 685 static const u16 init_complete[] = { 686 INIT_COMPLETE_NOTIF, 687 CALIB_RES_NOTIF_PHY_DB 688 }; 689 int ret; 690 691 if (iwl_mvm_has_unified_ucode(mvm)) 692 return iwl_run_unified_mvm_ucode(mvm); 693 694 lockdep_assert_held(&mvm->mutex); 695 696 mvm->rfkill_safe_init_done = false; 697 698 iwl_init_notification_wait(&mvm->notif_wait, 699 &calib_wait, 700 init_complete, 701 ARRAY_SIZE(init_complete), 702 iwl_wait_phy_db_entry, 703 mvm->phy_db); 704 705 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 706 707 /* Will also start the device */ 708 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 709 if (ret) { 710 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 711 goto remove_notif; 712 } 713 714 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 715 ret = iwl_mvm_send_bt_init_conf(mvm); 716 if (ret) 717 goto remove_notif; 718 } 719 720 /* Read the NVM only at driver load time, no need to do this twice */ 721 if (!mvm->nvm_data) { 722 ret = iwl_nvm_init(mvm); 723 if (ret) { 724 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 725 goto remove_notif; 726 } 727 } 728 729 /* In case we read the NVM from external file, load it to the NIC */ 730 if (mvm->nvm_file_name) { 731 ret = iwl_mvm_load_nvm_to_nic(mvm); 732 if (ret) 733 goto remove_notif; 734 } 735 736 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 737 "Too old NVM version (0x%0x, required = 0x%0x)", 738 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 739 740 /* 741 * abort after reading the nvm in case RF Kill is on, we will complete 742 * the init seq later when RF kill will switch to off 743 */ 744 if (iwl_mvm_is_radio_hw_killed(mvm)) { 745 IWL_DEBUG_RF_KILL(mvm, 746 "jump over all phy activities due to RF kill\n"); 747 goto remove_notif; 748 } 749 750 mvm->rfkill_safe_init_done = true; 751 752 /* Send TX valid antennas before triggering calibrations */ 753 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 754 if (ret) 755 goto remove_notif; 756 757 ret = iwl_send_phy_cfg_cmd(mvm); 758 if (ret) { 759 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 760 ret); 761 goto remove_notif; 762 } 763 764 /* 765 * Some things may run in the background now, but we 766 * just wait for the calibration complete notification. 767 */ 768 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 769 MVM_UCODE_CALIB_TIMEOUT); 770 if (!ret) 771 goto out; 772 773 if (iwl_mvm_is_radio_hw_killed(mvm)) { 774 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 775 ret = 0; 776 } else { 777 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 778 ret); 779 } 780 781 goto out; 782 783 remove_notif: 784 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 785 out: 786 mvm->rfkill_safe_init_done = false; 787 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 788 /* we want to debug INIT and we have no NVM - fake */ 789 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 790 sizeof(struct ieee80211_channel) + 791 sizeof(struct ieee80211_rate), 792 GFP_KERNEL); 793 if (!mvm->nvm_data) 794 return -ENOMEM; 795 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 796 mvm->nvm_data->bands[0].n_channels = 1; 797 mvm->nvm_data->bands[0].n_bitrates = 1; 798 mvm->nvm_data->bands[0].bitrates = 799 (void *)((u8 *)mvm->nvm_data->channels + 1); 800 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 801 } 802 803 return ret; 804 } 805 806 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 807 { 808 struct iwl_ltr_config_cmd cmd = { 809 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 810 }; 811 812 if (!mvm->trans->ltr_enabled) 813 return 0; 814 815 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 816 sizeof(cmd), &cmd); 817 } 818 819 #ifdef CONFIG_ACPI 820 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 821 { 822 u32 cmd_id = REDUCE_TX_POWER_CMD; 823 struct iwl_dev_tx_power_cmd cmd = { 824 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 825 }; 826 __le16 *per_chain; 827 int ret; 828 u16 len = 0; 829 u32 n_subbands; 830 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 831 IWL_FW_CMD_VER_UNKNOWN); 832 if (cmd_ver == 7) { 833 len = sizeof(cmd.v7); 834 n_subbands = IWL_NUM_SUB_BANDS_V2; 835 per_chain = cmd.v7.per_chain[0][0]; 836 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 837 } else if (cmd_ver == 6) { 838 len = sizeof(cmd.v6); 839 n_subbands = IWL_NUM_SUB_BANDS_V2; 840 per_chain = cmd.v6.per_chain[0][0]; 841 } else if (fw_has_api(&mvm->fw->ucode_capa, 842 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 843 len = sizeof(cmd.v5); 844 n_subbands = IWL_NUM_SUB_BANDS_V1; 845 per_chain = cmd.v5.per_chain[0][0]; 846 } else if (fw_has_capa(&mvm->fw->ucode_capa, 847 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 848 len = sizeof(cmd.v4); 849 n_subbands = IWL_NUM_SUB_BANDS_V1; 850 per_chain = cmd.v4.per_chain[0][0]; 851 } else { 852 len = sizeof(cmd.v3); 853 n_subbands = IWL_NUM_SUB_BANDS_V1; 854 per_chain = cmd.v3.per_chain[0][0]; 855 } 856 857 /* all structs have the same common part, add it */ 858 len += sizeof(cmd.common); 859 860 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 861 IWL_NUM_CHAIN_TABLES, 862 n_subbands, prof_a, prof_b); 863 864 /* return on error or if the profile is disabled (positive number) */ 865 if (ret) 866 return ret; 867 868 iwl_mei_set_power_limit(per_chain); 869 870 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 871 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 872 } 873 874 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 875 { 876 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 877 struct iwl_geo_tx_power_profiles_resp *resp; 878 u16 len; 879 int ret; 880 struct iwl_host_cmd cmd = { 881 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 882 .flags = CMD_WANT_SKB, 883 .data = { &geo_tx_cmd }, 884 }; 885 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 886 IWL_FW_CMD_VER_UNKNOWN); 887 888 /* the ops field is at the same spot for all versions, so set in v1 */ 889 geo_tx_cmd.v1.ops = 890 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 891 892 if (cmd_ver == 5) 893 len = sizeof(geo_tx_cmd.v5); 894 else if (cmd_ver == 4) 895 len = sizeof(geo_tx_cmd.v4); 896 else if (cmd_ver == 3) 897 len = sizeof(geo_tx_cmd.v3); 898 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 899 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 900 len = sizeof(geo_tx_cmd.v2); 901 else 902 len = sizeof(geo_tx_cmd.v1); 903 904 if (!iwl_sar_geo_support(&mvm->fwrt)) 905 return -EOPNOTSUPP; 906 907 cmd.len[0] = len; 908 909 ret = iwl_mvm_send_cmd(mvm, &cmd); 910 if (ret) { 911 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 912 return ret; 913 } 914 915 resp = (void *)cmd.resp_pkt->data; 916 ret = le32_to_cpu(resp->profile_idx); 917 918 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 919 ret = -EIO; 920 921 iwl_free_resp(&cmd); 922 return ret; 923 } 924 925 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 926 { 927 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 928 union iwl_geo_tx_power_profiles_cmd cmd; 929 u16 len; 930 u32 n_bands; 931 u32 n_profiles; 932 u32 sk = 0; 933 int ret; 934 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 935 IWL_FW_CMD_VER_UNKNOWN); 936 937 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 938 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 939 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 940 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 941 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 942 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 943 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 944 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 945 946 /* the ops field is at the same spot for all versions, so set in v1 */ 947 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 948 949 if (cmd_ver == 5) { 950 len = sizeof(cmd.v5); 951 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 952 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 953 } else if (cmd_ver == 4) { 954 len = sizeof(cmd.v4); 955 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 956 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 957 } else if (cmd_ver == 3) { 958 len = sizeof(cmd.v3); 959 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 960 n_profiles = ACPI_NUM_GEO_PROFILES; 961 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 962 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 963 len = sizeof(cmd.v2); 964 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 965 n_profiles = ACPI_NUM_GEO_PROFILES; 966 } else { 967 len = sizeof(cmd.v1); 968 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 969 n_profiles = ACPI_NUM_GEO_PROFILES; 970 } 971 972 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 973 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 974 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 976 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 977 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 978 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 979 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 980 /* the table is at the same position for all versions, so set use v1 */ 981 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 982 n_bands, n_profiles); 983 984 /* 985 * It is a valid scenario to not support SAR, or miss wgds table, 986 * but in that case there is no need to send the command. 987 */ 988 if (ret) 989 return 0; 990 991 /* Only set to South Korea if the table revision is 1 */ 992 if (mvm->fwrt.geo_rev == 1) 993 sk = 1; 994 995 /* 996 * Set the table_revision to South Korea (1) or not (0). The 997 * element name is misleading, as it doesn't contain the table 998 * revision number, but whether the South Korea variation 999 * should be used. 1000 * This must be done after calling iwl_sar_geo_init(). 1001 */ 1002 if (cmd_ver == 5) 1003 cmd.v5.table_revision = cpu_to_le32(sk); 1004 else if (cmd_ver == 4) 1005 cmd.v4.table_revision = cpu_to_le32(sk); 1006 else if (cmd_ver == 3) 1007 cmd.v3.table_revision = cpu_to_le32(sk); 1008 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1009 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1010 cmd.v2.table_revision = cpu_to_le32(sk); 1011 1012 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1013 } 1014 1015 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1016 { 1017 union iwl_ppag_table_cmd cmd; 1018 int ret, cmd_size; 1019 1020 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1021 /* Not supporting PPAG table is a valid scenario */ 1022 if(ret < 0) 1023 return 0; 1024 1025 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1026 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1027 PER_PLATFORM_ANT_GAIN_CMD), 1028 0, cmd_size, &cmd); 1029 if (ret < 0) 1030 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1031 ret); 1032 1033 return ret; 1034 } 1035 1036 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1037 { 1038 /* no need to read the table, done in INIT stage */ 1039 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1040 return 0; 1041 1042 return iwl_mvm_ppag_send_cmd(mvm); 1043 } 1044 1045 static const struct dmi_system_id dmi_tas_approved_list[] = { 1046 { .ident = "HP", 1047 .matches = { 1048 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1049 }, 1050 }, 1051 { .ident = "SAMSUNG", 1052 .matches = { 1053 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1054 }, 1055 }, 1056 { .ident = "LENOVO", 1057 .matches = { 1058 DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"), 1059 }, 1060 }, 1061 { .ident = "DELL", 1062 .matches = { 1063 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1064 }, 1065 }, 1066 1067 /* keep last */ 1068 {} 1069 }; 1070 1071 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1072 { 1073 int i; 1074 u32 size = le32_to_cpu(*le_size); 1075 1076 /* Verify that there is room for another country */ 1077 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1078 return false; 1079 1080 for (i = 0; i < size; i++) { 1081 if (list[i] == cpu_to_le32(mcc)) 1082 return true; 1083 } 1084 1085 list[size++] = cpu_to_le32(mcc); 1086 *le_size = cpu_to_le32(size); 1087 return true; 1088 } 1089 1090 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1091 { 1092 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1093 int ret; 1094 union iwl_tas_config_cmd cmd = {}; 1095 int cmd_size, fw_ver; 1096 1097 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1098 APCI_WTAS_BLACK_LIST_MAX); 1099 1100 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1101 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1102 return; 1103 } 1104 1105 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1106 IWL_FW_CMD_VER_UNKNOWN); 1107 1108 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1109 if (ret < 0) { 1110 IWL_DEBUG_RADIO(mvm, 1111 "TAS table invalid or unavailable. (%d)\n", 1112 ret); 1113 return; 1114 } 1115 1116 if (ret == 0) 1117 return; 1118 1119 if (!dmi_check_system(dmi_tas_approved_list)) { 1120 IWL_DEBUG_RADIO(mvm, 1121 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1122 dmi_get_system_info(DMI_SYS_VENDOR)); 1123 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1124 &cmd.v4.block_list_size, 1125 IWL_TAS_US_MCC)) || 1126 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1127 &cmd.v4.block_list_size, 1128 IWL_TAS_CANADA_MCC))) { 1129 IWL_DEBUG_RADIO(mvm, 1130 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1131 return; 1132 } 1133 } 1134 1135 /* v4 is the same size as v3, so no need to differentiate here */ 1136 cmd_size = fw_ver < 3 ? 1137 sizeof(struct iwl_tas_config_cmd_v2) : 1138 sizeof(struct iwl_tas_config_cmd_v3); 1139 1140 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1141 if (ret < 0) 1142 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1143 } 1144 1145 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1146 { 1147 u8 value; 1148 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1149 &iwl_rfi_guid, &value); 1150 1151 if (ret < 0) { 1152 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1153 1154 } else if (value >= DSM_VALUE_RFI_MAX) { 1155 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1156 value); 1157 1158 } else if (value == DSM_VALUE_RFI_ENABLE) { 1159 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1160 return DSM_VALUE_RFI_ENABLE; 1161 } 1162 1163 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1164 1165 /* default behaviour is disabled */ 1166 return DSM_VALUE_RFI_DISABLE; 1167 } 1168 1169 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1170 { 1171 int ret; 1172 u32 value; 1173 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1174 1175 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1176 1177 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1178 &iwl_guid, &value); 1179 if (!ret) 1180 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1181 1182 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1183 DSM_FUNC_ENABLE_UNII4_CHAN, 1184 &iwl_guid, &value); 1185 if (!ret) 1186 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1187 1188 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1189 DSM_FUNC_ACTIVATE_CHANNEL, 1190 &iwl_guid, &value); 1191 if (!ret) 1192 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1193 1194 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1195 DSM_FUNC_ENABLE_6E, 1196 &iwl_guid, &value); 1197 if (!ret) 1198 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1199 1200 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1201 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1202 &iwl_guid, &value); 1203 if (!ret) 1204 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1205 1206 if (cmd.config_bitmap || 1207 cmd.oem_uhb_allow_bitmap || 1208 cmd.oem_11ax_allow_bitmap || 1209 cmd.oem_unii4_allow_bitmap || 1210 cmd.chan_state_active_bitmap || 1211 cmd.force_disable_channels_bitmap) { 1212 size_t cmd_size; 1213 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1214 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1215 LARI_CONFIG_CHANGE), 1216 1); 1217 switch (cmd_ver) { 1218 case 6: 1219 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1220 break; 1221 case 5: 1222 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1223 break; 1224 case 4: 1225 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1226 break; 1227 case 3: 1228 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1229 break; 1230 case 2: 1231 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1232 break; 1233 default: 1234 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1235 break; 1236 } 1237 1238 IWL_DEBUG_RADIO(mvm, 1239 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1240 le32_to_cpu(cmd.config_bitmap), 1241 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1242 IWL_DEBUG_RADIO(mvm, 1243 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1244 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1245 le32_to_cpu(cmd.chan_state_active_bitmap), 1246 cmd_ver); 1247 IWL_DEBUG_RADIO(mvm, 1248 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1249 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1250 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1251 ret = iwl_mvm_send_cmd_pdu(mvm, 1252 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1253 LARI_CONFIG_CHANGE), 1254 0, cmd_size, &cmd); 1255 if (ret < 0) 1256 IWL_DEBUG_RADIO(mvm, 1257 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1258 ret); 1259 } 1260 } 1261 1262 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1263 { 1264 int ret; 1265 1266 /* read PPAG table */ 1267 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1268 if (ret < 0) { 1269 IWL_DEBUG_RADIO(mvm, 1270 "PPAG BIOS table invalid or unavailable. (%d)\n", 1271 ret); 1272 } 1273 1274 /* read SAR tables */ 1275 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1276 if (ret < 0) { 1277 IWL_DEBUG_RADIO(mvm, 1278 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1279 ret); 1280 /* 1281 * If not available, don't fail and don't bother with EWRD and 1282 * WGDS */ 1283 1284 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1285 /* 1286 * If basic SAR is not available, we check for WGDS, 1287 * which should *not* be available either. If it is 1288 * available, issue an error, because we can't use SAR 1289 * Geo without basic SAR. 1290 */ 1291 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1292 } 1293 1294 } else { 1295 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1296 /* if EWRD is not available, we can still use 1297 * WRDS, so don't fail */ 1298 if (ret < 0) 1299 IWL_DEBUG_RADIO(mvm, 1300 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1301 ret); 1302 1303 /* read geo SAR table */ 1304 if (iwl_sar_geo_support(&mvm->fwrt)) { 1305 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1306 if (ret < 0) 1307 IWL_DEBUG_RADIO(mvm, 1308 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1309 ret); 1310 /* we don't fail if the table is not available */ 1311 } 1312 } 1313 } 1314 #else /* CONFIG_ACPI */ 1315 1316 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1317 int prof_a, int prof_b) 1318 { 1319 return 1; 1320 } 1321 1322 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1323 { 1324 return -ENOENT; 1325 } 1326 1327 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1328 { 1329 return 0; 1330 } 1331 1332 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1333 { 1334 return -ENOENT; 1335 } 1336 1337 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1338 { 1339 return 0; 1340 } 1341 1342 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1343 { 1344 } 1345 1346 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1347 { 1348 } 1349 1350 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1351 { 1352 return DSM_VALUE_RFI_DISABLE; 1353 } 1354 1355 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1356 { 1357 } 1358 1359 #endif /* CONFIG_ACPI */ 1360 1361 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1362 { 1363 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1364 int ret; 1365 u32 resp; 1366 1367 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1368 .flags = cpu_to_le32(flags), 1369 .buf_size = 0, 1370 }; 1371 struct iwl_host_cmd host_cmd = { 1372 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1373 .flags = CMD_WANT_SKB, 1374 .data = {&recovery_cmd, }, 1375 .len = {sizeof(recovery_cmd), }, 1376 }; 1377 1378 /* no error log was defined in TLV */ 1379 if (!error_log_size) 1380 return; 1381 1382 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1383 /* no buf was allocated while HW reset */ 1384 if (!mvm->error_recovery_buf) 1385 return; 1386 1387 host_cmd.data[1] = mvm->error_recovery_buf; 1388 host_cmd.len[1] = error_log_size; 1389 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1390 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1391 } 1392 1393 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1394 kfree(mvm->error_recovery_buf); 1395 mvm->error_recovery_buf = NULL; 1396 1397 if (ret) { 1398 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1399 return; 1400 } 1401 1402 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1403 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1404 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1405 if (resp) 1406 IWL_ERR(mvm, 1407 "Failed to send recovery cmd blob was invalid %d\n", 1408 resp); 1409 } 1410 } 1411 1412 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1413 { 1414 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1415 } 1416 1417 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1418 { 1419 int ret; 1420 1421 if (iwl_mvm_has_unified_ucode(mvm)) 1422 return iwl_run_unified_mvm_ucode(mvm); 1423 1424 ret = iwl_run_init_mvm_ucode(mvm); 1425 1426 if (ret) { 1427 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1428 1429 if (iwlmvm_mod_params.init_dbg) 1430 return 0; 1431 return ret; 1432 } 1433 1434 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1435 iwl_trans_stop_device(mvm->trans); 1436 ret = iwl_trans_start_hw(mvm->trans); 1437 if (ret) 1438 return ret; 1439 1440 mvm->rfkill_safe_init_done = false; 1441 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1442 if (ret) 1443 return ret; 1444 1445 mvm->rfkill_safe_init_done = true; 1446 1447 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1448 NULL); 1449 1450 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1451 } 1452 1453 int iwl_mvm_up(struct iwl_mvm *mvm) 1454 { 1455 int ret, i; 1456 struct ieee80211_channel *chan; 1457 struct cfg80211_chan_def chandef; 1458 struct ieee80211_supported_band *sband = NULL; 1459 1460 lockdep_assert_held(&mvm->mutex); 1461 1462 ret = iwl_trans_start_hw(mvm->trans); 1463 if (ret) 1464 return ret; 1465 1466 ret = iwl_mvm_load_rt_fw(mvm); 1467 if (ret) { 1468 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1469 if (ret != -ERFKILL) 1470 iwl_fw_dbg_error_collect(&mvm->fwrt, 1471 FW_DBG_TRIGGER_DRIVER); 1472 goto error; 1473 } 1474 1475 iwl_get_shared_mem_conf(&mvm->fwrt); 1476 1477 ret = iwl_mvm_sf_update(mvm, NULL, false); 1478 if (ret) 1479 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1480 1481 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1482 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1483 /* if we have a destination, assume EARLY START */ 1484 if (mvm->fw->dbg.dest_tlv) 1485 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1486 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1487 } 1488 1489 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1490 if (ret) 1491 goto error; 1492 1493 if (!iwl_mvm_has_unified_ucode(mvm)) { 1494 /* Send phy db control command and then phy db calibration */ 1495 ret = iwl_send_phy_db_data(mvm->phy_db); 1496 if (ret) 1497 goto error; 1498 } 1499 1500 ret = iwl_send_phy_cfg_cmd(mvm); 1501 if (ret) 1502 goto error; 1503 1504 ret = iwl_mvm_send_bt_init_conf(mvm); 1505 if (ret) 1506 goto error; 1507 1508 if (fw_has_capa(&mvm->fw->ucode_capa, 1509 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1510 ret = iwl_set_soc_latency(&mvm->fwrt); 1511 if (ret) 1512 goto error; 1513 } 1514 1515 /* Init RSS configuration */ 1516 ret = iwl_configure_rxq(&mvm->fwrt); 1517 if (ret) 1518 goto error; 1519 1520 if (iwl_mvm_has_new_rx_api(mvm)) { 1521 ret = iwl_send_rss_cfg_cmd(mvm); 1522 if (ret) { 1523 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1524 ret); 1525 goto error; 1526 } 1527 } 1528 1529 /* init the fw <-> mac80211 STA mapping */ 1530 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1531 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1532 1533 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1534 1535 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1536 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1537 1538 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1539 ret = iwl_mvm_send_dqa_cmd(mvm); 1540 if (ret) 1541 goto error; 1542 } 1543 1544 /* 1545 * Add auxiliary station for scanning. 1546 * Newer versions of this command implies that the fw uses 1547 * internal aux station for all aux activities that don't 1548 * requires a dedicated data queue. 1549 */ 1550 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1551 /* 1552 * In old version the aux station uses mac id like other 1553 * station and not lmac id 1554 */ 1555 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1556 if (ret) 1557 goto error; 1558 } 1559 1560 /* Add all the PHY contexts */ 1561 i = 0; 1562 while (!sband && i < NUM_NL80211_BANDS) 1563 sband = mvm->hw->wiphy->bands[i++]; 1564 1565 if (WARN_ON_ONCE(!sband)) { 1566 ret = -ENODEV; 1567 goto error; 1568 } 1569 1570 chan = &sband->channels[0]; 1571 1572 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1573 for (i = 0; i < NUM_PHY_CTX; i++) { 1574 /* 1575 * The channel used here isn't relevant as it's 1576 * going to be overwritten in the other flows. 1577 * For now use the first channel we have. 1578 */ 1579 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1580 &chandef, 1, 1); 1581 if (ret) 1582 goto error; 1583 } 1584 1585 if (iwl_mvm_is_tt_in_fw(mvm)) { 1586 /* in order to give the responsibility of ct-kill and 1587 * TX backoff to FW we need to send empty temperature reporting 1588 * cmd during init time 1589 */ 1590 iwl_mvm_send_temp_report_ths_cmd(mvm); 1591 } else { 1592 /* Initialize tx backoffs to the minimal possible */ 1593 iwl_mvm_tt_tx_backoff(mvm, 0); 1594 } 1595 1596 #ifdef CONFIG_THERMAL 1597 /* TODO: read the budget from BIOS / Platform NVM */ 1598 1599 /* 1600 * In case there is no budget from BIOS / Platform NVM the default 1601 * budget should be 2000mW (cooling state 0). 1602 */ 1603 if (iwl_mvm_is_ctdp_supported(mvm)) { 1604 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1605 mvm->cooling_dev.cur_state); 1606 if (ret) 1607 goto error; 1608 } 1609 #endif 1610 1611 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1612 WARN_ON(iwl_mvm_config_ltr(mvm)); 1613 1614 ret = iwl_mvm_power_update_device(mvm); 1615 if (ret) 1616 goto error; 1617 1618 iwl_mvm_lari_cfg(mvm); 1619 /* 1620 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1621 * anyway, so don't init MCC. 1622 */ 1623 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1624 ret = iwl_mvm_init_mcc(mvm); 1625 if (ret) 1626 goto error; 1627 } 1628 1629 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1630 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1631 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1632 ret = iwl_mvm_config_scan(mvm); 1633 if (ret) 1634 goto error; 1635 } 1636 1637 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1638 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1639 1640 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1641 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1642 1643 ret = iwl_mvm_ppag_init(mvm); 1644 if (ret) 1645 goto error; 1646 1647 ret = iwl_mvm_sar_init(mvm); 1648 if (ret == 0) 1649 ret = iwl_mvm_sar_geo_init(mvm); 1650 if (ret < 0) 1651 goto error; 1652 1653 ret = iwl_mvm_sgom_init(mvm); 1654 if (ret) 1655 goto error; 1656 1657 iwl_mvm_tas_init(mvm); 1658 iwl_mvm_leds_sync(mvm); 1659 1660 iwl_mvm_ftm_initiator_smooth_config(mvm); 1661 1662 if (fw_has_capa(&mvm->fw->ucode_capa, 1663 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 1664 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1665 iwl_rfi_send_config_cmd(mvm, NULL); 1666 } 1667 1668 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1669 return 0; 1670 error: 1671 if (!iwlmvm_mod_params.init_dbg || !ret) 1672 iwl_mvm_stop_device(mvm); 1673 return ret; 1674 } 1675 1676 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1677 { 1678 int ret, i; 1679 1680 lockdep_assert_held(&mvm->mutex); 1681 1682 ret = iwl_trans_start_hw(mvm->trans); 1683 if (ret) 1684 return ret; 1685 1686 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1687 if (ret) { 1688 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1689 goto error; 1690 } 1691 1692 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1693 if (ret) 1694 goto error; 1695 1696 /* Send phy db control command and then phy db calibration*/ 1697 ret = iwl_send_phy_db_data(mvm->phy_db); 1698 if (ret) 1699 goto error; 1700 1701 ret = iwl_send_phy_cfg_cmd(mvm); 1702 if (ret) 1703 goto error; 1704 1705 /* init the fw <-> mac80211 STA mapping */ 1706 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1707 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1708 1709 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1710 /* 1711 * Add auxiliary station for scanning. 1712 * Newer versions of this command implies that the fw uses 1713 * internal aux station for all aux activities that don't 1714 * requires a dedicated data queue. 1715 * In old version the aux station uses mac id like other 1716 * station and not lmac id 1717 */ 1718 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1719 if (ret) 1720 goto error; 1721 } 1722 1723 return 0; 1724 error: 1725 iwl_mvm_stop_device(mvm); 1726 return ret; 1727 } 1728 1729 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1730 struct iwl_rx_cmd_buffer *rxb) 1731 { 1732 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1733 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1734 1735 IWL_DEBUG_INFO(mvm, 1736 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1737 le32_to_cpu(mfuart_notif->installed_ver), 1738 le32_to_cpu(mfuart_notif->external_ver), 1739 le32_to_cpu(mfuart_notif->status), 1740 le32_to_cpu(mfuart_notif->duration)); 1741 1742 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1743 IWL_DEBUG_INFO(mvm, 1744 "MFUART: image size: 0x%08x\n", 1745 le32_to_cpu(mfuart_notif->image_size)); 1746 } 1747