1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10 
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 
19 #include "mvm.h"
20 #include "fw/dbg.h"
21 #include "iwl-phy-db.h"
22 #include "iwl-modparams.h"
23 #include "iwl-nvm-parse.h"
24 
25 #define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
26 #define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
27 
28 #define IWL_TAS_US_MCC 0x5553
29 #define IWL_TAS_CANADA_MCC 0x4341
30 
31 struct iwl_mvm_alive_data {
32 	bool valid;
33 	u32 scd_base_addr;
34 };
35 
36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 		.valid = cpu_to_le32(valid_tx_ant),
40 	};
41 
42 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46 
47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 	int i;
50 	struct iwl_rss_config_cmd cmd = {
51 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
52 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 	};
59 
60 	if (mvm->trans->num_rx_queues == 1)
61 		return 0;
62 
63 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 		cmd.indirection_table[i] =
66 			1 + (i % (mvm->trans->num_rx_queues - 1));
67 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68 
69 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71 
72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 	struct iwl_dqa_enable_cmd dqa_cmd = {
75 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 	};
77 	u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 	int ret;
79 
80 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 	if (ret)
82 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 	else
84 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85 
86 	return ret;
87 }
88 
89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 				   struct iwl_rx_cmd_buffer *rxb)
91 {
92 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94 	__le32 *dump_data = mfu_dump_notif->data;
95 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
96 	int i;
97 
98 	if (mfu_dump_notif->index_num == 0)
99 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
100 			 le32_to_cpu(mfu_dump_notif->assert_id));
101 
102 	for (i = 0; i < n_words; i++)
103 		IWL_DEBUG_INFO(mvm,
104 			       "MFUART assert dump, dword %u: 0x%08x\n",
105 			       le16_to_cpu(mfu_dump_notif->index_num) *
106 			       n_words + i,
107 			       le32_to_cpu(dump_data[i]));
108 }
109 
110 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
111 			 struct iwl_rx_packet *pkt, void *data)
112 {
113 	unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
114 	struct iwl_mvm *mvm =
115 		container_of(notif_wait, struct iwl_mvm, notif_wait);
116 	struct iwl_mvm_alive_data *alive_data = data;
117 	struct iwl_umac_alive *umac;
118 	struct iwl_lmac_alive *lmac1;
119 	struct iwl_lmac_alive *lmac2 = NULL;
120 	u16 status;
121 	u32 lmac_error_event_table, umac_error_table;
122 	u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
123 					      UCODE_ALIVE_NTFY, 0);
124 	u32 i;
125 
126 	if (version == 6) {
127 		struct iwl_alive_ntf_v6 *palive;
128 
129 		if (pkt_len < sizeof(*palive))
130 			return false;
131 
132 		palive = (void *)pkt->data;
133 		mvm->trans->dbg.imr_data.imr_enable =
134 			le32_to_cpu(palive->imr.enabled);
135 		mvm->trans->dbg.imr_data.imr_size =
136 			le32_to_cpu(palive->imr.size);
137 		mvm->trans->dbg.imr_data.imr2sram_remainbyte =
138 			mvm->trans->dbg.imr_data.imr_size;
139 		mvm->trans->dbg.imr_data.imr_base_addr =
140 			palive->imr.base_addr;
141 		mvm->trans->dbg.imr_data.imr_curr_addr =
142 			le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
143 		IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x  size 0x0%x Address 0x%016llx\n",
144 			     mvm->trans->dbg.imr_data.imr_enable,
145 			     mvm->trans->dbg.imr_data.imr_size,
146 			     le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
147 
148 		if (!mvm->trans->dbg.imr_data.imr_enable) {
149 			for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
150 				struct iwl_ucode_tlv *reg_tlv;
151 				struct iwl_fw_ini_region_tlv *reg;
152 
153 				reg_tlv = mvm->trans->dbg.active_regions[i];
154 				if (!reg_tlv)
155 					continue;
156 
157 				reg = (void *)reg_tlv->data;
158 				/*
159 				 * We have only one DRAM IMR region, so we
160 				 * can break as soon as we find the first
161 				 * one.
162 				 */
163 				if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
164 					mvm->trans->dbg.unsupported_region_msk |= BIT(i);
165 					break;
166 				}
167 			}
168 		}
169 	}
170 
171 	if (version >= 5) {
172 		struct iwl_alive_ntf_v5 *palive;
173 
174 		if (pkt_len < sizeof(*palive))
175 			return false;
176 
177 		palive = (void *)pkt->data;
178 		umac = &palive->umac_data;
179 		lmac1 = &palive->lmac_data[0];
180 		lmac2 = &palive->lmac_data[1];
181 		status = le16_to_cpu(palive->status);
182 
183 		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
184 		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
185 		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
186 
187 		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
188 			     mvm->trans->sku_id[0],
189 			     mvm->trans->sku_id[1],
190 			     mvm->trans->sku_id[2]);
191 	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
192 		struct iwl_alive_ntf_v4 *palive;
193 
194 		if (pkt_len < sizeof(*palive))
195 			return false;
196 
197 		palive = (void *)pkt->data;
198 		umac = &palive->umac_data;
199 		lmac1 = &palive->lmac_data[0];
200 		lmac2 = &palive->lmac_data[1];
201 		status = le16_to_cpu(palive->status);
202 	} else if (iwl_rx_packet_payload_len(pkt) ==
203 		   sizeof(struct iwl_alive_ntf_v3)) {
204 		struct iwl_alive_ntf_v3 *palive3;
205 
206 		if (pkt_len < sizeof(*palive3))
207 			return false;
208 
209 		palive3 = (void *)pkt->data;
210 		umac = &palive3->umac_data;
211 		lmac1 = &palive3->lmac_data;
212 		status = le16_to_cpu(palive3->status);
213 	} else {
214 		WARN(1, "unsupported alive notification (size %d)\n",
215 		     iwl_rx_packet_payload_len(pkt));
216 		/* get timeout later */
217 		return false;
218 	}
219 
220 	lmac_error_event_table =
221 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
222 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
223 
224 	if (lmac2)
225 		mvm->trans->dbg.lmac_error_event_table[1] =
226 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
227 
228 	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
229 							~FW_ADDR_CACHE_CONTROL;
230 
231 	if (umac_error_table) {
232 		if (umac_error_table >=
233 		    mvm->trans->cfg->min_umac_error_event_table) {
234 			iwl_fw_umac_set_alive_err_table(mvm->trans,
235 							umac_error_table);
236 		} else {
237 			IWL_ERR(mvm,
238 				"Not valid error log pointer 0x%08X for %s uCode\n",
239 				umac_error_table,
240 				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
241 				"Init" : "RT");
242 		}
243 	}
244 
245 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
246 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
247 
248 	IWL_DEBUG_FW(mvm,
249 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
250 		     status, lmac1->ver_type, lmac1->ver_subtype);
251 
252 	if (lmac2)
253 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
254 
255 	IWL_DEBUG_FW(mvm,
256 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
257 		     le32_to_cpu(umac->umac_major),
258 		     le32_to_cpu(umac->umac_minor));
259 
260 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
261 
262 	return true;
263 }
264 
265 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
266 				   struct iwl_rx_packet *pkt, void *data)
267 {
268 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
269 
270 	return true;
271 }
272 
273 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
274 				  struct iwl_rx_packet *pkt, void *data)
275 {
276 	struct iwl_phy_db *phy_db = data;
277 
278 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
279 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
280 		return true;
281 	}
282 
283 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
284 
285 	return false;
286 }
287 
288 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
289 {
290 #define IWL_FW_PRINT_REG_INFO(reg_name) \
291 	IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
292 
293 	struct iwl_trans *trans = mvm->trans;
294 	enum iwl_device_family device_family = trans->trans_cfg->device_family;
295 
296 	if (device_family < IWL_DEVICE_FAMILY_8000)
297 		return;
298 
299 	if (device_family <= IWL_DEVICE_FAMILY_9000)
300 		IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
301 	else
302 		IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
303 
304 	IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
305 
306 	/* print OPT info */
307 	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
308 	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
309 }
310 
311 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
312 					 enum iwl_ucode_type ucode_type)
313 {
314 	struct iwl_notification_wait alive_wait;
315 	struct iwl_mvm_alive_data alive_data = {};
316 	const struct fw_img *fw;
317 	int ret;
318 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
319 	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
320 	bool run_in_rfkill =
321 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
322 
323 	if (ucode_type == IWL_UCODE_REGULAR &&
324 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
325 	    !(fw_has_capa(&mvm->fw->ucode_capa,
326 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
327 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
328 	else
329 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
330 	if (WARN_ON(!fw))
331 		return -EINVAL;
332 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
333 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
334 
335 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
336 				   alive_cmd, ARRAY_SIZE(alive_cmd),
337 				   iwl_alive_fn, &alive_data);
338 
339 	/*
340 	 * We want to load the INIT firmware even in RFKILL
341 	 * For the unified firmware case, the ucode_type is not
342 	 * INIT, but we still need to run it.
343 	 */
344 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
345 	if (ret) {
346 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
347 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
348 		return ret;
349 	}
350 
351 	/*
352 	 * Some things may run in the background now, but we
353 	 * just wait for the ALIVE notification here.
354 	 */
355 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
356 				    MVM_UCODE_ALIVE_TIMEOUT);
357 	if (ret) {
358 		struct iwl_trans *trans = mvm->trans;
359 
360 		/* SecBoot info */
361 		if (trans->trans_cfg->device_family >=
362 					IWL_DEVICE_FAMILY_22000) {
363 			IWL_ERR(mvm,
364 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
365 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
366 				iwl_read_umac_prph(trans,
367 						   UMAG_SB_CPU_2_STATUS));
368 		} else if (trans->trans_cfg->device_family >=
369 			   IWL_DEVICE_FAMILY_8000) {
370 			IWL_ERR(mvm,
371 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
372 				iwl_read_prph(trans, SB_CPU_1_STATUS),
373 				iwl_read_prph(trans, SB_CPU_2_STATUS));
374 		}
375 
376 		iwl_mvm_print_pd_notification(mvm);
377 
378 		/* LMAC/UMAC PC info */
379 		if (trans->trans_cfg->device_family >=
380 					IWL_DEVICE_FAMILY_9000) {
381 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
382 				iwl_read_umac_prph(trans,
383 						   UREG_UMAC_CURRENT_PC));
384 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
385 				iwl_read_umac_prph(trans,
386 						   UREG_LMAC1_CURRENT_PC));
387 			if (iwl_mvm_is_cdb_supported(mvm))
388 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
389 					iwl_read_umac_prph(trans,
390 						UREG_LMAC2_CURRENT_PC));
391 		}
392 
393 		if (ret == -ETIMEDOUT)
394 			iwl_fw_dbg_error_collect(&mvm->fwrt,
395 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
396 
397 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
398 		return ret;
399 	}
400 
401 	if (!alive_data.valid) {
402 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
403 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
404 		return -EIO;
405 	}
406 
407 	iwl_mei_alive_notif(!ret);
408 
409 	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
410 	if (ret) {
411 		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
412 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
413 		return ret;
414 	}
415 
416 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
417 
418 	/*
419 	 * Note: all the queues are enabled as part of the interface
420 	 * initialization, but in firmware restart scenarios they
421 	 * could be stopped, so wake them up. In firmware restart,
422 	 * mac80211 will have the queues stopped as well until the
423 	 * reconfiguration completes. During normal startup, they
424 	 * will be empty.
425 	 */
426 
427 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
428 	/*
429 	 * Set a 'fake' TID for the command queue, since we use the
430 	 * hweight() of the tid_bitmap as a refcount now. Not that
431 	 * we ever even consider the command queue as one we might
432 	 * want to reuse, but be safe nevertheless.
433 	 */
434 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
435 		BIT(IWL_MAX_TID_COUNT + 2);
436 
437 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
438 #ifdef CONFIG_IWLWIFI_DEBUGFS
439 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
440 #endif
441 
442 	/*
443 	 * All the BSSes in the BSS table include the GP2 in the system
444 	 * at the beacon Rx time, this is of course no longer relevant
445 	 * since we are resetting the firmware.
446 	 * Purge all the BSS table.
447 	 */
448 	cfg80211_bss_flush(mvm->hw->wiphy);
449 
450 	return 0;
451 }
452 
453 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
454 {
455 	struct iwl_notification_wait init_wait;
456 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
457 	struct iwl_init_extended_cfg_cmd init_cfg = {
458 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
459 	};
460 	static const u16 init_complete[] = {
461 		INIT_COMPLETE_NOTIF,
462 	};
463 	int ret;
464 
465 	if (mvm->trans->cfg->tx_with_siso_diversity)
466 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
467 
468 	lockdep_assert_held(&mvm->mutex);
469 
470 	mvm->rfkill_safe_init_done = false;
471 
472 	iwl_init_notification_wait(&mvm->notif_wait,
473 				   &init_wait,
474 				   init_complete,
475 				   ARRAY_SIZE(init_complete),
476 				   iwl_wait_init_complete,
477 				   NULL);
478 
479 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
480 
481 	/* Will also start the device */
482 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
483 	if (ret) {
484 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
485 		goto error;
486 	}
487 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
488 			       NULL);
489 
490 	/* Send init config command to mark that we are sending NVM access
491 	 * commands
492 	 */
493 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
494 						INIT_EXTENDED_CFG_CMD),
495 				   CMD_SEND_IN_RFKILL,
496 				   sizeof(init_cfg), &init_cfg);
497 	if (ret) {
498 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
499 			ret);
500 		goto error;
501 	}
502 
503 	/* Load NVM to NIC if needed */
504 	if (mvm->nvm_file_name) {
505 		ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
506 					    mvm->nvm_sections);
507 		if (ret)
508 			goto error;
509 		ret = iwl_mvm_load_nvm_to_nic(mvm);
510 		if (ret)
511 			goto error;
512 	}
513 
514 	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
515 		ret = iwl_nvm_init(mvm);
516 		if (ret) {
517 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
518 			goto error;
519 		}
520 	}
521 
522 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
523 						NVM_ACCESS_COMPLETE),
524 				   CMD_SEND_IN_RFKILL,
525 				   sizeof(nvm_complete), &nvm_complete);
526 	if (ret) {
527 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
528 			ret);
529 		goto error;
530 	}
531 
532 	/* We wait for the INIT complete notification */
533 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
534 				    MVM_UCODE_ALIVE_TIMEOUT);
535 	if (ret)
536 		return ret;
537 
538 	/* Read the NVM only at driver load time, no need to do this twice */
539 	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
540 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
541 		if (IS_ERR(mvm->nvm_data)) {
542 			ret = PTR_ERR(mvm->nvm_data);
543 			mvm->nvm_data = NULL;
544 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
545 			return ret;
546 		}
547 	}
548 
549 	mvm->rfkill_safe_init_done = true;
550 
551 	return 0;
552 
553 error:
554 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
555 	return ret;
556 }
557 
558 #ifdef CONFIG_ACPI
559 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
560 				    struct iwl_phy_specific_cfg *phy_filters)
561 {
562 	/*
563 	 * TODO: read specific phy config from BIOS
564 	 * ACPI table for this feature has not been defined yet,
565 	 * so for now we use hardcoded values.
566 	 */
567 
568 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
569 		phy_filters->filter_cfg_chain_a =
570 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
571 	}
572 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
573 		phy_filters->filter_cfg_chain_b =
574 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
575 	}
576 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
577 		phy_filters->filter_cfg_chain_c =
578 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
579 	}
580 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
581 		phy_filters->filter_cfg_chain_d =
582 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
583 	}
584 }
585 #else /* CONFIG_ACPI */
586 
587 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
588 				    struct iwl_phy_specific_cfg *phy_filters)
589 {
590 }
591 #endif /* CONFIG_ACPI */
592 
593 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
594 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
595 {
596 	u8 cmd_ver;
597 	int ret;
598 	struct iwl_host_cmd cmd = {
599 		.id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
600 			      SAR_OFFSET_MAPPING_TABLE_CMD),
601 		.flags = 0,
602 		.data[0] = &mvm->fwrt.sgom_table,
603 		.len[0] =  sizeof(mvm->fwrt.sgom_table),
604 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
605 	};
606 
607 	if (!mvm->fwrt.sgom_enabled) {
608 		IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
609 		return 0;
610 	}
611 
612 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
613 					IWL_FW_CMD_VER_UNKNOWN);
614 
615 	if (cmd_ver != 2) {
616 		IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
617 				cmd_ver);
618 		return 0;
619 	}
620 
621 	ret = iwl_mvm_send_cmd(mvm, &cmd);
622 	if (ret < 0)
623 		IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
624 
625 	return ret;
626 }
627 #else
628 
629 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
630 {
631 	return 0;
632 }
633 #endif
634 
635 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
636 {
637 	u32 cmd_id = PHY_CONFIGURATION_CMD;
638 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
639 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
640 	struct iwl_phy_specific_cfg phy_filters = {};
641 	u8 cmd_ver;
642 	size_t cmd_size;
643 
644 	if (iwl_mvm_has_unified_ucode(mvm) &&
645 	    !mvm->trans->cfg->tx_with_siso_diversity)
646 		return 0;
647 
648 	if (mvm->trans->cfg->tx_with_siso_diversity) {
649 		/*
650 		 * TODO: currently we don't set the antenna but letting the NIC
651 		 * to decide which antenna to use. This should come from BIOS.
652 		 */
653 		phy_cfg_cmd.phy_cfg =
654 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
655 	}
656 
657 	/* Set parameters */
658 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
659 
660 	/* set flags extra PHY configuration flags from the device's cfg */
661 	phy_cfg_cmd.phy_cfg |=
662 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
663 
664 	phy_cfg_cmd.calib_control.event_trigger =
665 		mvm->fw->default_calib[ucode_type].event_trigger;
666 	phy_cfg_cmd.calib_control.flow_trigger =
667 		mvm->fw->default_calib[ucode_type].flow_trigger;
668 
669 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
670 					IWL_FW_CMD_VER_UNKNOWN);
671 	if (cmd_ver == 3) {
672 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
673 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
674 		       sizeof(struct iwl_phy_specific_cfg));
675 	}
676 
677 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
678 		       phy_cfg_cmd.phy_cfg);
679 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
680 				    sizeof(struct iwl_phy_cfg_cmd_v1);
681 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
682 }
683 
684 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
685 {
686 	struct iwl_notification_wait calib_wait;
687 	static const u16 init_complete[] = {
688 		INIT_COMPLETE_NOTIF,
689 		CALIB_RES_NOTIF_PHY_DB
690 	};
691 	int ret;
692 
693 	if (iwl_mvm_has_unified_ucode(mvm))
694 		return iwl_run_unified_mvm_ucode(mvm);
695 
696 	lockdep_assert_held(&mvm->mutex);
697 
698 	mvm->rfkill_safe_init_done = false;
699 
700 	iwl_init_notification_wait(&mvm->notif_wait,
701 				   &calib_wait,
702 				   init_complete,
703 				   ARRAY_SIZE(init_complete),
704 				   iwl_wait_phy_db_entry,
705 				   mvm->phy_db);
706 
707 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
708 
709 	/* Will also start the device */
710 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
711 	if (ret) {
712 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
713 		goto remove_notif;
714 	}
715 
716 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
717 		ret = iwl_mvm_send_bt_init_conf(mvm);
718 		if (ret)
719 			goto remove_notif;
720 	}
721 
722 	/* Read the NVM only at driver load time, no need to do this twice */
723 	if (!mvm->nvm_data) {
724 		ret = iwl_nvm_init(mvm);
725 		if (ret) {
726 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
727 			goto remove_notif;
728 		}
729 	}
730 
731 	/* In case we read the NVM from external file, load it to the NIC */
732 	if (mvm->nvm_file_name) {
733 		ret = iwl_mvm_load_nvm_to_nic(mvm);
734 		if (ret)
735 			goto remove_notif;
736 	}
737 
738 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
739 		  "Too old NVM version (0x%0x, required = 0x%0x)",
740 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
741 
742 	/*
743 	 * abort after reading the nvm in case RF Kill is on, we will complete
744 	 * the init seq later when RF kill will switch to off
745 	 */
746 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
747 		IWL_DEBUG_RF_KILL(mvm,
748 				  "jump over all phy activities due to RF kill\n");
749 		goto remove_notif;
750 	}
751 
752 	mvm->rfkill_safe_init_done = true;
753 
754 	/* Send TX valid antennas before triggering calibrations */
755 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
756 	if (ret)
757 		goto remove_notif;
758 
759 	ret = iwl_send_phy_cfg_cmd(mvm);
760 	if (ret) {
761 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
762 			ret);
763 		goto remove_notif;
764 	}
765 
766 	/*
767 	 * Some things may run in the background now, but we
768 	 * just wait for the calibration complete notification.
769 	 */
770 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
771 				    MVM_UCODE_CALIB_TIMEOUT);
772 	if (!ret)
773 		goto out;
774 
775 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
776 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
777 		ret = 0;
778 	} else {
779 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
780 			ret);
781 	}
782 
783 	goto out;
784 
785 remove_notif:
786 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
787 out:
788 	mvm->rfkill_safe_init_done = false;
789 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
790 		/* we want to debug INIT and we have no NVM - fake */
791 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
792 					sizeof(struct ieee80211_channel) +
793 					sizeof(struct ieee80211_rate),
794 					GFP_KERNEL);
795 		if (!mvm->nvm_data)
796 			return -ENOMEM;
797 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
798 		mvm->nvm_data->bands[0].n_channels = 1;
799 		mvm->nvm_data->bands[0].n_bitrates = 1;
800 		mvm->nvm_data->bands[0].bitrates =
801 			(void *)((u8 *)mvm->nvm_data->channels + 1);
802 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
803 	}
804 
805 	return ret;
806 }
807 
808 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
809 {
810 	struct iwl_ltr_config_cmd cmd = {
811 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
812 	};
813 
814 	if (!mvm->trans->ltr_enabled)
815 		return 0;
816 
817 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
818 				    sizeof(cmd), &cmd);
819 }
820 
821 #ifdef CONFIG_ACPI
822 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
823 {
824 	u32 cmd_id = REDUCE_TX_POWER_CMD;
825 	struct iwl_dev_tx_power_cmd cmd = {
826 		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
827 	};
828 	__le16 *per_chain;
829 	int ret;
830 	u16 len = 0;
831 	u32 n_subbands;
832 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
833 					   IWL_FW_CMD_VER_UNKNOWN);
834 	if (cmd_ver == 7) {
835 		len = sizeof(cmd.v7);
836 		n_subbands = IWL_NUM_SUB_BANDS_V2;
837 		per_chain = cmd.v7.per_chain[0][0];
838 		cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
839 	} else if (cmd_ver == 6) {
840 		len = sizeof(cmd.v6);
841 		n_subbands = IWL_NUM_SUB_BANDS_V2;
842 		per_chain = cmd.v6.per_chain[0][0];
843 	} else if (fw_has_api(&mvm->fw->ucode_capa,
844 			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
845 		len = sizeof(cmd.v5);
846 		n_subbands = IWL_NUM_SUB_BANDS_V1;
847 		per_chain = cmd.v5.per_chain[0][0];
848 	} else if (fw_has_capa(&mvm->fw->ucode_capa,
849 			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
850 		len = sizeof(cmd.v4);
851 		n_subbands = IWL_NUM_SUB_BANDS_V1;
852 		per_chain = cmd.v4.per_chain[0][0];
853 	} else {
854 		len = sizeof(cmd.v3);
855 		n_subbands = IWL_NUM_SUB_BANDS_V1;
856 		per_chain = cmd.v3.per_chain[0][0];
857 	}
858 
859 	/* all structs have the same common part, add it */
860 	len += sizeof(cmd.common);
861 
862 	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
863 				     IWL_NUM_CHAIN_TABLES,
864 				     n_subbands, prof_a, prof_b);
865 
866 	/* return on error or if the profile is disabled (positive number) */
867 	if (ret)
868 		return ret;
869 
870 	iwl_mei_set_power_limit(per_chain);
871 
872 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
873 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
874 }
875 
876 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
877 {
878 	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
879 	struct iwl_geo_tx_power_profiles_resp *resp;
880 	u16 len;
881 	int ret;
882 	struct iwl_host_cmd cmd = {
883 		.id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
884 		.flags = CMD_WANT_SKB,
885 		.data = { &geo_tx_cmd },
886 	};
887 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
888 					   IWL_FW_CMD_VER_UNKNOWN);
889 
890 	/* the ops field is at the same spot for all versions, so set in v1 */
891 	geo_tx_cmd.v1.ops =
892 		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
893 
894 	if (cmd_ver == 5)
895 		len = sizeof(geo_tx_cmd.v5);
896 	else if (cmd_ver == 4)
897 		len = sizeof(geo_tx_cmd.v4);
898 	else if (cmd_ver == 3)
899 		len = sizeof(geo_tx_cmd.v3);
900 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
901 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
902 		len = sizeof(geo_tx_cmd.v2);
903 	else
904 		len = sizeof(geo_tx_cmd.v1);
905 
906 	if (!iwl_sar_geo_support(&mvm->fwrt))
907 		return -EOPNOTSUPP;
908 
909 	cmd.len[0] = len;
910 
911 	ret = iwl_mvm_send_cmd(mvm, &cmd);
912 	if (ret) {
913 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
914 		return ret;
915 	}
916 
917 	resp = (void *)cmd.resp_pkt->data;
918 	ret = le32_to_cpu(resp->profile_idx);
919 
920 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
921 		ret = -EIO;
922 
923 	iwl_free_resp(&cmd);
924 	return ret;
925 }
926 
927 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
928 {
929 	u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
930 	union iwl_geo_tx_power_profiles_cmd cmd;
931 	u16 len;
932 	u32 n_bands;
933 	u32 n_profiles;
934 	u32 sk = 0;
935 	int ret;
936 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
937 					   IWL_FW_CMD_VER_UNKNOWN);
938 
939 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
940 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
941 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
942 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
943 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
944 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
945 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
946 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
947 
948 	/* the ops field is at the same spot for all versions, so set in v1 */
949 	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
950 
951 	if (cmd_ver == 5) {
952 		len = sizeof(cmd.v5);
953 		n_bands = ARRAY_SIZE(cmd.v5.table[0]);
954 		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
955 	} else if (cmd_ver == 4) {
956 		len = sizeof(cmd.v4);
957 		n_bands = ARRAY_SIZE(cmd.v4.table[0]);
958 		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
959 	} else if (cmd_ver == 3) {
960 		len = sizeof(cmd.v3);
961 		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
962 		n_profiles = ACPI_NUM_GEO_PROFILES;
963 	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
964 			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
965 		len = sizeof(cmd.v2);
966 		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
967 		n_profiles = ACPI_NUM_GEO_PROFILES;
968 	} else {
969 		len = sizeof(cmd.v1);
970 		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
971 		n_profiles = ACPI_NUM_GEO_PROFILES;
972 	}
973 
974 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
975 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
976 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
977 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
978 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
979 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
980 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
981 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
982 	/* the table is at the same position for all versions, so set use v1 */
983 	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
984 			       n_bands, n_profiles);
985 
986 	/*
987 	 * It is a valid scenario to not support SAR, or miss wgds table,
988 	 * but in that case there is no need to send the command.
989 	 */
990 	if (ret)
991 		return 0;
992 
993 	/* Only set to South Korea if the table revision is 1 */
994 	if (mvm->fwrt.geo_rev == 1)
995 		sk = 1;
996 
997 	/*
998 	 * Set the table_revision to South Korea (1) or not (0).  The
999 	 * element name is misleading, as it doesn't contain the table
1000 	 * revision number, but whether the South Korea variation
1001 	 * should be used.
1002 	 * This must be done after calling iwl_sar_geo_init().
1003 	 */
1004 	if (cmd_ver == 5)
1005 		cmd.v5.table_revision = cpu_to_le32(sk);
1006 	else if (cmd_ver == 4)
1007 		cmd.v4.table_revision = cpu_to_le32(sk);
1008 	else if (cmd_ver == 3)
1009 		cmd.v3.table_revision = cpu_to_le32(sk);
1010 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1011 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
1012 		cmd.v2.table_revision = cpu_to_le32(sk);
1013 
1014 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1015 }
1016 
1017 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1018 {
1019 	union iwl_ppag_table_cmd cmd;
1020 	int ret, cmd_size;
1021 
1022 	ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1023 	/* Not supporting PPAG table is a valid scenario */
1024 	if(ret < 0)
1025 		return 0;
1026 
1027 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1028 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1029 						PER_PLATFORM_ANT_GAIN_CMD),
1030 				   0, cmd_size, &cmd);
1031 	if (ret < 0)
1032 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1033 			ret);
1034 
1035 	return ret;
1036 }
1037 
1038 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1039 {
1040 	/* no need to read the table, done in INIT stage */
1041 	if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
1042 		return 0;
1043 
1044 	return iwl_mvm_ppag_send_cmd(mvm);
1045 }
1046 
1047 static const struct dmi_system_id dmi_tas_approved_list[] = {
1048 	{ .ident = "HP",
1049 	  .matches = {
1050 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1051 		},
1052 	},
1053 	{ .ident = "SAMSUNG",
1054 	  .matches = {
1055 			DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1056 		},
1057 	},
1058 		{ .ident = "LENOVO",
1059 	  .matches = {
1060 			DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"),
1061 		},
1062 	},
1063 	{ .ident = "DELL",
1064 	  .matches = {
1065 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1066 		},
1067 	},
1068 
1069 	/* keep last */
1070 	{}
1071 };
1072 
1073 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1074 {
1075 	int i;
1076 	u32 size = le32_to_cpu(*le_size);
1077 
1078 	/* Verify that there is room for another country */
1079 	if (size >= IWL_TAS_BLOCK_LIST_MAX)
1080 		return false;
1081 
1082 	for (i = 0; i < size; i++) {
1083 		if (list[i] == cpu_to_le32(mcc))
1084 			return true;
1085 	}
1086 
1087 	list[size++] = cpu_to_le32(mcc);
1088 	*le_size = cpu_to_le32(size);
1089 	return true;
1090 }
1091 
1092 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1093 {
1094 	u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1095 	int ret;
1096 	union iwl_tas_config_cmd cmd = {};
1097 	int cmd_size, fw_ver;
1098 
1099 	BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
1100 		     APCI_WTAS_BLACK_LIST_MAX);
1101 
1102 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1103 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1104 		return;
1105 	}
1106 
1107 	fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1108 				       IWL_FW_CMD_VER_UNKNOWN);
1109 
1110 	ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
1111 	if (ret < 0) {
1112 		IWL_DEBUG_RADIO(mvm,
1113 				"TAS table invalid or unavailable. (%d)\n",
1114 				ret);
1115 		return;
1116 	}
1117 
1118 	if (ret == 0)
1119 		return;
1120 
1121 	if (!dmi_check_system(dmi_tas_approved_list)) {
1122 		IWL_DEBUG_RADIO(mvm,
1123 				"System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1124 				dmi_get_system_info(DMI_SYS_VENDOR));
1125 		if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1126 						    &cmd.v4.block_list_size,
1127 							IWL_TAS_US_MCC)) ||
1128 		    (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1129 						    &cmd.v4.block_list_size,
1130 							IWL_TAS_CANADA_MCC))) {
1131 			IWL_DEBUG_RADIO(mvm,
1132 					"Unable to add US/Canada to TAS block list, disabling TAS\n");
1133 			return;
1134 		}
1135 	}
1136 
1137 	/* v4 is the same size as v3, so no need to differentiate here */
1138 	cmd_size = fw_ver < 3 ?
1139 		sizeof(struct iwl_tas_config_cmd_v2) :
1140 		sizeof(struct iwl_tas_config_cmd_v3);
1141 
1142 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd);
1143 	if (ret < 0)
1144 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1145 }
1146 
1147 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1148 {
1149 	u8 value;
1150 	int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
1151 				      &iwl_rfi_guid, &value);
1152 
1153 	if (ret < 0) {
1154 		IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1155 
1156 	} else if (value >= DSM_VALUE_RFI_MAX) {
1157 		IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1158 				value);
1159 
1160 	} else if (value == DSM_VALUE_RFI_ENABLE) {
1161 		IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1162 		return DSM_VALUE_RFI_ENABLE;
1163 	}
1164 
1165 	IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1166 
1167 	/* default behaviour is disabled */
1168 	return DSM_VALUE_RFI_DISABLE;
1169 }
1170 
1171 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1172 {
1173 	int ret;
1174 	u32 value;
1175 	struct iwl_lari_config_change_cmd_v6 cmd = {};
1176 
1177 	cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1178 
1179 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
1180 				   &iwl_guid, &value);
1181 	if (!ret)
1182 		cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1183 
1184 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1185 				   DSM_FUNC_ENABLE_UNII4_CHAN,
1186 				   &iwl_guid, &value);
1187 	if (!ret)
1188 		cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1189 
1190 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1191 				   DSM_FUNC_ACTIVATE_CHANNEL,
1192 				   &iwl_guid, &value);
1193 	if (!ret)
1194 		cmd.chan_state_active_bitmap = cpu_to_le32(value);
1195 
1196 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1197 				   DSM_FUNC_ENABLE_6E,
1198 				   &iwl_guid, &value);
1199 	if (!ret)
1200 		cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1201 
1202 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1203 				   DSM_FUNC_FORCE_DISABLE_CHANNELS,
1204 				   &iwl_guid, &value);
1205 	if (!ret)
1206 		cmd.force_disable_channels_bitmap = cpu_to_le32(value);
1207 
1208 	if (cmd.config_bitmap ||
1209 	    cmd.oem_uhb_allow_bitmap ||
1210 	    cmd.oem_11ax_allow_bitmap ||
1211 	    cmd.oem_unii4_allow_bitmap ||
1212 	    cmd.chan_state_active_bitmap ||
1213 	    cmd.force_disable_channels_bitmap) {
1214 		size_t cmd_size;
1215 		u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1216 						   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1217 							   LARI_CONFIG_CHANGE),
1218 						   1);
1219 		switch (cmd_ver) {
1220 		case 6:
1221 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1222 			break;
1223 		case 5:
1224 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1225 			break;
1226 		case 4:
1227 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1228 			break;
1229 		case 3:
1230 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1231 			break;
1232 		case 2:
1233 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1234 			break;
1235 		default:
1236 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1237 			break;
1238 		}
1239 
1240 		IWL_DEBUG_RADIO(mvm,
1241 				"sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1242 				le32_to_cpu(cmd.config_bitmap),
1243 				le32_to_cpu(cmd.oem_11ax_allow_bitmap));
1244 		IWL_DEBUG_RADIO(mvm,
1245 				"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1246 				le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1247 				le32_to_cpu(cmd.chan_state_active_bitmap),
1248 				cmd_ver);
1249 		IWL_DEBUG_RADIO(mvm,
1250 				"sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1251 				le32_to_cpu(cmd.oem_uhb_allow_bitmap),
1252 				le32_to_cpu(cmd.force_disable_channels_bitmap));
1253 		ret = iwl_mvm_send_cmd_pdu(mvm,
1254 					   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1255 						   LARI_CONFIG_CHANGE),
1256 					   0, cmd_size, &cmd);
1257 		if (ret < 0)
1258 			IWL_DEBUG_RADIO(mvm,
1259 					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
1260 					ret);
1261 	}
1262 }
1263 
1264 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1265 {
1266 	int ret;
1267 
1268 	/* read PPAG table */
1269 	ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
1270 	if (ret < 0) {
1271 		IWL_DEBUG_RADIO(mvm,
1272 				"PPAG BIOS table invalid or unavailable. (%d)\n",
1273 				ret);
1274 	}
1275 
1276 	/* read SAR tables */
1277 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1278 	if (ret < 0) {
1279 		IWL_DEBUG_RADIO(mvm,
1280 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1281 				ret);
1282 		/*
1283 		 * If not available, don't fail and don't bother with EWRD and
1284 		 * WGDS */
1285 
1286 		if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1287 			/*
1288 			 * If basic SAR is not available, we check for WGDS,
1289 			 * which should *not* be available either.  If it is
1290 			 * available, issue an error, because we can't use SAR
1291 			 * Geo without basic SAR.
1292 			 */
1293 			IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1294 		}
1295 
1296 	} else {
1297 		ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1298 		/* if EWRD is not available, we can still use
1299 		* WRDS, so don't fail */
1300 		if (ret < 0)
1301 			IWL_DEBUG_RADIO(mvm,
1302 					"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1303 					ret);
1304 
1305 		/* read geo SAR table */
1306 		if (iwl_sar_geo_support(&mvm->fwrt)) {
1307 			ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1308 			if (ret < 0)
1309 				IWL_DEBUG_RADIO(mvm,
1310 						"Geo SAR BIOS table invalid or unavailable. (%d)\n",
1311 						ret);
1312 				/* we don't fail if the table is not available */
1313 		}
1314 	}
1315 }
1316 #else /* CONFIG_ACPI */
1317 
1318 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1319 				      int prof_a, int prof_b)
1320 {
1321 	return 1;
1322 }
1323 
1324 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1325 {
1326 	return -ENOENT;
1327 }
1328 
1329 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1330 {
1331 	return 0;
1332 }
1333 
1334 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1335 {
1336 	return -ENOENT;
1337 }
1338 
1339 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1340 {
1341 	return 0;
1342 }
1343 
1344 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1345 {
1346 }
1347 
1348 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1349 {
1350 }
1351 
1352 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1353 {
1354 	return DSM_VALUE_RFI_DISABLE;
1355 }
1356 
1357 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1358 {
1359 }
1360 
1361 #endif /* CONFIG_ACPI */
1362 
1363 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1364 {
1365 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1366 	int ret;
1367 	u32 resp;
1368 
1369 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1370 		.flags = cpu_to_le32(flags),
1371 		.buf_size = 0,
1372 	};
1373 	struct iwl_host_cmd host_cmd = {
1374 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1375 		.flags = CMD_WANT_SKB,
1376 		.data = {&recovery_cmd, },
1377 		.len = {sizeof(recovery_cmd), },
1378 	};
1379 
1380 	/* no error log was defined in TLV */
1381 	if (!error_log_size)
1382 		return;
1383 
1384 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1385 		/* no buf was allocated while HW reset */
1386 		if (!mvm->error_recovery_buf)
1387 			return;
1388 
1389 		host_cmd.data[1] = mvm->error_recovery_buf;
1390 		host_cmd.len[1] =  error_log_size;
1391 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1392 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1393 	}
1394 
1395 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1396 	kfree(mvm->error_recovery_buf);
1397 	mvm->error_recovery_buf = NULL;
1398 
1399 	if (ret) {
1400 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1401 		return;
1402 	}
1403 
1404 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1405 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1406 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1407 		if (resp)
1408 			IWL_ERR(mvm,
1409 				"Failed to send recovery cmd blob was invalid %d\n",
1410 				resp);
1411 	}
1412 }
1413 
1414 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1415 {
1416 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1417 }
1418 
1419 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1420 {
1421 	int ret;
1422 
1423 	if (iwl_mvm_has_unified_ucode(mvm))
1424 		return iwl_run_unified_mvm_ucode(mvm);
1425 
1426 	ret = iwl_run_init_mvm_ucode(mvm);
1427 
1428 	if (ret) {
1429 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1430 
1431 		if (iwlmvm_mod_params.init_dbg)
1432 			return 0;
1433 		return ret;
1434 	}
1435 
1436 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1437 	iwl_trans_stop_device(mvm->trans);
1438 	ret = iwl_trans_start_hw(mvm->trans);
1439 	if (ret)
1440 		return ret;
1441 
1442 	mvm->rfkill_safe_init_done = false;
1443 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1444 	if (ret)
1445 		return ret;
1446 
1447 	mvm->rfkill_safe_init_done = true;
1448 
1449 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1450 			       NULL);
1451 
1452 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1453 }
1454 
1455 int iwl_mvm_up(struct iwl_mvm *mvm)
1456 {
1457 	int ret, i;
1458 	struct ieee80211_channel *chan;
1459 	struct cfg80211_chan_def chandef;
1460 	struct ieee80211_supported_band *sband = NULL;
1461 	u32 sb_cfg;
1462 
1463 	lockdep_assert_held(&mvm->mutex);
1464 
1465 	ret = iwl_trans_start_hw(mvm->trans);
1466 	if (ret)
1467 		return ret;
1468 
1469 	sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
1470 	if (!(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK) && iwl_mei_pldr_req())
1471 		return ret;
1472 
1473 	ret = iwl_mvm_load_rt_fw(mvm);
1474 	if (ret) {
1475 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1476 		if (ret != -ERFKILL)
1477 			iwl_fw_dbg_error_collect(&mvm->fwrt,
1478 						 FW_DBG_TRIGGER_DRIVER);
1479 		goto error;
1480 	}
1481 
1482 	iwl_get_shared_mem_conf(&mvm->fwrt);
1483 
1484 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1485 	if (ret)
1486 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1487 
1488 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1489 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1490 		/* if we have a destination, assume EARLY START */
1491 		if (mvm->fw->dbg.dest_tlv)
1492 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1493 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1494 	}
1495 
1496 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1497 	if (ret)
1498 		goto error;
1499 
1500 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1501 		/* Send phy db control command and then phy db calibration */
1502 		ret = iwl_send_phy_db_data(mvm->phy_db);
1503 		if (ret)
1504 			goto error;
1505 	}
1506 
1507 	ret = iwl_send_phy_cfg_cmd(mvm);
1508 	if (ret)
1509 		goto error;
1510 
1511 	ret = iwl_mvm_send_bt_init_conf(mvm);
1512 	if (ret)
1513 		goto error;
1514 
1515 	if (fw_has_capa(&mvm->fw->ucode_capa,
1516 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1517 		ret = iwl_set_soc_latency(&mvm->fwrt);
1518 		if (ret)
1519 			goto error;
1520 	}
1521 
1522 	/* Init RSS configuration */
1523 	ret = iwl_configure_rxq(&mvm->fwrt);
1524 	if (ret)
1525 		goto error;
1526 
1527 	if (iwl_mvm_has_new_rx_api(mvm)) {
1528 		ret = iwl_send_rss_cfg_cmd(mvm);
1529 		if (ret) {
1530 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1531 				ret);
1532 			goto error;
1533 		}
1534 	}
1535 
1536 	/* init the fw <-> mac80211 STA mapping */
1537 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1538 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1539 
1540 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1541 
1542 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1543 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1544 
1545 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1546 		ret = iwl_mvm_send_dqa_cmd(mvm);
1547 		if (ret)
1548 			goto error;
1549 	}
1550 
1551 	/*
1552 	 * Add auxiliary station for scanning.
1553 	 * Newer versions of this command implies that the fw uses
1554 	 * internal aux station for all aux activities that don't
1555 	 * requires a dedicated data queue.
1556 	 */
1557 	if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) {
1558 		 /*
1559 		  * In old version the aux station uses mac id like other
1560 		  * station and not lmac id
1561 		  */
1562 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1563 		if (ret)
1564 			goto error;
1565 	}
1566 
1567 	/* Add all the PHY contexts */
1568 	i = 0;
1569 	while (!sband && i < NUM_NL80211_BANDS)
1570 		sband = mvm->hw->wiphy->bands[i++];
1571 
1572 	if (WARN_ON_ONCE(!sband)) {
1573 		ret = -ENODEV;
1574 		goto error;
1575 	}
1576 
1577 	chan = &sband->channels[0];
1578 
1579 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1580 	for (i = 0; i < NUM_PHY_CTX; i++) {
1581 		/*
1582 		 * The channel used here isn't relevant as it's
1583 		 * going to be overwritten in the other flows.
1584 		 * For now use the first channel we have.
1585 		 */
1586 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1587 					   &chandef, 1, 1);
1588 		if (ret)
1589 			goto error;
1590 	}
1591 
1592 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1593 		/* in order to give the responsibility of ct-kill and
1594 		 * TX backoff to FW we need to send empty temperature reporting
1595 		 * cmd during init time
1596 		 */
1597 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1598 	} else {
1599 		/* Initialize tx backoffs to the minimal possible */
1600 		iwl_mvm_tt_tx_backoff(mvm, 0);
1601 	}
1602 
1603 #ifdef CONFIG_THERMAL
1604 	/* TODO: read the budget from BIOS / Platform NVM */
1605 
1606 	/*
1607 	 * In case there is no budget from BIOS / Platform NVM the default
1608 	 * budget should be 2000mW (cooling state 0).
1609 	 */
1610 	if (iwl_mvm_is_ctdp_supported(mvm)) {
1611 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1612 					   mvm->cooling_dev.cur_state);
1613 		if (ret)
1614 			goto error;
1615 	}
1616 #endif
1617 
1618 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1619 		WARN_ON(iwl_mvm_config_ltr(mvm));
1620 
1621 	ret = iwl_mvm_power_update_device(mvm);
1622 	if (ret)
1623 		goto error;
1624 
1625 	iwl_mvm_lari_cfg(mvm);
1626 	/*
1627 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1628 	 * anyway, so don't init MCC.
1629 	 */
1630 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1631 		ret = iwl_mvm_init_mcc(mvm);
1632 		if (ret)
1633 			goto error;
1634 	}
1635 
1636 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1637 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1638 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1639 		ret = iwl_mvm_config_scan(mvm);
1640 		if (ret)
1641 			goto error;
1642 	}
1643 
1644 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1645 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1646 
1647 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1648 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1649 
1650 	ret = iwl_mvm_ppag_init(mvm);
1651 	if (ret)
1652 		goto error;
1653 
1654 	ret = iwl_mvm_sar_init(mvm);
1655 	if (ret == 0)
1656 		ret = iwl_mvm_sar_geo_init(mvm);
1657 	if (ret < 0)
1658 		goto error;
1659 
1660 	ret = iwl_mvm_sgom_init(mvm);
1661 	if (ret)
1662 		goto error;
1663 
1664 	iwl_mvm_tas_init(mvm);
1665 	iwl_mvm_leds_sync(mvm);
1666 
1667 	iwl_mvm_ftm_initiator_smooth_config(mvm);
1668 
1669 	if (fw_has_capa(&mvm->fw->ucode_capa,
1670 			IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) {
1671 		if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1672 			iwl_rfi_send_config_cmd(mvm, NULL);
1673 	}
1674 
1675 	iwl_mvm_mei_device_state(mvm, true);
1676 
1677 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1678 	return 0;
1679  error:
1680 	if (!iwlmvm_mod_params.init_dbg || !ret)
1681 		iwl_mvm_stop_device(mvm);
1682 	return ret;
1683 }
1684 
1685 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1686 {
1687 	int ret, i;
1688 
1689 	lockdep_assert_held(&mvm->mutex);
1690 
1691 	ret = iwl_trans_start_hw(mvm->trans);
1692 	if (ret)
1693 		return ret;
1694 
1695 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1696 	if (ret) {
1697 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1698 		goto error;
1699 	}
1700 
1701 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1702 	if (ret)
1703 		goto error;
1704 
1705 	/* Send phy db control command and then phy db calibration*/
1706 	ret = iwl_send_phy_db_data(mvm->phy_db);
1707 	if (ret)
1708 		goto error;
1709 
1710 	ret = iwl_send_phy_cfg_cmd(mvm);
1711 	if (ret)
1712 		goto error;
1713 
1714 	/* init the fw <-> mac80211 STA mapping */
1715 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1716 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1717 
1718 	if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) {
1719 		/*
1720 		 * Add auxiliary station for scanning.
1721 		 * Newer versions of this command implies that the fw uses
1722 		 * internal aux station for all aux activities that don't
1723 		 * requires a dedicated data queue.
1724 		 * In old version the aux station uses mac id like other
1725 		 * station and not lmac id
1726 		 */
1727 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1728 		if (ret)
1729 			goto error;
1730 	}
1731 
1732 	return 0;
1733  error:
1734 	iwl_mvm_stop_device(mvm);
1735 	return ret;
1736 }
1737 
1738 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1739 			     struct iwl_rx_cmd_buffer *rxb)
1740 {
1741 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1742 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1743 
1744 	IWL_DEBUG_INFO(mvm,
1745 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1746 		       le32_to_cpu(mfuart_notif->installed_ver),
1747 		       le32_to_cpu(mfuart_notif->external_ver),
1748 		       le32_to_cpu(mfuart_notif->status),
1749 		       le32_to_cpu(mfuart_notif->duration));
1750 
1751 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1752 		IWL_DEBUG_INFO(mvm,
1753 			       "MFUART: image size: 0x%08x\n",
1754 			       le32_to_cpu(mfuart_notif->image_size));
1755 }
1756