1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 9 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 10 * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <linuxwifi@intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 * BSD LICENSE 29 * 30 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 31 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 32 * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 39 * * Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * * Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * * Neither the name Intel Corporation nor the names of its 46 * contributors may be used to endorse or promote products derived 47 * from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * 61 *****************************************************************************/ 62 #include <net/mac80211.h> 63 #include <linux/netdevice.h> 64 65 #include "iwl-trans.h" 66 #include "iwl-op-mode.h" 67 #include "fw/img.h" 68 #include "iwl-debug.h" 69 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 70 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 71 #include "iwl-prph.h" 72 #include "fw/acpi.h" 73 74 #include "mvm.h" 75 #include "fw/dbg.h" 76 #include "iwl-phy-db.h" 77 #include "iwl-modparams.h" 78 #include "iwl-nvm-parse.h" 79 80 #define MVM_UCODE_ALIVE_TIMEOUT HZ 81 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 82 83 #define UCODE_VALID_OK cpu_to_le32(0x1) 84 85 struct iwl_mvm_alive_data { 86 bool valid; 87 u32 scd_base_addr; 88 }; 89 90 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 91 { 92 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 93 .valid = cpu_to_le32(valid_tx_ant), 94 }; 95 96 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 97 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 98 sizeof(tx_ant_cmd), &tx_ant_cmd); 99 } 100 101 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 102 { 103 int i; 104 struct iwl_rss_config_cmd cmd = { 105 .flags = cpu_to_le32(IWL_RSS_ENABLE), 106 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 107 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 108 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 109 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 110 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 111 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 112 }; 113 114 if (mvm->trans->num_rx_queues == 1) 115 return 0; 116 117 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 118 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 119 cmd.indirection_table[i] = 120 1 + (i % (mvm->trans->num_rx_queues - 1)); 121 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 122 123 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 124 } 125 126 static int iwl_configure_rxq(struct iwl_mvm *mvm) 127 { 128 int i, num_queues, size, ret; 129 struct iwl_rfh_queue_config *cmd; 130 struct iwl_host_cmd hcmd = { 131 .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD), 132 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 133 }; 134 135 /* Do not configure default queue, it is configured via context info */ 136 num_queues = mvm->trans->num_rx_queues - 1; 137 138 size = struct_size(cmd, data, num_queues); 139 140 cmd = kzalloc(size, GFP_KERNEL); 141 if (!cmd) 142 return -ENOMEM; 143 144 cmd->num_queues = num_queues; 145 146 for (i = 0; i < num_queues; i++) { 147 struct iwl_trans_rxq_dma_data data; 148 149 cmd->data[i].q_num = i + 1; 150 iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data); 151 152 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 153 cmd->data[i].urbd_stts_wrptr = 154 cpu_to_le64(data.urbd_stts_wrptr); 155 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 156 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 157 } 158 159 hcmd.data[0] = cmd; 160 hcmd.len[0] = size; 161 162 ret = iwl_mvm_send_cmd(mvm, &hcmd); 163 164 kfree(cmd); 165 166 return ret; 167 } 168 169 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 170 { 171 struct iwl_dqa_enable_cmd dqa_cmd = { 172 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 173 }; 174 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 175 int ret; 176 177 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 178 if (ret) 179 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 180 else 181 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 182 183 return ret; 184 } 185 186 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 187 struct iwl_rx_cmd_buffer *rxb) 188 { 189 struct iwl_rx_packet *pkt = rxb_addr(rxb); 190 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 191 __le32 *dump_data = mfu_dump_notif->data; 192 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 193 int i; 194 195 if (mfu_dump_notif->index_num == 0) 196 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 197 le32_to_cpu(mfu_dump_notif->assert_id)); 198 199 for (i = 0; i < n_words; i++) 200 IWL_DEBUG_INFO(mvm, 201 "MFUART assert dump, dword %u: 0x%08x\n", 202 le16_to_cpu(mfu_dump_notif->index_num) * 203 n_words + i, 204 le32_to_cpu(dump_data[i])); 205 } 206 207 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 208 struct iwl_rx_packet *pkt, void *data) 209 { 210 struct iwl_mvm *mvm = 211 container_of(notif_wait, struct iwl_mvm, notif_wait); 212 struct iwl_mvm_alive_data *alive_data = data; 213 struct mvm_alive_resp_v3 *palive3; 214 struct mvm_alive_resp *palive; 215 struct iwl_umac_alive *umac; 216 struct iwl_lmac_alive *lmac1; 217 struct iwl_lmac_alive *lmac2 = NULL; 218 u16 status; 219 u32 lmac_error_event_table, umac_error_event_table; 220 221 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 222 palive = (void *)pkt->data; 223 umac = &palive->umac_data; 224 lmac1 = &palive->lmac_data[0]; 225 lmac2 = &palive->lmac_data[1]; 226 status = le16_to_cpu(palive->status); 227 } else { 228 palive3 = (void *)pkt->data; 229 umac = &palive3->umac_data; 230 lmac1 = &palive3->lmac_data; 231 status = le16_to_cpu(palive3->status); 232 } 233 234 lmac_error_event_table = 235 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 236 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 237 238 if (lmac2) 239 mvm->trans->dbg.lmac_error_event_table[1] = 240 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 241 242 umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr); 243 244 if (!umac_error_event_table) { 245 mvm->support_umac_log = false; 246 } else if (umac_error_event_table >= 247 mvm->trans->cfg->min_umac_error_event_table) { 248 mvm->support_umac_log = true; 249 } else { 250 IWL_ERR(mvm, 251 "Not valid error log pointer 0x%08X for %s uCode\n", 252 umac_error_event_table, 253 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 254 "Init" : "RT"); 255 mvm->support_umac_log = false; 256 } 257 258 if (mvm->support_umac_log) 259 iwl_fw_umac_set_alive_err_table(mvm->trans, 260 umac_error_event_table); 261 262 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 263 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 264 265 IWL_DEBUG_FW(mvm, 266 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 267 status, lmac1->ver_type, lmac1->ver_subtype); 268 269 if (lmac2) 270 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 271 272 IWL_DEBUG_FW(mvm, 273 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 274 le32_to_cpu(umac->umac_major), 275 le32_to_cpu(umac->umac_minor)); 276 277 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 278 279 return true; 280 } 281 282 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 283 struct iwl_rx_packet *pkt, void *data) 284 { 285 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 286 287 return true; 288 } 289 290 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 291 struct iwl_rx_packet *pkt, void *data) 292 { 293 struct iwl_phy_db *phy_db = data; 294 295 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 296 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 297 return true; 298 } 299 300 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 301 302 return false; 303 } 304 305 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 306 enum iwl_ucode_type ucode_type) 307 { 308 struct iwl_notification_wait alive_wait; 309 struct iwl_mvm_alive_data alive_data = {}; 310 const struct fw_img *fw; 311 int ret; 312 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 313 static const u16 alive_cmd[] = { MVM_ALIVE }; 314 bool run_in_rfkill = 315 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 316 317 if (ucode_type == IWL_UCODE_REGULAR && 318 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 319 !(fw_has_capa(&mvm->fw->ucode_capa, 320 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 321 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 322 else 323 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 324 if (WARN_ON(!fw)) 325 return -EINVAL; 326 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 327 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 328 329 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 330 alive_cmd, ARRAY_SIZE(alive_cmd), 331 iwl_alive_fn, &alive_data); 332 333 /* 334 * We want to load the INIT firmware even in RFKILL 335 * For the unified firmware case, the ucode_type is not 336 * INIT, but we still need to run it. 337 */ 338 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 339 if (ret) { 340 iwl_fw_set_current_image(&mvm->fwrt, old_type); 341 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 342 return ret; 343 } 344 345 /* 346 * Some things may run in the background now, but we 347 * just wait for the ALIVE notification here. 348 */ 349 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 350 MVM_UCODE_ALIVE_TIMEOUT); 351 if (ret) { 352 struct iwl_trans *trans = mvm->trans; 353 354 if (trans->trans_cfg->device_family >= 355 IWL_DEVICE_FAMILY_22000) { 356 IWL_ERR(mvm, 357 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 358 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 359 iwl_read_umac_prph(trans, 360 UMAG_SB_CPU_2_STATUS)); 361 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 362 iwl_read_umac_prph(trans, 363 UREG_UMAC_CURRENT_PC)); 364 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 365 iwl_read_umac_prph(trans, 366 UREG_LMAC1_CURRENT_PC)); 367 if (iwl_mvm_is_cdb_supported(mvm)) 368 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 369 iwl_read_umac_prph(trans, 370 UREG_LMAC2_CURRENT_PC)); 371 } else if (trans->trans_cfg->device_family >= 372 IWL_DEVICE_FAMILY_8000) { 373 IWL_ERR(mvm, 374 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 375 iwl_read_prph(trans, SB_CPU_1_STATUS), 376 iwl_read_prph(trans, SB_CPU_2_STATUS)); 377 } 378 379 if (ret == -ETIMEDOUT) 380 iwl_fw_dbg_error_collect(&mvm->fwrt, 381 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 382 383 iwl_fw_set_current_image(&mvm->fwrt, old_type); 384 return ret; 385 } 386 387 if (!alive_data.valid) { 388 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 389 iwl_fw_set_current_image(&mvm->fwrt, old_type); 390 return -EIO; 391 } 392 393 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 394 395 /* 396 * Note: all the queues are enabled as part of the interface 397 * initialization, but in firmware restart scenarios they 398 * could be stopped, so wake them up. In firmware restart, 399 * mac80211 will have the queues stopped as well until the 400 * reconfiguration completes. During normal startup, they 401 * will be empty. 402 */ 403 404 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 405 /* 406 * Set a 'fake' TID for the command queue, since we use the 407 * hweight() of the tid_bitmap as a refcount now. Not that 408 * we ever even consider the command queue as one we might 409 * want to reuse, but be safe nevertheless. 410 */ 411 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 412 BIT(IWL_MAX_TID_COUNT + 2); 413 414 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 415 #ifdef CONFIG_IWLWIFI_DEBUGFS 416 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 417 #endif 418 419 return 0; 420 } 421 422 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 423 { 424 struct iwl_notification_wait init_wait; 425 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 426 struct iwl_init_extended_cfg_cmd init_cfg = { 427 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 428 }; 429 static const u16 init_complete[] = { 430 INIT_COMPLETE_NOTIF, 431 }; 432 int ret; 433 434 if (mvm->trans->cfg->tx_with_siso_diversity) 435 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 436 437 lockdep_assert_held(&mvm->mutex); 438 439 mvm->rfkill_safe_init_done = false; 440 441 iwl_init_notification_wait(&mvm->notif_wait, 442 &init_wait, 443 init_complete, 444 ARRAY_SIZE(init_complete), 445 iwl_wait_init_complete, 446 NULL); 447 448 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 449 450 /* Will also start the device */ 451 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 452 if (ret) { 453 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 454 goto error; 455 } 456 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 457 NULL); 458 459 /* Send init config command to mark that we are sending NVM access 460 * commands 461 */ 462 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 463 INIT_EXTENDED_CFG_CMD), 464 CMD_SEND_IN_RFKILL, 465 sizeof(init_cfg), &init_cfg); 466 if (ret) { 467 IWL_ERR(mvm, "Failed to run init config command: %d\n", 468 ret); 469 goto error; 470 } 471 472 /* Load NVM to NIC if needed */ 473 if (mvm->nvm_file_name) { 474 iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 475 mvm->nvm_sections); 476 iwl_mvm_load_nvm_to_nic(mvm); 477 } 478 479 if (IWL_MVM_PARSE_NVM && read_nvm) { 480 ret = iwl_nvm_init(mvm); 481 if (ret) { 482 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 483 goto error; 484 } 485 } 486 487 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 488 NVM_ACCESS_COMPLETE), 489 CMD_SEND_IN_RFKILL, 490 sizeof(nvm_complete), &nvm_complete); 491 if (ret) { 492 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 493 ret); 494 goto error; 495 } 496 497 /* We wait for the INIT complete notification */ 498 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 499 MVM_UCODE_ALIVE_TIMEOUT); 500 if (ret) 501 return ret; 502 503 /* Read the NVM only at driver load time, no need to do this twice */ 504 if (!IWL_MVM_PARSE_NVM && read_nvm) { 505 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 506 if (IS_ERR(mvm->nvm_data)) { 507 ret = PTR_ERR(mvm->nvm_data); 508 mvm->nvm_data = NULL; 509 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 510 return ret; 511 } 512 } 513 514 mvm->rfkill_safe_init_done = true; 515 516 return 0; 517 518 error: 519 iwl_remove_notification(&mvm->notif_wait, &init_wait); 520 return ret; 521 } 522 523 #ifdef CONFIG_ACPI 524 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 525 struct iwl_phy_specific_cfg *phy_filters) 526 { 527 /* 528 * TODO: read specific phy config from BIOS 529 * ACPI table for this feature has not been defined yet, 530 * so for now we use hardcoded values. 531 */ 532 533 if (IWL_MVM_PHY_FILTER_CHAIN_A) { 534 phy_filters->filter_cfg_chain_a = 535 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 536 } 537 if (IWL_MVM_PHY_FILTER_CHAIN_B) { 538 phy_filters->filter_cfg_chain_b = 539 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 540 } 541 if (IWL_MVM_PHY_FILTER_CHAIN_C) { 542 phy_filters->filter_cfg_chain_c = 543 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 544 } 545 if (IWL_MVM_PHY_FILTER_CHAIN_D) { 546 phy_filters->filter_cfg_chain_d = 547 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 548 } 549 } 550 551 #else /* CONFIG_ACPI */ 552 553 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 554 struct iwl_phy_specific_cfg *phy_filters) 555 { 556 } 557 #endif /* CONFIG_ACPI */ 558 559 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 560 { 561 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 562 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 563 struct iwl_phy_specific_cfg phy_filters = {}; 564 u8 cmd_ver; 565 size_t cmd_size; 566 567 if (iwl_mvm_has_unified_ucode(mvm) && 568 !mvm->trans->cfg->tx_with_siso_diversity) 569 return 0; 570 571 if (mvm->trans->cfg->tx_with_siso_diversity) { 572 /* 573 * TODO: currently we don't set the antenna but letting the NIC 574 * to decide which antenna to use. This should come from BIOS. 575 */ 576 phy_cfg_cmd.phy_cfg = 577 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 578 } 579 580 /* Set parameters */ 581 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 582 583 /* set flags extra PHY configuration flags from the device's cfg */ 584 phy_cfg_cmd.phy_cfg |= 585 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 586 587 phy_cfg_cmd.calib_control.event_trigger = 588 mvm->fw->default_calib[ucode_type].event_trigger; 589 phy_cfg_cmd.calib_control.flow_trigger = 590 mvm->fw->default_calib[ucode_type].flow_trigger; 591 592 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, 593 PHY_CONFIGURATION_CMD); 594 if (cmd_ver == 3) { 595 iwl_mvm_phy_filter_init(mvm, &phy_filters); 596 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 597 sizeof(struct iwl_phy_specific_cfg)); 598 } 599 600 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 601 phy_cfg_cmd.phy_cfg); 602 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 603 sizeof(struct iwl_phy_cfg_cmd_v1); 604 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 605 cmd_size, &phy_cfg_cmd); 606 } 607 608 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 609 { 610 struct iwl_notification_wait calib_wait; 611 static const u16 init_complete[] = { 612 INIT_COMPLETE_NOTIF, 613 CALIB_RES_NOTIF_PHY_DB 614 }; 615 int ret; 616 617 if (iwl_mvm_has_unified_ucode(mvm)) 618 return iwl_run_unified_mvm_ucode(mvm, true); 619 620 lockdep_assert_held(&mvm->mutex); 621 622 mvm->rfkill_safe_init_done = false; 623 624 iwl_init_notification_wait(&mvm->notif_wait, 625 &calib_wait, 626 init_complete, 627 ARRAY_SIZE(init_complete), 628 iwl_wait_phy_db_entry, 629 mvm->phy_db); 630 631 /* Will also start the device */ 632 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 633 if (ret) { 634 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 635 goto remove_notif; 636 } 637 638 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 639 ret = iwl_mvm_send_bt_init_conf(mvm); 640 if (ret) 641 goto remove_notif; 642 } 643 644 /* Read the NVM only at driver load time, no need to do this twice */ 645 if (read_nvm) { 646 ret = iwl_nvm_init(mvm); 647 if (ret) { 648 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 649 goto remove_notif; 650 } 651 } 652 653 /* In case we read the NVM from external file, load it to the NIC */ 654 if (mvm->nvm_file_name) 655 iwl_mvm_load_nvm_to_nic(mvm); 656 657 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 658 "Too old NVM version (0x%0x, required = 0x%0x)", 659 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 660 661 /* 662 * abort after reading the nvm in case RF Kill is on, we will complete 663 * the init seq later when RF kill will switch to off 664 */ 665 if (iwl_mvm_is_radio_hw_killed(mvm)) { 666 IWL_DEBUG_RF_KILL(mvm, 667 "jump over all phy activities due to RF kill\n"); 668 goto remove_notif; 669 } 670 671 mvm->rfkill_safe_init_done = true; 672 673 /* Send TX valid antennas before triggering calibrations */ 674 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 675 if (ret) 676 goto remove_notif; 677 678 ret = iwl_send_phy_cfg_cmd(mvm); 679 if (ret) { 680 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 681 ret); 682 goto remove_notif; 683 } 684 685 /* 686 * Some things may run in the background now, but we 687 * just wait for the calibration complete notification. 688 */ 689 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 690 MVM_UCODE_CALIB_TIMEOUT); 691 if (!ret) 692 goto out; 693 694 if (iwl_mvm_is_radio_hw_killed(mvm)) { 695 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 696 ret = 0; 697 } else { 698 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 699 ret); 700 } 701 702 goto out; 703 704 remove_notif: 705 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 706 out: 707 mvm->rfkill_safe_init_done = false; 708 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 709 /* we want to debug INIT and we have no NVM - fake */ 710 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 711 sizeof(struct ieee80211_channel) + 712 sizeof(struct ieee80211_rate), 713 GFP_KERNEL); 714 if (!mvm->nvm_data) 715 return -ENOMEM; 716 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 717 mvm->nvm_data->bands[0].n_channels = 1; 718 mvm->nvm_data->bands[0].n_bitrates = 1; 719 mvm->nvm_data->bands[0].bitrates = 720 (void *)mvm->nvm_data->channels + 1; 721 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 722 } 723 724 return ret; 725 } 726 727 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 728 { 729 struct iwl_ltr_config_cmd cmd = { 730 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 731 }; 732 733 if (!mvm->trans->ltr_enabled) 734 return 0; 735 736 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 737 sizeof(cmd), &cmd); 738 } 739 740 #ifdef CONFIG_ACPI 741 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 742 { 743 union { 744 struct iwl_dev_tx_power_cmd v5; 745 struct iwl_dev_tx_power_cmd_v4 v4; 746 } cmd = { 747 .v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 748 }; 749 int ret; 750 u16 len = 0; 751 752 if (fw_has_api(&mvm->fw->ucode_capa, 753 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) 754 len = sizeof(cmd.v5); 755 else if (fw_has_capa(&mvm->fw->ucode_capa, 756 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 757 len = sizeof(struct iwl_dev_tx_power_cmd_v4); 758 else 759 len = sizeof(cmd.v4.v3); 760 761 762 ret = iwl_sar_select_profile(&mvm->fwrt, 763 cmd.v5.v3.per_chain_restriction, 764 prof_a, prof_b); 765 766 /* return on error or if the profile is disabled (positive number) */ 767 if (ret) 768 return ret; 769 770 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 771 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 772 } 773 774 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 775 { 776 union geo_tx_power_profiles_cmd geo_tx_cmd; 777 u16 len; 778 int ret; 779 struct iwl_host_cmd cmd; 780 781 if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 782 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 783 geo_tx_cmd.geo_cmd.ops = 784 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 785 len = sizeof(geo_tx_cmd.geo_cmd); 786 } else { 787 geo_tx_cmd.geo_cmd_v1.ops = 788 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 789 len = sizeof(geo_tx_cmd.geo_cmd_v1); 790 } 791 792 if (!iwl_sar_geo_support(&mvm->fwrt)) 793 return -EOPNOTSUPP; 794 795 cmd = (struct iwl_host_cmd){ 796 .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 797 .len = { len, }, 798 .flags = CMD_WANT_SKB, 799 .data = { &geo_tx_cmd }, 800 }; 801 802 ret = iwl_mvm_send_cmd(mvm, &cmd); 803 if (ret) { 804 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 805 return ret; 806 } 807 ret = iwl_validate_sar_geo_profile(&mvm->fwrt, &cmd); 808 iwl_free_resp(&cmd); 809 return ret; 810 } 811 812 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 813 { 814 u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT); 815 union geo_tx_power_profiles_cmd cmd; 816 u16 len; 817 int ret; 818 819 cmd.geo_cmd.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 820 821 ret = iwl_sar_geo_init(&mvm->fwrt, cmd.geo_cmd.table); 822 /* 823 * It is a valid scenario to not support SAR, or miss wgds table, 824 * but in that case there is no need to send the command. 825 */ 826 if (ret) 827 return 0; 828 829 cmd.geo_cmd.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 830 831 if (!fw_has_api(&mvm->fwrt.fw->ucode_capa, 832 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 833 len = sizeof(struct iwl_geo_tx_power_profiles_cmd_v1); 834 } else { 835 len = sizeof(cmd.geo_cmd); 836 } 837 838 return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, len, &cmd); 839 } 840 841 static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 842 { 843 union acpi_object *wifi_pkg, *data, *enabled; 844 int i, j, ret, tbl_rev; 845 int idx = 2; 846 847 mvm->fwrt.ppag_table.enabled = cpu_to_le32(0); 848 data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 849 if (IS_ERR(data)) 850 return PTR_ERR(data); 851 852 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 853 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev); 854 855 if (IS_ERR(wifi_pkg)) { 856 ret = PTR_ERR(wifi_pkg); 857 goto out_free; 858 } 859 860 if (tbl_rev != 0) { 861 ret = -EINVAL; 862 goto out_free; 863 } 864 865 enabled = &wifi_pkg->package.elements[1]; 866 if (enabled->type != ACPI_TYPE_INTEGER || 867 (enabled->integer.value != 0 && enabled->integer.value != 1)) { 868 ret = -EINVAL; 869 goto out_free; 870 } 871 872 mvm->fwrt.ppag_table.enabled = cpu_to_le32(enabled->integer.value); 873 if (!mvm->fwrt.ppag_table.enabled) { 874 ret = 0; 875 goto out_free; 876 } 877 878 /* 879 * read, verify gain values and save them into the PPAG table. 880 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 881 * following sub-bands to High-Band (5GHz). 882 */ 883 for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) { 884 for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) { 885 union acpi_object *ent; 886 887 ent = &wifi_pkg->package.elements[idx++]; 888 if (ent->type != ACPI_TYPE_INTEGER || 889 (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) || 890 (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) || 891 (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) || 892 (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) { 893 mvm->fwrt.ppag_table.enabled = cpu_to_le32(0); 894 ret = -EINVAL; 895 goto out_free; 896 } 897 mvm->fwrt.ppag_table.gain[i][j] = ent->integer.value; 898 } 899 } 900 ret = 0; 901 out_free: 902 kfree(data); 903 return ret; 904 } 905 906 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 907 { 908 int i, j, ret; 909 910 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 911 IWL_DEBUG_RADIO(mvm, 912 "PPAG capability not supported by FW, command not sent.\n"); 913 return 0; 914 } 915 916 if (!mvm->fwrt.ppag_table.enabled) { 917 IWL_DEBUG_RADIO(mvm, 918 "PPAG not enabled, command not sent.\n"); 919 return 0; 920 } 921 922 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 923 924 for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) { 925 for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) { 926 IWL_DEBUG_RADIO(mvm, 927 "PPAG table: chain[%d] band[%d]: gain = %d\n", 928 i, j, mvm->fwrt.ppag_table.gain[i][j]); 929 } 930 } 931 932 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 933 PER_PLATFORM_ANT_GAIN_CMD), 934 0, sizeof(mvm->fwrt.ppag_table), 935 &mvm->fwrt.ppag_table); 936 if (ret < 0) 937 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 938 ret); 939 940 return ret; 941 } 942 943 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 944 { 945 int ret; 946 947 ret = iwl_mvm_get_ppag_table(mvm); 948 if (ret < 0) { 949 IWL_DEBUG_RADIO(mvm, 950 "PPAG BIOS table invalid or unavailable. (%d)\n", 951 ret); 952 return 0; 953 } 954 return iwl_mvm_ppag_send_cmd(mvm); 955 } 956 957 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 958 { 959 int ret; 960 struct iwl_tas_config_cmd cmd = {}; 961 int list_size; 962 963 BUILD_BUG_ON(ARRAY_SIZE(cmd.black_list_array) < 964 APCI_WTAS_BLACK_LIST_MAX); 965 966 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 967 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 968 return; 969 } 970 971 ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.black_list_array, &list_size); 972 if (ret < 0) { 973 IWL_DEBUG_RADIO(mvm, 974 "TAS table invalid or unavailable. (%d)\n", 975 ret); 976 return; 977 } 978 979 if (list_size < 0) 980 return; 981 982 /* list size if TAS enabled can only be non-negative */ 983 cmd.black_list_size = cpu_to_le32((u32)list_size); 984 985 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 986 TAS_CONFIG), 987 0, sizeof(cmd), &cmd); 988 if (ret < 0) 989 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 990 } 991 992 static bool iwl_mvm_eval_dsm_indonesia_5g2(struct iwl_mvm *mvm) 993 { 994 int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0, 995 DSM_FUNC_ENABLE_INDONESIA_5G2); 996 997 IWL_DEBUG_RADIO(mvm, 998 "Evaluated DSM function ENABLE_INDONESIA_5G2, ret=%d\n", 999 ret); 1000 1001 return ret == 1; 1002 } 1003 1004 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1005 { 1006 int ret; 1007 struct iwl_lari_config_change_cmd cmd = {}; 1008 1009 if (iwl_mvm_eval_dsm_indonesia_5g2(mvm)) 1010 cmd.config_bitmap |= 1011 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK); 1012 1013 /* apply more config masks here */ 1014 1015 if (cmd.config_bitmap) { 1016 IWL_DEBUG_RADIO(mvm, 1017 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x\n", 1018 le32_to_cpu(cmd.config_bitmap)); 1019 ret = iwl_mvm_send_cmd_pdu(mvm, 1020 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1021 LARI_CONFIG_CHANGE), 1022 0, sizeof(cmd), &cmd); 1023 if (ret < 0) 1024 IWL_DEBUG_RADIO(mvm, 1025 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1026 ret); 1027 } 1028 } 1029 #else /* CONFIG_ACPI */ 1030 1031 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1032 int prof_a, int prof_b) 1033 { 1034 return -ENOENT; 1035 } 1036 1037 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1038 { 1039 return -ENOENT; 1040 } 1041 1042 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1043 { 1044 return 0; 1045 } 1046 1047 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1048 { 1049 return -ENOENT; 1050 } 1051 1052 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1053 { 1054 return 0; 1055 } 1056 1057 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1058 { 1059 } 1060 1061 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1062 { 1063 } 1064 #endif /* CONFIG_ACPI */ 1065 1066 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1067 { 1068 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1069 int ret; 1070 u32 resp; 1071 1072 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1073 .flags = cpu_to_le32(flags), 1074 .buf_size = 0, 1075 }; 1076 struct iwl_host_cmd host_cmd = { 1077 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1078 .flags = CMD_WANT_SKB, 1079 .data = {&recovery_cmd, }, 1080 .len = {sizeof(recovery_cmd), }, 1081 }; 1082 1083 /* no error log was defined in TLV */ 1084 if (!error_log_size) 1085 return; 1086 1087 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1088 /* no buf was allocated while HW reset */ 1089 if (!mvm->error_recovery_buf) 1090 return; 1091 1092 host_cmd.data[1] = mvm->error_recovery_buf; 1093 host_cmd.len[1] = error_log_size; 1094 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1095 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1096 } 1097 1098 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1099 kfree(mvm->error_recovery_buf); 1100 mvm->error_recovery_buf = NULL; 1101 1102 if (ret) { 1103 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1104 return; 1105 } 1106 1107 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1108 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1109 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1110 if (resp) 1111 IWL_ERR(mvm, 1112 "Failed to send recovery cmd blob was invalid %d\n", 1113 resp); 1114 } 1115 } 1116 1117 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1118 { 1119 int ret; 1120 1121 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1122 if (ret < 0) { 1123 IWL_DEBUG_RADIO(mvm, 1124 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1125 ret); 1126 /* 1127 * If not available, don't fail and don't bother with EWRD. 1128 * Return 1 to tell that we can't use WGDS either. 1129 */ 1130 return 1; 1131 } 1132 1133 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1134 /* if EWRD is not available, we can still use WRDS, so don't fail */ 1135 if (ret < 0) 1136 IWL_DEBUG_RADIO(mvm, 1137 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1138 ret); 1139 1140 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1141 } 1142 1143 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1144 { 1145 int ret; 1146 1147 if (iwl_mvm_has_unified_ucode(mvm)) 1148 return iwl_run_unified_mvm_ucode(mvm, false); 1149 1150 ret = iwl_run_init_mvm_ucode(mvm, false); 1151 1152 if (ret) { 1153 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1154 1155 if (iwlmvm_mod_params.init_dbg) 1156 return 0; 1157 return ret; 1158 } 1159 1160 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1161 iwl_trans_stop_device(mvm->trans); 1162 ret = iwl_trans_start_hw(mvm->trans); 1163 if (ret) 1164 return ret; 1165 1166 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 1167 1168 mvm->rfkill_safe_init_done = false; 1169 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1170 if (ret) 1171 return ret; 1172 1173 mvm->rfkill_safe_init_done = true; 1174 1175 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1176 NULL); 1177 1178 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1179 } 1180 1181 int iwl_mvm_up(struct iwl_mvm *mvm) 1182 { 1183 int ret, i; 1184 struct ieee80211_channel *chan; 1185 struct cfg80211_chan_def chandef; 1186 struct ieee80211_supported_band *sband = NULL; 1187 1188 lockdep_assert_held(&mvm->mutex); 1189 1190 ret = iwl_trans_start_hw(mvm->trans); 1191 if (ret) 1192 return ret; 1193 1194 ret = iwl_mvm_load_rt_fw(mvm); 1195 if (ret) { 1196 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1197 if (ret != -ERFKILL) 1198 iwl_fw_dbg_error_collect(&mvm->fwrt, 1199 FW_DBG_TRIGGER_DRIVER); 1200 goto error; 1201 } 1202 1203 iwl_get_shared_mem_conf(&mvm->fwrt); 1204 1205 ret = iwl_mvm_sf_update(mvm, NULL, false); 1206 if (ret) 1207 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1208 1209 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1210 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1211 /* if we have a destination, assume EARLY START */ 1212 if (mvm->fw->dbg.dest_tlv) 1213 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1214 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1215 } 1216 1217 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1218 if (ret) 1219 goto error; 1220 1221 if (!iwl_mvm_has_unified_ucode(mvm)) { 1222 /* Send phy db control command and then phy db calibration */ 1223 ret = iwl_send_phy_db_data(mvm->phy_db); 1224 if (ret) 1225 goto error; 1226 } 1227 1228 ret = iwl_send_phy_cfg_cmd(mvm); 1229 if (ret) 1230 goto error; 1231 1232 ret = iwl_mvm_send_bt_init_conf(mvm); 1233 if (ret) 1234 goto error; 1235 1236 if (fw_has_capa(&mvm->fw->ucode_capa, 1237 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1238 ret = iwl_set_soc_latency(&mvm->fwrt); 1239 if (ret) 1240 goto error; 1241 } 1242 1243 /* Init RSS configuration */ 1244 if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) { 1245 ret = iwl_configure_rxq(mvm); 1246 if (ret) { 1247 IWL_ERR(mvm, "Failed to configure RX queues: %d\n", 1248 ret); 1249 goto error; 1250 } 1251 } 1252 1253 if (iwl_mvm_has_new_rx_api(mvm)) { 1254 ret = iwl_send_rss_cfg_cmd(mvm); 1255 if (ret) { 1256 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1257 ret); 1258 goto error; 1259 } 1260 } 1261 1262 /* init the fw <-> mac80211 STA mapping */ 1263 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1264 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1265 1266 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1267 1268 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1269 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1270 1271 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1272 ret = iwl_mvm_send_dqa_cmd(mvm); 1273 if (ret) 1274 goto error; 1275 } 1276 1277 /* Add auxiliary station for scanning */ 1278 ret = iwl_mvm_add_aux_sta(mvm); 1279 if (ret) 1280 goto error; 1281 1282 /* Add all the PHY contexts */ 1283 i = 0; 1284 while (!sband && i < NUM_NL80211_BANDS) 1285 sband = mvm->hw->wiphy->bands[i++]; 1286 1287 if (WARN_ON_ONCE(!sband)) 1288 goto error; 1289 1290 chan = &sband->channels[0]; 1291 1292 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1293 for (i = 0; i < NUM_PHY_CTX; i++) { 1294 /* 1295 * The channel used here isn't relevant as it's 1296 * going to be overwritten in the other flows. 1297 * For now use the first channel we have. 1298 */ 1299 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1300 &chandef, 1, 1); 1301 if (ret) 1302 goto error; 1303 } 1304 1305 if (iwl_mvm_is_tt_in_fw(mvm)) { 1306 /* in order to give the responsibility of ct-kill and 1307 * TX backoff to FW we need to send empty temperature reporting 1308 * cmd during init time 1309 */ 1310 iwl_mvm_send_temp_report_ths_cmd(mvm); 1311 } else { 1312 /* Initialize tx backoffs to the minimal possible */ 1313 iwl_mvm_tt_tx_backoff(mvm, 0); 1314 } 1315 1316 #ifdef CONFIG_THERMAL 1317 /* TODO: read the budget from BIOS / Platform NVM */ 1318 1319 /* 1320 * In case there is no budget from BIOS / Platform NVM the default 1321 * budget should be 2000mW (cooling state 0). 1322 */ 1323 if (iwl_mvm_is_ctdp_supported(mvm)) { 1324 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1325 mvm->cooling_dev.cur_state); 1326 if (ret) 1327 goto error; 1328 } 1329 #endif 1330 1331 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1332 WARN_ON(iwl_mvm_config_ltr(mvm)); 1333 1334 ret = iwl_mvm_power_update_device(mvm); 1335 if (ret) 1336 goto error; 1337 1338 iwl_mvm_lari_cfg(mvm); 1339 /* 1340 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1341 * anyway, so don't init MCC. 1342 */ 1343 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1344 ret = iwl_mvm_init_mcc(mvm); 1345 if (ret) 1346 goto error; 1347 } 1348 1349 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1350 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1351 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1352 ret = iwl_mvm_config_scan(mvm); 1353 if (ret) 1354 goto error; 1355 } 1356 1357 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1358 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1359 1360 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1361 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1362 1363 ret = iwl_mvm_ppag_init(mvm); 1364 if (ret) 1365 goto error; 1366 1367 ret = iwl_mvm_sar_init(mvm); 1368 if (ret == 0) { 1369 ret = iwl_mvm_sar_geo_init(mvm); 1370 } else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) { 1371 /* 1372 * If basic SAR is not available, we check for WGDS, 1373 * which should *not* be available either. If it is 1374 * available, issue an error, because we can't use SAR 1375 * Geo without basic SAR. 1376 */ 1377 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1378 } 1379 1380 if (ret < 0) 1381 goto error; 1382 1383 iwl_mvm_tas_init(mvm); 1384 iwl_mvm_leds_sync(mvm); 1385 1386 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1387 return 0; 1388 error: 1389 if (!iwlmvm_mod_params.init_dbg || !ret) 1390 iwl_mvm_stop_device(mvm); 1391 return ret; 1392 } 1393 1394 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1395 { 1396 int ret, i; 1397 1398 lockdep_assert_held(&mvm->mutex); 1399 1400 ret = iwl_trans_start_hw(mvm->trans); 1401 if (ret) 1402 return ret; 1403 1404 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1405 if (ret) { 1406 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1407 goto error; 1408 } 1409 1410 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1411 if (ret) 1412 goto error; 1413 1414 /* Send phy db control command and then phy db calibration*/ 1415 ret = iwl_send_phy_db_data(mvm->phy_db); 1416 if (ret) 1417 goto error; 1418 1419 ret = iwl_send_phy_cfg_cmd(mvm); 1420 if (ret) 1421 goto error; 1422 1423 /* init the fw <-> mac80211 STA mapping */ 1424 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1425 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1426 1427 /* Add auxiliary station for scanning */ 1428 ret = iwl_mvm_add_aux_sta(mvm); 1429 if (ret) 1430 goto error; 1431 1432 return 0; 1433 error: 1434 iwl_mvm_stop_device(mvm); 1435 return ret; 1436 } 1437 1438 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1439 struct iwl_rx_cmd_buffer *rxb) 1440 { 1441 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1442 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1443 u32 flags = le32_to_cpu(card_state_notif->flags); 1444 1445 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1446 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1447 (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1448 (flags & CT_KILL_CARD_DISABLED) ? 1449 "Reached" : "Not reached"); 1450 } 1451 1452 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1453 struct iwl_rx_cmd_buffer *rxb) 1454 { 1455 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1456 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1457 1458 IWL_DEBUG_INFO(mvm, 1459 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1460 le32_to_cpu(mfuart_notif->installed_ver), 1461 le32_to_cpu(mfuart_notif->external_ver), 1462 le32_to_cpu(mfuart_notif->status), 1463 le32_to_cpu(mfuart_notif->duration)); 1464 1465 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1466 IWL_DEBUG_INFO(mvm, 1467 "MFUART: image size: 0x%08x\n", 1468 le32_to_cpu(mfuart_notif->image_size)); 1469 } 1470