1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10 
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 
19 #include "mvm.h"
20 #include "fw/dbg.h"
21 #include "iwl-phy-db.h"
22 #include "iwl-modparams.h"
23 #include "iwl-nvm-parse.h"
24 #include "time-sync.h"
25 
26 #define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
27 #define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
28 
29 #define IWL_TAS_US_MCC 0x5553
30 #define IWL_TAS_CANADA_MCC 0x4341
31 
32 struct iwl_mvm_alive_data {
33 	bool valid;
34 	u32 scd_base_addr;
35 };
36 
37 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
38 {
39 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
40 		.valid = cpu_to_le32(valid_tx_ant),
41 	};
42 
43 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
44 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
45 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
46 }
47 
48 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
49 {
50 	int i;
51 	struct iwl_rss_config_cmd cmd = {
52 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
53 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
54 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
55 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
56 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
57 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
58 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
59 	};
60 
61 	if (mvm->trans->num_rx_queues == 1)
62 		return 0;
63 
64 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
65 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
66 		cmd.indirection_table[i] =
67 			1 + (i % (mvm->trans->num_rx_queues - 1));
68 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
69 
70 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
71 }
72 
73 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
74 {
75 	struct iwl_dqa_enable_cmd dqa_cmd = {
76 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
77 	};
78 	u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
79 	int ret;
80 
81 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
82 	if (ret)
83 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
84 	else
85 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
86 
87 	return ret;
88 }
89 
90 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
91 				   struct iwl_rx_cmd_buffer *rxb)
92 {
93 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
94 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
95 	__le32 *dump_data = mfu_dump_notif->data;
96 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
97 	int i;
98 
99 	if (mfu_dump_notif->index_num == 0)
100 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
101 			 le32_to_cpu(mfu_dump_notif->assert_id));
102 
103 	for (i = 0; i < n_words; i++)
104 		IWL_DEBUG_INFO(mvm,
105 			       "MFUART assert dump, dword %u: 0x%08x\n",
106 			       le16_to_cpu(mfu_dump_notif->index_num) *
107 			       n_words + i,
108 			       le32_to_cpu(dump_data[i]));
109 }
110 
111 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
112 			 struct iwl_rx_packet *pkt, void *data)
113 {
114 	unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
115 	struct iwl_mvm *mvm =
116 		container_of(notif_wait, struct iwl_mvm, notif_wait);
117 	struct iwl_mvm_alive_data *alive_data = data;
118 	struct iwl_umac_alive *umac;
119 	struct iwl_lmac_alive *lmac1;
120 	struct iwl_lmac_alive *lmac2 = NULL;
121 	u16 status;
122 	u32 lmac_error_event_table, umac_error_table;
123 	u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
124 					      UCODE_ALIVE_NTFY, 0);
125 	u32 i;
126 
127 
128 	if (version == 6) {
129 		struct iwl_alive_ntf_v6 *palive;
130 
131 		if (pkt_len < sizeof(*palive))
132 			return false;
133 
134 		palive = (void *)pkt->data;
135 		mvm->trans->dbg.imr_data.imr_enable =
136 			le32_to_cpu(palive->imr.enabled);
137 		mvm->trans->dbg.imr_data.imr_size =
138 			le32_to_cpu(palive->imr.size);
139 		mvm->trans->dbg.imr_data.imr2sram_remainbyte =
140 			mvm->trans->dbg.imr_data.imr_size;
141 		mvm->trans->dbg.imr_data.imr_base_addr =
142 			palive->imr.base_addr;
143 		mvm->trans->dbg.imr_data.imr_curr_addr =
144 			le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
145 		IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x  size 0x0%x Address 0x%016llx\n",
146 			     mvm->trans->dbg.imr_data.imr_enable,
147 			     mvm->trans->dbg.imr_data.imr_size,
148 			     le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
149 
150 		if (!mvm->trans->dbg.imr_data.imr_enable) {
151 			for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
152 				struct iwl_ucode_tlv *reg_tlv;
153 				struct iwl_fw_ini_region_tlv *reg;
154 
155 				reg_tlv = mvm->trans->dbg.active_regions[i];
156 				if (!reg_tlv)
157 					continue;
158 
159 				reg = (void *)reg_tlv->data;
160 				/*
161 				 * We have only one DRAM IMR region, so we
162 				 * can break as soon as we find the first
163 				 * one.
164 				 */
165 				if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
166 					mvm->trans->dbg.unsupported_region_msk |= BIT(i);
167 					break;
168 				}
169 			}
170 		}
171 	}
172 
173 	if (version >= 5) {
174 		struct iwl_alive_ntf_v5 *palive;
175 
176 		if (pkt_len < sizeof(*palive))
177 			return false;
178 
179 		palive = (void *)pkt->data;
180 		umac = &palive->umac_data;
181 		lmac1 = &palive->lmac_data[0];
182 		lmac2 = &palive->lmac_data[1];
183 		status = le16_to_cpu(palive->status);
184 
185 		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
186 		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
187 		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
188 
189 		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
190 			     mvm->trans->sku_id[0],
191 			     mvm->trans->sku_id[1],
192 			     mvm->trans->sku_id[2]);
193 	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
194 		struct iwl_alive_ntf_v4 *palive;
195 
196 		if (pkt_len < sizeof(*palive))
197 			return false;
198 
199 		palive = (void *)pkt->data;
200 		umac = &palive->umac_data;
201 		lmac1 = &palive->lmac_data[0];
202 		lmac2 = &palive->lmac_data[1];
203 		status = le16_to_cpu(palive->status);
204 	} else if (iwl_rx_packet_payload_len(pkt) ==
205 		   sizeof(struct iwl_alive_ntf_v3)) {
206 		struct iwl_alive_ntf_v3 *palive3;
207 
208 		if (pkt_len < sizeof(*palive3))
209 			return false;
210 
211 		palive3 = (void *)pkt->data;
212 		umac = &palive3->umac_data;
213 		lmac1 = &palive3->lmac_data;
214 		status = le16_to_cpu(palive3->status);
215 	} else {
216 		WARN(1, "unsupported alive notification (size %d)\n",
217 		     iwl_rx_packet_payload_len(pkt));
218 		/* get timeout later */
219 		return false;
220 	}
221 
222 	lmac_error_event_table =
223 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
224 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
225 
226 	if (lmac2)
227 		mvm->trans->dbg.lmac_error_event_table[1] =
228 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
229 
230 	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
231 							~FW_ADDR_CACHE_CONTROL;
232 
233 	if (umac_error_table) {
234 		if (umac_error_table >=
235 		    mvm->trans->cfg->min_umac_error_event_table) {
236 			iwl_fw_umac_set_alive_err_table(mvm->trans,
237 							umac_error_table);
238 		} else {
239 			IWL_ERR(mvm,
240 				"Not valid error log pointer 0x%08X for %s uCode\n",
241 				umac_error_table,
242 				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
243 				"Init" : "RT");
244 		}
245 	}
246 
247 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
248 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
249 
250 	IWL_DEBUG_FW(mvm,
251 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
252 		     status, lmac1->ver_type, lmac1->ver_subtype);
253 
254 	if (lmac2)
255 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
256 
257 	IWL_DEBUG_FW(mvm,
258 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
259 		     le32_to_cpu(umac->umac_major),
260 		     le32_to_cpu(umac->umac_minor));
261 
262 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
263 
264 	return true;
265 }
266 
267 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
268 				   struct iwl_rx_packet *pkt, void *data)
269 {
270 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
271 
272 	return true;
273 }
274 
275 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
276 				  struct iwl_rx_packet *pkt, void *data)
277 {
278 	struct iwl_phy_db *phy_db = data;
279 
280 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
281 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
282 		return true;
283 	}
284 
285 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
286 
287 	return false;
288 }
289 
290 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
291 {
292 #define IWL_FW_PRINT_REG_INFO(reg_name) \
293 	IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
294 
295 	struct iwl_trans *trans = mvm->trans;
296 	enum iwl_device_family device_family = trans->trans_cfg->device_family;
297 
298 	if (device_family < IWL_DEVICE_FAMILY_8000)
299 		return;
300 
301 	if (device_family <= IWL_DEVICE_FAMILY_9000)
302 		IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
303 	else
304 		IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
305 
306 	IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
307 
308 	/* print OPT info */
309 	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
310 	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
311 }
312 
313 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
314 					 enum iwl_ucode_type ucode_type)
315 {
316 	struct iwl_notification_wait alive_wait;
317 	struct iwl_mvm_alive_data alive_data = {};
318 	const struct fw_img *fw;
319 	int ret;
320 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
321 	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
322 	bool run_in_rfkill =
323 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
324 	u8 count;
325 	struct iwl_pc_data *pc_data;
326 
327 	if (ucode_type == IWL_UCODE_REGULAR &&
328 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
329 	    !(fw_has_capa(&mvm->fw->ucode_capa,
330 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
331 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
332 	else
333 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
334 	if (WARN_ON(!fw))
335 		return -EINVAL;
336 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
337 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
338 
339 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
340 				   alive_cmd, ARRAY_SIZE(alive_cmd),
341 				   iwl_alive_fn, &alive_data);
342 
343 	/*
344 	 * We want to load the INIT firmware even in RFKILL
345 	 * For the unified firmware case, the ucode_type is not
346 	 * INIT, but we still need to run it.
347 	 */
348 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
349 	if (ret) {
350 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
351 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
352 		return ret;
353 	}
354 
355 	/*
356 	 * Some things may run in the background now, but we
357 	 * just wait for the ALIVE notification here.
358 	 */
359 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
360 				    MVM_UCODE_ALIVE_TIMEOUT);
361 
362 	if (mvm->trans->trans_cfg->device_family ==
363 	    IWL_DEVICE_FAMILY_AX210) {
364 		/* print these registers regardless of alive fail/success */
365 		IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
366 			 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
367 		IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
368 			 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
369 		IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
370 			 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
371 		IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
372 			 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
373 	}
374 
375 	if (ret) {
376 		struct iwl_trans *trans = mvm->trans;
377 
378 		/* SecBoot info */
379 		if (trans->trans_cfg->device_family >=
380 					IWL_DEVICE_FAMILY_22000) {
381 			IWL_ERR(mvm,
382 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
383 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
384 				iwl_read_umac_prph(trans,
385 						   UMAG_SB_CPU_2_STATUS));
386 		} else if (trans->trans_cfg->device_family >=
387 			   IWL_DEVICE_FAMILY_8000) {
388 			IWL_ERR(mvm,
389 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
390 				iwl_read_prph(trans, SB_CPU_1_STATUS),
391 				iwl_read_prph(trans, SB_CPU_2_STATUS));
392 		}
393 
394 		iwl_mvm_print_pd_notification(mvm);
395 
396 		/* LMAC/UMAC PC info */
397 		if (trans->trans_cfg->device_family >=
398 					IWL_DEVICE_FAMILY_22000) {
399 			pc_data = trans->dbg.pc_data;
400 			for (count = 0; count < trans->dbg.num_pc;
401 			     count++, pc_data++)
402 				IWL_ERR(mvm, "%s: 0x%x\n",
403 					pc_data->pc_name,
404 					pc_data->pc_address);
405 		} else if (trans->trans_cfg->device_family >=
406 					IWL_DEVICE_FAMILY_9000) {
407 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
408 				iwl_read_umac_prph(trans,
409 						   UREG_UMAC_CURRENT_PC));
410 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
411 				iwl_read_umac_prph(trans,
412 						   UREG_LMAC1_CURRENT_PC));
413 			if (iwl_mvm_is_cdb_supported(mvm))
414 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
415 					iwl_read_umac_prph(trans,
416 						UREG_LMAC2_CURRENT_PC));
417 		}
418 
419 		if (ret == -ETIMEDOUT && !mvm->pldr_sync)
420 			iwl_fw_dbg_error_collect(&mvm->fwrt,
421 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
422 
423 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
424 		return ret;
425 	}
426 
427 	if (!alive_data.valid) {
428 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
429 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
430 		return -EIO;
431 	}
432 
433 	/* if reached this point, Alive notification was received */
434 	iwl_mei_alive_notif(true);
435 
436 	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
437 	if (ret) {
438 		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
439 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
440 		return ret;
441 	}
442 
443 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
444 
445 	/*
446 	 * Note: all the queues are enabled as part of the interface
447 	 * initialization, but in firmware restart scenarios they
448 	 * could be stopped, so wake them up. In firmware restart,
449 	 * mac80211 will have the queues stopped as well until the
450 	 * reconfiguration completes. During normal startup, they
451 	 * will be empty.
452 	 */
453 
454 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
455 	/*
456 	 * Set a 'fake' TID for the command queue, since we use the
457 	 * hweight() of the tid_bitmap as a refcount now. Not that
458 	 * we ever even consider the command queue as one we might
459 	 * want to reuse, but be safe nevertheless.
460 	 */
461 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
462 		BIT(IWL_MAX_TID_COUNT + 2);
463 
464 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
465 #ifdef CONFIG_IWLWIFI_DEBUGFS
466 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
467 #endif
468 
469 	/*
470 	 * All the BSSes in the BSS table include the GP2 in the system
471 	 * at the beacon Rx time, this is of course no longer relevant
472 	 * since we are resetting the firmware.
473 	 * Purge all the BSS table.
474 	 */
475 	cfg80211_bss_flush(mvm->hw->wiphy);
476 
477 	return 0;
478 }
479 
480 #ifdef CONFIG_ACPI
481 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
482 				    struct iwl_phy_specific_cfg *phy_filters)
483 {
484 	/*
485 	 * TODO: read specific phy config from BIOS
486 	 * ACPI table for this feature has not been defined yet,
487 	 * so for now we use hardcoded values.
488 	 */
489 
490 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
491 		phy_filters->filter_cfg_chain_a =
492 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
493 	}
494 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
495 		phy_filters->filter_cfg_chain_b =
496 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
497 	}
498 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
499 		phy_filters->filter_cfg_chain_c =
500 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
501 	}
502 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
503 		phy_filters->filter_cfg_chain_d =
504 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
505 	}
506 }
507 #else /* CONFIG_ACPI */
508 
509 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
510 				    struct iwl_phy_specific_cfg *phy_filters)
511 {
512 }
513 #endif /* CONFIG_ACPI */
514 
515 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
516 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
517 {
518 	u8 cmd_ver;
519 	int ret;
520 	struct iwl_host_cmd cmd = {
521 		.id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
522 			      SAR_OFFSET_MAPPING_TABLE_CMD),
523 		.flags = 0,
524 		.data[0] = &mvm->fwrt.sgom_table,
525 		.len[0] =  sizeof(mvm->fwrt.sgom_table),
526 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
527 	};
528 
529 	if (!mvm->fwrt.sgom_enabled) {
530 		IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
531 		return 0;
532 	}
533 
534 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
535 					IWL_FW_CMD_VER_UNKNOWN);
536 
537 	if (cmd_ver != 2) {
538 		IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
539 				cmd_ver);
540 		return 0;
541 	}
542 
543 	ret = iwl_mvm_send_cmd(mvm, &cmd);
544 	if (ret < 0)
545 		IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
546 
547 	return ret;
548 }
549 #else
550 
551 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
552 {
553 	return 0;
554 }
555 #endif
556 
557 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
558 {
559 	u32 cmd_id = PHY_CONFIGURATION_CMD;
560 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
561 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
562 	struct iwl_phy_specific_cfg phy_filters = {};
563 	u8 cmd_ver;
564 	size_t cmd_size;
565 
566 	if (iwl_mvm_has_unified_ucode(mvm) &&
567 	    !mvm->trans->cfg->tx_with_siso_diversity)
568 		return 0;
569 
570 	if (mvm->trans->cfg->tx_with_siso_diversity) {
571 		/*
572 		 * TODO: currently we don't set the antenna but letting the NIC
573 		 * to decide which antenna to use. This should come from BIOS.
574 		 */
575 		phy_cfg_cmd.phy_cfg =
576 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
577 	}
578 
579 	/* Set parameters */
580 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
581 
582 	/* set flags extra PHY configuration flags from the device's cfg */
583 	phy_cfg_cmd.phy_cfg |=
584 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
585 
586 	phy_cfg_cmd.calib_control.event_trigger =
587 		mvm->fw->default_calib[ucode_type].event_trigger;
588 	phy_cfg_cmd.calib_control.flow_trigger =
589 		mvm->fw->default_calib[ucode_type].flow_trigger;
590 
591 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
592 					IWL_FW_CMD_VER_UNKNOWN);
593 	if (cmd_ver == 3) {
594 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
595 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
596 		       sizeof(struct iwl_phy_specific_cfg));
597 	}
598 
599 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
600 		       phy_cfg_cmd.phy_cfg);
601 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
602 				    sizeof(struct iwl_phy_cfg_cmd_v1);
603 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
604 }
605 
606 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
607 {
608 	struct iwl_notification_wait init_wait;
609 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
610 	struct iwl_init_extended_cfg_cmd init_cfg = {
611 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
612 	};
613 	static const u16 init_complete[] = {
614 		INIT_COMPLETE_NOTIF,
615 	};
616 	int ret;
617 
618 	if (mvm->trans->cfg->tx_with_siso_diversity)
619 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
620 
621 	lockdep_assert_held(&mvm->mutex);
622 
623 	mvm->rfkill_safe_init_done = false;
624 
625 	iwl_init_notification_wait(&mvm->notif_wait,
626 				   &init_wait,
627 				   init_complete,
628 				   ARRAY_SIZE(init_complete),
629 				   iwl_wait_init_complete,
630 				   NULL);
631 
632 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
633 
634 	/* Will also start the device */
635 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
636 	if (ret) {
637 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
638 		goto error;
639 	}
640 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
641 			       NULL);
642 
643 	/* Send init config command to mark that we are sending NVM access
644 	 * commands
645 	 */
646 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
647 						INIT_EXTENDED_CFG_CMD),
648 				   CMD_SEND_IN_RFKILL,
649 				   sizeof(init_cfg), &init_cfg);
650 	if (ret) {
651 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
652 			ret);
653 		goto error;
654 	}
655 
656 	/* Load NVM to NIC if needed */
657 	if (mvm->nvm_file_name) {
658 		ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
659 					    mvm->nvm_sections);
660 		if (ret)
661 			goto error;
662 		ret = iwl_mvm_load_nvm_to_nic(mvm);
663 		if (ret)
664 			goto error;
665 	}
666 
667 	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
668 		ret = iwl_nvm_init(mvm);
669 		if (ret) {
670 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
671 			goto error;
672 		}
673 	}
674 
675 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
676 						NVM_ACCESS_COMPLETE),
677 				   CMD_SEND_IN_RFKILL,
678 				   sizeof(nvm_complete), &nvm_complete);
679 	if (ret) {
680 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
681 			ret);
682 		goto error;
683 	}
684 
685 	ret = iwl_send_phy_cfg_cmd(mvm);
686 	if (ret) {
687 		IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
688 			ret);
689 		goto error;
690 	}
691 
692 	/* We wait for the INIT complete notification */
693 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
694 				    MVM_UCODE_ALIVE_TIMEOUT);
695 	if (ret)
696 		return ret;
697 
698 	/* Read the NVM only at driver load time, no need to do this twice */
699 	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
700 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
701 		if (IS_ERR(mvm->nvm_data)) {
702 			ret = PTR_ERR(mvm->nvm_data);
703 			mvm->nvm_data = NULL;
704 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
705 			return ret;
706 		}
707 	}
708 
709 	mvm->rfkill_safe_init_done = true;
710 
711 	return 0;
712 
713 error:
714 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
715 	return ret;
716 }
717 
718 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
719 {
720 	struct iwl_notification_wait calib_wait;
721 	static const u16 init_complete[] = {
722 		INIT_COMPLETE_NOTIF,
723 		CALIB_RES_NOTIF_PHY_DB
724 	};
725 	int ret;
726 
727 	if (iwl_mvm_has_unified_ucode(mvm))
728 		return iwl_run_unified_mvm_ucode(mvm);
729 
730 	lockdep_assert_held(&mvm->mutex);
731 
732 	mvm->rfkill_safe_init_done = false;
733 
734 	iwl_init_notification_wait(&mvm->notif_wait,
735 				   &calib_wait,
736 				   init_complete,
737 				   ARRAY_SIZE(init_complete),
738 				   iwl_wait_phy_db_entry,
739 				   mvm->phy_db);
740 
741 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
742 
743 	/* Will also start the device */
744 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
745 	if (ret) {
746 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
747 		goto remove_notif;
748 	}
749 
750 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
751 		ret = iwl_mvm_send_bt_init_conf(mvm);
752 		if (ret)
753 			goto remove_notif;
754 	}
755 
756 	/* Read the NVM only at driver load time, no need to do this twice */
757 	if (!mvm->nvm_data) {
758 		ret = iwl_nvm_init(mvm);
759 		if (ret) {
760 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
761 			goto remove_notif;
762 		}
763 	}
764 
765 	/* In case we read the NVM from external file, load it to the NIC */
766 	if (mvm->nvm_file_name) {
767 		ret = iwl_mvm_load_nvm_to_nic(mvm);
768 		if (ret)
769 			goto remove_notif;
770 	}
771 
772 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
773 		  "Too old NVM version (0x%0x, required = 0x%0x)",
774 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
775 
776 	/*
777 	 * abort after reading the nvm in case RF Kill is on, we will complete
778 	 * the init seq later when RF kill will switch to off
779 	 */
780 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
781 		IWL_DEBUG_RF_KILL(mvm,
782 				  "jump over all phy activities due to RF kill\n");
783 		goto remove_notif;
784 	}
785 
786 	mvm->rfkill_safe_init_done = true;
787 
788 	/* Send TX valid antennas before triggering calibrations */
789 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
790 	if (ret)
791 		goto remove_notif;
792 
793 	ret = iwl_send_phy_cfg_cmd(mvm);
794 	if (ret) {
795 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
796 			ret);
797 		goto remove_notif;
798 	}
799 
800 	/*
801 	 * Some things may run in the background now, but we
802 	 * just wait for the calibration complete notification.
803 	 */
804 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
805 				    MVM_UCODE_CALIB_TIMEOUT);
806 	if (!ret)
807 		goto out;
808 
809 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
810 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
811 		ret = 0;
812 	} else {
813 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
814 			ret);
815 	}
816 
817 	goto out;
818 
819 remove_notif:
820 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
821 out:
822 	mvm->rfkill_safe_init_done = false;
823 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
824 		/* we want to debug INIT and we have no NVM - fake */
825 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
826 					sizeof(struct ieee80211_channel) +
827 					sizeof(struct ieee80211_rate),
828 					GFP_KERNEL);
829 		if (!mvm->nvm_data)
830 			return -ENOMEM;
831 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
832 		mvm->nvm_data->bands[0].n_channels = 1;
833 		mvm->nvm_data->bands[0].n_bitrates = 1;
834 		mvm->nvm_data->bands[0].bitrates =
835 			(void *)((u8 *)mvm->nvm_data->channels + 1);
836 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
837 	}
838 
839 	return ret;
840 }
841 
842 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
843 {
844 	struct iwl_ltr_config_cmd cmd = {
845 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
846 	};
847 
848 	if (!mvm->trans->ltr_enabled)
849 		return 0;
850 
851 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
852 				    sizeof(cmd), &cmd);
853 }
854 
855 #ifdef CONFIG_ACPI
856 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
857 {
858 	u32 cmd_id = REDUCE_TX_POWER_CMD;
859 	struct iwl_dev_tx_power_cmd cmd = {
860 		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
861 	};
862 	__le16 *per_chain;
863 	int ret;
864 	u16 len = 0;
865 	u32 n_subbands;
866 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
867 					   IWL_FW_CMD_VER_UNKNOWN);
868 	if (cmd_ver == 7) {
869 		len = sizeof(cmd.v7);
870 		n_subbands = IWL_NUM_SUB_BANDS_V2;
871 		per_chain = cmd.v7.per_chain[0][0];
872 		cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
873 	} else if (cmd_ver == 6) {
874 		len = sizeof(cmd.v6);
875 		n_subbands = IWL_NUM_SUB_BANDS_V2;
876 		per_chain = cmd.v6.per_chain[0][0];
877 	} else if (fw_has_api(&mvm->fw->ucode_capa,
878 			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
879 		len = sizeof(cmd.v5);
880 		n_subbands = IWL_NUM_SUB_BANDS_V1;
881 		per_chain = cmd.v5.per_chain[0][0];
882 	} else if (fw_has_capa(&mvm->fw->ucode_capa,
883 			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
884 		len = sizeof(cmd.v4);
885 		n_subbands = IWL_NUM_SUB_BANDS_V1;
886 		per_chain = cmd.v4.per_chain[0][0];
887 	} else {
888 		len = sizeof(cmd.v3);
889 		n_subbands = IWL_NUM_SUB_BANDS_V1;
890 		per_chain = cmd.v3.per_chain[0][0];
891 	}
892 
893 	/* all structs have the same common part, add it */
894 	len += sizeof(cmd.common);
895 
896 	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
897 				     IWL_NUM_CHAIN_TABLES,
898 				     n_subbands, prof_a, prof_b);
899 
900 	/* return on error or if the profile is disabled (positive number) */
901 	if (ret)
902 		return ret;
903 
904 	iwl_mei_set_power_limit(per_chain);
905 
906 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
907 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
908 }
909 
910 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
911 {
912 	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
913 	struct iwl_geo_tx_power_profiles_resp *resp;
914 	u16 len;
915 	int ret;
916 	struct iwl_host_cmd cmd = {
917 		.id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
918 		.flags = CMD_WANT_SKB,
919 		.data = { &geo_tx_cmd },
920 	};
921 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
922 					   IWL_FW_CMD_VER_UNKNOWN);
923 
924 	/* the ops field is at the same spot for all versions, so set in v1 */
925 	geo_tx_cmd.v1.ops =
926 		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
927 
928 	if (cmd_ver == 5)
929 		len = sizeof(geo_tx_cmd.v5);
930 	else if (cmd_ver == 4)
931 		len = sizeof(geo_tx_cmd.v4);
932 	else if (cmd_ver == 3)
933 		len = sizeof(geo_tx_cmd.v3);
934 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
935 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
936 		len = sizeof(geo_tx_cmd.v2);
937 	else
938 		len = sizeof(geo_tx_cmd.v1);
939 
940 	if (!iwl_sar_geo_support(&mvm->fwrt))
941 		return -EOPNOTSUPP;
942 
943 	cmd.len[0] = len;
944 
945 	ret = iwl_mvm_send_cmd(mvm, &cmd);
946 	if (ret) {
947 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
948 		return ret;
949 	}
950 
951 	resp = (void *)cmd.resp_pkt->data;
952 	ret = le32_to_cpu(resp->profile_idx);
953 
954 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
955 		ret = -EIO;
956 
957 	iwl_free_resp(&cmd);
958 	return ret;
959 }
960 
961 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
962 {
963 	u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
964 	union iwl_geo_tx_power_profiles_cmd cmd;
965 	u16 len;
966 	u32 n_bands;
967 	u32 n_profiles;
968 	u32 sk = 0;
969 	int ret;
970 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
971 					   IWL_FW_CMD_VER_UNKNOWN);
972 
973 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
974 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
975 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
976 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
977 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
978 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
979 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
980 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
981 
982 	/* the ops field is at the same spot for all versions, so set in v1 */
983 	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
984 
985 	if (cmd_ver == 5) {
986 		len = sizeof(cmd.v5);
987 		n_bands = ARRAY_SIZE(cmd.v5.table[0]);
988 		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
989 	} else if (cmd_ver == 4) {
990 		len = sizeof(cmd.v4);
991 		n_bands = ARRAY_SIZE(cmd.v4.table[0]);
992 		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
993 	} else if (cmd_ver == 3) {
994 		len = sizeof(cmd.v3);
995 		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
996 		n_profiles = ACPI_NUM_GEO_PROFILES;
997 	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
998 			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
999 		len = sizeof(cmd.v2);
1000 		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1001 		n_profiles = ACPI_NUM_GEO_PROFILES;
1002 	} else {
1003 		len = sizeof(cmd.v1);
1004 		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1005 		n_profiles = ACPI_NUM_GEO_PROFILES;
1006 	}
1007 
1008 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1009 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1010 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1011 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1012 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1013 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1014 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1015 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1016 	/* the table is at the same position for all versions, so set use v1 */
1017 	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
1018 			       n_bands, n_profiles);
1019 
1020 	/*
1021 	 * It is a valid scenario to not support SAR, or miss wgds table,
1022 	 * but in that case there is no need to send the command.
1023 	 */
1024 	if (ret)
1025 		return 0;
1026 
1027 	/* Only set to South Korea if the table revision is 1 */
1028 	if (mvm->fwrt.geo_rev == 1)
1029 		sk = 1;
1030 
1031 	/*
1032 	 * Set the table_revision to South Korea (1) or not (0).  The
1033 	 * element name is misleading, as it doesn't contain the table
1034 	 * revision number, but whether the South Korea variation
1035 	 * should be used.
1036 	 * This must be done after calling iwl_sar_geo_init().
1037 	 */
1038 	if (cmd_ver == 5)
1039 		cmd.v5.table_revision = cpu_to_le32(sk);
1040 	else if (cmd_ver == 4)
1041 		cmd.v4.table_revision = cpu_to_le32(sk);
1042 	else if (cmd_ver == 3)
1043 		cmd.v3.table_revision = cpu_to_le32(sk);
1044 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1045 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
1046 		cmd.v2.table_revision = cpu_to_le32(sk);
1047 
1048 	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1049 }
1050 
1051 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1052 {
1053 	union iwl_ppag_table_cmd cmd;
1054 	int ret, cmd_size;
1055 
1056 	ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1057 	/* Not supporting PPAG table is a valid scenario */
1058 	if (ret < 0)
1059 		return 0;
1060 
1061 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1062 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1063 						PER_PLATFORM_ANT_GAIN_CMD),
1064 				   0, cmd_size, &cmd);
1065 	if (ret < 0)
1066 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1067 			ret);
1068 
1069 	return ret;
1070 }
1071 
1072 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1073 {
1074 	/* no need to read the table, done in INIT stage */
1075 	if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
1076 		return 0;
1077 
1078 	return iwl_mvm_ppag_send_cmd(mvm);
1079 }
1080 
1081 static const struct dmi_system_id dmi_tas_approved_list[] = {
1082 	{ .ident = "HP",
1083 	  .matches = {
1084 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1085 		},
1086 	},
1087 	{ .ident = "SAMSUNG",
1088 	  .matches = {
1089 			DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1090 		},
1091 	},
1092 		{ .ident = "LENOVO",
1093 	  .matches = {
1094 			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1095 		},
1096 	},
1097 	{ .ident = "DELL",
1098 	  .matches = {
1099 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1100 		},
1101 	},
1102 	{ .ident = "MSFT",
1103 	  .matches = {
1104 			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1105 		},
1106 	},
1107 
1108 	/* keep last */
1109 	{}
1110 };
1111 
1112 bool iwl_mvm_is_vendor_in_approved_list(void)
1113 {
1114 	return dmi_check_system(dmi_tas_approved_list);
1115 }
1116 
1117 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1118 {
1119 	int i;
1120 	u32 size = le32_to_cpu(*le_size);
1121 
1122 	/* Verify that there is room for another country */
1123 	if (size >= IWL_TAS_BLOCK_LIST_MAX)
1124 		return false;
1125 
1126 	for (i = 0; i < size; i++) {
1127 		if (list[i] == cpu_to_le32(mcc))
1128 			return true;
1129 	}
1130 
1131 	list[size++] = cpu_to_le32(mcc);
1132 	*le_size = cpu_to_le32(size);
1133 	return true;
1134 }
1135 
1136 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1137 {
1138 	u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1139 	int ret;
1140 	union iwl_tas_config_cmd cmd = {};
1141 	int cmd_size, fw_ver;
1142 
1143 	BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
1144 		     APCI_WTAS_BLACK_LIST_MAX);
1145 
1146 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1147 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1148 		return;
1149 	}
1150 
1151 	fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1152 				       IWL_FW_CMD_VER_UNKNOWN);
1153 
1154 	ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
1155 	if (ret < 0) {
1156 		IWL_DEBUG_RADIO(mvm,
1157 				"TAS table invalid or unavailable. (%d)\n",
1158 				ret);
1159 		return;
1160 	}
1161 
1162 	if (ret == 0)
1163 		return;
1164 
1165 	if (!dmi_check_system(dmi_tas_approved_list)) {
1166 		IWL_DEBUG_RADIO(mvm,
1167 				"System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1168 				dmi_get_system_info(DMI_SYS_VENDOR));
1169 		if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1170 						    &cmd.v4.block_list_size,
1171 							IWL_TAS_US_MCC)) ||
1172 		    (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1173 						    &cmd.v4.block_list_size,
1174 							IWL_TAS_CANADA_MCC))) {
1175 			IWL_DEBUG_RADIO(mvm,
1176 					"Unable to add US/Canada to TAS block list, disabling TAS\n");
1177 			return;
1178 		}
1179 	}
1180 
1181 	/* v4 is the same size as v3, so no need to differentiate here */
1182 	cmd_size = fw_ver < 3 ?
1183 		sizeof(struct iwl_tas_config_cmd_v2) :
1184 		sizeof(struct iwl_tas_config_cmd_v3);
1185 
1186 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd);
1187 	if (ret < 0)
1188 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1189 }
1190 
1191 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1192 {
1193 	u8 value;
1194 	int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
1195 				      &iwl_rfi_guid, &value);
1196 
1197 	if (ret < 0) {
1198 		IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1199 
1200 	} else if (value >= DSM_VALUE_RFI_MAX) {
1201 		IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1202 				value);
1203 
1204 	} else if (value == DSM_VALUE_RFI_ENABLE) {
1205 		IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1206 		return DSM_VALUE_RFI_ENABLE;
1207 	}
1208 
1209 	IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1210 
1211 	/* default behaviour is disabled */
1212 	return DSM_VALUE_RFI_DISABLE;
1213 }
1214 
1215 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1216 {
1217 	int ret;
1218 	u32 value;
1219 	struct iwl_lari_config_change_cmd_v6 cmd = {};
1220 
1221 	cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1222 
1223 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
1224 				   &iwl_guid, &value);
1225 	if (!ret)
1226 		cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1227 
1228 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1229 				   DSM_FUNC_ENABLE_UNII4_CHAN,
1230 				   &iwl_guid, &value);
1231 	if (!ret)
1232 		cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1233 
1234 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1235 				   DSM_FUNC_ACTIVATE_CHANNEL,
1236 				   &iwl_guid, &value);
1237 	if (!ret)
1238 		cmd.chan_state_active_bitmap = cpu_to_le32(value);
1239 
1240 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1241 				   DSM_FUNC_ENABLE_6E,
1242 				   &iwl_guid, &value);
1243 	if (!ret)
1244 		cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1245 
1246 	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1247 				   DSM_FUNC_FORCE_DISABLE_CHANNELS,
1248 				   &iwl_guid, &value);
1249 	if (!ret)
1250 		cmd.force_disable_channels_bitmap = cpu_to_le32(value);
1251 
1252 	if (cmd.config_bitmap ||
1253 	    cmd.oem_uhb_allow_bitmap ||
1254 	    cmd.oem_11ax_allow_bitmap ||
1255 	    cmd.oem_unii4_allow_bitmap ||
1256 	    cmd.chan_state_active_bitmap ||
1257 	    cmd.force_disable_channels_bitmap) {
1258 		size_t cmd_size;
1259 		u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1260 						   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1261 							   LARI_CONFIG_CHANGE),
1262 						   1);
1263 		switch (cmd_ver) {
1264 		case 6:
1265 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1266 			break;
1267 		case 5:
1268 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1269 			break;
1270 		case 4:
1271 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1272 			break;
1273 		case 3:
1274 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1275 			break;
1276 		case 2:
1277 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1278 			break;
1279 		default:
1280 			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1281 			break;
1282 		}
1283 
1284 		IWL_DEBUG_RADIO(mvm,
1285 				"sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1286 				le32_to_cpu(cmd.config_bitmap),
1287 				le32_to_cpu(cmd.oem_11ax_allow_bitmap));
1288 		IWL_DEBUG_RADIO(mvm,
1289 				"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1290 				le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1291 				le32_to_cpu(cmd.chan_state_active_bitmap),
1292 				cmd_ver);
1293 		IWL_DEBUG_RADIO(mvm,
1294 				"sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1295 				le32_to_cpu(cmd.oem_uhb_allow_bitmap),
1296 				le32_to_cpu(cmd.force_disable_channels_bitmap));
1297 		ret = iwl_mvm_send_cmd_pdu(mvm,
1298 					   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1299 						   LARI_CONFIG_CHANGE),
1300 					   0, cmd_size, &cmd);
1301 		if (ret < 0)
1302 			IWL_DEBUG_RADIO(mvm,
1303 					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
1304 					ret);
1305 	}
1306 }
1307 
1308 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1309 {
1310 	int ret;
1311 
1312 	/* read PPAG table */
1313 	ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
1314 	if (ret < 0) {
1315 		IWL_DEBUG_RADIO(mvm,
1316 				"PPAG BIOS table invalid or unavailable. (%d)\n",
1317 				ret);
1318 	}
1319 
1320 	/* read SAR tables */
1321 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1322 	if (ret < 0) {
1323 		IWL_DEBUG_RADIO(mvm,
1324 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1325 				ret);
1326 		/*
1327 		 * If not available, don't fail and don't bother with EWRD and
1328 		 * WGDS */
1329 
1330 		if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1331 			/*
1332 			 * If basic SAR is not available, we check for WGDS,
1333 			 * which should *not* be available either.  If it is
1334 			 * available, issue an error, because we can't use SAR
1335 			 * Geo without basic SAR.
1336 			 */
1337 			IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1338 		}
1339 
1340 	} else {
1341 		ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1342 		/* if EWRD is not available, we can still use
1343 		* WRDS, so don't fail */
1344 		if (ret < 0)
1345 			IWL_DEBUG_RADIO(mvm,
1346 					"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1347 					ret);
1348 
1349 		/* read geo SAR table */
1350 		if (iwl_sar_geo_support(&mvm->fwrt)) {
1351 			ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1352 			if (ret < 0)
1353 				IWL_DEBUG_RADIO(mvm,
1354 						"Geo SAR BIOS table invalid or unavailable. (%d)\n",
1355 						ret);
1356 				/* we don't fail if the table is not available */
1357 		}
1358 	}
1359 }
1360 #else /* CONFIG_ACPI */
1361 
1362 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1363 				      int prof_a, int prof_b)
1364 {
1365 	return 1;
1366 }
1367 
1368 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1369 {
1370 	return -ENOENT;
1371 }
1372 
1373 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1374 {
1375 	return 0;
1376 }
1377 
1378 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1379 {
1380 	return -ENOENT;
1381 }
1382 
1383 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1384 {
1385 	return 0;
1386 }
1387 
1388 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1389 {
1390 }
1391 
1392 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1393 {
1394 }
1395 
1396 bool iwl_mvm_is_vendor_in_approved_list(void)
1397 {
1398 	return false;
1399 }
1400 
1401 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1402 {
1403 	return DSM_VALUE_RFI_DISABLE;
1404 }
1405 
1406 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1407 {
1408 }
1409 
1410 #endif /* CONFIG_ACPI */
1411 
1412 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1413 {
1414 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1415 	int ret;
1416 	u32 resp;
1417 
1418 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1419 		.flags = cpu_to_le32(flags),
1420 		.buf_size = 0,
1421 	};
1422 	struct iwl_host_cmd host_cmd = {
1423 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1424 		.flags = CMD_WANT_SKB,
1425 		.data = {&recovery_cmd, },
1426 		.len = {sizeof(recovery_cmd), },
1427 	};
1428 
1429 	/* no error log was defined in TLV */
1430 	if (!error_log_size)
1431 		return;
1432 
1433 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1434 		/* no buf was allocated while HW reset */
1435 		if (!mvm->error_recovery_buf)
1436 			return;
1437 
1438 		host_cmd.data[1] = mvm->error_recovery_buf;
1439 		host_cmd.len[1] =  error_log_size;
1440 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1441 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1442 	}
1443 
1444 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1445 	kfree(mvm->error_recovery_buf);
1446 	mvm->error_recovery_buf = NULL;
1447 
1448 	if (ret) {
1449 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1450 		return;
1451 	}
1452 
1453 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1454 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1455 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1456 		if (resp)
1457 			IWL_ERR(mvm,
1458 				"Failed to send recovery cmd blob was invalid %d\n",
1459 				resp);
1460 	}
1461 }
1462 
1463 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1464 {
1465 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1466 }
1467 
1468 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1469 {
1470 	int ret;
1471 
1472 	if (iwl_mvm_has_unified_ucode(mvm))
1473 		return iwl_run_unified_mvm_ucode(mvm);
1474 
1475 	ret = iwl_run_init_mvm_ucode(mvm);
1476 
1477 	if (ret) {
1478 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1479 
1480 		if (iwlmvm_mod_params.init_dbg)
1481 			return 0;
1482 		return ret;
1483 	}
1484 
1485 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1486 	iwl_trans_stop_device(mvm->trans);
1487 	ret = iwl_trans_start_hw(mvm->trans);
1488 	if (ret)
1489 		return ret;
1490 
1491 	mvm->rfkill_safe_init_done = false;
1492 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1493 	if (ret)
1494 		return ret;
1495 
1496 	mvm->rfkill_safe_init_done = true;
1497 
1498 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1499 			       NULL);
1500 
1501 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1502 }
1503 
1504 int iwl_mvm_up(struct iwl_mvm *mvm)
1505 {
1506 	int ret, i;
1507 	struct ieee80211_channel *chan;
1508 	struct cfg80211_chan_def chandef;
1509 	struct ieee80211_supported_band *sband = NULL;
1510 	u32 sb_cfg;
1511 
1512 	lockdep_assert_held(&mvm->mutex);
1513 
1514 	ret = iwl_trans_start_hw(mvm->trans);
1515 	if (ret)
1516 		return ret;
1517 
1518 	sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
1519 	mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK);
1520 	if (mvm->pldr_sync && iwl_mei_pldr_req())
1521 		return -EBUSY;
1522 
1523 	ret = iwl_mvm_load_rt_fw(mvm);
1524 	if (ret) {
1525 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1526 		if (ret != -ERFKILL && !mvm->pldr_sync)
1527 			iwl_fw_dbg_error_collect(&mvm->fwrt,
1528 						 FW_DBG_TRIGGER_DRIVER);
1529 		goto error;
1530 	}
1531 
1532 	/* FW loaded successfully */
1533 	mvm->pldr_sync = false;
1534 
1535 	iwl_get_shared_mem_conf(&mvm->fwrt);
1536 
1537 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1538 	if (ret)
1539 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1540 
1541 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1542 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1543 		/* if we have a destination, assume EARLY START */
1544 		if (mvm->fw->dbg.dest_tlv)
1545 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1546 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1547 	}
1548 
1549 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1550 	if (ret)
1551 		goto error;
1552 
1553 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1554 		/* Send phy db control command and then phy db calibration */
1555 		ret = iwl_send_phy_db_data(mvm->phy_db);
1556 		if (ret)
1557 			goto error;
1558 		ret = iwl_send_phy_cfg_cmd(mvm);
1559 		if (ret)
1560 			goto error;
1561 	}
1562 
1563 	ret = iwl_mvm_send_bt_init_conf(mvm);
1564 	if (ret)
1565 		goto error;
1566 
1567 	if (fw_has_capa(&mvm->fw->ucode_capa,
1568 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1569 		ret = iwl_set_soc_latency(&mvm->fwrt);
1570 		if (ret)
1571 			goto error;
1572 	}
1573 
1574 	/* Init RSS configuration */
1575 	ret = iwl_configure_rxq(&mvm->fwrt);
1576 	if (ret)
1577 		goto error;
1578 
1579 	if (iwl_mvm_has_new_rx_api(mvm)) {
1580 		ret = iwl_send_rss_cfg_cmd(mvm);
1581 		if (ret) {
1582 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1583 				ret);
1584 			goto error;
1585 		}
1586 	}
1587 
1588 	/* init the fw <-> mac80211 STA mapping */
1589 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1590 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1591 		RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1592 	}
1593 
1594 	memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map));
1595 
1596 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1597 
1598 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1599 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1600 
1601 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1602 		ret = iwl_mvm_send_dqa_cmd(mvm);
1603 		if (ret)
1604 			goto error;
1605 	}
1606 
1607 	/*
1608 	 * Add auxiliary station for scanning.
1609 	 * Newer versions of this command implies that the fw uses
1610 	 * internal aux station for all aux activities that don't
1611 	 * requires a dedicated data queue.
1612 	 */
1613 	if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) {
1614 		 /*
1615 		  * In old version the aux station uses mac id like other
1616 		  * station and not lmac id
1617 		  */
1618 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1619 		if (ret)
1620 			goto error;
1621 	}
1622 
1623 	/* Add all the PHY contexts */
1624 	i = 0;
1625 	while (!sband && i < NUM_NL80211_BANDS)
1626 		sband = mvm->hw->wiphy->bands[i++];
1627 
1628 	if (WARN_ON_ONCE(!sband)) {
1629 		ret = -ENODEV;
1630 		goto error;
1631 	}
1632 
1633 	chan = &sband->channels[0];
1634 
1635 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1636 	for (i = 0; i < NUM_PHY_CTX; i++) {
1637 		/*
1638 		 * The channel used here isn't relevant as it's
1639 		 * going to be overwritten in the other flows.
1640 		 * For now use the first channel we have.
1641 		 */
1642 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1643 					   &chandef, 1, 1);
1644 		if (ret)
1645 			goto error;
1646 	}
1647 
1648 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1649 		/* in order to give the responsibility of ct-kill and
1650 		 * TX backoff to FW we need to send empty temperature reporting
1651 		 * cmd during init time
1652 		 */
1653 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1654 	} else {
1655 		/* Initialize tx backoffs to the minimal possible */
1656 		iwl_mvm_tt_tx_backoff(mvm, 0);
1657 	}
1658 
1659 #ifdef CONFIG_THERMAL
1660 	/* TODO: read the budget from BIOS / Platform NVM */
1661 
1662 	/*
1663 	 * In case there is no budget from BIOS / Platform NVM the default
1664 	 * budget should be 2000mW (cooling state 0).
1665 	 */
1666 	if (iwl_mvm_is_ctdp_supported(mvm)) {
1667 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1668 					   mvm->cooling_dev.cur_state);
1669 		if (ret)
1670 			goto error;
1671 	}
1672 #endif
1673 
1674 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1675 		WARN_ON(iwl_mvm_config_ltr(mvm));
1676 
1677 	ret = iwl_mvm_power_update_device(mvm);
1678 	if (ret)
1679 		goto error;
1680 
1681 	iwl_mvm_lari_cfg(mvm);
1682 	/*
1683 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1684 	 * anyway, so don't init MCC.
1685 	 */
1686 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1687 		ret = iwl_mvm_init_mcc(mvm);
1688 		if (ret)
1689 			goto error;
1690 	}
1691 
1692 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1693 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1694 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1695 		ret = iwl_mvm_config_scan(mvm);
1696 		if (ret)
1697 			goto error;
1698 	}
1699 
1700 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1701 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1702 		iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1703 					 IWL_TIME_SYNC_PROTOCOL_TM |
1704 					 IWL_TIME_SYNC_PROTOCOL_FTM);
1705 	}
1706 
1707 	if (!mvm->ptp_data.ptp_clock)
1708 		iwl_mvm_ptp_init(mvm);
1709 
1710 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1711 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1712 
1713 	ret = iwl_mvm_ppag_init(mvm);
1714 	if (ret)
1715 		goto error;
1716 
1717 	ret = iwl_mvm_sar_init(mvm);
1718 	if (ret == 0)
1719 		ret = iwl_mvm_sar_geo_init(mvm);
1720 	if (ret < 0)
1721 		goto error;
1722 
1723 	ret = iwl_mvm_sgom_init(mvm);
1724 	if (ret)
1725 		goto error;
1726 
1727 	iwl_mvm_tas_init(mvm);
1728 	iwl_mvm_leds_sync(mvm);
1729 
1730 	if (iwl_rfi_supported(mvm)) {
1731 		if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1732 			iwl_rfi_send_config_cmd(mvm, NULL);
1733 	}
1734 
1735 	iwl_mvm_mei_device_state(mvm, true);
1736 
1737 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1738 	return 0;
1739  error:
1740 	if (!iwlmvm_mod_params.init_dbg || !ret)
1741 		iwl_mvm_stop_device(mvm);
1742 	return ret;
1743 }
1744 
1745 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1746 {
1747 	int ret, i;
1748 
1749 	lockdep_assert_held(&mvm->mutex);
1750 
1751 	ret = iwl_trans_start_hw(mvm->trans);
1752 	if (ret)
1753 		return ret;
1754 
1755 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1756 	if (ret) {
1757 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1758 		goto error;
1759 	}
1760 
1761 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1762 	if (ret)
1763 		goto error;
1764 
1765 	/* Send phy db control command and then phy db calibration*/
1766 	ret = iwl_send_phy_db_data(mvm->phy_db);
1767 	if (ret)
1768 		goto error;
1769 
1770 	ret = iwl_send_phy_cfg_cmd(mvm);
1771 	if (ret)
1772 		goto error;
1773 
1774 	/* init the fw <-> mac80211 STA mapping */
1775 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1776 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1777 		RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1778 	}
1779 
1780 	if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) {
1781 		/*
1782 		 * Add auxiliary station for scanning.
1783 		 * Newer versions of this command implies that the fw uses
1784 		 * internal aux station for all aux activities that don't
1785 		 * requires a dedicated data queue.
1786 		 * In old version the aux station uses mac id like other
1787 		 * station and not lmac id
1788 		 */
1789 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1790 		if (ret)
1791 			goto error;
1792 	}
1793 
1794 	return 0;
1795  error:
1796 	iwl_mvm_stop_device(mvm);
1797 	return ret;
1798 }
1799 
1800 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1801 			     struct iwl_rx_cmd_buffer *rxb)
1802 {
1803 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1804 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1805 
1806 	IWL_DEBUG_INFO(mvm,
1807 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1808 		       le32_to_cpu(mfuart_notif->installed_ver),
1809 		       le32_to_cpu(mfuart_notif->external_ver),
1810 		       le32_to_cpu(mfuart_notif->status),
1811 		       le32_to_cpu(mfuart_notif->duration));
1812 
1813 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1814 		IWL_DEBUG_INFO(mvm,
1815 			       "MFUART: image size: 0x%08x\n",
1816 			       le32_to_cpu(mfuart_notif->image_size));
1817 }
1818