1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 #include "time-sync.h" 25 26 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 27 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 28 29 #define IWL_TAS_US_MCC 0x5553 30 #define IWL_TAS_CANADA_MCC 0x4341 31 32 struct iwl_mvm_alive_data { 33 bool valid; 34 u32 scd_base_addr; 35 }; 36 37 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 38 { 39 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 40 .valid = cpu_to_le32(valid_tx_ant), 41 }; 42 43 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 44 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 45 sizeof(tx_ant_cmd), &tx_ant_cmd); 46 } 47 48 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 49 { 50 int i; 51 struct iwl_rss_config_cmd cmd = { 52 .flags = cpu_to_le32(IWL_RSS_ENABLE), 53 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 55 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 58 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 59 }; 60 61 if (mvm->trans->num_rx_queues == 1) 62 return 0; 63 64 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 65 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 66 cmd.indirection_table[i] = 67 1 + (i % (mvm->trans->num_rx_queues - 1)); 68 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 69 70 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 71 } 72 73 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 74 { 75 struct iwl_dqa_enable_cmd dqa_cmd = { 76 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 77 }; 78 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 79 int ret; 80 81 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 82 if (ret) 83 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 84 else 85 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 86 87 return ret; 88 } 89 90 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 91 struct iwl_rx_cmd_buffer *rxb) 92 { 93 struct iwl_rx_packet *pkt = rxb_addr(rxb); 94 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 95 96 if (mfu_dump_notif->index_num == 0) 97 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 98 le32_to_cpu(mfu_dump_notif->assert_id)); 99 } 100 101 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 102 struct iwl_rx_packet *pkt, void *data) 103 { 104 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 105 struct iwl_mvm *mvm = 106 container_of(notif_wait, struct iwl_mvm, notif_wait); 107 struct iwl_mvm_alive_data *alive_data = data; 108 struct iwl_umac_alive *umac; 109 struct iwl_lmac_alive *lmac1; 110 struct iwl_lmac_alive *lmac2 = NULL; 111 u16 status; 112 u32 lmac_error_event_table, umac_error_table; 113 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 114 UCODE_ALIVE_NTFY, 0); 115 u32 i; 116 117 118 if (version == 6) { 119 struct iwl_alive_ntf_v6 *palive; 120 121 if (pkt_len < sizeof(*palive)) 122 return false; 123 124 palive = (void *)pkt->data; 125 mvm->trans->dbg.imr_data.imr_enable = 126 le32_to_cpu(palive->imr.enabled); 127 mvm->trans->dbg.imr_data.imr_size = 128 le32_to_cpu(palive->imr.size); 129 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 130 mvm->trans->dbg.imr_data.imr_size; 131 mvm->trans->dbg.imr_data.imr_base_addr = 132 palive->imr.base_addr; 133 mvm->trans->dbg.imr_data.imr_curr_addr = 134 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 135 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 136 mvm->trans->dbg.imr_data.imr_enable, 137 mvm->trans->dbg.imr_data.imr_size, 138 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 139 140 if (!mvm->trans->dbg.imr_data.imr_enable) { 141 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 142 struct iwl_ucode_tlv *reg_tlv; 143 struct iwl_fw_ini_region_tlv *reg; 144 145 reg_tlv = mvm->trans->dbg.active_regions[i]; 146 if (!reg_tlv) 147 continue; 148 149 reg = (void *)reg_tlv->data; 150 /* 151 * We have only one DRAM IMR region, so we 152 * can break as soon as we find the first 153 * one. 154 */ 155 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 156 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 157 break; 158 } 159 } 160 } 161 } 162 163 if (version >= 5) { 164 struct iwl_alive_ntf_v5 *palive; 165 166 if (pkt_len < sizeof(*palive)) 167 return false; 168 169 palive = (void *)pkt->data; 170 umac = &palive->umac_data; 171 lmac1 = &palive->lmac_data[0]; 172 lmac2 = &palive->lmac_data[1]; 173 status = le16_to_cpu(palive->status); 174 175 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 176 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 177 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 178 179 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 180 mvm->trans->sku_id[0], 181 mvm->trans->sku_id[1], 182 mvm->trans->sku_id[2]); 183 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 184 struct iwl_alive_ntf_v4 *palive; 185 186 if (pkt_len < sizeof(*palive)) 187 return false; 188 189 palive = (void *)pkt->data; 190 umac = &palive->umac_data; 191 lmac1 = &palive->lmac_data[0]; 192 lmac2 = &palive->lmac_data[1]; 193 status = le16_to_cpu(palive->status); 194 } else if (iwl_rx_packet_payload_len(pkt) == 195 sizeof(struct iwl_alive_ntf_v3)) { 196 struct iwl_alive_ntf_v3 *palive3; 197 198 if (pkt_len < sizeof(*palive3)) 199 return false; 200 201 palive3 = (void *)pkt->data; 202 umac = &palive3->umac_data; 203 lmac1 = &palive3->lmac_data; 204 status = le16_to_cpu(palive3->status); 205 } else { 206 WARN(1, "unsupported alive notification (size %d)\n", 207 iwl_rx_packet_payload_len(pkt)); 208 /* get timeout later */ 209 return false; 210 } 211 212 lmac_error_event_table = 213 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 214 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 215 216 if (lmac2) 217 mvm->trans->dbg.lmac_error_event_table[1] = 218 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 219 220 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 221 ~FW_ADDR_CACHE_CONTROL; 222 223 if (umac_error_table) { 224 if (umac_error_table >= 225 mvm->trans->cfg->min_umac_error_event_table) { 226 iwl_fw_umac_set_alive_err_table(mvm->trans, 227 umac_error_table); 228 } else { 229 IWL_ERR(mvm, 230 "Not valid error log pointer 0x%08X for %s uCode\n", 231 umac_error_table, 232 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 233 "Init" : "RT"); 234 } 235 } 236 237 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 238 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 239 240 IWL_DEBUG_FW(mvm, 241 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 242 status, lmac1->ver_type, lmac1->ver_subtype); 243 244 if (lmac2) 245 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 246 247 IWL_DEBUG_FW(mvm, 248 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 249 le32_to_cpu(umac->umac_major), 250 le32_to_cpu(umac->umac_minor)); 251 252 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 253 254 return true; 255 } 256 257 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 258 struct iwl_rx_packet *pkt, void *data) 259 { 260 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 261 262 return true; 263 } 264 265 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 266 struct iwl_rx_packet *pkt, void *data) 267 { 268 struct iwl_phy_db *phy_db = data; 269 270 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 271 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 272 return true; 273 } 274 275 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 276 277 return false; 278 } 279 280 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 281 { 282 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 283 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 284 285 struct iwl_trans *trans = mvm->trans; 286 enum iwl_device_family device_family = trans->trans_cfg->device_family; 287 288 if (device_family < IWL_DEVICE_FAMILY_8000) 289 return; 290 291 if (device_family <= IWL_DEVICE_FAMILY_9000) 292 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 293 else 294 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 295 296 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 297 298 /* print OPT info */ 299 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 300 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 301 } 302 303 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 304 enum iwl_ucode_type ucode_type) 305 { 306 struct iwl_notification_wait alive_wait; 307 struct iwl_mvm_alive_data alive_data = {}; 308 const struct fw_img *fw; 309 int ret; 310 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 311 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 312 bool run_in_rfkill = 313 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 314 u8 count; 315 struct iwl_pc_data *pc_data; 316 317 if (ucode_type == IWL_UCODE_REGULAR && 318 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 319 !(fw_has_capa(&mvm->fw->ucode_capa, 320 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 321 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 322 else 323 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 324 if (WARN_ON(!fw)) 325 return -EINVAL; 326 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 327 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 328 329 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 330 alive_cmd, ARRAY_SIZE(alive_cmd), 331 iwl_alive_fn, &alive_data); 332 333 /* 334 * We want to load the INIT firmware even in RFKILL 335 * For the unified firmware case, the ucode_type is not 336 * INIT, but we still need to run it. 337 */ 338 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 339 if (ret) { 340 iwl_fw_set_current_image(&mvm->fwrt, old_type); 341 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 342 return ret; 343 } 344 345 /* 346 * Some things may run in the background now, but we 347 * just wait for the ALIVE notification here. 348 */ 349 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 350 MVM_UCODE_ALIVE_TIMEOUT); 351 352 if (mvm->trans->trans_cfg->device_family == 353 IWL_DEVICE_FAMILY_AX210) { 354 /* print these registers regardless of alive fail/success */ 355 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 356 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 357 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 358 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 359 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 360 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 361 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 362 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 363 } 364 365 if (ret) { 366 struct iwl_trans *trans = mvm->trans; 367 368 /* SecBoot info */ 369 if (trans->trans_cfg->device_family >= 370 IWL_DEVICE_FAMILY_22000) { 371 IWL_ERR(mvm, 372 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 373 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 374 iwl_read_umac_prph(trans, 375 UMAG_SB_CPU_2_STATUS)); 376 } else if (trans->trans_cfg->device_family >= 377 IWL_DEVICE_FAMILY_8000) { 378 IWL_ERR(mvm, 379 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 380 iwl_read_prph(trans, SB_CPU_1_STATUS), 381 iwl_read_prph(trans, SB_CPU_2_STATUS)); 382 } 383 384 iwl_mvm_print_pd_notification(mvm); 385 386 /* LMAC/UMAC PC info */ 387 if (trans->trans_cfg->device_family >= 388 IWL_DEVICE_FAMILY_22000) { 389 pc_data = trans->dbg.pc_data; 390 for (count = 0; count < trans->dbg.num_pc; 391 count++, pc_data++) 392 IWL_ERR(mvm, "%s: 0x%x\n", 393 pc_data->pc_name, 394 pc_data->pc_address); 395 } else if (trans->trans_cfg->device_family >= 396 IWL_DEVICE_FAMILY_9000) { 397 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 398 iwl_read_umac_prph(trans, 399 UREG_UMAC_CURRENT_PC)); 400 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 401 iwl_read_umac_prph(trans, 402 UREG_LMAC1_CURRENT_PC)); 403 if (iwl_mvm_is_cdb_supported(mvm)) 404 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 405 iwl_read_umac_prph(trans, 406 UREG_LMAC2_CURRENT_PC)); 407 } 408 409 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 410 iwl_fw_dbg_error_collect(&mvm->fwrt, 411 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 412 413 iwl_fw_set_current_image(&mvm->fwrt, old_type); 414 return ret; 415 } 416 417 if (!alive_data.valid) { 418 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 419 iwl_fw_set_current_image(&mvm->fwrt, old_type); 420 return -EIO; 421 } 422 423 /* if reached this point, Alive notification was received */ 424 iwl_mei_alive_notif(true); 425 426 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 427 &mvm->fw->ucode_capa); 428 if (ret) { 429 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 430 iwl_fw_set_current_image(&mvm->fwrt, old_type); 431 return ret; 432 } 433 434 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 435 436 /* 437 * Note: all the queues are enabled as part of the interface 438 * initialization, but in firmware restart scenarios they 439 * could be stopped, so wake them up. In firmware restart, 440 * mac80211 will have the queues stopped as well until the 441 * reconfiguration completes. During normal startup, they 442 * will be empty. 443 */ 444 445 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 446 /* 447 * Set a 'fake' TID for the command queue, since we use the 448 * hweight() of the tid_bitmap as a refcount now. Not that 449 * we ever even consider the command queue as one we might 450 * want to reuse, but be safe nevertheless. 451 */ 452 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 453 BIT(IWL_MAX_TID_COUNT + 2); 454 455 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 456 #ifdef CONFIG_IWLWIFI_DEBUGFS 457 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 458 #endif 459 460 /* 461 * All the BSSes in the BSS table include the GP2 in the system 462 * at the beacon Rx time, this is of course no longer relevant 463 * since we are resetting the firmware. 464 * Purge all the BSS table. 465 */ 466 cfg80211_bss_flush(mvm->hw->wiphy); 467 468 return 0; 469 } 470 471 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 472 struct iwl_phy_specific_cfg *phy_filters) 473 { 474 #ifdef CONFIG_ACPI 475 *phy_filters = mvm->phy_filters; 476 #endif /* CONFIG_ACPI */ 477 } 478 479 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 480 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 481 { 482 u8 cmd_ver; 483 int ret; 484 struct iwl_host_cmd cmd = { 485 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 486 SAR_OFFSET_MAPPING_TABLE_CMD), 487 .flags = 0, 488 .data[0] = &mvm->fwrt.sgom_table, 489 .len[0] = sizeof(mvm->fwrt.sgom_table), 490 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 491 }; 492 493 if (!mvm->fwrt.sgom_enabled) { 494 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 495 return 0; 496 } 497 498 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 499 IWL_FW_CMD_VER_UNKNOWN); 500 501 if (cmd_ver != 2) { 502 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 503 cmd_ver); 504 return 0; 505 } 506 507 ret = iwl_mvm_send_cmd(mvm, &cmd); 508 if (ret < 0) 509 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 510 511 return ret; 512 } 513 #else 514 515 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 516 { 517 return 0; 518 } 519 #endif 520 521 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 522 { 523 u32 cmd_id = PHY_CONFIGURATION_CMD; 524 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 525 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 526 u8 cmd_ver; 527 size_t cmd_size; 528 529 if (iwl_mvm_has_unified_ucode(mvm) && 530 !mvm->trans->cfg->tx_with_siso_diversity) 531 return 0; 532 533 if (mvm->trans->cfg->tx_with_siso_diversity) { 534 /* 535 * TODO: currently we don't set the antenna but letting the NIC 536 * to decide which antenna to use. This should come from BIOS. 537 */ 538 phy_cfg_cmd.phy_cfg = 539 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 540 } 541 542 /* Set parameters */ 543 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 544 545 /* set flags extra PHY configuration flags from the device's cfg */ 546 phy_cfg_cmd.phy_cfg |= 547 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 548 549 phy_cfg_cmd.calib_control.event_trigger = 550 mvm->fw->default_calib[ucode_type].event_trigger; 551 phy_cfg_cmd.calib_control.flow_trigger = 552 mvm->fw->default_calib[ucode_type].flow_trigger; 553 554 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 555 IWL_FW_CMD_VER_UNKNOWN); 556 if (cmd_ver >= 3) 557 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg); 558 559 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 560 phy_cfg_cmd.phy_cfg); 561 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 562 sizeof(struct iwl_phy_cfg_cmd_v1); 563 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 564 } 565 566 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 567 { 568 struct iwl_notification_wait init_wait; 569 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 570 struct iwl_init_extended_cfg_cmd init_cfg = { 571 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 572 }; 573 static const u16 init_complete[] = { 574 INIT_COMPLETE_NOTIF, 575 }; 576 int ret; 577 578 if (mvm->trans->cfg->tx_with_siso_diversity) 579 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 580 581 lockdep_assert_held(&mvm->mutex); 582 583 mvm->rfkill_safe_init_done = false; 584 585 iwl_init_notification_wait(&mvm->notif_wait, 586 &init_wait, 587 init_complete, 588 ARRAY_SIZE(init_complete), 589 iwl_wait_init_complete, 590 NULL); 591 592 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 593 594 /* Will also start the device */ 595 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 596 if (ret) { 597 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 598 goto error; 599 } 600 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 601 NULL); 602 603 /* Send init config command to mark that we are sending NVM access 604 * commands 605 */ 606 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 607 INIT_EXTENDED_CFG_CMD), 608 CMD_SEND_IN_RFKILL, 609 sizeof(init_cfg), &init_cfg); 610 if (ret) { 611 IWL_ERR(mvm, "Failed to run init config command: %d\n", 612 ret); 613 goto error; 614 } 615 616 /* Load NVM to NIC if needed */ 617 if (mvm->nvm_file_name) { 618 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 619 mvm->nvm_sections); 620 if (ret) 621 goto error; 622 ret = iwl_mvm_load_nvm_to_nic(mvm); 623 if (ret) 624 goto error; 625 } 626 627 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 628 ret = iwl_nvm_init(mvm); 629 if (ret) { 630 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 631 goto error; 632 } 633 } 634 635 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 636 NVM_ACCESS_COMPLETE), 637 CMD_SEND_IN_RFKILL, 638 sizeof(nvm_complete), &nvm_complete); 639 if (ret) { 640 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 641 ret); 642 goto error; 643 } 644 645 ret = iwl_send_phy_cfg_cmd(mvm); 646 if (ret) { 647 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 648 ret); 649 goto error; 650 } 651 652 /* We wait for the INIT complete notification */ 653 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 654 MVM_UCODE_ALIVE_TIMEOUT); 655 if (ret) 656 return ret; 657 658 /* Read the NVM only at driver load time, no need to do this twice */ 659 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 660 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 661 if (IS_ERR(mvm->nvm_data)) { 662 ret = PTR_ERR(mvm->nvm_data); 663 mvm->nvm_data = NULL; 664 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 665 return ret; 666 } 667 } 668 669 mvm->rfkill_safe_init_done = true; 670 671 return 0; 672 673 error: 674 iwl_remove_notification(&mvm->notif_wait, &init_wait); 675 return ret; 676 } 677 678 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 679 { 680 struct iwl_notification_wait calib_wait; 681 static const u16 init_complete[] = { 682 INIT_COMPLETE_NOTIF, 683 CALIB_RES_NOTIF_PHY_DB 684 }; 685 int ret; 686 687 if (iwl_mvm_has_unified_ucode(mvm)) 688 return iwl_run_unified_mvm_ucode(mvm); 689 690 lockdep_assert_held(&mvm->mutex); 691 692 mvm->rfkill_safe_init_done = false; 693 694 iwl_init_notification_wait(&mvm->notif_wait, 695 &calib_wait, 696 init_complete, 697 ARRAY_SIZE(init_complete), 698 iwl_wait_phy_db_entry, 699 mvm->phy_db); 700 701 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 702 703 /* Will also start the device */ 704 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 705 if (ret) { 706 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 707 goto remove_notif; 708 } 709 710 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 711 ret = iwl_mvm_send_bt_init_conf(mvm); 712 if (ret) 713 goto remove_notif; 714 } 715 716 /* Read the NVM only at driver load time, no need to do this twice */ 717 if (!mvm->nvm_data) { 718 ret = iwl_nvm_init(mvm); 719 if (ret) { 720 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 721 goto remove_notif; 722 } 723 } 724 725 /* In case we read the NVM from external file, load it to the NIC */ 726 if (mvm->nvm_file_name) { 727 ret = iwl_mvm_load_nvm_to_nic(mvm); 728 if (ret) 729 goto remove_notif; 730 } 731 732 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 733 "Too old NVM version (0x%0x, required = 0x%0x)", 734 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 735 736 /* 737 * abort after reading the nvm in case RF Kill is on, we will complete 738 * the init seq later when RF kill will switch to off 739 */ 740 if (iwl_mvm_is_radio_hw_killed(mvm)) { 741 IWL_DEBUG_RF_KILL(mvm, 742 "jump over all phy activities due to RF kill\n"); 743 goto remove_notif; 744 } 745 746 mvm->rfkill_safe_init_done = true; 747 748 /* Send TX valid antennas before triggering calibrations */ 749 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 750 if (ret) 751 goto remove_notif; 752 753 ret = iwl_send_phy_cfg_cmd(mvm); 754 if (ret) { 755 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 756 ret); 757 goto remove_notif; 758 } 759 760 /* 761 * Some things may run in the background now, but we 762 * just wait for the calibration complete notification. 763 */ 764 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 765 MVM_UCODE_CALIB_TIMEOUT); 766 if (!ret) 767 goto out; 768 769 if (iwl_mvm_is_radio_hw_killed(mvm)) { 770 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 771 ret = 0; 772 } else { 773 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 774 ret); 775 } 776 777 goto out; 778 779 remove_notif: 780 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 781 out: 782 mvm->rfkill_safe_init_done = false; 783 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 784 /* we want to debug INIT and we have no NVM - fake */ 785 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 786 sizeof(struct ieee80211_channel) + 787 sizeof(struct ieee80211_rate), 788 GFP_KERNEL); 789 if (!mvm->nvm_data) 790 return -ENOMEM; 791 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 792 mvm->nvm_data->bands[0].n_channels = 1; 793 mvm->nvm_data->bands[0].n_bitrates = 1; 794 mvm->nvm_data->bands[0].bitrates = 795 (void *)(mvm->nvm_data->channels + 1); 796 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 797 } 798 799 return ret; 800 } 801 802 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 803 { 804 struct iwl_ltr_config_cmd cmd = { 805 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 806 }; 807 808 if (!mvm->trans->ltr_enabled) 809 return 0; 810 811 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 812 sizeof(cmd), &cmd); 813 } 814 815 #ifdef CONFIG_ACPI 816 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 817 { 818 u32 cmd_id = REDUCE_TX_POWER_CMD; 819 struct iwl_dev_tx_power_cmd cmd = { 820 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 821 }; 822 __le16 *per_chain; 823 int ret; 824 u16 len = 0; 825 u32 n_subbands; 826 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 827 IWL_FW_CMD_VER_UNKNOWN); 828 if (cmd_ver == 7) { 829 len = sizeof(cmd.v7); 830 n_subbands = IWL_NUM_SUB_BANDS_V2; 831 per_chain = cmd.v7.per_chain[0][0]; 832 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 833 } else if (cmd_ver == 6) { 834 len = sizeof(cmd.v6); 835 n_subbands = IWL_NUM_SUB_BANDS_V2; 836 per_chain = cmd.v6.per_chain[0][0]; 837 } else if (fw_has_api(&mvm->fw->ucode_capa, 838 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 839 len = sizeof(cmd.v5); 840 n_subbands = IWL_NUM_SUB_BANDS_V1; 841 per_chain = cmd.v5.per_chain[0][0]; 842 } else if (fw_has_capa(&mvm->fw->ucode_capa, 843 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 844 len = sizeof(cmd.v4); 845 n_subbands = IWL_NUM_SUB_BANDS_V1; 846 per_chain = cmd.v4.per_chain[0][0]; 847 } else { 848 len = sizeof(cmd.v3); 849 n_subbands = IWL_NUM_SUB_BANDS_V1; 850 per_chain = cmd.v3.per_chain[0][0]; 851 } 852 853 /* all structs have the same common part, add it */ 854 len += sizeof(cmd.common); 855 856 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 857 IWL_NUM_CHAIN_TABLES, 858 n_subbands, prof_a, prof_b); 859 860 /* return on error or if the profile is disabled (positive number) */ 861 if (ret) 862 return ret; 863 864 iwl_mei_set_power_limit(per_chain); 865 866 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 867 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 868 } 869 870 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 871 { 872 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 873 struct iwl_geo_tx_power_profiles_resp *resp; 874 u16 len; 875 int ret; 876 struct iwl_host_cmd cmd = { 877 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 878 .flags = CMD_WANT_SKB, 879 .data = { &geo_tx_cmd }, 880 }; 881 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 882 IWL_FW_CMD_VER_UNKNOWN); 883 884 /* the ops field is at the same spot for all versions, so set in v1 */ 885 geo_tx_cmd.v1.ops = 886 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 887 888 if (cmd_ver == 5) 889 len = sizeof(geo_tx_cmd.v5); 890 else if (cmd_ver == 4) 891 len = sizeof(geo_tx_cmd.v4); 892 else if (cmd_ver == 3) 893 len = sizeof(geo_tx_cmd.v3); 894 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 895 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 896 len = sizeof(geo_tx_cmd.v2); 897 else 898 len = sizeof(geo_tx_cmd.v1); 899 900 if (!iwl_sar_geo_support(&mvm->fwrt)) 901 return -EOPNOTSUPP; 902 903 cmd.len[0] = len; 904 905 ret = iwl_mvm_send_cmd(mvm, &cmd); 906 if (ret) { 907 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 908 return ret; 909 } 910 911 resp = (void *)cmd.resp_pkt->data; 912 ret = le32_to_cpu(resp->profile_idx); 913 914 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 915 ret = -EIO; 916 917 iwl_free_resp(&cmd); 918 return ret; 919 } 920 921 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 922 { 923 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 924 union iwl_geo_tx_power_profiles_cmd cmd; 925 u16 len; 926 u32 n_bands; 927 u32 n_profiles; 928 u32 sk = 0; 929 int ret; 930 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 931 IWL_FW_CMD_VER_UNKNOWN); 932 933 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 934 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 935 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 936 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 937 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 938 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 939 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 940 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 941 942 /* the ops field is at the same spot for all versions, so set in v1 */ 943 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 944 945 if (cmd_ver == 5) { 946 len = sizeof(cmd.v5); 947 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 948 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 949 } else if (cmd_ver == 4) { 950 len = sizeof(cmd.v4); 951 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 952 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 953 } else if (cmd_ver == 3) { 954 len = sizeof(cmd.v3); 955 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 956 n_profiles = ACPI_NUM_GEO_PROFILES; 957 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 958 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 959 len = sizeof(cmd.v2); 960 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 961 n_profiles = ACPI_NUM_GEO_PROFILES; 962 } else { 963 len = sizeof(cmd.v1); 964 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 965 n_profiles = ACPI_NUM_GEO_PROFILES; 966 } 967 968 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 969 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 970 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 971 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 972 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 973 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 974 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 976 /* the table is at the same position for all versions, so set use v1 */ 977 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 978 n_bands, n_profiles); 979 980 /* 981 * It is a valid scenario to not support SAR, or miss wgds table, 982 * but in that case there is no need to send the command. 983 */ 984 if (ret) 985 return 0; 986 987 /* Only set to South Korea if the table revision is 1 */ 988 if (mvm->fwrt.geo_rev == 1) 989 sk = 1; 990 991 /* 992 * Set the table_revision to South Korea (1) or not (0). The 993 * element name is misleading, as it doesn't contain the table 994 * revision number, but whether the South Korea variation 995 * should be used. 996 * This must be done after calling iwl_sar_geo_init(). 997 */ 998 if (cmd_ver == 5) 999 cmd.v5.table_revision = cpu_to_le32(sk); 1000 else if (cmd_ver == 4) 1001 cmd.v4.table_revision = cpu_to_le32(sk); 1002 else if (cmd_ver == 3) 1003 cmd.v3.table_revision = cpu_to_le32(sk); 1004 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1005 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1006 cmd.v2.table_revision = cpu_to_le32(sk); 1007 1008 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1009 } 1010 1011 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1012 { 1013 union iwl_ppag_table_cmd cmd; 1014 int ret, cmd_size; 1015 1016 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1017 /* Not supporting PPAG table is a valid scenario */ 1018 if (ret < 0) 1019 return 0; 1020 1021 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1022 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1023 PER_PLATFORM_ANT_GAIN_CMD), 1024 0, cmd_size, &cmd); 1025 if (ret < 0) 1026 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1027 ret); 1028 1029 return ret; 1030 } 1031 1032 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1033 { 1034 /* no need to read the table, done in INIT stage */ 1035 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1036 return 0; 1037 1038 return iwl_mvm_ppag_send_cmd(mvm); 1039 } 1040 1041 static const struct dmi_system_id dmi_tas_approved_list[] = { 1042 { .ident = "HP", 1043 .matches = { 1044 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1045 }, 1046 }, 1047 { .ident = "SAMSUNG", 1048 .matches = { 1049 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1050 }, 1051 }, 1052 { .ident = "LENOVO", 1053 .matches = { 1054 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1055 }, 1056 }, 1057 { .ident = "DELL", 1058 .matches = { 1059 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1060 }, 1061 }, 1062 { .ident = "MSFT", 1063 .matches = { 1064 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 1065 }, 1066 }, 1067 { .ident = "Acer", 1068 .matches = { 1069 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1070 }, 1071 }, 1072 { .ident = "ASUS", 1073 .matches = { 1074 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 1075 }, 1076 }, 1077 { .ident = "MSI", 1078 .matches = { 1079 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."), 1080 }, 1081 }, 1082 { .ident = "Honor", 1083 .matches = { 1084 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 1085 }, 1086 }, 1087 /* keep last */ 1088 {} 1089 }; 1090 1091 bool iwl_mvm_is_vendor_in_approved_list(void) 1092 { 1093 return dmi_check_system(dmi_tas_approved_list); 1094 } 1095 1096 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1097 { 1098 int i; 1099 u32 size = le32_to_cpu(*le_size); 1100 1101 /* Verify that there is room for another country */ 1102 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1103 return false; 1104 1105 for (i = 0; i < size; i++) { 1106 if (list[i] == cpu_to_le32(mcc)) 1107 return true; 1108 } 1109 1110 list[size++] = cpu_to_le32(mcc); 1111 *le_size = cpu_to_le32(size); 1112 return true; 1113 } 1114 1115 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1116 { 1117 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1118 int ret; 1119 union iwl_tas_config_cmd cmd = {}; 1120 int cmd_size, fw_ver; 1121 1122 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1123 APCI_WTAS_BLACK_LIST_MAX); 1124 1125 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1126 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1127 return; 1128 } 1129 1130 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1131 IWL_FW_CMD_VER_UNKNOWN); 1132 1133 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1134 if (ret < 0) { 1135 IWL_DEBUG_RADIO(mvm, 1136 "TAS table invalid or unavailable. (%d)\n", 1137 ret); 1138 return; 1139 } 1140 1141 if (ret == 0) 1142 return; 1143 1144 if (!iwl_mvm_is_vendor_in_approved_list()) { 1145 IWL_DEBUG_RADIO(mvm, 1146 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1147 dmi_get_system_info(DMI_SYS_VENDOR)); 1148 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1149 &cmd.v4.block_list_size, 1150 IWL_TAS_US_MCC)) || 1151 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1152 &cmd.v4.block_list_size, 1153 IWL_TAS_CANADA_MCC))) { 1154 IWL_DEBUG_RADIO(mvm, 1155 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1156 return; 1157 } 1158 } else { 1159 IWL_DEBUG_RADIO(mvm, 1160 "System vendor '%s' is in the approved list.\n", 1161 dmi_get_system_info(DMI_SYS_VENDOR)); 1162 } 1163 1164 /* v4 is the same size as v3, so no need to differentiate here */ 1165 cmd_size = fw_ver < 3 ? 1166 sizeof(struct iwl_tas_config_cmd_v2) : 1167 sizeof(struct iwl_tas_config_cmd_v3); 1168 1169 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1170 if (ret < 0) 1171 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1172 } 1173 1174 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1175 { 1176 u8 value; 1177 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1178 &iwl_rfi_guid, &value); 1179 1180 if (ret < 0) { 1181 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1182 1183 } else if (value >= DSM_VALUE_RFI_MAX) { 1184 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1185 value); 1186 1187 } else if (value == DSM_VALUE_RFI_ENABLE) { 1188 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1189 return DSM_VALUE_RFI_ENABLE; 1190 } 1191 1192 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1193 1194 /* default behaviour is disabled */ 1195 return DSM_VALUE_RFI_DISABLE; 1196 } 1197 1198 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1199 { 1200 int ret; 1201 u32 value; 1202 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1203 1204 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1205 1206 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1207 &iwl_guid, &value); 1208 if (!ret) 1209 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1210 1211 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1212 DSM_FUNC_ENABLE_UNII4_CHAN, 1213 &iwl_guid, &value); 1214 if (!ret) 1215 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1216 1217 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1218 DSM_FUNC_ACTIVATE_CHANNEL, 1219 &iwl_guid, &value); 1220 if (!ret) 1221 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1222 1223 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1224 DSM_FUNC_ENABLE_6E, 1225 &iwl_guid, &value); 1226 if (!ret) 1227 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1228 1229 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1230 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1231 &iwl_guid, &value); 1232 if (!ret) 1233 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1234 1235 if (cmd.config_bitmap || 1236 cmd.oem_uhb_allow_bitmap || 1237 cmd.oem_11ax_allow_bitmap || 1238 cmd.oem_unii4_allow_bitmap || 1239 cmd.chan_state_active_bitmap || 1240 cmd.force_disable_channels_bitmap) { 1241 size_t cmd_size; 1242 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1243 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1244 LARI_CONFIG_CHANGE), 1245 1); 1246 switch (cmd_ver) { 1247 case 6: 1248 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1249 break; 1250 case 5: 1251 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1252 break; 1253 case 4: 1254 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1255 break; 1256 case 3: 1257 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1258 break; 1259 case 2: 1260 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1261 break; 1262 default: 1263 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1264 break; 1265 } 1266 1267 IWL_DEBUG_RADIO(mvm, 1268 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1269 le32_to_cpu(cmd.config_bitmap), 1270 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1271 IWL_DEBUG_RADIO(mvm, 1272 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1273 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1274 le32_to_cpu(cmd.chan_state_active_bitmap), 1275 cmd_ver); 1276 IWL_DEBUG_RADIO(mvm, 1277 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1278 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1279 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1280 ret = iwl_mvm_send_cmd_pdu(mvm, 1281 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1282 LARI_CONFIG_CHANGE), 1283 0, cmd_size, &cmd); 1284 if (ret < 0) 1285 IWL_DEBUG_RADIO(mvm, 1286 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1287 ret); 1288 } 1289 } 1290 1291 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1292 { 1293 int ret; 1294 1295 /* read PPAG table */ 1296 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1297 if (ret < 0) { 1298 IWL_DEBUG_RADIO(mvm, 1299 "PPAG BIOS table invalid or unavailable. (%d)\n", 1300 ret); 1301 } 1302 1303 /* read SAR tables */ 1304 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1305 if (ret < 0) { 1306 IWL_DEBUG_RADIO(mvm, 1307 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1308 ret); 1309 /* 1310 * If not available, don't fail and don't bother with EWRD and 1311 * WGDS */ 1312 1313 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1314 /* 1315 * If basic SAR is not available, we check for WGDS, 1316 * which should *not* be available either. If it is 1317 * available, issue an error, because we can't use SAR 1318 * Geo without basic SAR. 1319 */ 1320 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1321 } 1322 1323 } else { 1324 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1325 /* if EWRD is not available, we can still use 1326 * WRDS, so don't fail */ 1327 if (ret < 0) 1328 IWL_DEBUG_RADIO(mvm, 1329 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1330 ret); 1331 1332 /* read geo SAR table */ 1333 if (iwl_sar_geo_support(&mvm->fwrt)) { 1334 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1335 if (ret < 0) 1336 IWL_DEBUG_RADIO(mvm, 1337 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1338 ret); 1339 /* we don't fail if the table is not available */ 1340 } 1341 } 1342 1343 iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters); 1344 } 1345 #else /* CONFIG_ACPI */ 1346 1347 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1348 int prof_a, int prof_b) 1349 { 1350 return 1; 1351 } 1352 1353 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1354 { 1355 return -ENOENT; 1356 } 1357 1358 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1359 { 1360 return 0; 1361 } 1362 1363 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1364 { 1365 return -ENOENT; 1366 } 1367 1368 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1369 { 1370 return 0; 1371 } 1372 1373 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1374 { 1375 } 1376 1377 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1378 { 1379 } 1380 1381 bool iwl_mvm_is_vendor_in_approved_list(void) 1382 { 1383 return false; 1384 } 1385 1386 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1387 { 1388 return DSM_VALUE_RFI_DISABLE; 1389 } 1390 1391 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1392 { 1393 } 1394 1395 #endif /* CONFIG_ACPI */ 1396 1397 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1398 { 1399 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1400 int ret; 1401 u32 resp; 1402 1403 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1404 .flags = cpu_to_le32(flags), 1405 .buf_size = 0, 1406 }; 1407 struct iwl_host_cmd host_cmd = { 1408 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1409 .flags = CMD_WANT_SKB, 1410 .data = {&recovery_cmd, }, 1411 .len = {sizeof(recovery_cmd), }, 1412 }; 1413 1414 /* no error log was defined in TLV */ 1415 if (!error_log_size) 1416 return; 1417 1418 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1419 /* no buf was allocated while HW reset */ 1420 if (!mvm->error_recovery_buf) 1421 return; 1422 1423 host_cmd.data[1] = mvm->error_recovery_buf; 1424 host_cmd.len[1] = error_log_size; 1425 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1426 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1427 } 1428 1429 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1430 kfree(mvm->error_recovery_buf); 1431 mvm->error_recovery_buf = NULL; 1432 1433 if (ret) { 1434 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1435 return; 1436 } 1437 1438 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1439 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1440 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1441 if (resp) 1442 IWL_ERR(mvm, 1443 "Failed to send recovery cmd blob was invalid %d\n", 1444 resp); 1445 } 1446 } 1447 1448 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1449 { 1450 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1451 } 1452 1453 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1454 { 1455 int ret; 1456 1457 if (iwl_mvm_has_unified_ucode(mvm)) 1458 return iwl_run_unified_mvm_ucode(mvm); 1459 1460 ret = iwl_run_init_mvm_ucode(mvm); 1461 1462 if (ret) { 1463 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1464 1465 if (iwlmvm_mod_params.init_dbg) 1466 return 0; 1467 return ret; 1468 } 1469 1470 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1471 iwl_trans_stop_device(mvm->trans); 1472 ret = iwl_trans_start_hw(mvm->trans); 1473 if (ret) 1474 return ret; 1475 1476 mvm->rfkill_safe_init_done = false; 1477 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1478 if (ret) 1479 return ret; 1480 1481 mvm->rfkill_safe_init_done = true; 1482 1483 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1484 NULL); 1485 1486 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1487 } 1488 1489 int iwl_mvm_up(struct iwl_mvm *mvm) 1490 { 1491 int ret, i; 1492 struct ieee80211_channel *chan; 1493 struct cfg80211_chan_def chandef; 1494 struct ieee80211_supported_band *sband = NULL; 1495 u32 sb_cfg; 1496 1497 lockdep_assert_held(&mvm->mutex); 1498 1499 ret = iwl_trans_start_hw(mvm->trans); 1500 if (ret) 1501 return ret; 1502 1503 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 1504 mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 1505 if (mvm->pldr_sync && iwl_mei_pldr_req()) 1506 return -EBUSY; 1507 1508 ret = iwl_mvm_load_rt_fw(mvm); 1509 if (ret) { 1510 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1511 if (ret != -ERFKILL && !mvm->pldr_sync) 1512 iwl_fw_dbg_error_collect(&mvm->fwrt, 1513 FW_DBG_TRIGGER_DRIVER); 1514 goto error; 1515 } 1516 1517 /* FW loaded successfully */ 1518 mvm->pldr_sync = false; 1519 1520 iwl_get_shared_mem_conf(&mvm->fwrt); 1521 1522 ret = iwl_mvm_sf_update(mvm, NULL, false); 1523 if (ret) 1524 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1525 1526 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1527 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1528 /* if we have a destination, assume EARLY START */ 1529 if (mvm->fw->dbg.dest_tlv) 1530 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1531 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1532 } 1533 1534 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1535 if (ret) 1536 goto error; 1537 1538 if (!iwl_mvm_has_unified_ucode(mvm)) { 1539 /* Send phy db control command and then phy db calibration */ 1540 ret = iwl_send_phy_db_data(mvm->phy_db); 1541 if (ret) 1542 goto error; 1543 ret = iwl_send_phy_cfg_cmd(mvm); 1544 if (ret) 1545 goto error; 1546 } 1547 1548 ret = iwl_mvm_send_bt_init_conf(mvm); 1549 if (ret) 1550 goto error; 1551 1552 if (fw_has_capa(&mvm->fw->ucode_capa, 1553 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1554 ret = iwl_set_soc_latency(&mvm->fwrt); 1555 if (ret) 1556 goto error; 1557 } 1558 1559 iwl_mvm_lari_cfg(mvm); 1560 1561 /* Init RSS configuration */ 1562 ret = iwl_configure_rxq(&mvm->fwrt); 1563 if (ret) 1564 goto error; 1565 1566 if (iwl_mvm_has_new_rx_api(mvm)) { 1567 ret = iwl_send_rss_cfg_cmd(mvm); 1568 if (ret) { 1569 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1570 ret); 1571 goto error; 1572 } 1573 } 1574 1575 /* init the fw <-> mac80211 STA mapping */ 1576 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1577 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1578 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1579 } 1580 1581 for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++) 1582 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1583 1584 memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map)); 1585 1586 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1587 1588 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1589 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1590 1591 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1592 ret = iwl_mvm_send_dqa_cmd(mvm); 1593 if (ret) 1594 goto error; 1595 } 1596 1597 /* 1598 * Add auxiliary station for scanning. 1599 * Newer versions of this command implies that the fw uses 1600 * internal aux station for all aux activities that don't 1601 * requires a dedicated data queue. 1602 */ 1603 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1604 /* 1605 * In old version the aux station uses mac id like other 1606 * station and not lmac id 1607 */ 1608 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1609 if (ret) 1610 goto error; 1611 } 1612 1613 /* Add all the PHY contexts */ 1614 i = 0; 1615 while (!sband && i < NUM_NL80211_BANDS) 1616 sband = mvm->hw->wiphy->bands[i++]; 1617 1618 if (WARN_ON_ONCE(!sband)) { 1619 ret = -ENODEV; 1620 goto error; 1621 } 1622 1623 chan = &sband->channels[0]; 1624 1625 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1626 for (i = 0; i < NUM_PHY_CTX; i++) { 1627 /* 1628 * The channel used here isn't relevant as it's 1629 * going to be overwritten in the other flows. 1630 * For now use the first channel we have. 1631 */ 1632 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1633 &chandef, 1, 1); 1634 if (ret) 1635 goto error; 1636 } 1637 1638 if (iwl_mvm_is_tt_in_fw(mvm)) { 1639 /* in order to give the responsibility of ct-kill and 1640 * TX backoff to FW we need to send empty temperature reporting 1641 * cmd during init time 1642 */ 1643 iwl_mvm_send_temp_report_ths_cmd(mvm); 1644 } else { 1645 /* Initialize tx backoffs to the minimal possible */ 1646 iwl_mvm_tt_tx_backoff(mvm, 0); 1647 } 1648 1649 #ifdef CONFIG_THERMAL 1650 /* TODO: read the budget from BIOS / Platform NVM */ 1651 1652 /* 1653 * In case there is no budget from BIOS / Platform NVM the default 1654 * budget should be 2000mW (cooling state 0). 1655 */ 1656 if (iwl_mvm_is_ctdp_supported(mvm)) { 1657 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1658 mvm->cooling_dev.cur_state); 1659 if (ret) 1660 goto error; 1661 } 1662 #endif 1663 1664 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1665 WARN_ON(iwl_mvm_config_ltr(mvm)); 1666 1667 ret = iwl_mvm_power_update_device(mvm); 1668 if (ret) 1669 goto error; 1670 1671 /* 1672 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1673 * anyway, so don't init MCC. 1674 */ 1675 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1676 ret = iwl_mvm_init_mcc(mvm); 1677 if (ret) 1678 goto error; 1679 } 1680 1681 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1682 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1683 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1684 ret = iwl_mvm_config_scan(mvm); 1685 if (ret) 1686 goto error; 1687 } 1688 1689 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1690 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1691 1692 if (mvm->time_sync.active) 1693 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1694 IWL_TIME_SYNC_PROTOCOL_TM | 1695 IWL_TIME_SYNC_PROTOCOL_FTM); 1696 } 1697 1698 if (!mvm->ptp_data.ptp_clock) 1699 iwl_mvm_ptp_init(mvm); 1700 1701 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1702 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1703 1704 ret = iwl_mvm_ppag_init(mvm); 1705 if (ret) 1706 goto error; 1707 1708 ret = iwl_mvm_sar_init(mvm); 1709 if (ret == 0) 1710 ret = iwl_mvm_sar_geo_init(mvm); 1711 if (ret < 0) 1712 goto error; 1713 1714 ret = iwl_mvm_sgom_init(mvm); 1715 if (ret) 1716 goto error; 1717 1718 iwl_mvm_tas_init(mvm); 1719 iwl_mvm_leds_sync(mvm); 1720 1721 if (iwl_rfi_supported(mvm)) { 1722 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1723 iwl_rfi_send_config_cmd(mvm, NULL); 1724 } 1725 1726 iwl_mvm_mei_device_state(mvm, true); 1727 1728 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1729 return 0; 1730 error: 1731 if (!iwlmvm_mod_params.init_dbg || !ret) 1732 iwl_mvm_stop_device(mvm); 1733 return ret; 1734 } 1735 1736 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1737 { 1738 int ret, i; 1739 1740 lockdep_assert_held(&mvm->mutex); 1741 1742 ret = iwl_trans_start_hw(mvm->trans); 1743 if (ret) 1744 return ret; 1745 1746 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1747 if (ret) { 1748 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1749 goto error; 1750 } 1751 1752 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1753 if (ret) 1754 goto error; 1755 1756 /* Send phy db control command and then phy db calibration*/ 1757 ret = iwl_send_phy_db_data(mvm->phy_db); 1758 if (ret) 1759 goto error; 1760 1761 ret = iwl_send_phy_cfg_cmd(mvm); 1762 if (ret) 1763 goto error; 1764 1765 /* init the fw <-> mac80211 STA mapping */ 1766 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1767 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1768 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1769 } 1770 1771 if (!iwl_mvm_has_new_station_api(mvm->fw)) { 1772 /* 1773 * Add auxiliary station for scanning. 1774 * Newer versions of this command implies that the fw uses 1775 * internal aux station for all aux activities that don't 1776 * requires a dedicated data queue. 1777 * In old version the aux station uses mac id like other 1778 * station and not lmac id 1779 */ 1780 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1781 if (ret) 1782 goto error; 1783 } 1784 1785 return 0; 1786 error: 1787 iwl_mvm_stop_device(mvm); 1788 return ret; 1789 } 1790 1791 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1792 struct iwl_rx_cmd_buffer *rxb) 1793 { 1794 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1795 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1796 1797 IWL_DEBUG_INFO(mvm, 1798 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1799 le32_to_cpu(mfuart_notif->installed_ver), 1800 le32_to_cpu(mfuart_notif->external_ver), 1801 le32_to_cpu(mfuart_notif->status), 1802 le32_to_cpu(mfuart_notif->duration)); 1803 1804 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1805 IWL_DEBUG_INFO(mvm, 1806 "MFUART: image size: 0x%08x\n", 1807 le32_to_cpu(mfuart_notif->image_size)); 1808 } 1809