1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #include <net/mac80211.h> 8 #include <linux/netdevice.h> 9 #include <linux/dmi.h> 10 11 #include "iwl-trans.h" 12 #include "iwl-op-mode.h" 13 #include "fw/img.h" 14 #include "iwl-debug.h" 15 #include "iwl-prph.h" 16 #include "fw/acpi.h" 17 #include "fw/pnvm.h" 18 19 #include "mvm.h" 20 #include "fw/dbg.h" 21 #include "iwl-phy-db.h" 22 #include "iwl-modparams.h" 23 #include "iwl-nvm-parse.h" 24 #include "time-sync.h" 25 26 #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 27 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 28 29 #define IWL_TAS_US_MCC 0x5553 30 #define IWL_TAS_CANADA_MCC 0x4341 31 32 struct iwl_mvm_alive_data { 33 bool valid; 34 u32 scd_base_addr; 35 }; 36 37 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 38 { 39 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 40 .valid = cpu_to_le32(valid_tx_ant), 41 }; 42 43 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 44 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 45 sizeof(tx_ant_cmd), &tx_ant_cmd); 46 } 47 48 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 49 { 50 int i; 51 struct iwl_rss_config_cmd cmd = { 52 .flags = cpu_to_le32(IWL_RSS_ENABLE), 53 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 54 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 55 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 56 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 57 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 58 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 59 }; 60 61 if (mvm->trans->num_rx_queues == 1) 62 return 0; 63 64 /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 65 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 66 cmd.indirection_table[i] = 67 1 + (i % (mvm->trans->num_rx_queues - 1)); 68 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 69 70 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 71 } 72 73 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 74 { 75 struct iwl_dqa_enable_cmd dqa_cmd = { 76 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 77 }; 78 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 79 int ret; 80 81 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 82 if (ret) 83 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 84 else 85 IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 86 87 return ret; 88 } 89 90 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 91 struct iwl_rx_cmd_buffer *rxb) 92 { 93 struct iwl_rx_packet *pkt = rxb_addr(rxb); 94 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 95 __le32 *dump_data = mfu_dump_notif->data; 96 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 97 int i; 98 99 if (mfu_dump_notif->index_num == 0) 100 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 101 le32_to_cpu(mfu_dump_notif->assert_id)); 102 103 for (i = 0; i < n_words; i++) 104 IWL_DEBUG_INFO(mvm, 105 "MFUART assert dump, dword %u: 0x%08x\n", 106 le16_to_cpu(mfu_dump_notif->index_num) * 107 n_words + i, 108 le32_to_cpu(dump_data[i])); 109 } 110 111 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 112 struct iwl_rx_packet *pkt, void *data) 113 { 114 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 115 struct iwl_mvm *mvm = 116 container_of(notif_wait, struct iwl_mvm, notif_wait); 117 struct iwl_mvm_alive_data *alive_data = data; 118 struct iwl_umac_alive *umac; 119 struct iwl_lmac_alive *lmac1; 120 struct iwl_lmac_alive *lmac2 = NULL; 121 u16 status; 122 u32 lmac_error_event_table, umac_error_table; 123 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 124 UCODE_ALIVE_NTFY, 0); 125 u32 i; 126 127 128 if (version == 6) { 129 struct iwl_alive_ntf_v6 *palive; 130 131 if (pkt_len < sizeof(*palive)) 132 return false; 133 134 palive = (void *)pkt->data; 135 mvm->trans->dbg.imr_data.imr_enable = 136 le32_to_cpu(palive->imr.enabled); 137 mvm->trans->dbg.imr_data.imr_size = 138 le32_to_cpu(palive->imr.size); 139 mvm->trans->dbg.imr_data.imr2sram_remainbyte = 140 mvm->trans->dbg.imr_data.imr_size; 141 mvm->trans->dbg.imr_data.imr_base_addr = 142 palive->imr.base_addr; 143 mvm->trans->dbg.imr_data.imr_curr_addr = 144 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 145 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 146 mvm->trans->dbg.imr_data.imr_enable, 147 mvm->trans->dbg.imr_data.imr_size, 148 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 149 150 if (!mvm->trans->dbg.imr_data.imr_enable) { 151 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 152 struct iwl_ucode_tlv *reg_tlv; 153 struct iwl_fw_ini_region_tlv *reg; 154 155 reg_tlv = mvm->trans->dbg.active_regions[i]; 156 if (!reg_tlv) 157 continue; 158 159 reg = (void *)reg_tlv->data; 160 /* 161 * We have only one DRAM IMR region, so we 162 * can break as soon as we find the first 163 * one. 164 */ 165 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 166 mvm->trans->dbg.unsupported_region_msk |= BIT(i); 167 break; 168 } 169 } 170 } 171 } 172 173 if (version >= 5) { 174 struct iwl_alive_ntf_v5 *palive; 175 176 if (pkt_len < sizeof(*palive)) 177 return false; 178 179 palive = (void *)pkt->data; 180 umac = &palive->umac_data; 181 lmac1 = &palive->lmac_data[0]; 182 lmac2 = &palive->lmac_data[1]; 183 status = le16_to_cpu(palive->status); 184 185 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 186 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 187 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 188 189 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 190 mvm->trans->sku_id[0], 191 mvm->trans->sku_id[1], 192 mvm->trans->sku_id[2]); 193 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 194 struct iwl_alive_ntf_v4 *palive; 195 196 if (pkt_len < sizeof(*palive)) 197 return false; 198 199 palive = (void *)pkt->data; 200 umac = &palive->umac_data; 201 lmac1 = &palive->lmac_data[0]; 202 lmac2 = &palive->lmac_data[1]; 203 status = le16_to_cpu(palive->status); 204 } else if (iwl_rx_packet_payload_len(pkt) == 205 sizeof(struct iwl_alive_ntf_v3)) { 206 struct iwl_alive_ntf_v3 *palive3; 207 208 if (pkt_len < sizeof(*palive3)) 209 return false; 210 211 palive3 = (void *)pkt->data; 212 umac = &palive3->umac_data; 213 lmac1 = &palive3->lmac_data; 214 status = le16_to_cpu(palive3->status); 215 } else { 216 WARN(1, "unsupported alive notification (size %d)\n", 217 iwl_rx_packet_payload_len(pkt)); 218 /* get timeout later */ 219 return false; 220 } 221 222 lmac_error_event_table = 223 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 224 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 225 226 if (lmac2) 227 mvm->trans->dbg.lmac_error_event_table[1] = 228 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 229 230 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 231 ~FW_ADDR_CACHE_CONTROL; 232 233 if (umac_error_table) { 234 if (umac_error_table >= 235 mvm->trans->cfg->min_umac_error_event_table) { 236 iwl_fw_umac_set_alive_err_table(mvm->trans, 237 umac_error_table); 238 } else { 239 IWL_ERR(mvm, 240 "Not valid error log pointer 0x%08X for %s uCode\n", 241 umac_error_table, 242 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 243 "Init" : "RT"); 244 } 245 } 246 247 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 248 alive_data->valid = status == IWL_ALIVE_STATUS_OK; 249 250 IWL_DEBUG_FW(mvm, 251 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 252 status, lmac1->ver_type, lmac1->ver_subtype); 253 254 if (lmac2) 255 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 256 257 IWL_DEBUG_FW(mvm, 258 "UMAC version: Major - 0x%x, Minor - 0x%x\n", 259 le32_to_cpu(umac->umac_major), 260 le32_to_cpu(umac->umac_minor)); 261 262 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 263 264 return true; 265 } 266 267 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 268 struct iwl_rx_packet *pkt, void *data) 269 { 270 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 271 272 return true; 273 } 274 275 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 276 struct iwl_rx_packet *pkt, void *data) 277 { 278 struct iwl_phy_db *phy_db = data; 279 280 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 281 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 282 return true; 283 } 284 285 WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 286 287 return false; 288 } 289 290 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 291 { 292 #define IWL_FW_PRINT_REG_INFO(reg_name) \ 293 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 294 295 struct iwl_trans *trans = mvm->trans; 296 enum iwl_device_family device_family = trans->trans_cfg->device_family; 297 298 if (device_family < IWL_DEVICE_FAMILY_8000) 299 return; 300 301 if (device_family <= IWL_DEVICE_FAMILY_9000) 302 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 303 else 304 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 305 306 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 307 308 /* print OPT info */ 309 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 310 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 311 } 312 313 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 314 enum iwl_ucode_type ucode_type) 315 { 316 struct iwl_notification_wait alive_wait; 317 struct iwl_mvm_alive_data alive_data = {}; 318 const struct fw_img *fw; 319 int ret; 320 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 321 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 322 bool run_in_rfkill = 323 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 324 u8 count; 325 struct iwl_pc_data *pc_data; 326 327 if (ucode_type == IWL_UCODE_REGULAR && 328 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 329 !(fw_has_capa(&mvm->fw->ucode_capa, 330 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 331 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 332 else 333 fw = iwl_get_ucode_image(mvm->fw, ucode_type); 334 if (WARN_ON(!fw)) 335 return -EINVAL; 336 iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 337 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 338 339 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 340 alive_cmd, ARRAY_SIZE(alive_cmd), 341 iwl_alive_fn, &alive_data); 342 343 /* 344 * We want to load the INIT firmware even in RFKILL 345 * For the unified firmware case, the ucode_type is not 346 * INIT, but we still need to run it. 347 */ 348 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 349 if (ret) { 350 iwl_fw_set_current_image(&mvm->fwrt, old_type); 351 iwl_remove_notification(&mvm->notif_wait, &alive_wait); 352 return ret; 353 } 354 355 /* 356 * Some things may run in the background now, but we 357 * just wait for the ALIVE notification here. 358 */ 359 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 360 MVM_UCODE_ALIVE_TIMEOUT); 361 362 if (mvm->trans->trans_cfg->device_family == 363 IWL_DEVICE_FAMILY_AX210) { 364 /* print these registers regardless of alive fail/success */ 365 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 366 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 367 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 368 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 369 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 370 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 371 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 372 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 373 } 374 375 if (ret) { 376 struct iwl_trans *trans = mvm->trans; 377 378 /* SecBoot info */ 379 if (trans->trans_cfg->device_family >= 380 IWL_DEVICE_FAMILY_22000) { 381 IWL_ERR(mvm, 382 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 383 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 384 iwl_read_umac_prph(trans, 385 UMAG_SB_CPU_2_STATUS)); 386 } else if (trans->trans_cfg->device_family >= 387 IWL_DEVICE_FAMILY_8000) { 388 IWL_ERR(mvm, 389 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 390 iwl_read_prph(trans, SB_CPU_1_STATUS), 391 iwl_read_prph(trans, SB_CPU_2_STATUS)); 392 } 393 394 iwl_mvm_print_pd_notification(mvm); 395 396 /* LMAC/UMAC PC info */ 397 if (trans->trans_cfg->device_family >= 398 IWL_DEVICE_FAMILY_22000) { 399 pc_data = trans->dbg.pc_data; 400 for (count = 0; count < trans->dbg.num_pc; 401 count++, pc_data++) 402 IWL_ERR(mvm, "%s: 0x%x\n", 403 pc_data->pc_name, 404 pc_data->pc_address); 405 } else if (trans->trans_cfg->device_family >= 406 IWL_DEVICE_FAMILY_9000) { 407 IWL_ERR(mvm, "UMAC PC: 0x%x\n", 408 iwl_read_umac_prph(trans, 409 UREG_UMAC_CURRENT_PC)); 410 IWL_ERR(mvm, "LMAC PC: 0x%x\n", 411 iwl_read_umac_prph(trans, 412 UREG_LMAC1_CURRENT_PC)); 413 if (iwl_mvm_is_cdb_supported(mvm)) 414 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 415 iwl_read_umac_prph(trans, 416 UREG_LMAC2_CURRENT_PC)); 417 } 418 419 if (ret == -ETIMEDOUT && !mvm->pldr_sync) 420 iwl_fw_dbg_error_collect(&mvm->fwrt, 421 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 422 423 iwl_fw_set_current_image(&mvm->fwrt, old_type); 424 return ret; 425 } 426 427 if (!alive_data.valid) { 428 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 429 iwl_fw_set_current_image(&mvm->fwrt, old_type); 430 return -EIO; 431 } 432 433 /* if reached this point, Alive notification was received */ 434 iwl_mei_alive_notif(true); 435 436 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 437 &mvm->fw->ucode_capa); 438 if (ret) { 439 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 440 iwl_fw_set_current_image(&mvm->fwrt, old_type); 441 return ret; 442 } 443 444 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 445 446 /* 447 * Note: all the queues are enabled as part of the interface 448 * initialization, but in firmware restart scenarios they 449 * could be stopped, so wake them up. In firmware restart, 450 * mac80211 will have the queues stopped as well until the 451 * reconfiguration completes. During normal startup, they 452 * will be empty. 453 */ 454 455 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 456 /* 457 * Set a 'fake' TID for the command queue, since we use the 458 * hweight() of the tid_bitmap as a refcount now. Not that 459 * we ever even consider the command queue as one we might 460 * want to reuse, but be safe nevertheless. 461 */ 462 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 463 BIT(IWL_MAX_TID_COUNT + 2); 464 465 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 466 #ifdef CONFIG_IWLWIFI_DEBUGFS 467 iwl_fw_set_dbg_rec_on(&mvm->fwrt); 468 #endif 469 470 /* 471 * All the BSSes in the BSS table include the GP2 in the system 472 * at the beacon Rx time, this is of course no longer relevant 473 * since we are resetting the firmware. 474 * Purge all the BSS table. 475 */ 476 cfg80211_bss_flush(mvm->hw->wiphy); 477 478 return 0; 479 } 480 481 #ifdef CONFIG_ACPI 482 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 483 struct iwl_phy_specific_cfg *phy_filters) 484 { 485 /* 486 * TODO: read specific phy config from BIOS 487 * ACPI table for this feature has not been defined yet, 488 * so for now we use hardcoded values. 489 */ 490 491 if (IWL_MVM_PHY_FILTER_CHAIN_A) { 492 phy_filters->filter_cfg_chain_a = 493 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 494 } 495 if (IWL_MVM_PHY_FILTER_CHAIN_B) { 496 phy_filters->filter_cfg_chain_b = 497 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 498 } 499 if (IWL_MVM_PHY_FILTER_CHAIN_C) { 500 phy_filters->filter_cfg_chain_c = 501 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 502 } 503 if (IWL_MVM_PHY_FILTER_CHAIN_D) { 504 phy_filters->filter_cfg_chain_d = 505 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 506 } 507 } 508 #else /* CONFIG_ACPI */ 509 510 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 511 struct iwl_phy_specific_cfg *phy_filters) 512 { 513 } 514 #endif /* CONFIG_ACPI */ 515 516 #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 517 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 518 { 519 u8 cmd_ver; 520 int ret; 521 struct iwl_host_cmd cmd = { 522 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 523 SAR_OFFSET_MAPPING_TABLE_CMD), 524 .flags = 0, 525 .data[0] = &mvm->fwrt.sgom_table, 526 .len[0] = sizeof(mvm->fwrt.sgom_table), 527 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 528 }; 529 530 if (!mvm->fwrt.sgom_enabled) { 531 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 532 return 0; 533 } 534 535 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 536 IWL_FW_CMD_VER_UNKNOWN); 537 538 if (cmd_ver != 2) { 539 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 540 cmd_ver); 541 return 0; 542 } 543 544 ret = iwl_mvm_send_cmd(mvm, &cmd); 545 if (ret < 0) 546 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 547 548 return ret; 549 } 550 #else 551 552 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 553 { 554 return 0; 555 } 556 #endif 557 558 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 559 { 560 u32 cmd_id = PHY_CONFIGURATION_CMD; 561 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 562 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 563 struct iwl_phy_specific_cfg phy_filters = {}; 564 u8 cmd_ver; 565 size_t cmd_size; 566 567 if (iwl_mvm_has_unified_ucode(mvm) && 568 !mvm->trans->cfg->tx_with_siso_diversity) 569 return 0; 570 571 if (mvm->trans->cfg->tx_with_siso_diversity) { 572 /* 573 * TODO: currently we don't set the antenna but letting the NIC 574 * to decide which antenna to use. This should come from BIOS. 575 */ 576 phy_cfg_cmd.phy_cfg = 577 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 578 } 579 580 /* Set parameters */ 581 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 582 583 /* set flags extra PHY configuration flags from the device's cfg */ 584 phy_cfg_cmd.phy_cfg |= 585 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 586 587 phy_cfg_cmd.calib_control.event_trigger = 588 mvm->fw->default_calib[ucode_type].event_trigger; 589 phy_cfg_cmd.calib_control.flow_trigger = 590 mvm->fw->default_calib[ucode_type].flow_trigger; 591 592 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 593 IWL_FW_CMD_VER_UNKNOWN); 594 if (cmd_ver == 3) { 595 iwl_mvm_phy_filter_init(mvm, &phy_filters); 596 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 597 sizeof(struct iwl_phy_specific_cfg)); 598 } 599 600 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 601 phy_cfg_cmd.phy_cfg); 602 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 603 sizeof(struct iwl_phy_cfg_cmd_v1); 604 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 605 } 606 607 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 608 { 609 struct iwl_notification_wait init_wait; 610 struct iwl_nvm_access_complete_cmd nvm_complete = {}; 611 struct iwl_init_extended_cfg_cmd init_cfg = { 612 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 613 }; 614 static const u16 init_complete[] = { 615 INIT_COMPLETE_NOTIF, 616 }; 617 int ret; 618 619 if (mvm->trans->cfg->tx_with_siso_diversity) 620 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 621 622 lockdep_assert_held(&mvm->mutex); 623 624 mvm->rfkill_safe_init_done = false; 625 626 iwl_init_notification_wait(&mvm->notif_wait, 627 &init_wait, 628 init_complete, 629 ARRAY_SIZE(init_complete), 630 iwl_wait_init_complete, 631 NULL); 632 633 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 634 635 /* Will also start the device */ 636 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 637 if (ret) { 638 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 639 goto error; 640 } 641 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 642 NULL); 643 644 /* Send init config command to mark that we are sending NVM access 645 * commands 646 */ 647 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 648 INIT_EXTENDED_CFG_CMD), 649 CMD_SEND_IN_RFKILL, 650 sizeof(init_cfg), &init_cfg); 651 if (ret) { 652 IWL_ERR(mvm, "Failed to run init config command: %d\n", 653 ret); 654 goto error; 655 } 656 657 /* Load NVM to NIC if needed */ 658 if (mvm->nvm_file_name) { 659 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 660 mvm->nvm_sections); 661 if (ret) 662 goto error; 663 ret = iwl_mvm_load_nvm_to_nic(mvm); 664 if (ret) 665 goto error; 666 } 667 668 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 669 ret = iwl_nvm_init(mvm); 670 if (ret) { 671 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 672 goto error; 673 } 674 } 675 676 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 677 NVM_ACCESS_COMPLETE), 678 CMD_SEND_IN_RFKILL, 679 sizeof(nvm_complete), &nvm_complete); 680 if (ret) { 681 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 682 ret); 683 goto error; 684 } 685 686 ret = iwl_send_phy_cfg_cmd(mvm); 687 if (ret) { 688 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 689 ret); 690 goto error; 691 } 692 693 /* We wait for the INIT complete notification */ 694 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 695 MVM_UCODE_ALIVE_TIMEOUT); 696 if (ret) 697 return ret; 698 699 /* Read the NVM only at driver load time, no need to do this twice */ 700 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 701 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 702 if (IS_ERR(mvm->nvm_data)) { 703 ret = PTR_ERR(mvm->nvm_data); 704 mvm->nvm_data = NULL; 705 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 706 return ret; 707 } 708 } 709 710 mvm->rfkill_safe_init_done = true; 711 712 return 0; 713 714 error: 715 iwl_remove_notification(&mvm->notif_wait, &init_wait); 716 return ret; 717 } 718 719 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 720 { 721 struct iwl_notification_wait calib_wait; 722 static const u16 init_complete[] = { 723 INIT_COMPLETE_NOTIF, 724 CALIB_RES_NOTIF_PHY_DB 725 }; 726 int ret; 727 728 if (iwl_mvm_has_unified_ucode(mvm)) 729 return iwl_run_unified_mvm_ucode(mvm); 730 731 lockdep_assert_held(&mvm->mutex); 732 733 mvm->rfkill_safe_init_done = false; 734 735 iwl_init_notification_wait(&mvm->notif_wait, 736 &calib_wait, 737 init_complete, 738 ARRAY_SIZE(init_complete), 739 iwl_wait_phy_db_entry, 740 mvm->phy_db); 741 742 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 743 744 /* Will also start the device */ 745 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 746 if (ret) { 747 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 748 goto remove_notif; 749 } 750 751 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 752 ret = iwl_mvm_send_bt_init_conf(mvm); 753 if (ret) 754 goto remove_notif; 755 } 756 757 /* Read the NVM only at driver load time, no need to do this twice */ 758 if (!mvm->nvm_data) { 759 ret = iwl_nvm_init(mvm); 760 if (ret) { 761 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 762 goto remove_notif; 763 } 764 } 765 766 /* In case we read the NVM from external file, load it to the NIC */ 767 if (mvm->nvm_file_name) { 768 ret = iwl_mvm_load_nvm_to_nic(mvm); 769 if (ret) 770 goto remove_notif; 771 } 772 773 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 774 "Too old NVM version (0x%0x, required = 0x%0x)", 775 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 776 777 /* 778 * abort after reading the nvm in case RF Kill is on, we will complete 779 * the init seq later when RF kill will switch to off 780 */ 781 if (iwl_mvm_is_radio_hw_killed(mvm)) { 782 IWL_DEBUG_RF_KILL(mvm, 783 "jump over all phy activities due to RF kill\n"); 784 goto remove_notif; 785 } 786 787 mvm->rfkill_safe_init_done = true; 788 789 /* Send TX valid antennas before triggering calibrations */ 790 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 791 if (ret) 792 goto remove_notif; 793 794 ret = iwl_send_phy_cfg_cmd(mvm); 795 if (ret) { 796 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 797 ret); 798 goto remove_notif; 799 } 800 801 /* 802 * Some things may run in the background now, but we 803 * just wait for the calibration complete notification. 804 */ 805 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 806 MVM_UCODE_CALIB_TIMEOUT); 807 if (!ret) 808 goto out; 809 810 if (iwl_mvm_is_radio_hw_killed(mvm)) { 811 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 812 ret = 0; 813 } else { 814 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 815 ret); 816 } 817 818 goto out; 819 820 remove_notif: 821 iwl_remove_notification(&mvm->notif_wait, &calib_wait); 822 out: 823 mvm->rfkill_safe_init_done = false; 824 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 825 /* we want to debug INIT and we have no NVM - fake */ 826 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 827 sizeof(struct ieee80211_channel) + 828 sizeof(struct ieee80211_rate), 829 GFP_KERNEL); 830 if (!mvm->nvm_data) 831 return -ENOMEM; 832 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 833 mvm->nvm_data->bands[0].n_channels = 1; 834 mvm->nvm_data->bands[0].n_bitrates = 1; 835 mvm->nvm_data->bands[0].bitrates = 836 (void *)((u8 *)mvm->nvm_data->channels + 1); 837 mvm->nvm_data->bands[0].bitrates->hw_value = 10; 838 } 839 840 return ret; 841 } 842 843 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 844 { 845 struct iwl_ltr_config_cmd cmd = { 846 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 847 }; 848 849 if (!mvm->trans->ltr_enabled) 850 return 0; 851 852 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 853 sizeof(cmd), &cmd); 854 } 855 856 #ifdef CONFIG_ACPI 857 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 858 { 859 u32 cmd_id = REDUCE_TX_POWER_CMD; 860 struct iwl_dev_tx_power_cmd cmd = { 861 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 862 }; 863 __le16 *per_chain; 864 int ret; 865 u16 len = 0; 866 u32 n_subbands; 867 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 868 IWL_FW_CMD_VER_UNKNOWN); 869 if (cmd_ver == 7) { 870 len = sizeof(cmd.v7); 871 n_subbands = IWL_NUM_SUB_BANDS_V2; 872 per_chain = cmd.v7.per_chain[0][0]; 873 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 874 } else if (cmd_ver == 6) { 875 len = sizeof(cmd.v6); 876 n_subbands = IWL_NUM_SUB_BANDS_V2; 877 per_chain = cmd.v6.per_chain[0][0]; 878 } else if (fw_has_api(&mvm->fw->ucode_capa, 879 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 880 len = sizeof(cmd.v5); 881 n_subbands = IWL_NUM_SUB_BANDS_V1; 882 per_chain = cmd.v5.per_chain[0][0]; 883 } else if (fw_has_capa(&mvm->fw->ucode_capa, 884 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 885 len = sizeof(cmd.v4); 886 n_subbands = IWL_NUM_SUB_BANDS_V1; 887 per_chain = cmd.v4.per_chain[0][0]; 888 } else { 889 len = sizeof(cmd.v3); 890 n_subbands = IWL_NUM_SUB_BANDS_V1; 891 per_chain = cmd.v3.per_chain[0][0]; 892 } 893 894 /* all structs have the same common part, add it */ 895 len += sizeof(cmd.common); 896 897 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 898 IWL_NUM_CHAIN_TABLES, 899 n_subbands, prof_a, prof_b); 900 901 /* return on error or if the profile is disabled (positive number) */ 902 if (ret) 903 return ret; 904 905 iwl_mei_set_power_limit(per_chain); 906 907 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 908 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 909 } 910 911 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 912 { 913 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 914 struct iwl_geo_tx_power_profiles_resp *resp; 915 u16 len; 916 int ret; 917 struct iwl_host_cmd cmd = { 918 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 919 .flags = CMD_WANT_SKB, 920 .data = { &geo_tx_cmd }, 921 }; 922 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 923 IWL_FW_CMD_VER_UNKNOWN); 924 925 /* the ops field is at the same spot for all versions, so set in v1 */ 926 geo_tx_cmd.v1.ops = 927 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 928 929 if (cmd_ver == 5) 930 len = sizeof(geo_tx_cmd.v5); 931 else if (cmd_ver == 4) 932 len = sizeof(geo_tx_cmd.v4); 933 else if (cmd_ver == 3) 934 len = sizeof(geo_tx_cmd.v3); 935 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 936 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 937 len = sizeof(geo_tx_cmd.v2); 938 else 939 len = sizeof(geo_tx_cmd.v1); 940 941 if (!iwl_sar_geo_support(&mvm->fwrt)) 942 return -EOPNOTSUPP; 943 944 cmd.len[0] = len; 945 946 ret = iwl_mvm_send_cmd(mvm, &cmd); 947 if (ret) { 948 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 949 return ret; 950 } 951 952 resp = (void *)cmd.resp_pkt->data; 953 ret = le32_to_cpu(resp->profile_idx); 954 955 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 956 ret = -EIO; 957 958 iwl_free_resp(&cmd); 959 return ret; 960 } 961 962 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 963 { 964 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 965 union iwl_geo_tx_power_profiles_cmd cmd; 966 u16 len; 967 u32 n_bands; 968 u32 n_profiles; 969 u32 sk = 0; 970 int ret; 971 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 972 IWL_FW_CMD_VER_UNKNOWN); 973 974 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 976 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 977 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 978 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 979 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 980 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 981 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 982 983 /* the ops field is at the same spot for all versions, so set in v1 */ 984 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 985 986 if (cmd_ver == 5) { 987 len = sizeof(cmd.v5); 988 n_bands = ARRAY_SIZE(cmd.v5.table[0]); 989 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 990 } else if (cmd_ver == 4) { 991 len = sizeof(cmd.v4); 992 n_bands = ARRAY_SIZE(cmd.v4.table[0]); 993 n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 994 } else if (cmd_ver == 3) { 995 len = sizeof(cmd.v3); 996 n_bands = ARRAY_SIZE(cmd.v3.table[0]); 997 n_profiles = ACPI_NUM_GEO_PROFILES; 998 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 999 IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 1000 len = sizeof(cmd.v2); 1001 n_bands = ARRAY_SIZE(cmd.v2.table[0]); 1002 n_profiles = ACPI_NUM_GEO_PROFILES; 1003 } else { 1004 len = sizeof(cmd.v1); 1005 n_bands = ARRAY_SIZE(cmd.v1.table[0]); 1006 n_profiles = ACPI_NUM_GEO_PROFILES; 1007 } 1008 1009 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 1010 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 1011 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 1012 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 1013 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 1014 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 1016 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 1017 /* the table is at the same position for all versions, so set use v1 */ 1018 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 1019 n_bands, n_profiles); 1020 1021 /* 1022 * It is a valid scenario to not support SAR, or miss wgds table, 1023 * but in that case there is no need to send the command. 1024 */ 1025 if (ret) 1026 return 0; 1027 1028 /* Only set to South Korea if the table revision is 1 */ 1029 if (mvm->fwrt.geo_rev == 1) 1030 sk = 1; 1031 1032 /* 1033 * Set the table_revision to South Korea (1) or not (0). The 1034 * element name is misleading, as it doesn't contain the table 1035 * revision number, but whether the South Korea variation 1036 * should be used. 1037 * This must be done after calling iwl_sar_geo_init(). 1038 */ 1039 if (cmd_ver == 5) 1040 cmd.v5.table_revision = cpu_to_le32(sk); 1041 else if (cmd_ver == 4) 1042 cmd.v4.table_revision = cpu_to_le32(sk); 1043 else if (cmd_ver == 3) 1044 cmd.v3.table_revision = cpu_to_le32(sk); 1045 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 1046 IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1047 cmd.v2.table_revision = cpu_to_le32(sk); 1048 1049 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 1050 } 1051 1052 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1053 { 1054 union iwl_ppag_table_cmd cmd; 1055 int ret, cmd_size; 1056 1057 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1058 /* Not supporting PPAG table is a valid scenario */ 1059 if (ret < 0) 1060 return 0; 1061 1062 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 1063 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 1064 PER_PLATFORM_ANT_GAIN_CMD), 1065 0, cmd_size, &cmd); 1066 if (ret < 0) 1067 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 1068 ret); 1069 1070 return ret; 1071 } 1072 1073 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1074 { 1075 /* no need to read the table, done in INIT stage */ 1076 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1077 return 0; 1078 1079 return iwl_mvm_ppag_send_cmd(mvm); 1080 } 1081 1082 static const struct dmi_system_id dmi_tas_approved_list[] = { 1083 { .ident = "HP", 1084 .matches = { 1085 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1086 }, 1087 }, 1088 { .ident = "SAMSUNG", 1089 .matches = { 1090 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1091 }, 1092 }, 1093 { .ident = "LENOVO", 1094 .matches = { 1095 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1096 }, 1097 }, 1098 { .ident = "DELL", 1099 .matches = { 1100 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1101 }, 1102 }, 1103 { .ident = "MSFT", 1104 .matches = { 1105 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 1106 }, 1107 }, 1108 { .ident = "Acer", 1109 .matches = { 1110 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1111 }, 1112 }, 1113 { .ident = "ASUS", 1114 .matches = { 1115 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 1116 }, 1117 }, 1118 { .ident = "MSI", 1119 .matches = { 1120 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."), 1121 }, 1122 }, 1123 { .ident = "Honor", 1124 .matches = { 1125 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 1126 }, 1127 }, 1128 /* keep last */ 1129 {} 1130 }; 1131 1132 bool iwl_mvm_is_vendor_in_approved_list(void) 1133 { 1134 return dmi_check_system(dmi_tas_approved_list); 1135 } 1136 1137 static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1138 { 1139 int i; 1140 u32 size = le32_to_cpu(*le_size); 1141 1142 /* Verify that there is room for another country */ 1143 if (size >= IWL_TAS_BLOCK_LIST_MAX) 1144 return false; 1145 1146 for (i = 0; i < size; i++) { 1147 if (list[i] == cpu_to_le32(mcc)) 1148 return true; 1149 } 1150 1151 list[size++] = cpu_to_le32(mcc); 1152 *le_size = cpu_to_le32(size); 1153 return true; 1154 } 1155 1156 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1157 { 1158 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 1159 int ret; 1160 union iwl_tas_config_cmd cmd = {}; 1161 int cmd_size, fw_ver; 1162 1163 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 1164 APCI_WTAS_BLACK_LIST_MAX); 1165 1166 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 1167 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 1168 return; 1169 } 1170 1171 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1172 IWL_FW_CMD_VER_UNKNOWN); 1173 1174 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 1175 if (ret < 0) { 1176 IWL_DEBUG_RADIO(mvm, 1177 "TAS table invalid or unavailable. (%d)\n", 1178 ret); 1179 return; 1180 } 1181 1182 if (ret == 0) 1183 return; 1184 1185 if (!dmi_check_system(dmi_tas_approved_list)) { 1186 IWL_DEBUG_RADIO(mvm, 1187 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1188 dmi_get_system_info(DMI_SYS_VENDOR)); 1189 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1190 &cmd.v4.block_list_size, 1191 IWL_TAS_US_MCC)) || 1192 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 1193 &cmd.v4.block_list_size, 1194 IWL_TAS_CANADA_MCC))) { 1195 IWL_DEBUG_RADIO(mvm, 1196 "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1197 return; 1198 } 1199 } else { 1200 IWL_DEBUG_RADIO(mvm, 1201 "System vendor '%s' is in the approved list.\n", 1202 dmi_get_system_info(DMI_SYS_VENDOR)); 1203 } 1204 1205 /* v4 is the same size as v3, so no need to differentiate here */ 1206 cmd_size = fw_ver < 3 ? 1207 sizeof(struct iwl_tas_config_cmd_v2) : 1208 sizeof(struct iwl_tas_config_cmd_v3); 1209 1210 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 1211 if (ret < 0) 1212 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 1213 } 1214 1215 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1216 { 1217 u8 value; 1218 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 1219 &iwl_rfi_guid, &value); 1220 1221 if (ret < 0) { 1222 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 1223 1224 } else if (value >= DSM_VALUE_RFI_MAX) { 1225 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 1226 value); 1227 1228 } else if (value == DSM_VALUE_RFI_ENABLE) { 1229 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 1230 return DSM_VALUE_RFI_ENABLE; 1231 } 1232 1233 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 1234 1235 /* default behaviour is disabled */ 1236 return DSM_VALUE_RFI_DISABLE; 1237 } 1238 1239 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1240 { 1241 int ret; 1242 u32 value; 1243 struct iwl_lari_config_change_cmd_v6 cmd = {}; 1244 1245 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1246 1247 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 1248 &iwl_guid, &value); 1249 if (!ret) 1250 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1251 1252 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1253 DSM_FUNC_ENABLE_UNII4_CHAN, 1254 &iwl_guid, &value); 1255 if (!ret) 1256 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 1257 1258 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1259 DSM_FUNC_ACTIVATE_CHANNEL, 1260 &iwl_guid, &value); 1261 if (!ret) 1262 cmd.chan_state_active_bitmap = cpu_to_le32(value); 1263 1264 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1265 DSM_FUNC_ENABLE_6E, 1266 &iwl_guid, &value); 1267 if (!ret) 1268 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1269 1270 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1271 DSM_FUNC_FORCE_DISABLE_CHANNELS, 1272 &iwl_guid, &value); 1273 if (!ret) 1274 cmd.force_disable_channels_bitmap = cpu_to_le32(value); 1275 1276 if (cmd.config_bitmap || 1277 cmd.oem_uhb_allow_bitmap || 1278 cmd.oem_11ax_allow_bitmap || 1279 cmd.oem_unii4_allow_bitmap || 1280 cmd.chan_state_active_bitmap || 1281 cmd.force_disable_channels_bitmap) { 1282 size_t cmd_size; 1283 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1284 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1285 LARI_CONFIG_CHANGE), 1286 1); 1287 switch (cmd_ver) { 1288 case 6: 1289 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 1290 break; 1291 case 5: 1292 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 1293 break; 1294 case 4: 1295 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 1296 break; 1297 case 3: 1298 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 1299 break; 1300 case 2: 1301 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 1302 break; 1303 default: 1304 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 1305 break; 1306 } 1307 1308 IWL_DEBUG_RADIO(mvm, 1309 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 1310 le32_to_cpu(cmd.config_bitmap), 1311 le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 1312 IWL_DEBUG_RADIO(mvm, 1313 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 1314 le32_to_cpu(cmd.oem_unii4_allow_bitmap), 1315 le32_to_cpu(cmd.chan_state_active_bitmap), 1316 cmd_ver); 1317 IWL_DEBUG_RADIO(mvm, 1318 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 1319 le32_to_cpu(cmd.oem_uhb_allow_bitmap), 1320 le32_to_cpu(cmd.force_disable_channels_bitmap)); 1321 ret = iwl_mvm_send_cmd_pdu(mvm, 1322 WIDE_ID(REGULATORY_AND_NVM_GROUP, 1323 LARI_CONFIG_CHANGE), 1324 0, cmd_size, &cmd); 1325 if (ret < 0) 1326 IWL_DEBUG_RADIO(mvm, 1327 "Failed to send LARI_CONFIG_CHANGE (%d)\n", 1328 ret); 1329 } 1330 } 1331 1332 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1333 { 1334 int ret; 1335 1336 /* read PPAG table */ 1337 ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 1338 if (ret < 0) { 1339 IWL_DEBUG_RADIO(mvm, 1340 "PPAG BIOS table invalid or unavailable. (%d)\n", 1341 ret); 1342 } 1343 1344 /* read SAR tables */ 1345 ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1346 if (ret < 0) { 1347 IWL_DEBUG_RADIO(mvm, 1348 "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1349 ret); 1350 /* 1351 * If not available, don't fail and don't bother with EWRD and 1352 * WGDS */ 1353 1354 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 1355 /* 1356 * If basic SAR is not available, we check for WGDS, 1357 * which should *not* be available either. If it is 1358 * available, issue an error, because we can't use SAR 1359 * Geo without basic SAR. 1360 */ 1361 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 1362 } 1363 1364 } else { 1365 ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 1366 /* if EWRD is not available, we can still use 1367 * WRDS, so don't fail */ 1368 if (ret < 0) 1369 IWL_DEBUG_RADIO(mvm, 1370 "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 1371 ret); 1372 1373 /* read geo SAR table */ 1374 if (iwl_sar_geo_support(&mvm->fwrt)) { 1375 ret = iwl_sar_get_wgds_table(&mvm->fwrt); 1376 if (ret < 0) 1377 IWL_DEBUG_RADIO(mvm, 1378 "Geo SAR BIOS table invalid or unavailable. (%d)\n", 1379 ret); 1380 /* we don't fail if the table is not available */ 1381 } 1382 } 1383 } 1384 #else /* CONFIG_ACPI */ 1385 1386 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 1387 int prof_a, int prof_b) 1388 { 1389 return 1; 1390 } 1391 1392 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 1393 { 1394 return -ENOENT; 1395 } 1396 1397 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1398 { 1399 return 0; 1400 } 1401 1402 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 1403 { 1404 return -ENOENT; 1405 } 1406 1407 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 1408 { 1409 return 0; 1410 } 1411 1412 static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 1413 { 1414 } 1415 1416 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1417 { 1418 } 1419 1420 bool iwl_mvm_is_vendor_in_approved_list(void) 1421 { 1422 return false; 1423 } 1424 1425 static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 1426 { 1427 return DSM_VALUE_RFI_DISABLE; 1428 } 1429 1430 void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 1431 { 1432 } 1433 1434 #endif /* CONFIG_ACPI */ 1435 1436 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1437 { 1438 u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1439 int ret; 1440 u32 resp; 1441 1442 struct iwl_fw_error_recovery_cmd recovery_cmd = { 1443 .flags = cpu_to_le32(flags), 1444 .buf_size = 0, 1445 }; 1446 struct iwl_host_cmd host_cmd = { 1447 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1448 .flags = CMD_WANT_SKB, 1449 .data = {&recovery_cmd, }, 1450 .len = {sizeof(recovery_cmd), }, 1451 }; 1452 1453 /* no error log was defined in TLV */ 1454 if (!error_log_size) 1455 return; 1456 1457 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1458 /* no buf was allocated while HW reset */ 1459 if (!mvm->error_recovery_buf) 1460 return; 1461 1462 host_cmd.data[1] = mvm->error_recovery_buf; 1463 host_cmd.len[1] = error_log_size; 1464 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1465 recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1466 } 1467 1468 ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1469 kfree(mvm->error_recovery_buf); 1470 mvm->error_recovery_buf = NULL; 1471 1472 if (ret) { 1473 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1474 return; 1475 } 1476 1477 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1478 if (flags & ERROR_RECOVERY_UPDATE_DB) { 1479 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1480 if (resp) 1481 IWL_ERR(mvm, 1482 "Failed to send recovery cmd blob was invalid %d\n", 1483 resp); 1484 } 1485 } 1486 1487 static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1488 { 1489 return iwl_mvm_sar_select_profile(mvm, 1, 1); 1490 } 1491 1492 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 1493 { 1494 int ret; 1495 1496 if (iwl_mvm_has_unified_ucode(mvm)) 1497 return iwl_run_unified_mvm_ucode(mvm); 1498 1499 ret = iwl_run_init_mvm_ucode(mvm); 1500 1501 if (ret) { 1502 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1503 1504 if (iwlmvm_mod_params.init_dbg) 1505 return 0; 1506 return ret; 1507 } 1508 1509 iwl_fw_dbg_stop_sync(&mvm->fwrt); 1510 iwl_trans_stop_device(mvm->trans); 1511 ret = iwl_trans_start_hw(mvm->trans); 1512 if (ret) 1513 return ret; 1514 1515 mvm->rfkill_safe_init_done = false; 1516 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1517 if (ret) 1518 return ret; 1519 1520 mvm->rfkill_safe_init_done = true; 1521 1522 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1523 NULL); 1524 1525 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 1526 } 1527 1528 int iwl_mvm_up(struct iwl_mvm *mvm) 1529 { 1530 int ret, i; 1531 struct ieee80211_channel *chan; 1532 struct cfg80211_chan_def chandef; 1533 struct ieee80211_supported_band *sband = NULL; 1534 u32 sb_cfg; 1535 1536 lockdep_assert_held(&mvm->mutex); 1537 1538 ret = iwl_trans_start_hw(mvm->trans); 1539 if (ret) 1540 return ret; 1541 1542 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 1543 mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 1544 if (mvm->pldr_sync && iwl_mei_pldr_req()) 1545 return -EBUSY; 1546 1547 ret = iwl_mvm_load_rt_fw(mvm); 1548 if (ret) { 1549 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1550 if (ret != -ERFKILL && !mvm->pldr_sync) 1551 iwl_fw_dbg_error_collect(&mvm->fwrt, 1552 FW_DBG_TRIGGER_DRIVER); 1553 goto error; 1554 } 1555 1556 /* FW loaded successfully */ 1557 mvm->pldr_sync = false; 1558 1559 iwl_get_shared_mem_conf(&mvm->fwrt); 1560 1561 ret = iwl_mvm_sf_update(mvm, NULL, false); 1562 if (ret) 1563 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1564 1565 if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 1566 mvm->fwrt.dump.conf = FW_DBG_INVALID; 1567 /* if we have a destination, assume EARLY START */ 1568 if (mvm->fw->dbg.dest_tlv) 1569 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 1570 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1571 } 1572 1573 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1574 if (ret) 1575 goto error; 1576 1577 if (!iwl_mvm_has_unified_ucode(mvm)) { 1578 /* Send phy db control command and then phy db calibration */ 1579 ret = iwl_send_phy_db_data(mvm->phy_db); 1580 if (ret) 1581 goto error; 1582 ret = iwl_send_phy_cfg_cmd(mvm); 1583 if (ret) 1584 goto error; 1585 } 1586 1587 ret = iwl_mvm_send_bt_init_conf(mvm); 1588 if (ret) 1589 goto error; 1590 1591 if (fw_has_capa(&mvm->fw->ucode_capa, 1592 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1593 ret = iwl_set_soc_latency(&mvm->fwrt); 1594 if (ret) 1595 goto error; 1596 } 1597 1598 /* Init RSS configuration */ 1599 ret = iwl_configure_rxq(&mvm->fwrt); 1600 if (ret) 1601 goto error; 1602 1603 if (iwl_mvm_has_new_rx_api(mvm)) { 1604 ret = iwl_send_rss_cfg_cmd(mvm); 1605 if (ret) { 1606 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 1607 ret); 1608 goto error; 1609 } 1610 } 1611 1612 /* init the fw <-> mac80211 STA mapping */ 1613 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1614 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1615 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1616 } 1617 1618 for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++) 1619 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1620 1621 memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map)); 1622 1623 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1624 1625 /* reset quota debouncing buffer - 0xff will yield invalid data */ 1626 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1627 1628 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 1629 ret = iwl_mvm_send_dqa_cmd(mvm); 1630 if (ret) 1631 goto error; 1632 } 1633 1634 /* 1635 * Add auxiliary station for scanning. 1636 * Newer versions of this command implies that the fw uses 1637 * internal aux station for all aux activities that don't 1638 * requires a dedicated data queue. 1639 */ 1640 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1641 /* 1642 * In old version the aux station uses mac id like other 1643 * station and not lmac id 1644 */ 1645 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1646 if (ret) 1647 goto error; 1648 } 1649 1650 /* Add all the PHY contexts */ 1651 i = 0; 1652 while (!sband && i < NUM_NL80211_BANDS) 1653 sband = mvm->hw->wiphy->bands[i++]; 1654 1655 if (WARN_ON_ONCE(!sband)) { 1656 ret = -ENODEV; 1657 goto error; 1658 } 1659 1660 chan = &sband->channels[0]; 1661 1662 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1663 for (i = 0; i < NUM_PHY_CTX; i++) { 1664 /* 1665 * The channel used here isn't relevant as it's 1666 * going to be overwritten in the other flows. 1667 * For now use the first channel we have. 1668 */ 1669 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1670 &chandef, 1, 1); 1671 if (ret) 1672 goto error; 1673 } 1674 1675 if (iwl_mvm_is_tt_in_fw(mvm)) { 1676 /* in order to give the responsibility of ct-kill and 1677 * TX backoff to FW we need to send empty temperature reporting 1678 * cmd during init time 1679 */ 1680 iwl_mvm_send_temp_report_ths_cmd(mvm); 1681 } else { 1682 /* Initialize tx backoffs to the minimal possible */ 1683 iwl_mvm_tt_tx_backoff(mvm, 0); 1684 } 1685 1686 #ifdef CONFIG_THERMAL 1687 /* TODO: read the budget from BIOS / Platform NVM */ 1688 1689 /* 1690 * In case there is no budget from BIOS / Platform NVM the default 1691 * budget should be 2000mW (cooling state 0). 1692 */ 1693 if (iwl_mvm_is_ctdp_supported(mvm)) { 1694 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 1695 mvm->cooling_dev.cur_state); 1696 if (ret) 1697 goto error; 1698 } 1699 #endif 1700 1701 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1702 WARN_ON(iwl_mvm_config_ltr(mvm)); 1703 1704 ret = iwl_mvm_power_update_device(mvm); 1705 if (ret) 1706 goto error; 1707 1708 iwl_mvm_lari_cfg(mvm); 1709 /* 1710 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1711 * anyway, so don't init MCC. 1712 */ 1713 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1714 ret = iwl_mvm_init_mcc(mvm); 1715 if (ret) 1716 goto error; 1717 } 1718 1719 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1720 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1721 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1722 ret = iwl_mvm_config_scan(mvm); 1723 if (ret) 1724 goto error; 1725 } 1726 1727 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1728 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1729 1730 if (mvm->time_sync.active) 1731 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1732 IWL_TIME_SYNC_PROTOCOL_TM | 1733 IWL_TIME_SYNC_PROTOCOL_FTM); 1734 } 1735 1736 if (!mvm->ptp_data.ptp_clock) 1737 iwl_mvm_ptp_init(mvm); 1738 1739 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 1740 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 1741 1742 ret = iwl_mvm_ppag_init(mvm); 1743 if (ret) 1744 goto error; 1745 1746 ret = iwl_mvm_sar_init(mvm); 1747 if (ret == 0) 1748 ret = iwl_mvm_sar_geo_init(mvm); 1749 if (ret < 0) 1750 goto error; 1751 1752 ret = iwl_mvm_sgom_init(mvm); 1753 if (ret) 1754 goto error; 1755 1756 iwl_mvm_tas_init(mvm); 1757 iwl_mvm_leds_sync(mvm); 1758 1759 if (iwl_rfi_supported(mvm)) { 1760 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 1761 iwl_rfi_send_config_cmd(mvm, NULL); 1762 } 1763 1764 iwl_mvm_mei_device_state(mvm, true); 1765 1766 IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1767 return 0; 1768 error: 1769 if (!iwlmvm_mod_params.init_dbg || !ret) 1770 iwl_mvm_stop_device(mvm); 1771 return ret; 1772 } 1773 1774 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1775 { 1776 int ret, i; 1777 1778 lockdep_assert_held(&mvm->mutex); 1779 1780 ret = iwl_trans_start_hw(mvm->trans); 1781 if (ret) 1782 return ret; 1783 1784 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1785 if (ret) { 1786 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1787 goto error; 1788 } 1789 1790 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1791 if (ret) 1792 goto error; 1793 1794 /* Send phy db control command and then phy db calibration*/ 1795 ret = iwl_send_phy_db_data(mvm->phy_db); 1796 if (ret) 1797 goto error; 1798 1799 ret = iwl_send_phy_cfg_cmd(mvm); 1800 if (ret) 1801 goto error; 1802 1803 /* init the fw <-> mac80211 STA mapping */ 1804 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1805 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1806 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1807 } 1808 1809 if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { 1810 /* 1811 * Add auxiliary station for scanning. 1812 * Newer versions of this command implies that the fw uses 1813 * internal aux station for all aux activities that don't 1814 * requires a dedicated data queue. 1815 * In old version the aux station uses mac id like other 1816 * station and not lmac id 1817 */ 1818 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1819 if (ret) 1820 goto error; 1821 } 1822 1823 return 0; 1824 error: 1825 iwl_mvm_stop_device(mvm); 1826 return ret; 1827 } 1828 1829 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1830 struct iwl_rx_cmd_buffer *rxb) 1831 { 1832 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1833 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1834 1835 IWL_DEBUG_INFO(mvm, 1836 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1837 le32_to_cpu(mfuart_notif->installed_ver), 1838 le32_to_cpu(mfuart_notif->external_ver), 1839 le32_to_cpu(mfuart_notif->status), 1840 le32_to_cpu(mfuart_notif->duration)); 1841 1842 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 1843 IWL_DEBUG_INFO(mvm, 1844 "MFUART: image size: 0x%08x\n", 1845 le32_to_cpu(mfuart_notif->image_size)); 1846 } 1847