1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
9  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
10  * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of version 2 of the GNU General Public License as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called COPYING.
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25  *  Intel Linux Wireless <linuxwifi@intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  * BSD LICENSE
29  *
30  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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61  *****************************************************************************/
62 #include <net/mac80211.h>
63 #include <linux/netdevice.h>
64 
65 #include "iwl-trans.h"
66 #include "iwl-op-mode.h"
67 #include "fw/img.h"
68 #include "iwl-debug.h"
69 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
70 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
71 #include "iwl-prph.h"
72 #include "fw/acpi.h"
73 
74 #include "mvm.h"
75 #include "fw/dbg.h"
76 #include "iwl-phy-db.h"
77 #include "iwl-modparams.h"
78 #include "iwl-nvm-parse.h"
79 
80 #define MVM_UCODE_ALIVE_TIMEOUT	HZ
81 #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
82 
83 #define UCODE_VALID_OK	cpu_to_le32(0x1)
84 
85 struct iwl_mvm_alive_data {
86 	bool valid;
87 	u32 scd_base_addr;
88 };
89 
90 /* set device type and latency */
91 static int iwl_set_soc_latency(struct iwl_mvm *mvm)
92 {
93 	struct iwl_soc_configuration_cmd cmd = {};
94 	int ret;
95 
96 	/*
97 	 * In VER_1 of this command, the discrete value is considered
98 	 * an integer; In VER_2, it's a bitmask.  Since we have only 2
99 	 * values in VER_1, this is backwards-compatible with VER_2,
100 	 * as long as we don't set any other bits.
101 	 */
102 	if (!mvm->trans->trans_cfg->integrated)
103 		cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);
104 
105 	if (iwl_mvm_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
106 				   SCAN_REQ_UMAC) >= 2 &&
107 	    (mvm->trans->trans_cfg->low_latency_xtal))
108 		cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY);
109 
110 	cmd.latency = cpu_to_le32(mvm->trans->trans_cfg->xtal_latency);
111 
112 	ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SOC_CONFIGURATION_CMD,
113 						   SYSTEM_GROUP, 0), 0,
114 				   sizeof(cmd), &cmd);
115 	if (ret)
116 		IWL_ERR(mvm, "Failed to set soc latency: %d\n", ret);
117 	return ret;
118 }
119 
120 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
121 {
122 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
123 		.valid = cpu_to_le32(valid_tx_ant),
124 	};
125 
126 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
127 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
128 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
129 }
130 
131 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
132 {
133 	int i;
134 	struct iwl_rss_config_cmd cmd = {
135 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
136 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
137 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
138 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
139 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
140 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
141 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
142 	};
143 
144 	if (mvm->trans->num_rx_queues == 1)
145 		return 0;
146 
147 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
148 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
149 		cmd.indirection_table[i] =
150 			1 + (i % (mvm->trans->num_rx_queues - 1));
151 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
152 
153 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
154 }
155 
156 static int iwl_configure_rxq(struct iwl_mvm *mvm)
157 {
158 	int i, num_queues, size, ret;
159 	struct iwl_rfh_queue_config *cmd;
160 	struct iwl_host_cmd hcmd = {
161 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
162 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
163 	};
164 
165 	/* Do not configure default queue, it is configured via context info */
166 	num_queues = mvm->trans->num_rx_queues - 1;
167 
168 	size = struct_size(cmd, data, num_queues);
169 
170 	cmd = kzalloc(size, GFP_KERNEL);
171 	if (!cmd)
172 		return -ENOMEM;
173 
174 	cmd->num_queues = num_queues;
175 
176 	for (i = 0; i < num_queues; i++) {
177 		struct iwl_trans_rxq_dma_data data;
178 
179 		cmd->data[i].q_num = i + 1;
180 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
181 
182 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
183 		cmd->data[i].urbd_stts_wrptr =
184 			cpu_to_le64(data.urbd_stts_wrptr);
185 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
186 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
187 	}
188 
189 	hcmd.data[0] = cmd;
190 	hcmd.len[0] = size;
191 
192 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
193 
194 	kfree(cmd);
195 
196 	return ret;
197 }
198 
199 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
200 {
201 	struct iwl_dqa_enable_cmd dqa_cmd = {
202 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
203 	};
204 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
205 	int ret;
206 
207 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
208 	if (ret)
209 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
210 	else
211 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
212 
213 	return ret;
214 }
215 
216 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
217 				   struct iwl_rx_cmd_buffer *rxb)
218 {
219 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
220 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
221 	__le32 *dump_data = mfu_dump_notif->data;
222 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
223 	int i;
224 
225 	if (mfu_dump_notif->index_num == 0)
226 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
227 			 le32_to_cpu(mfu_dump_notif->assert_id));
228 
229 	for (i = 0; i < n_words; i++)
230 		IWL_DEBUG_INFO(mvm,
231 			       "MFUART assert dump, dword %u: 0x%08x\n",
232 			       le16_to_cpu(mfu_dump_notif->index_num) *
233 			       n_words + i,
234 			       le32_to_cpu(dump_data[i]));
235 }
236 
237 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
238 			 struct iwl_rx_packet *pkt, void *data)
239 {
240 	struct iwl_mvm *mvm =
241 		container_of(notif_wait, struct iwl_mvm, notif_wait);
242 	struct iwl_mvm_alive_data *alive_data = data;
243 	struct mvm_alive_resp_v3 *palive3;
244 	struct mvm_alive_resp *palive;
245 	struct iwl_umac_alive *umac;
246 	struct iwl_lmac_alive *lmac1;
247 	struct iwl_lmac_alive *lmac2 = NULL;
248 	u16 status;
249 	u32 lmac_error_event_table, umac_error_event_table;
250 
251 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
252 		palive = (void *)pkt->data;
253 		umac = &palive->umac_data;
254 		lmac1 = &palive->lmac_data[0];
255 		lmac2 = &palive->lmac_data[1];
256 		status = le16_to_cpu(palive->status);
257 	} else {
258 		palive3 = (void *)pkt->data;
259 		umac = &palive3->umac_data;
260 		lmac1 = &palive3->lmac_data;
261 		status = le16_to_cpu(palive3->status);
262 	}
263 
264 	lmac_error_event_table =
265 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
266 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
267 
268 	if (lmac2)
269 		mvm->trans->dbg.lmac_error_event_table[1] =
270 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
271 
272 	umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
273 
274 	if (!umac_error_event_table) {
275 		mvm->support_umac_log = false;
276 	} else if (umac_error_event_table >=
277 		   mvm->trans->cfg->min_umac_error_event_table) {
278 		mvm->support_umac_log = true;
279 	} else {
280 		IWL_ERR(mvm,
281 			"Not valid error log pointer 0x%08X for %s uCode\n",
282 			umac_error_event_table,
283 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
284 			"Init" : "RT");
285 		mvm->support_umac_log = false;
286 	}
287 
288 	if (mvm->support_umac_log)
289 		iwl_fw_umac_set_alive_err_table(mvm->trans,
290 						umac_error_event_table);
291 
292 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
293 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
294 
295 	IWL_DEBUG_FW(mvm,
296 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
297 		     status, lmac1->ver_type, lmac1->ver_subtype);
298 
299 	if (lmac2)
300 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
301 
302 	IWL_DEBUG_FW(mvm,
303 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
304 		     le32_to_cpu(umac->umac_major),
305 		     le32_to_cpu(umac->umac_minor));
306 
307 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
308 
309 	return true;
310 }
311 
312 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
313 				   struct iwl_rx_packet *pkt, void *data)
314 {
315 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
316 
317 	return true;
318 }
319 
320 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
321 				  struct iwl_rx_packet *pkt, void *data)
322 {
323 	struct iwl_phy_db *phy_db = data;
324 
325 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
326 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
327 		return true;
328 	}
329 
330 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
331 
332 	return false;
333 }
334 
335 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
336 					 enum iwl_ucode_type ucode_type)
337 {
338 	struct iwl_notification_wait alive_wait;
339 	struct iwl_mvm_alive_data alive_data = {};
340 	const struct fw_img *fw;
341 	int ret;
342 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
343 	static const u16 alive_cmd[] = { MVM_ALIVE };
344 	bool run_in_rfkill =
345 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
346 
347 	if (ucode_type == IWL_UCODE_REGULAR &&
348 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
349 	    !(fw_has_capa(&mvm->fw->ucode_capa,
350 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
351 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
352 	else
353 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
354 	if (WARN_ON(!fw))
355 		return -EINVAL;
356 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
357 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
358 
359 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
360 				   alive_cmd, ARRAY_SIZE(alive_cmd),
361 				   iwl_alive_fn, &alive_data);
362 
363 	/*
364 	 * We want to load the INIT firmware even in RFKILL
365 	 * For the unified firmware case, the ucode_type is not
366 	 * INIT, but we still need to run it.
367 	 */
368 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
369 	if (ret) {
370 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
371 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
372 		return ret;
373 	}
374 
375 	/*
376 	 * Some things may run in the background now, but we
377 	 * just wait for the ALIVE notification here.
378 	 */
379 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
380 				    MVM_UCODE_ALIVE_TIMEOUT);
381 	if (ret) {
382 		struct iwl_trans *trans = mvm->trans;
383 
384 		if (trans->trans_cfg->device_family >=
385 					IWL_DEVICE_FAMILY_22000) {
386 			IWL_ERR(mvm,
387 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
388 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
389 				iwl_read_umac_prph(trans,
390 						   UMAG_SB_CPU_2_STATUS));
391 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
392 				iwl_read_umac_prph(trans,
393 						   UREG_UMAC_CURRENT_PC));
394 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
395 				iwl_read_umac_prph(trans,
396 						   UREG_LMAC1_CURRENT_PC));
397 			if (iwl_mvm_is_cdb_supported(mvm))
398 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
399 					iwl_read_umac_prph(trans,
400 						UREG_LMAC2_CURRENT_PC));
401 		} else if (trans->trans_cfg->device_family >=
402 			   IWL_DEVICE_FAMILY_8000) {
403 			IWL_ERR(mvm,
404 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
405 				iwl_read_prph(trans, SB_CPU_1_STATUS),
406 				iwl_read_prph(trans, SB_CPU_2_STATUS));
407 		}
408 
409 		if (ret == -ETIMEDOUT)
410 			iwl_fw_dbg_error_collect(&mvm->fwrt,
411 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
412 
413 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
414 		return ret;
415 	}
416 
417 	if (!alive_data.valid) {
418 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
419 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
420 		return -EIO;
421 	}
422 
423 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
424 
425 	/*
426 	 * Note: all the queues are enabled as part of the interface
427 	 * initialization, but in firmware restart scenarios they
428 	 * could be stopped, so wake them up. In firmware restart,
429 	 * mac80211 will have the queues stopped as well until the
430 	 * reconfiguration completes. During normal startup, they
431 	 * will be empty.
432 	 */
433 
434 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
435 	/*
436 	 * Set a 'fake' TID for the command queue, since we use the
437 	 * hweight() of the tid_bitmap as a refcount now. Not that
438 	 * we ever even consider the command queue as one we might
439 	 * want to reuse, but be safe nevertheless.
440 	 */
441 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
442 		BIT(IWL_MAX_TID_COUNT + 2);
443 
444 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
445 #ifdef CONFIG_IWLWIFI_DEBUGFS
446 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
447 #endif
448 
449 	return 0;
450 }
451 
452 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
453 {
454 	struct iwl_notification_wait init_wait;
455 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
456 	struct iwl_init_extended_cfg_cmd init_cfg = {
457 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
458 	};
459 	static const u16 init_complete[] = {
460 		INIT_COMPLETE_NOTIF,
461 	};
462 	int ret;
463 
464 	if (mvm->trans->cfg->tx_with_siso_diversity)
465 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
466 
467 	lockdep_assert_held(&mvm->mutex);
468 
469 	mvm->rfkill_safe_init_done = false;
470 
471 	iwl_init_notification_wait(&mvm->notif_wait,
472 				   &init_wait,
473 				   init_complete,
474 				   ARRAY_SIZE(init_complete),
475 				   iwl_wait_init_complete,
476 				   NULL);
477 
478 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
479 
480 	/* Will also start the device */
481 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
482 	if (ret) {
483 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
484 		goto error;
485 	}
486 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
487 			       NULL);
488 
489 	/* Send init config command to mark that we are sending NVM access
490 	 * commands
491 	 */
492 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
493 						INIT_EXTENDED_CFG_CMD),
494 				   CMD_SEND_IN_RFKILL,
495 				   sizeof(init_cfg), &init_cfg);
496 	if (ret) {
497 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
498 			ret);
499 		goto error;
500 	}
501 
502 	/* Load NVM to NIC if needed */
503 	if (mvm->nvm_file_name) {
504 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
505 				      mvm->nvm_sections);
506 		iwl_mvm_load_nvm_to_nic(mvm);
507 	}
508 
509 	if (IWL_MVM_PARSE_NVM && read_nvm) {
510 		ret = iwl_nvm_init(mvm);
511 		if (ret) {
512 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
513 			goto error;
514 		}
515 	}
516 
517 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
518 						NVM_ACCESS_COMPLETE),
519 				   CMD_SEND_IN_RFKILL,
520 				   sizeof(nvm_complete), &nvm_complete);
521 	if (ret) {
522 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
523 			ret);
524 		goto error;
525 	}
526 
527 	/* We wait for the INIT complete notification */
528 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
529 				    MVM_UCODE_ALIVE_TIMEOUT);
530 	if (ret)
531 		return ret;
532 
533 	/* Read the NVM only at driver load time, no need to do this twice */
534 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
535 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
536 		if (IS_ERR(mvm->nvm_data)) {
537 			ret = PTR_ERR(mvm->nvm_data);
538 			mvm->nvm_data = NULL;
539 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
540 			return ret;
541 		}
542 	}
543 
544 	mvm->rfkill_safe_init_done = true;
545 
546 	return 0;
547 
548 error:
549 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
550 	return ret;
551 }
552 
553 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
554 {
555 	struct iwl_phy_cfg_cmd phy_cfg_cmd;
556 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
557 
558 	if (iwl_mvm_has_unified_ucode(mvm) &&
559 	    !mvm->trans->cfg->tx_with_siso_diversity)
560 		return 0;
561 
562 	if (mvm->trans->cfg->tx_with_siso_diversity) {
563 		/*
564 		 * TODO: currently we don't set the antenna but letting the NIC
565 		 * to decide which antenna to use. This should come from BIOS.
566 		 */
567 		phy_cfg_cmd.phy_cfg =
568 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
569 	}
570 
571 	/* Set parameters */
572 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
573 
574 	/* set flags extra PHY configuration flags from the device's cfg */
575 	phy_cfg_cmd.phy_cfg |=
576 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
577 
578 	phy_cfg_cmd.calib_control.event_trigger =
579 		mvm->fw->default_calib[ucode_type].event_trigger;
580 	phy_cfg_cmd.calib_control.flow_trigger =
581 		mvm->fw->default_calib[ucode_type].flow_trigger;
582 
583 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
584 		       phy_cfg_cmd.phy_cfg);
585 
586 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
587 				    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
588 }
589 
590 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
591 {
592 	struct iwl_notification_wait calib_wait;
593 	static const u16 init_complete[] = {
594 		INIT_COMPLETE_NOTIF,
595 		CALIB_RES_NOTIF_PHY_DB
596 	};
597 	int ret;
598 
599 	if (iwl_mvm_has_unified_ucode(mvm))
600 		return iwl_run_unified_mvm_ucode(mvm, true);
601 
602 	lockdep_assert_held(&mvm->mutex);
603 
604 	mvm->rfkill_safe_init_done = false;
605 
606 	iwl_init_notification_wait(&mvm->notif_wait,
607 				   &calib_wait,
608 				   init_complete,
609 				   ARRAY_SIZE(init_complete),
610 				   iwl_wait_phy_db_entry,
611 				   mvm->phy_db);
612 
613 	/* Will also start the device */
614 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
615 	if (ret) {
616 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
617 		goto remove_notif;
618 	}
619 
620 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
621 		ret = iwl_mvm_send_bt_init_conf(mvm);
622 		if (ret)
623 			goto remove_notif;
624 	}
625 
626 	/* Read the NVM only at driver load time, no need to do this twice */
627 	if (read_nvm) {
628 		ret = iwl_nvm_init(mvm);
629 		if (ret) {
630 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
631 			goto remove_notif;
632 		}
633 	}
634 
635 	/* In case we read the NVM from external file, load it to the NIC */
636 	if (mvm->nvm_file_name)
637 		iwl_mvm_load_nvm_to_nic(mvm);
638 
639 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
640 		  "Too old NVM version (0x%0x, required = 0x%0x)",
641 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
642 
643 	/*
644 	 * abort after reading the nvm in case RF Kill is on, we will complete
645 	 * the init seq later when RF kill will switch to off
646 	 */
647 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
648 		IWL_DEBUG_RF_KILL(mvm,
649 				  "jump over all phy activities due to RF kill\n");
650 		goto remove_notif;
651 	}
652 
653 	mvm->rfkill_safe_init_done = true;
654 
655 	/* Send TX valid antennas before triggering calibrations */
656 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
657 	if (ret)
658 		goto remove_notif;
659 
660 	ret = iwl_send_phy_cfg_cmd(mvm);
661 	if (ret) {
662 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
663 			ret);
664 		goto remove_notif;
665 	}
666 
667 	/*
668 	 * Some things may run in the background now, but we
669 	 * just wait for the calibration complete notification.
670 	 */
671 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
672 				    MVM_UCODE_CALIB_TIMEOUT);
673 	if (!ret)
674 		goto out;
675 
676 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
677 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
678 		ret = 0;
679 	} else {
680 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
681 			ret);
682 	}
683 
684 	goto out;
685 
686 remove_notif:
687 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
688 out:
689 	mvm->rfkill_safe_init_done = false;
690 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
691 		/* we want to debug INIT and we have no NVM - fake */
692 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
693 					sizeof(struct ieee80211_channel) +
694 					sizeof(struct ieee80211_rate),
695 					GFP_KERNEL);
696 		if (!mvm->nvm_data)
697 			return -ENOMEM;
698 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
699 		mvm->nvm_data->bands[0].n_channels = 1;
700 		mvm->nvm_data->bands[0].n_bitrates = 1;
701 		mvm->nvm_data->bands[0].bitrates =
702 			(void *)mvm->nvm_data->channels + 1;
703 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
704 	}
705 
706 	return ret;
707 }
708 
709 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
710 {
711 	struct iwl_ltr_config_cmd cmd = {
712 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
713 	};
714 
715 	if (!mvm->trans->ltr_enabled)
716 		return 0;
717 
718 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
719 				    sizeof(cmd), &cmd);
720 }
721 
722 #ifdef CONFIG_ACPI
723 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
724 {
725 	union {
726 		struct iwl_dev_tx_power_cmd v5;
727 		struct iwl_dev_tx_power_cmd_v4 v4;
728 	} cmd;
729 
730 	u16 len = 0;
731 
732 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
733 
734 	if (fw_has_api(&mvm->fw->ucode_capa,
735 		       IWL_UCODE_TLV_API_REDUCE_TX_POWER))
736 		len = sizeof(cmd.v5);
737 	else if (fw_has_capa(&mvm->fw->ucode_capa,
738 			     IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
739 		len = sizeof(struct iwl_dev_tx_power_cmd_v4);
740 	else
741 		len = sizeof(cmd.v4.v3);
742 
743 
744 	if (iwl_sar_select_profile(&mvm->fwrt, cmd.v5.v3.per_chain_restriction,
745 				   prof_a, prof_b))
746 		return -ENOENT;
747 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
748 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
749 }
750 
751 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
752 {
753 	union geo_tx_power_profiles_cmd geo_tx_cmd;
754 	u16 len;
755 	int ret;
756 	struct iwl_host_cmd cmd;
757 
758 	if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
759 		       IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
760 		geo_tx_cmd.geo_cmd.ops =
761 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
762 		len = sizeof(geo_tx_cmd.geo_cmd);
763 	} else {
764 		geo_tx_cmd.geo_cmd_v1.ops =
765 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
766 		len = sizeof(geo_tx_cmd.geo_cmd_v1);
767 	}
768 
769 	if (!iwl_sar_geo_support(&mvm->fwrt))
770 		return -EOPNOTSUPP;
771 
772 	cmd = (struct iwl_host_cmd){
773 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
774 		.len = { len, },
775 		.flags = CMD_WANT_SKB,
776 		.data = { &geo_tx_cmd },
777 	};
778 
779 	ret = iwl_mvm_send_cmd(mvm, &cmd);
780 	if (ret) {
781 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
782 		return ret;
783 	}
784 	ret = iwl_validate_sar_geo_profile(&mvm->fwrt, &cmd);
785 	iwl_free_resp(&cmd);
786 	return ret;
787 }
788 
789 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
790 {
791 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
792 	union geo_tx_power_profiles_cmd cmd;
793 	u16 len;
794 	int ret;
795 
796 	cmd.geo_cmd.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
797 
798 	ret = iwl_sar_geo_init(&mvm->fwrt, cmd.geo_cmd.table);
799 	/*
800 	 * It is a valid scenario to not support SAR, or miss wgds table,
801 	 * but in that case there is no need to send the command.
802 	 */
803 	if (ret)
804 		return 0;
805 
806 	cmd.geo_cmd.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
807 
808 	if (!fw_has_api(&mvm->fwrt.fw->ucode_capa,
809 			IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
810 		len = sizeof(struct iwl_geo_tx_power_profiles_cmd_v1);
811 	} else {
812 		len =  sizeof(cmd.geo_cmd);
813 	}
814 
815 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, len, &cmd);
816 }
817 
818 static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
819 {
820 	union acpi_object *wifi_pkg, *data, *enabled;
821 	int i, j, ret, tbl_rev;
822 	int idx = 2;
823 
824 	mvm->fwrt.ppag_table.enabled = cpu_to_le32(0);
825 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
826 	if (IS_ERR(data))
827 		return PTR_ERR(data);
828 
829 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
830 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
831 
832 	if (IS_ERR(wifi_pkg)) {
833 		ret = PTR_ERR(wifi_pkg);
834 		goto out_free;
835 	}
836 
837 	if (tbl_rev != 0) {
838 		ret = -EINVAL;
839 		goto out_free;
840 	}
841 
842 	enabled = &wifi_pkg->package.elements[1];
843 	if (enabled->type != ACPI_TYPE_INTEGER ||
844 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
845 		ret = -EINVAL;
846 		goto out_free;
847 	}
848 
849 	mvm->fwrt.ppag_table.enabled = cpu_to_le32(enabled->integer.value);
850 	if (!mvm->fwrt.ppag_table.enabled) {
851 		ret = 0;
852 		goto out_free;
853 	}
854 
855 	/*
856 	 * read, verify gain values and save them into the PPAG table.
857 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
858 	 * following sub-bands to High-Band (5GHz).
859 	 */
860 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
861 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
862 			union acpi_object *ent;
863 
864 			ent = &wifi_pkg->package.elements[idx++];
865 			if (ent->type != ACPI_TYPE_INTEGER ||
866 			    (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
867 			    (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
868 			    (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
869 			    (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
870 				mvm->fwrt.ppag_table.enabled = cpu_to_le32(0);
871 				ret = -EINVAL;
872 				goto out_free;
873 			}
874 			mvm->fwrt.ppag_table.gain[i][j] = ent->integer.value;
875 		}
876 	}
877 	ret = 0;
878 out_free:
879 	kfree(data);
880 	return ret;
881 }
882 
883 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
884 {
885 	int i, j, ret;
886 
887 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
888 		IWL_DEBUG_RADIO(mvm,
889 				"PPAG capability not supported by FW, command not sent.\n");
890 		return 0;
891 	}
892 
893 	if (!mvm->fwrt.ppag_table.enabled) {
894 		IWL_DEBUG_RADIO(mvm,
895 				"PPAG not enabled, command not sent.\n");
896 		return 0;
897 	}
898 
899 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
900 
901 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
902 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
903 			IWL_DEBUG_RADIO(mvm,
904 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
905 					i, j, mvm->fwrt.ppag_table.gain[i][j]);
906 		}
907 	}
908 
909 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
910 						PER_PLATFORM_ANT_GAIN_CMD),
911 				   0, sizeof(mvm->fwrt.ppag_table),
912 				   &mvm->fwrt.ppag_table);
913 	if (ret < 0)
914 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
915 			ret);
916 
917 	return ret;
918 }
919 
920 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
921 {
922 	int ret;
923 
924 	ret = iwl_mvm_get_ppag_table(mvm);
925 	if (ret < 0) {
926 		IWL_DEBUG_RADIO(mvm,
927 				"PPAG BIOS table invalid or unavailable. (%d)\n",
928 				ret);
929 		return 0;
930 	}
931 	return iwl_mvm_ppag_send_cmd(mvm);
932 }
933 
934 #else /* CONFIG_ACPI */
935 
936 inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
937 				      int prof_a, int prof_b)
938 {
939 	return -ENOENT;
940 }
941 
942 inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
943 {
944 	return -ENOENT;
945 }
946 
947 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
948 {
949 	return 0;
950 }
951 
952 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
953 {
954 	return -ENOENT;
955 }
956 
957 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
958 {
959 	return 0;
960 }
961 #endif /* CONFIG_ACPI */
962 
963 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
964 {
965 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
966 	int ret;
967 	u32 resp;
968 
969 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
970 		.flags = cpu_to_le32(flags),
971 		.buf_size = 0,
972 	};
973 	struct iwl_host_cmd host_cmd = {
974 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
975 		.flags = CMD_WANT_SKB,
976 		.data = {&recovery_cmd, },
977 		.len = {sizeof(recovery_cmd), },
978 	};
979 
980 	/* no error log was defined in TLV */
981 	if (!error_log_size)
982 		return;
983 
984 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
985 		/* no buf was allocated while HW reset */
986 		if (!mvm->error_recovery_buf)
987 			return;
988 
989 		host_cmd.data[1] = mvm->error_recovery_buf;
990 		host_cmd.len[1] =  error_log_size;
991 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
992 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
993 	}
994 
995 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
996 	kfree(mvm->error_recovery_buf);
997 	mvm->error_recovery_buf = NULL;
998 
999 	if (ret) {
1000 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1001 		return;
1002 	}
1003 
1004 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1005 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1006 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1007 		if (resp)
1008 			IWL_ERR(mvm,
1009 				"Failed to send recovery cmd blob was invalid %d\n",
1010 				resp);
1011 	}
1012 }
1013 
1014 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1015 {
1016 	int ret;
1017 
1018 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1019 	if (ret < 0) {
1020 		IWL_DEBUG_RADIO(mvm,
1021 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1022 				ret);
1023 		/*
1024 		 * If not available, don't fail and don't bother with EWRD.
1025 		 * Return 1 to tell that we can't use WGDS either.
1026 		 */
1027 		return 1;
1028 	}
1029 
1030 	ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1031 	/* if EWRD is not available, we can still use WRDS, so don't fail */
1032 	if (ret < 0)
1033 		IWL_DEBUG_RADIO(mvm,
1034 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1035 				ret);
1036 
1037 	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
1038 	/*
1039 	 * If we don't have profile 0 from BIOS, just skip it.  This
1040 	 * means that SAR Geo will not be enabled either, even if we
1041 	 * have other valid profiles.
1042 	 */
1043 	if (ret == -ENOENT)
1044 		return 1;
1045 
1046 	return ret;
1047 }
1048 
1049 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1050 {
1051 	int ret;
1052 
1053 	if (iwl_mvm_has_unified_ucode(mvm))
1054 		return iwl_run_unified_mvm_ucode(mvm, false);
1055 
1056 	ret = iwl_run_init_mvm_ucode(mvm, false);
1057 
1058 	if (ret) {
1059 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1060 
1061 		if (iwlmvm_mod_params.init_dbg)
1062 			return 0;
1063 		return ret;
1064 	}
1065 
1066 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1067 	iwl_trans_stop_device(mvm->trans);
1068 	ret = iwl_trans_start_hw(mvm->trans);
1069 	if (ret)
1070 		return ret;
1071 
1072 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
1073 
1074 	mvm->rfkill_safe_init_done = false;
1075 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1076 	if (ret)
1077 		return ret;
1078 
1079 	mvm->rfkill_safe_init_done = true;
1080 
1081 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1082 			       NULL);
1083 
1084 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1085 }
1086 
1087 int iwl_mvm_up(struct iwl_mvm *mvm)
1088 {
1089 	int ret, i;
1090 	struct ieee80211_channel *chan;
1091 	struct cfg80211_chan_def chandef;
1092 	struct ieee80211_supported_band *sband = NULL;
1093 
1094 	lockdep_assert_held(&mvm->mutex);
1095 
1096 	ret = iwl_trans_start_hw(mvm->trans);
1097 	if (ret)
1098 		return ret;
1099 
1100 	ret = iwl_mvm_load_rt_fw(mvm);
1101 	if (ret) {
1102 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1103 		if (ret != -ERFKILL)
1104 			iwl_fw_dbg_error_collect(&mvm->fwrt,
1105 						 FW_DBG_TRIGGER_DRIVER);
1106 		goto error;
1107 	}
1108 
1109 	iwl_get_shared_mem_conf(&mvm->fwrt);
1110 
1111 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1112 	if (ret)
1113 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1114 
1115 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1116 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1117 		/* if we have a destination, assume EARLY START */
1118 		if (mvm->fw->dbg.dest_tlv)
1119 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1120 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1121 	}
1122 
1123 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1124 	if (ret)
1125 		goto error;
1126 
1127 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1128 		/* Send phy db control command and then phy db calibration */
1129 		ret = iwl_send_phy_db_data(mvm->phy_db);
1130 		if (ret)
1131 			goto error;
1132 	}
1133 
1134 	ret = iwl_send_phy_cfg_cmd(mvm);
1135 	if (ret)
1136 		goto error;
1137 
1138 	ret = iwl_mvm_send_bt_init_conf(mvm);
1139 	if (ret)
1140 		goto error;
1141 
1142 	if (fw_has_capa(&mvm->fw->ucode_capa,
1143 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1144 		ret = iwl_set_soc_latency(mvm);
1145 		if (ret)
1146 			goto error;
1147 	}
1148 
1149 	/* Init RSS configuration */
1150 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
1151 		ret = iwl_configure_rxq(mvm);
1152 		if (ret) {
1153 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
1154 				ret);
1155 			goto error;
1156 		}
1157 	}
1158 
1159 	if (iwl_mvm_has_new_rx_api(mvm)) {
1160 		ret = iwl_send_rss_cfg_cmd(mvm);
1161 		if (ret) {
1162 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1163 				ret);
1164 			goto error;
1165 		}
1166 	}
1167 
1168 	/* init the fw <-> mac80211 STA mapping */
1169 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1170 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1171 
1172 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1173 
1174 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1175 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1176 
1177 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1178 		ret = iwl_mvm_send_dqa_cmd(mvm);
1179 		if (ret)
1180 			goto error;
1181 	}
1182 
1183 	/* Add auxiliary station for scanning */
1184 	ret = iwl_mvm_add_aux_sta(mvm);
1185 	if (ret)
1186 		goto error;
1187 
1188 	/* Add all the PHY contexts */
1189 	i = 0;
1190 	while (!sband && i < NUM_NL80211_BANDS)
1191 		sband = mvm->hw->wiphy->bands[i++];
1192 
1193 	if (WARN_ON_ONCE(!sband))
1194 		goto error;
1195 
1196 	chan = &sband->channels[0];
1197 
1198 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1199 	for (i = 0; i < NUM_PHY_CTX; i++) {
1200 		/*
1201 		 * The channel used here isn't relevant as it's
1202 		 * going to be overwritten in the other flows.
1203 		 * For now use the first channel we have.
1204 		 */
1205 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1206 					   &chandef, 1, 1);
1207 		if (ret)
1208 			goto error;
1209 	}
1210 
1211 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1212 		/* in order to give the responsibility of ct-kill and
1213 		 * TX backoff to FW we need to send empty temperature reporting
1214 		 * cmd during init time
1215 		 */
1216 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1217 	} else {
1218 		/* Initialize tx backoffs to the minimal possible */
1219 		iwl_mvm_tt_tx_backoff(mvm, 0);
1220 	}
1221 
1222 #ifdef CONFIG_THERMAL
1223 	/* TODO: read the budget from BIOS / Platform NVM */
1224 
1225 	/*
1226 	 * In case there is no budget from BIOS / Platform NVM the default
1227 	 * budget should be 2000mW (cooling state 0).
1228 	 */
1229 	if (iwl_mvm_is_ctdp_supported(mvm)) {
1230 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1231 					   mvm->cooling_dev.cur_state);
1232 		if (ret)
1233 			goto error;
1234 	}
1235 #endif
1236 
1237 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1238 		WARN_ON(iwl_mvm_config_ltr(mvm));
1239 
1240 	ret = iwl_mvm_power_update_device(mvm);
1241 	if (ret)
1242 		goto error;
1243 
1244 	/*
1245 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1246 	 * anyway, so don't init MCC.
1247 	 */
1248 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1249 		ret = iwl_mvm_init_mcc(mvm);
1250 		if (ret)
1251 			goto error;
1252 	}
1253 
1254 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1255 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1256 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1257 		ret = iwl_mvm_config_scan(mvm);
1258 		if (ret)
1259 			goto error;
1260 	}
1261 
1262 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1263 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1264 
1265 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1266 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1267 
1268 	ret = iwl_mvm_ppag_init(mvm);
1269 	if (ret)
1270 		goto error;
1271 
1272 	ret = iwl_mvm_sar_init(mvm);
1273 	if (ret == 0) {
1274 		ret = iwl_mvm_sar_geo_init(mvm);
1275 	} else if (ret > 0 && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
1276 		/*
1277 		 * If basic SAR is not available, we check for WGDS,
1278 		 * which should *not* be available either.  If it is
1279 		 * available, issue an error, because we can't use SAR
1280 		 * Geo without basic SAR.
1281 		 */
1282 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1283 	}
1284 
1285 	if (ret < 0)
1286 		goto error;
1287 
1288 	iwl_mvm_leds_sync(mvm);
1289 
1290 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1291 	return 0;
1292  error:
1293 	if (!iwlmvm_mod_params.init_dbg || !ret)
1294 		iwl_mvm_stop_device(mvm);
1295 	return ret;
1296 }
1297 
1298 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1299 {
1300 	int ret, i;
1301 
1302 	lockdep_assert_held(&mvm->mutex);
1303 
1304 	ret = iwl_trans_start_hw(mvm->trans);
1305 	if (ret)
1306 		return ret;
1307 
1308 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1309 	if (ret) {
1310 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1311 		goto error;
1312 	}
1313 
1314 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1315 	if (ret)
1316 		goto error;
1317 
1318 	/* Send phy db control command and then phy db calibration*/
1319 	ret = iwl_send_phy_db_data(mvm->phy_db);
1320 	if (ret)
1321 		goto error;
1322 
1323 	ret = iwl_send_phy_cfg_cmd(mvm);
1324 	if (ret)
1325 		goto error;
1326 
1327 	/* init the fw <-> mac80211 STA mapping */
1328 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1329 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1330 
1331 	/* Add auxiliary station for scanning */
1332 	ret = iwl_mvm_add_aux_sta(mvm);
1333 	if (ret)
1334 		goto error;
1335 
1336 	return 0;
1337  error:
1338 	iwl_mvm_stop_device(mvm);
1339 	return ret;
1340 }
1341 
1342 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1343 				 struct iwl_rx_cmd_buffer *rxb)
1344 {
1345 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1346 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1347 	u32 flags = le32_to_cpu(card_state_notif->flags);
1348 
1349 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1350 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1351 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1352 			  (flags & CT_KILL_CARD_DISABLED) ?
1353 			  "Reached" : "Not reached");
1354 }
1355 
1356 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1357 			     struct iwl_rx_cmd_buffer *rxb)
1358 {
1359 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1360 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1361 
1362 	IWL_DEBUG_INFO(mvm,
1363 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1364 		       le32_to_cpu(mfuart_notif->installed_ver),
1365 		       le32_to_cpu(mfuart_notif->external_ver),
1366 		       le32_to_cpu(mfuart_notif->status),
1367 		       le32_to_cpu(mfuart_notif->duration));
1368 
1369 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1370 		IWL_DEBUG_INFO(mvm,
1371 			       "MFUART: image size: 0x%08x\n",
1372 			       le32_to_cpu(mfuart_notif->image_size));
1373 }
1374