1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 119c4f7d51SShaul Triebitz * Copyright(c) 2018 Intel Corporation 12e705c121SKalle Valo * 13e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 14e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 15e705c121SKalle Valo * published by the Free Software Foundation. 16e705c121SKalle Valo * 17e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 18e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 19e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20e705c121SKalle Valo * General Public License for more details. 21e705c121SKalle Valo * 22e705c121SKalle Valo * The full GNU General Public License is included in this distribution 23e705c121SKalle Valo * in the file called COPYING. 24e705c121SKalle Valo * 25e705c121SKalle Valo * Contact Information: 26cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 27e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28e705c121SKalle Valo * 29e705c121SKalle Valo * BSD LICENSE 30e705c121SKalle Valo * 31e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 32e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 349c4f7d51SShaul Triebitz * Copyright(c) 2018 Intel Corporation 35e705c121SKalle Valo * All rights reserved. 36e705c121SKalle Valo * 37e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 38e705c121SKalle Valo * modification, are permitted provided that the following conditions 39e705c121SKalle Valo * are met: 40e705c121SKalle Valo * 41e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 42e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 43e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 45e705c121SKalle Valo * the documentation and/or other materials provided with the 46e705c121SKalle Valo * distribution. 47e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 48e705c121SKalle Valo * contributors may be used to endorse or promote products derived 49e705c121SKalle Valo * from this software without specific prior written permission. 50e705c121SKalle Valo * 51e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62e705c121SKalle Valo * 63e705c121SKalle Valo *****************************************************************************/ 64e705c121SKalle Valo #include <net/mac80211.h> 65854d773eSSara Sharon #include <linux/netdevice.h> 66e705c121SKalle Valo 67e705c121SKalle Valo #include "iwl-trans.h" 68e705c121SKalle Valo #include "iwl-op-mode.h" 69d962f9b1SJohannes Berg #include "fw/img.h" 70e705c121SKalle Valo #include "iwl-debug.h" 71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 73e705c121SKalle Valo #include "iwl-prph.h" 74813df5ceSLuca Coelho #include "fw/acpi.h" 75e705c121SKalle Valo 76e705c121SKalle Valo #include "mvm.h" 777174beb6SJohannes Berg #include "fw/dbg.h" 78e705c121SKalle Valo #include "iwl-phy-db.h" 799c4f7d51SShaul Triebitz #include "iwl-modparams.h" 809c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 81e705c121SKalle Valo 82e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 83e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 84e705c121SKalle Valo 85e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 86e705c121SKalle Valo 87e705c121SKalle Valo struct iwl_mvm_alive_data { 88e705c121SKalle Valo bool valid; 89e705c121SKalle Valo u32 scd_base_addr; 90e705c121SKalle Valo }; 91e705c121SKalle Valo 92e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 93e705c121SKalle Valo { 94e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 95e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 96e705c121SKalle Valo }; 97e705c121SKalle Valo 98e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 99e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 100e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 101e705c121SKalle Valo } 102e705c121SKalle Valo 10343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 10443413a97SSara Sharon { 10543413a97SSara Sharon int i; 10643413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 10743413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 10843413a97SSara Sharon .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | 109854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV4_UDP | 11043413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | 11143413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_TCP | 112854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV6_UDP | 11343413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, 11443413a97SSara Sharon }; 11543413a97SSara Sharon 116f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 117f43495fdSSara Sharon return 0; 118f43495fdSSara Sharon 119854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 12043413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 121854d773eSSara Sharon cmd.indirection_table[i] = 122854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 123854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 12443413a97SSara Sharon 12543413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 12643413a97SSara Sharon } 12743413a97SSara Sharon 1288edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm) 1298edbfaa1SSara Sharon { 1308edbfaa1SSara Sharon int i, num_queues, size; 1318edbfaa1SSara Sharon struct iwl_rfh_queue_config *cmd; 1328edbfaa1SSara Sharon 1338edbfaa1SSara Sharon /* Do not configure default queue, it is configured via context info */ 1348edbfaa1SSara Sharon num_queues = mvm->trans->num_rx_queues - 1; 1358edbfaa1SSara Sharon 1368edbfaa1SSara Sharon size = sizeof(*cmd) + num_queues * sizeof(struct iwl_rfh_queue_data); 1378edbfaa1SSara Sharon 1388edbfaa1SSara Sharon cmd = kzalloc(size, GFP_KERNEL); 1398edbfaa1SSara Sharon if (!cmd) 1408edbfaa1SSara Sharon return -ENOMEM; 1418edbfaa1SSara Sharon 1428edbfaa1SSara Sharon cmd->num_queues = num_queues; 1438edbfaa1SSara Sharon 1448edbfaa1SSara Sharon for (i = 0; i < num_queues; i++) { 1458edbfaa1SSara Sharon struct iwl_trans_rxq_dma_data data; 1468edbfaa1SSara Sharon 1478edbfaa1SSara Sharon cmd->data[i].q_num = i + 1; 1488edbfaa1SSara Sharon iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data); 1498edbfaa1SSara Sharon 1508edbfaa1SSara Sharon cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 1518edbfaa1SSara Sharon cmd->data[i].urbd_stts_wrptr = 1528edbfaa1SSara Sharon cpu_to_le64(data.urbd_stts_wrptr); 1538edbfaa1SSara Sharon cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 1548edbfaa1SSara Sharon cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 1558edbfaa1SSara Sharon } 1568edbfaa1SSara Sharon 1578edbfaa1SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, 1588edbfaa1SSara Sharon WIDE_ID(DATA_PATH_GROUP, 1598edbfaa1SSara Sharon RFH_QUEUE_CONFIG_CMD), 1608edbfaa1SSara Sharon 0, size, cmd); 1618edbfaa1SSara Sharon } 1628edbfaa1SSara Sharon 16397d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 16497d5be7eSLiad Kaufman { 16597d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 16697d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 16797d5be7eSLiad Kaufman }; 16897d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 16997d5be7eSLiad Kaufman int ret; 17097d5be7eSLiad Kaufman 17197d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 17297d5be7eSLiad Kaufman if (ret) 17397d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 17497d5be7eSLiad Kaufman else 17597d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 17697d5be7eSLiad Kaufman 17797d5be7eSLiad Kaufman return ret; 17897d5be7eSLiad Kaufman } 17997d5be7eSLiad Kaufman 180bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 181bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 182bdccdb85SGolan Ben-Ami { 183bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 184bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 185bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 186bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 187bdccdb85SGolan Ben-Ami int i; 188bdccdb85SGolan Ben-Ami 189bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 190bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 191bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 192bdccdb85SGolan Ben-Ami 193bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 194bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 195bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 196bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 197bdccdb85SGolan Ben-Ami n_words + i, 198bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 199bdccdb85SGolan Ben-Ami } 200bdccdb85SGolan Ben-Ami 201e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 202e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 203e705c121SKalle Valo { 204e705c121SKalle Valo struct iwl_mvm *mvm = 205e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 206e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 2075c228d63SSara Sharon struct mvm_alive_resp_v3 *palive3; 208e705c121SKalle Valo struct mvm_alive_resp *palive; 2095c228d63SSara Sharon struct iwl_umac_alive *umac; 2105c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 2115c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 2125c228d63SSara Sharon u16 status; 2133485e76eSLuca Coelho u32 umac_error_event_table; 214e705c121SKalle Valo 2155c228d63SSara Sharon if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 216e705c121SKalle Valo palive = (void *)pkt->data; 2175c228d63SSara Sharon umac = &palive->umac_data; 2185c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 2195c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 2205c228d63SSara Sharon status = le16_to_cpu(palive->status); 2215c228d63SSara Sharon } else { 2225c228d63SSara Sharon palive3 = (void *)pkt->data; 2235c228d63SSara Sharon umac = &palive3->umac_data; 2245c228d63SSara Sharon lmac1 = &palive3->lmac_data; 2255c228d63SSara Sharon status = le16_to_cpu(palive3->status); 2265c228d63SSara Sharon } 227e705c121SKalle Valo 2285c228d63SSara Sharon mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr); 2295c228d63SSara Sharon if (lmac2) 2305c228d63SSara Sharon mvm->error_event_table[1] = 2315c228d63SSara Sharon le32_to_cpu(lmac2->error_event_table_ptr); 2325c228d63SSara Sharon mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr); 233e705c121SKalle Valo 2343485e76eSLuca Coelho umac_error_event_table = le32_to_cpu(umac->error_info_addr); 2355c228d63SSara Sharon 2363485e76eSLuca Coelho if (!umac_error_event_table) { 2373485e76eSLuca Coelho mvm->support_umac_log = false; 2383485e76eSLuca Coelho } else if (umac_error_event_table >= 2393485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 2403485e76eSLuca Coelho mvm->support_umac_log = true; 2413485e76eSLuca Coelho mvm->umac_error_event_table = umac_error_event_table; 2423485e76eSLuca Coelho } else { 243fb5b2846SLuca Coelho IWL_ERR(mvm, 244fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 245fb5b2846SLuca Coelho mvm->umac_error_event_table, 246fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 247fb5b2846SLuca Coelho "Init" : "RT"); 2483485e76eSLuca Coelho mvm->support_umac_log = false; 2493485e76eSLuca Coelho } 250fb5b2846SLuca Coelho 2515c228d63SSara Sharon alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr); 2525c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 253e705c121SKalle Valo 254e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2555c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2565c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2575c228d63SSara Sharon 2585c228d63SSara Sharon if (lmac2) 2595c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 260e705c121SKalle Valo 261e705c121SKalle Valo IWL_DEBUG_FW(mvm, 262e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2635c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2645c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 265e705c121SKalle Valo 266e705c121SKalle Valo return true; 267e705c121SKalle Valo } 268e705c121SKalle Valo 2691f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2701f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2711f370650SSara Sharon { 2721f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2731f370650SSara Sharon 2741f370650SSara Sharon return true; 2751f370650SSara Sharon } 2761f370650SSara Sharon 277e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 278e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 279e705c121SKalle Valo { 280e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 281e705c121SKalle Valo 282e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 283e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 284e705c121SKalle Valo return true; 285e705c121SKalle Valo } 286e705c121SKalle Valo 287ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 288e705c121SKalle Valo 289e705c121SKalle Valo return false; 290e705c121SKalle Valo } 291e705c121SKalle Valo 292e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 293e705c121SKalle Valo enum iwl_ucode_type ucode_type) 294e705c121SKalle Valo { 295e705c121SKalle Valo struct iwl_notification_wait alive_wait; 296e705c121SKalle Valo struct iwl_mvm_alive_data alive_data; 297e705c121SKalle Valo const struct fw_img *fw; 298e705c121SKalle Valo int ret, i; 299702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 300e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 301e705c121SKalle Valo 302f38efdb2SShahar S Matityahu set_bit(IWL_FWRT_STATUS_WAIT_ALIVE, &mvm->fwrt.status); 303e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 3043d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 3053d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 3063d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 307612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 308e705c121SKalle Valo else 309612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 310e705c121SKalle Valo if (WARN_ON(!fw)) 311e705c121SKalle Valo return -EINVAL; 312702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 31365b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 314e705c121SKalle Valo 315e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 316e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 317e705c121SKalle Valo iwl_alive_fn, &alive_data); 318e705c121SKalle Valo 319e705c121SKalle Valo ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); 320e705c121SKalle Valo if (ret) { 321702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 322e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 323e705c121SKalle Valo return ret; 324e705c121SKalle Valo } 325e705c121SKalle Valo 326e705c121SKalle Valo /* 327e705c121SKalle Valo * Some things may run in the background now, but we 328e705c121SKalle Valo * just wait for the ALIVE notification here. 329e705c121SKalle Valo */ 330e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 331e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 332e705c121SKalle Valo if (ret) { 333d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 334d6be9c1dSSara Sharon 3355f01df3fSGolan Ben Ami if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) 336e705c121SKalle Valo IWL_ERR(mvm, 337e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 338d6be9c1dSSara Sharon iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS), 339d6be9c1dSSara Sharon iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS)); 3406e584873SSara Sharon else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) 341d6be9c1dSSara Sharon IWL_ERR(mvm, 342d6be9c1dSSara Sharon "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 343d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_1_STATUS), 344d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_2_STATUS)); 345702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 346e705c121SKalle Valo return ret; 347e705c121SKalle Valo } 348e705c121SKalle Valo 349e705c121SKalle Valo if (!alive_data.valid) { 350e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 351702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 352e705c121SKalle Valo return -EIO; 353e705c121SKalle Valo } 354e705c121SKalle Valo 355e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 356e705c121SKalle Valo 357e705c121SKalle Valo /* 358e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 359e705c121SKalle Valo * initialization, but in firmware restart scenarios they 360e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 361e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 362e705c121SKalle Valo * reconfiguration completes. During normal startup, they 363e705c121SKalle Valo * will be empty. 364e705c121SKalle Valo */ 365e705c121SKalle Valo 366e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 367097129c9SLiad Kaufman mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; 368e705c121SKalle Valo 369e705c121SKalle Valo for (i = 0; i < IEEE80211_MAX_QUEUES; i++) 370e705c121SKalle Valo atomic_set(&mvm->mac80211_queue_stop_count[i], 0); 371e705c121SKalle Valo 37265b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 373f38efdb2SShahar S Matityahu clear_bit(IWL_FWRT_STATUS_WAIT_ALIVE, &mvm->fwrt.status); 374e705c121SKalle Valo 375e705c121SKalle Valo return 0; 376e705c121SKalle Valo } 377e705c121SKalle Valo 3788c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 3798c5f47b1SJohannes Berg { 3808c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 3818c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 3828c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 3838c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 3848c5f47b1SJohannes Berg }; 3858c5f47b1SJohannes Berg static const u16 init_complete[] = { 3868c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 3878c5f47b1SJohannes Berg }; 3888c5f47b1SJohannes Berg int ret; 3898c5f47b1SJohannes Berg 3908c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 3918c5f47b1SJohannes Berg 3928c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 3938c5f47b1SJohannes Berg &init_wait, 3948c5f47b1SJohannes Berg init_complete, 3958c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 3968c5f47b1SJohannes Berg iwl_wait_init_complete, 3978c5f47b1SJohannes Berg NULL); 3988c5f47b1SJohannes Berg 3998c5f47b1SJohannes Berg /* Will also start the device */ 4008c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4018c5f47b1SJohannes Berg if (ret) { 4028c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4038c5f47b1SJohannes Berg goto error; 4048c5f47b1SJohannes Berg } 4058c5f47b1SJohannes Berg 4068c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4078c5f47b1SJohannes Berg * commands 4088c5f47b1SJohannes Berg */ 4098c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 4108c5f47b1SJohannes Berg INIT_EXTENDED_CFG_CMD), 0, 4118c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4128c5f47b1SJohannes Berg if (ret) { 4138c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4148c5f47b1SJohannes Berg ret); 4158c5f47b1SJohannes Berg goto error; 4168c5f47b1SJohannes Berg } 4178c5f47b1SJohannes Berg 418e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 419e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4209c4f7d51SShaul Triebitz iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4219c4f7d51SShaul Triebitz mvm->nvm_sections); 4228c5f47b1SJohannes Berg iwl_mvm_load_nvm_to_nic(mvm); 423e9e1ba3dSSara Sharon } 4248c5f47b1SJohannes Berg 425d4f3695eSSara Sharon if (IWL_MVM_PARSE_NVM && read_nvm) { 4265bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 427d4f3695eSSara Sharon if (ret) { 428d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 429d4f3695eSSara Sharon goto error; 430d4f3695eSSara Sharon } 431d4f3695eSSara Sharon } 432d4f3695eSSara Sharon 4338c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 4348c5f47b1SJohannes Berg NVM_ACCESS_COMPLETE), 0, 4358c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4368c5f47b1SJohannes Berg if (ret) { 4378c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4388c5f47b1SJohannes Berg ret); 4398c5f47b1SJohannes Berg goto error; 4408c5f47b1SJohannes Berg } 4418c5f47b1SJohannes Berg 4428c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 443e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4448c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 445e9e1ba3dSSara Sharon if (ret) 446e9e1ba3dSSara Sharon return ret; 447e9e1ba3dSSara Sharon 448e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 449d4f3695eSSara Sharon if (!IWL_MVM_PARSE_NVM && read_nvm) { 4504c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 451c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 452c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 453c135cb56SShaul Triebitz mvm->nvm_data = NULL; 454e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 455e9e1ba3dSSara Sharon return ret; 456e9e1ba3dSSara Sharon } 457e9e1ba3dSSara Sharon } 458e9e1ba3dSSara Sharon 459e9e1ba3dSSara Sharon return 0; 4608c5f47b1SJohannes Berg 4618c5f47b1SJohannes Berg error: 4628c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 4638c5f47b1SJohannes Berg return ret; 4648c5f47b1SJohannes Berg } 4658c5f47b1SJohannes Berg 466e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 467e705c121SKalle Valo { 468e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 469702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 470e705c121SKalle Valo 471e705c121SKalle Valo /* Set parameters */ 472e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 47386a2b204SLuca Coelho 47486a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 47586a2b204SLuca Coelho phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags); 47686a2b204SLuca Coelho 477e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 478e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 479e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 480e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 481e705c121SKalle Valo 482e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 483e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 484e705c121SKalle Valo 485e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 486e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 487e705c121SKalle Valo } 488e705c121SKalle Valo 489e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 490e705c121SKalle Valo { 491e705c121SKalle Valo struct iwl_notification_wait calib_wait; 492e705c121SKalle Valo static const u16 init_complete[] = { 493e705c121SKalle Valo INIT_COMPLETE_NOTIF, 494e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 495e705c121SKalle Valo }; 496e705c121SKalle Valo int ret; 497e705c121SKalle Valo 4987d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 4998c5f47b1SJohannes Berg return iwl_run_unified_mvm_ucode(mvm, true); 5008c5f47b1SJohannes Berg 501e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 502e705c121SKalle Valo 503e705c121SKalle Valo if (WARN_ON_ONCE(mvm->calibrating)) 504e705c121SKalle Valo return 0; 505e705c121SKalle Valo 506e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 507e705c121SKalle Valo &calib_wait, 508e705c121SKalle Valo init_complete, 509e705c121SKalle Valo ARRAY_SIZE(init_complete), 510e705c121SKalle Valo iwl_wait_phy_db_entry, 511e705c121SKalle Valo mvm->phy_db); 512e705c121SKalle Valo 513e705c121SKalle Valo /* Will also start the device */ 514e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 515e705c121SKalle Valo if (ret) { 516e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 51700e0c6c8SLuca Coelho goto remove_notif; 518e705c121SKalle Valo } 519e705c121SKalle Valo 520b3de3ef4SEmmanuel Grumbach if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) { 521b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 522e705c121SKalle Valo if (ret) 52300e0c6c8SLuca Coelho goto remove_notif; 524b3de3ef4SEmmanuel Grumbach } 525e705c121SKalle Valo 526e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 527e705c121SKalle Valo if (read_nvm) { 5285bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 529e705c121SKalle Valo if (ret) { 530e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 53100e0c6c8SLuca Coelho goto remove_notif; 532e705c121SKalle Valo } 533e705c121SKalle Valo } 534e705c121SKalle Valo 535e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 536e705c121SKalle Valo if (mvm->nvm_file_name) 537e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 538e705c121SKalle Valo 53900e0c6c8SLuca Coelho WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans)); 540e705c121SKalle Valo 541e705c121SKalle Valo /* 542e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 543e705c121SKalle Valo * the init seq later when RF kill will switch to off 544e705c121SKalle Valo */ 545e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 546e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 547e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 54800e0c6c8SLuca Coelho goto remove_notif; 549e705c121SKalle Valo } 550e705c121SKalle Valo 551e705c121SKalle Valo mvm->calibrating = true; 552e705c121SKalle Valo 553e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 554e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 555e705c121SKalle Valo if (ret) 55600e0c6c8SLuca Coelho goto remove_notif; 557e705c121SKalle Valo 558e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 559e705c121SKalle Valo if (ret) { 560e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 561e705c121SKalle Valo ret); 56200e0c6c8SLuca Coelho goto remove_notif; 563e705c121SKalle Valo } 564e705c121SKalle Valo 565e705c121SKalle Valo /* 566e705c121SKalle Valo * Some things may run in the background now, but we 567e705c121SKalle Valo * just wait for the calibration complete notification. 568e705c121SKalle Valo */ 569e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 570e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 57100e0c6c8SLuca Coelho if (!ret) 572e705c121SKalle Valo goto out; 573e705c121SKalle Valo 57400e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 57500e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 57600e0c6c8SLuca Coelho ret = 0; 57700e0c6c8SLuca Coelho } else { 57800e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 57900e0c6c8SLuca Coelho ret); 58000e0c6c8SLuca Coelho } 58100e0c6c8SLuca Coelho 58200e0c6c8SLuca Coelho goto out; 58300e0c6c8SLuca Coelho 58400e0c6c8SLuca Coelho remove_notif: 585e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 586e705c121SKalle Valo out: 587e705c121SKalle Valo mvm->calibrating = false; 588e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 589e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 590e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 591e705c121SKalle Valo sizeof(struct ieee80211_channel) + 592e705c121SKalle Valo sizeof(struct ieee80211_rate), 593e705c121SKalle Valo GFP_KERNEL); 594e705c121SKalle Valo if (!mvm->nvm_data) 595e705c121SKalle Valo return -ENOMEM; 596e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 597e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 598e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 599e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 600e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 601e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 602e705c121SKalle Valo } 603e705c121SKalle Valo 604e705c121SKalle Valo return ret; 605e705c121SKalle Valo } 606e705c121SKalle Valo 607e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 608e705c121SKalle Valo { 609e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 610e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 611e705c121SKalle Valo }; 612e705c121SKalle Valo 613e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 614e705c121SKalle Valo return 0; 615e705c121SKalle Valo 616e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 617e705c121SKalle Valo sizeof(cmd), &cmd); 618e705c121SKalle Valo } 619e705c121SKalle Valo 620c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 621c386dacbSHaim Dreyfuss static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm, 622c386dacbSHaim Dreyfuss union acpi_object *table, 623c386dacbSHaim Dreyfuss struct iwl_mvm_sar_profile *profile, 624c386dacbSHaim Dreyfuss bool enabled) 625da2830acSLuca Coelho { 626c386dacbSHaim Dreyfuss int i; 627da2830acSLuca Coelho 628c386dacbSHaim Dreyfuss profile->enabled = enabled; 629da2830acSLuca Coelho 630e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) { 631c386dacbSHaim Dreyfuss if ((table[i].type != ACPI_TYPE_INTEGER) || 632c386dacbSHaim Dreyfuss (table[i].integer.value > U8_MAX)) 633da2830acSLuca Coelho return -EINVAL; 634da2830acSLuca Coelho 635c386dacbSHaim Dreyfuss profile->table[i] = table[i].integer.value; 636da2830acSLuca Coelho } 637da2830acSLuca Coelho 638da2830acSLuca Coelho return 0; 639da2830acSLuca Coelho } 640da2830acSLuca Coelho 641c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 642c386dacbSHaim Dreyfuss { 643813df5ceSLuca Coelho union acpi_object *wifi_pkg, *table, *data; 644c386dacbSHaim Dreyfuss bool enabled; 645da2830acSLuca Coelho int ret; 646da2830acSLuca Coelho 647813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD); 648813df5ceSLuca Coelho if (IS_ERR(data)) 649813df5ceSLuca Coelho return PTR_ERR(data); 650da2830acSLuca Coelho 6512fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 652c386dacbSHaim Dreyfuss ACPI_WRDS_WIFI_DATA_SIZE); 653c386dacbSHaim Dreyfuss if (IS_ERR(wifi_pkg)) { 654c386dacbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 655c386dacbSHaim Dreyfuss goto out_free; 656c386dacbSHaim Dreyfuss } 657da2830acSLuca Coelho 658c386dacbSHaim Dreyfuss if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { 659c386dacbSHaim Dreyfuss ret = -EINVAL; 660c386dacbSHaim Dreyfuss goto out_free; 661c386dacbSHaim Dreyfuss } 662c386dacbSHaim Dreyfuss 663c386dacbSHaim Dreyfuss enabled = !!(wifi_pkg->package.elements[1].integer.value); 664c386dacbSHaim Dreyfuss 665c386dacbSHaim Dreyfuss /* position of the actual table */ 666c386dacbSHaim Dreyfuss table = &wifi_pkg->package.elements[2]; 667c386dacbSHaim Dreyfuss 668c386dacbSHaim Dreyfuss /* The profile from WRDS is officially profile 1, but goes 669c386dacbSHaim Dreyfuss * into sar_profiles[0] (because we don't have a profile 0). 670c386dacbSHaim Dreyfuss */ 671c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0], 672c386dacbSHaim Dreyfuss enabled); 673c386dacbSHaim Dreyfuss out_free: 674813df5ceSLuca Coelho kfree(data); 675da2830acSLuca Coelho return ret; 676da2830acSLuca Coelho } 677da2830acSLuca Coelho 67869964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 67969964905SLuca Coelho { 680813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 68169964905SLuca Coelho bool enabled; 68269964905SLuca Coelho int i, n_profiles, ret; 68369964905SLuca Coelho 684813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD); 685813df5ceSLuca Coelho if (IS_ERR(data)) 686813df5ceSLuca Coelho return PTR_ERR(data); 68769964905SLuca Coelho 6882fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 68969964905SLuca Coelho ACPI_EWRD_WIFI_DATA_SIZE); 69069964905SLuca Coelho if (IS_ERR(wifi_pkg)) { 69169964905SLuca Coelho ret = PTR_ERR(wifi_pkg); 69269964905SLuca Coelho goto out_free; 69369964905SLuca Coelho } 69469964905SLuca Coelho 69569964905SLuca Coelho if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || 69669964905SLuca Coelho (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { 69769964905SLuca Coelho ret = -EINVAL; 69869964905SLuca Coelho goto out_free; 69969964905SLuca Coelho } 70069964905SLuca Coelho 70169964905SLuca Coelho enabled = !!(wifi_pkg->package.elements[1].integer.value); 70269964905SLuca Coelho n_profiles = wifi_pkg->package.elements[2].integer.value; 70369964905SLuca Coelho 7042e1976bbSLuca Coelho /* 7052e1976bbSLuca Coelho * Check the validity of n_profiles. The EWRD profiles start 7062e1976bbSLuca Coelho * from index 1, so the maximum value allowed here is 7072e1976bbSLuca Coelho * ACPI_SAR_PROFILES_NUM - 1. 7082e1976bbSLuca Coelho */ 7092e1976bbSLuca Coelho if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) { 710e2ef1476SSharon Dvir ret = -EINVAL; 711e2ef1476SSharon Dvir goto out_free; 712e2ef1476SSharon Dvir } 713e2ef1476SSharon Dvir 71469964905SLuca Coelho for (i = 0; i < n_profiles; i++) { 71569964905SLuca Coelho /* the tables start at element 3 */ 71669964905SLuca Coelho static int pos = 3; 71769964905SLuca Coelho 71869964905SLuca Coelho /* The EWRD profiles officially go from 2 to 4, but we 71969964905SLuca Coelho * save them in sar_profiles[1-3] (because we don't 72069964905SLuca Coelho * have profile 0). So in the array we start from 1. 72169964905SLuca Coelho */ 72269964905SLuca Coelho ret = iwl_mvm_sar_set_profile(mvm, 72369964905SLuca Coelho &wifi_pkg->package.elements[pos], 72469964905SLuca Coelho &mvm->sar_profiles[i + 1], 72569964905SLuca Coelho enabled); 72669964905SLuca Coelho if (ret < 0) 72769964905SLuca Coelho break; 72869964905SLuca Coelho 72969964905SLuca Coelho /* go to the next table */ 730e7a3b8d8SLuca Coelho pos += ACPI_SAR_TABLE_SIZE; 73169964905SLuca Coelho } 73269964905SLuca Coelho 73369964905SLuca Coelho out_free: 734813df5ceSLuca Coelho kfree(data); 73569964905SLuca Coelho return ret; 73669964905SLuca Coelho } 73769964905SLuca Coelho 7387fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) 739a6bff3cbSHaim Dreyfuss { 740813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 7417fe90e0eSHaim Dreyfuss int i, j, ret; 7427fe90e0eSHaim Dreyfuss int idx = 1; 743a6bff3cbSHaim Dreyfuss 744813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD); 745813df5ceSLuca Coelho if (IS_ERR(data)) 746813df5ceSLuca Coelho return PTR_ERR(data); 747a6bff3cbSHaim Dreyfuss 7482fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 749a6bff3cbSHaim Dreyfuss ACPI_WGDS_WIFI_DATA_SIZE); 750a6bff3cbSHaim Dreyfuss if (IS_ERR(wifi_pkg)) { 751a6bff3cbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 752a6bff3cbSHaim Dreyfuss goto out_free; 753a6bff3cbSHaim Dreyfuss } 754a6bff3cbSHaim Dreyfuss 755e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 756e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) { 757a6bff3cbSHaim Dreyfuss union acpi_object *entry; 758a6bff3cbSHaim Dreyfuss 7597fe90e0eSHaim Dreyfuss entry = &wifi_pkg->package.elements[idx++]; 760a6bff3cbSHaim Dreyfuss if ((entry->type != ACPI_TYPE_INTEGER) || 761aae9d563SChristophe Jaillet (entry->integer.value > U8_MAX)) { 762aae9d563SChristophe Jaillet ret = -EINVAL; 763aae9d563SChristophe Jaillet goto out_free; 764aae9d563SChristophe Jaillet } 765a6bff3cbSHaim Dreyfuss 7667fe90e0eSHaim Dreyfuss mvm->geo_profiles[i].values[j] = entry->integer.value; 7677fe90e0eSHaim Dreyfuss } 768a6bff3cbSHaim Dreyfuss } 769a6bff3cbSHaim Dreyfuss ret = 0; 770a6bff3cbSHaim Dreyfuss out_free: 771813df5ceSLuca Coelho kfree(data); 772a6bff3cbSHaim Dreyfuss return ret; 773a6bff3cbSHaim Dreyfuss } 774a6bff3cbSHaim Dreyfuss 77542ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 776da2830acSLuca Coelho { 7770791c2fcSHaim Dreyfuss union { 7780791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd v5; 7790791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd_v4 v4; 7800791c2fcSHaim Dreyfuss } cmd; 78142ce76d6SLuca Coelho int i, j, idx; 782e7a3b8d8SLuca Coelho int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b }; 7830791c2fcSHaim Dreyfuss int len; 784da2830acSLuca Coelho 785e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2); 786e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS != 787e7a3b8d8SLuca Coelho ACPI_SAR_TABLE_SIZE); 78842ce76d6SLuca Coelho 7890791c2fcSHaim Dreyfuss cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS); 7900791c2fcSHaim Dreyfuss 7910791c2fcSHaim Dreyfuss if (fw_has_api(&mvm->fw->ucode_capa, 7920791c2fcSHaim Dreyfuss IWL_UCODE_TLV_API_REDUCE_TX_POWER)) 7930791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 7940791c2fcSHaim Dreyfuss else if (fw_has_capa(&mvm->fw->ucode_capa, 7950791c2fcSHaim Dreyfuss IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 7960791c2fcSHaim Dreyfuss len = sizeof(cmd.v4); 7970791c2fcSHaim Dreyfuss else 7980791c2fcSHaim Dreyfuss len = sizeof(cmd.v4.v3); 79955bfa4b9SLuca Coelho 800e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) { 80142ce76d6SLuca Coelho struct iwl_mvm_sar_profile *prof; 80242ce76d6SLuca Coelho 80342ce76d6SLuca Coelho /* don't allow SAR to be disabled (profile 0 means disable) */ 80442ce76d6SLuca Coelho if (profs[i] == 0) 80542ce76d6SLuca Coelho return -EPERM; 80642ce76d6SLuca Coelho 807e7a3b8d8SLuca Coelho /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */ 808e7a3b8d8SLuca Coelho if (profs[i] > ACPI_SAR_PROFILE_NUM) 80942ce76d6SLuca Coelho return -EINVAL; 81042ce76d6SLuca Coelho 81142ce76d6SLuca Coelho /* profiles go from 1 to 4, so decrement to access the array */ 81242ce76d6SLuca Coelho prof = &mvm->sar_profiles[profs[i] - 1]; 81342ce76d6SLuca Coelho 81442ce76d6SLuca Coelho /* if the profile is disabled, do nothing */ 81542ce76d6SLuca Coelho if (!prof->enabled) { 81642ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n", 81742ce76d6SLuca Coelho profs[i]); 81842ce76d6SLuca Coelho /* if one of the profiles is disabled, we fail all */ 81942ce76d6SLuca Coelho return -ENOENT; 82042ce76d6SLuca Coelho } 82142ce76d6SLuca Coelho 82242ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); 823e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) { 824e7a3b8d8SLuca Coelho idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j; 8250791c2fcSHaim Dreyfuss cmd.v5.v3.per_chain_restriction[i][j] = 82642ce76d6SLuca Coelho cpu_to_le16(prof->table[idx]); 82742ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", 82842ce76d6SLuca Coelho j, prof->table[idx]); 82942ce76d6SLuca Coelho } 83042ce76d6SLuca Coelho } 83142ce76d6SLuca Coelho 83242ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 83342ce76d6SLuca Coelho 83442ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 83542ce76d6SLuca Coelho } 83642ce76d6SLuca Coelho 8377fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 8387fe90e0eSHaim Dreyfuss { 8397fe90e0eSHaim Dreyfuss struct iwl_geo_tx_power_profiles_resp *resp; 8407fe90e0eSHaim Dreyfuss int ret; 8417fe90e0eSHaim Dreyfuss 8427fe90e0eSHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd geo_cmd = { 8437fe90e0eSHaim Dreyfuss .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE), 8447fe90e0eSHaim Dreyfuss }; 8457fe90e0eSHaim Dreyfuss struct iwl_host_cmd cmd = { 8467fe90e0eSHaim Dreyfuss .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 8477fe90e0eSHaim Dreyfuss .len = { sizeof(geo_cmd), }, 8487fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 8497fe90e0eSHaim Dreyfuss .data = { &geo_cmd }, 8507fe90e0eSHaim Dreyfuss }; 8517fe90e0eSHaim Dreyfuss 8527fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 8537fe90e0eSHaim Dreyfuss if (ret) { 8547fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8557fe90e0eSHaim Dreyfuss return ret; 8567fe90e0eSHaim Dreyfuss } 8577fe90e0eSHaim Dreyfuss 8587fe90e0eSHaim Dreyfuss resp = (void *)cmd.resp_pkt->data; 8597fe90e0eSHaim Dreyfuss ret = le32_to_cpu(resp->profile_idx); 860e7a3b8d8SLuca Coelho if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) { 8617fe90e0eSHaim Dreyfuss ret = -EIO; 8627fe90e0eSHaim Dreyfuss IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret); 8637fe90e0eSHaim Dreyfuss } 8647fe90e0eSHaim Dreyfuss 8657fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8667fe90e0eSHaim Dreyfuss return ret; 8677fe90e0eSHaim Dreyfuss } 8687fe90e0eSHaim Dreyfuss 869a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 870a6bff3cbSHaim Dreyfuss { 871a6bff3cbSHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd cmd = { 872a6bff3cbSHaim Dreyfuss .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES), 873a6bff3cbSHaim Dreyfuss }; 8747fe90e0eSHaim Dreyfuss int ret, i, j; 875a6bff3cbSHaim Dreyfuss u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT); 876a6bff3cbSHaim Dreyfuss 8777fe90e0eSHaim Dreyfuss ret = iwl_mvm_sar_get_wgds_table(mvm); 878a6bff3cbSHaim Dreyfuss if (ret < 0) { 879a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 880a6bff3cbSHaim Dreyfuss "Geo SAR BIOS table invalid or unavailable. (%d)\n", 881a6bff3cbSHaim Dreyfuss ret); 882a6bff3cbSHaim Dreyfuss /* we don't fail if the table is not available */ 883a6bff3cbSHaim Dreyfuss return 0; 884a6bff3cbSHaim Dreyfuss } 885a6bff3cbSHaim Dreyfuss 886a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n"); 887a6bff3cbSHaim Dreyfuss 888e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS * 889a6bff3cbSHaim Dreyfuss ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE); 890a6bff3cbSHaim Dreyfuss 891e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES); 892e7a3b8d8SLuca Coelho 893e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 894a6bff3cbSHaim Dreyfuss struct iwl_per_chain_offset *chain = 895a6bff3cbSHaim Dreyfuss (struct iwl_per_chain_offset *)&cmd.table[i]; 896a6bff3cbSHaim Dreyfuss 897a6bff3cbSHaim Dreyfuss for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) { 898a6bff3cbSHaim Dreyfuss u8 *value; 899a6bff3cbSHaim Dreyfuss 9007fe90e0eSHaim Dreyfuss value = &mvm->geo_profiles[i].values[j * 901e7a3b8d8SLuca Coelho ACPI_GEO_PER_CHAIN_SIZE]; 902a6bff3cbSHaim Dreyfuss chain[j].max_tx_power = cpu_to_le16(value[0]); 903a6bff3cbSHaim Dreyfuss chain[j].chain_a = value[1]; 904a6bff3cbSHaim Dreyfuss chain[j].chain_b = value[2]; 905a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 906a6bff3cbSHaim Dreyfuss "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n", 907a6bff3cbSHaim Dreyfuss i, j, value[1], value[2], value[0]); 908a6bff3cbSHaim Dreyfuss } 909a6bff3cbSHaim Dreyfuss } 910a6bff3cbSHaim Dreyfuss return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd); 911a6bff3cbSHaim Dreyfuss } 912a6bff3cbSHaim Dreyfuss 91369964905SLuca Coelho #else /* CONFIG_ACPI */ 91469964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 91569964905SLuca Coelho { 91669964905SLuca Coelho return -ENOENT; 91769964905SLuca Coelho } 91869964905SLuca Coelho 91969964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 92069964905SLuca Coelho { 92169964905SLuca Coelho return -ENOENT; 92269964905SLuca Coelho } 923a6bff3cbSHaim Dreyfuss 924a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 925a6bff3cbSHaim Dreyfuss { 926a6bff3cbSHaim Dreyfuss return 0; 927a6bff3cbSHaim Dreyfuss } 92818f1755dSLuca Coelho 92918f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, 93018f1755dSLuca Coelho int prof_b) 93118f1755dSLuca Coelho { 93218f1755dSLuca Coelho return -ENOENT; 93318f1755dSLuca Coelho } 93418f1755dSLuca Coelho 93518f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 93618f1755dSLuca Coelho { 93718f1755dSLuca Coelho return -ENOENT; 93818f1755dSLuca Coelho } 93969964905SLuca Coelho #endif /* CONFIG_ACPI */ 94069964905SLuca Coelho 94142ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 94242ce76d6SLuca Coelho { 94342ce76d6SLuca Coelho int ret; 94442ce76d6SLuca Coelho 945c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_get_wrds_table(mvm); 946da2830acSLuca Coelho if (ret < 0) { 947da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 94869964905SLuca Coelho "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 949da2830acSLuca Coelho ret); 95069964905SLuca Coelho /* if not available, don't fail and don't bother with EWRD */ 951da2830acSLuca Coelho return 0; 952da2830acSLuca Coelho } 953da2830acSLuca Coelho 95469964905SLuca Coelho ret = iwl_mvm_sar_get_ewrd_table(mvm); 95569964905SLuca Coelho /* if EWRD is not available, we can still use WRDS, so don't fail */ 95669964905SLuca Coelho if (ret < 0) 95769964905SLuca Coelho IWL_DEBUG_RADIO(mvm, 95869964905SLuca Coelho "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 95969964905SLuca Coelho ret); 96069964905SLuca Coelho 96142ce76d6SLuca Coelho /* choose profile 1 (WRDS) as default for both chains */ 96242ce76d6SLuca Coelho ret = iwl_mvm_sar_select_profile(mvm, 1, 1); 96342ce76d6SLuca Coelho 96442ce76d6SLuca Coelho /* if we don't have profile 0 from BIOS, just skip it */ 96542ce76d6SLuca Coelho if (ret == -ENOENT) 966da2830acSLuca Coelho return 0; 967da2830acSLuca Coelho 968da2830acSLuca Coelho return ret; 969da2830acSLuca Coelho } 970da2830acSLuca Coelho 9711f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 9721f370650SSara Sharon { 9731f370650SSara Sharon int ret; 9741f370650SSara Sharon 9757d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 9761f370650SSara Sharon return iwl_run_unified_mvm_ucode(mvm, false); 9771f370650SSara Sharon 9781f370650SSara Sharon ret = iwl_run_init_mvm_ucode(mvm, false); 9791f370650SSara Sharon 9801f370650SSara Sharon if (ret) { 9811f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 982f4744258SLiad Kaufman 983f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 984f4744258SLiad Kaufman return 0; 9851f370650SSara Sharon return ret; 9861f370650SSara Sharon } 9871f370650SSara Sharon 9881f370650SSara Sharon /* 9891f370650SSara Sharon * Stop and start the transport without entering low power 9901f370650SSara Sharon * mode. This will save the state of other components on the 9911f370650SSara Sharon * device that are triggered by the INIT firwmare (MFUART). 9921f370650SSara Sharon */ 9931f370650SSara Sharon _iwl_trans_stop_device(mvm->trans, false); 9941f370650SSara Sharon ret = _iwl_trans_start_hw(mvm->trans, false); 9951f370650SSara Sharon if (ret) 9961f370650SSara Sharon return ret; 9971f370650SSara Sharon 9981f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 9991f370650SSara Sharon if (ret) 10001f370650SSara Sharon return ret; 10011f370650SSara Sharon 1002702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 10031f370650SSara Sharon } 10041f370650SSara Sharon 1005e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1006e705c121SKalle Valo { 1007e705c121SKalle Valo int ret, i; 1008e705c121SKalle Valo struct ieee80211_channel *chan; 1009e705c121SKalle Valo struct cfg80211_chan_def chandef; 1010e705c121SKalle Valo 1011e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1012e705c121SKalle Valo 1013e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1014e705c121SKalle Valo if (ret) 1015e705c121SKalle Valo return ret; 1016e705c121SKalle Valo 10171f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1018e705c121SKalle Valo if (ret) { 1019e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1020e705c121SKalle Valo goto error; 1021e705c121SKalle Valo } 1022e705c121SKalle Valo 1023d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1024e705c121SKalle Valo 1025e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1026e705c121SKalle Valo if (ret) 1027e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1028e705c121SKalle Valo 10297174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1030e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 103117b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 10327174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 10337174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1034e705c121SKalle Valo 1035e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1036e705c121SKalle Valo if (ret) 1037e705c121SKalle Valo goto error; 1038e705c121SKalle Valo 10397d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1040e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1041e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1042e705c121SKalle Valo if (ret) 1043e705c121SKalle Valo goto error; 1044e705c121SKalle Valo 1045e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1046e705c121SKalle Valo if (ret) 1047e705c121SKalle Valo goto error; 10481f370650SSara Sharon } 1049e705c121SKalle Valo 1050b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1051b3de3ef4SEmmanuel Grumbach if (ret) 1052b3de3ef4SEmmanuel Grumbach goto error; 1053b3de3ef4SEmmanuel Grumbach 105443413a97SSara Sharon /* Init RSS configuration */ 10558edbfaa1SSara Sharon if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) { 10568edbfaa1SSara Sharon ret = iwl_configure_rxq(mvm); 10578edbfaa1SSara Sharon if (ret) { 10588edbfaa1SSara Sharon IWL_ERR(mvm, "Failed to configure RX queues: %d\n", 10598edbfaa1SSara Sharon ret); 10608edbfaa1SSara Sharon goto error; 10618edbfaa1SSara Sharon } 10628edbfaa1SSara Sharon } 10638edbfaa1SSara Sharon 10648edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 106543413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 106643413a97SSara Sharon if (ret) { 106743413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 106843413a97SSara Sharon ret); 106943413a97SSara Sharon goto error; 107043413a97SSara Sharon } 107143413a97SSara Sharon } 107243413a97SSara Sharon 1073e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 10740ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1075e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1076e705c121SKalle Valo 10770ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1078e705c121SKalle Valo 1079e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1080e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1081e705c121SKalle Valo 108297d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 108397d5be7eSLiad Kaufman if (ret) 108497d5be7eSLiad Kaufman goto error; 108597d5be7eSLiad Kaufman 1086e705c121SKalle Valo /* Add auxiliary station for scanning */ 1087e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1088e705c121SKalle Valo if (ret) 1089e705c121SKalle Valo goto error; 1090e705c121SKalle Valo 1091e705c121SKalle Valo /* Add all the PHY contexts */ 109257fbcce3SJohannes Berg chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; 1093e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1094e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1095e705c121SKalle Valo /* 1096e705c121SKalle Valo * The channel used here isn't relevant as it's 1097e705c121SKalle Valo * going to be overwritten in the other flows. 1098e705c121SKalle Valo * For now use the first channel we have. 1099e705c121SKalle Valo */ 1100e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1101e705c121SKalle Valo &chandef, 1, 1); 1102e705c121SKalle Valo if (ret) 1103e705c121SKalle Valo goto error; 1104e705c121SKalle Valo } 1105e705c121SKalle Valo 1106c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL 1107c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1108c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1109c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1110c221daf2SChaya Rachel Ivgi * cmd during init time 1111c221daf2SChaya Rachel Ivgi */ 1112c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1113c221daf2SChaya Rachel Ivgi } else { 1114e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1115e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1116c221daf2SChaya Rachel Ivgi } 11175c89e7bcSChaya Rachel Ivgi 11185c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1119944eafc2SChaya Rachel Ivgi 1120944eafc2SChaya Rachel Ivgi /* 1121944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1122944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1123944eafc2SChaya Rachel Ivgi */ 1124944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 11255c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 11265c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 112775cfe338SLuca Coelho if (ret) 112875cfe338SLuca Coelho goto error; 112975cfe338SLuca Coelho } 1130c221daf2SChaya Rachel Ivgi #else 1131c221daf2SChaya Rachel Ivgi /* Initialize tx backoffs to the minimal possible */ 1132c221daf2SChaya Rachel Ivgi iwl_mvm_tt_tx_backoff(mvm, 0); 1133c221daf2SChaya Rachel Ivgi #endif 1134e705c121SKalle Valo 1135e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1136e705c121SKalle Valo 1137e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1138e705c121SKalle Valo if (ret) 1139e705c121SKalle Valo goto error; 1140e705c121SKalle Valo 1141e705c121SKalle Valo /* 1142e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1143e705c121SKalle Valo * anyway, so don't init MCC. 1144e705c121SKalle Valo */ 1145e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1146e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1147e705c121SKalle Valo if (ret) 1148e705c121SKalle Valo goto error; 1149e705c121SKalle Valo } 1150e705c121SKalle Valo 1151e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 11524ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1153b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1154e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1155e705c121SKalle Valo if (ret) 1156e705c121SKalle Valo goto error; 1157e705c121SKalle Valo } 1158e705c121SKalle Valo 1159e705c121SKalle Valo /* allow FW/transport low power modes if not during restart */ 1160e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1161e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); 1162e705c121SKalle Valo 1163da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 1164da2830acSLuca Coelho if (ret) 1165da2830acSLuca Coelho goto error; 1166da2830acSLuca Coelho 1167a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 1168a6bff3cbSHaim Dreyfuss if (ret) 1169a6bff3cbSHaim Dreyfuss goto error; 1170a6bff3cbSHaim Dreyfuss 11717089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 11727089ae63SJohannes Berg 1173e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1174e705c121SKalle Valo return 0; 1175e705c121SKalle Valo error: 1176f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1177fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1178e705c121SKalle Valo return ret; 1179e705c121SKalle Valo } 1180e705c121SKalle Valo 1181e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1182e705c121SKalle Valo { 1183e705c121SKalle Valo int ret, i; 1184e705c121SKalle Valo 1185e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1186e705c121SKalle Valo 1187e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1188e705c121SKalle Valo if (ret) 1189e705c121SKalle Valo return ret; 1190e705c121SKalle Valo 1191e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1192e705c121SKalle Valo if (ret) { 1193e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1194e705c121SKalle Valo goto error; 1195e705c121SKalle Valo } 1196e705c121SKalle Valo 1197e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1198e705c121SKalle Valo if (ret) 1199e705c121SKalle Valo goto error; 1200e705c121SKalle Valo 1201e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1202e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1203e705c121SKalle Valo if (ret) 1204e705c121SKalle Valo goto error; 1205e705c121SKalle Valo 1206e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1207e705c121SKalle Valo if (ret) 1208e705c121SKalle Valo goto error; 1209e705c121SKalle Valo 1210e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 12110ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1212e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1213e705c121SKalle Valo 1214e705c121SKalle Valo /* Add auxiliary station for scanning */ 1215e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1216e705c121SKalle Valo if (ret) 1217e705c121SKalle Valo goto error; 1218e705c121SKalle Valo 1219e705c121SKalle Valo return 0; 1220e705c121SKalle Valo error: 1221fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1222e705c121SKalle Valo return ret; 1223e705c121SKalle Valo } 1224e705c121SKalle Valo 1225e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1226e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1227e705c121SKalle Valo { 1228e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1229e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1230e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1231e705c121SKalle Valo 1232e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1233e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1234e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1235e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1236e705c121SKalle Valo "Reached" : "Not reached"); 1237e705c121SKalle Valo } 1238e705c121SKalle Valo 1239e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1240e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1241e705c121SKalle Valo { 1242e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1243e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1244e705c121SKalle Valo 1245e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1246e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1247e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1248e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1249e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1250e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 12510c8d0a47SGolan Ben-Ami 12520c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 12530c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 12540c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 12550c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1256e705c121SKalle Valo } 1257