1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
119c4f7d51SShaul Triebitz  * Copyright(c) 2018        Intel Corporation
12e705c121SKalle Valo  *
13e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
14e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
15e705c121SKalle Valo  * published by the Free Software Foundation.
16e705c121SKalle Valo  *
17e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
18e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
19e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
20e705c121SKalle Valo  * General Public License for more details.
21e705c121SKalle Valo  *
22e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
23e705c121SKalle Valo  * in the file called COPYING.
24e705c121SKalle Valo  *
25e705c121SKalle Valo  * Contact Information:
26cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
27e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * BSD LICENSE
30e705c121SKalle Valo  *
31e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
349c4f7d51SShaul Triebitz  * Copyright(c) 2018        Intel Corporation
35e705c121SKalle Valo  * All rights reserved.
36e705c121SKalle Valo  *
37e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
38e705c121SKalle Valo  * modification, are permitted provided that the following conditions
39e705c121SKalle Valo  * are met:
40e705c121SKalle Valo  *
41e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
42e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
43e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
44e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
45e705c121SKalle Valo  *    the documentation and/or other materials provided with the
46e705c121SKalle Valo  *    distribution.
47e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
48e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
49e705c121SKalle Valo  *    from this software without specific prior written permission.
50e705c121SKalle Valo  *
51e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62e705c121SKalle Valo  *
63e705c121SKalle Valo  *****************************************************************************/
64e705c121SKalle Valo #include <net/mac80211.h>
65854d773eSSara Sharon #include <linux/netdevice.h>
66e705c121SKalle Valo 
67e705c121SKalle Valo #include "iwl-trans.h"
68e705c121SKalle Valo #include "iwl-op-mode.h"
69d962f9b1SJohannes Berg #include "fw/img.h"
70e705c121SKalle Valo #include "iwl-debug.h"
71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
73e705c121SKalle Valo #include "iwl-prph.h"
74813df5ceSLuca Coelho #include "fw/acpi.h"
75e705c121SKalle Valo 
76e705c121SKalle Valo #include "mvm.h"
777174beb6SJohannes Berg #include "fw/dbg.h"
78e705c121SKalle Valo #include "iwl-phy-db.h"
799c4f7d51SShaul Triebitz #include "iwl-modparams.h"
809c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
81e705c121SKalle Valo 
82e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT	HZ
83e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
84e705c121SKalle Valo 
85e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
86e705c121SKalle Valo 
87e705c121SKalle Valo struct iwl_mvm_alive_data {
88e705c121SKalle Valo 	bool valid;
89e705c121SKalle Valo 	u32 scd_base_addr;
90e705c121SKalle Valo };
91e705c121SKalle Valo 
92e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93e705c121SKalle Valo {
94e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
96e705c121SKalle Valo 	};
97e705c121SKalle Valo 
98e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
99e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
100e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
101e705c121SKalle Valo }
102e705c121SKalle Valo 
10343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
10443413a97SSara Sharon {
10543413a97SSara Sharon 	int i;
10643413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
10743413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
108608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
109608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
110608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
111608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
112608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
113608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
11443413a97SSara Sharon 	};
11543413a97SSara Sharon 
116f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
117f43495fdSSara Sharon 		return 0;
118f43495fdSSara Sharon 
119854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
12043413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
121854d773eSSara Sharon 		cmd.indirection_table[i] =
122854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
123854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
12443413a97SSara Sharon 
12543413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
12643413a97SSara Sharon }
12743413a97SSara Sharon 
1288edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
1298edbfaa1SSara Sharon {
130dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
1318edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
132dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
133dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
134dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
135dbf592f3SJohannes Berg 	};
1368edbfaa1SSara Sharon 
1378edbfaa1SSara Sharon 	/* Do not configure default queue, it is configured via context info */
1388edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
1398edbfaa1SSara Sharon 
140dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
1418edbfaa1SSara Sharon 
1428edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
1438edbfaa1SSara Sharon 	if (!cmd)
1448edbfaa1SSara Sharon 		return -ENOMEM;
1458edbfaa1SSara Sharon 
1468edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
1478edbfaa1SSara Sharon 
1488edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1498edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1508edbfaa1SSara Sharon 
1518edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1528edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1538edbfaa1SSara Sharon 
1548edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1558edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1568edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1578edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1588edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1598edbfaa1SSara Sharon 	}
1608edbfaa1SSara Sharon 
161dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
162dbf592f3SJohannes Berg 	hcmd.len[0] = size;
163dbf592f3SJohannes Berg 
164dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
165dbf592f3SJohannes Berg 
166dbf592f3SJohannes Berg 	kfree(cmd);
167dbf592f3SJohannes Berg 
168dbf592f3SJohannes Berg 	return ret;
1698edbfaa1SSara Sharon }
1708edbfaa1SSara Sharon 
17197d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
17297d5be7eSLiad Kaufman {
17397d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
17497d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
17597d5be7eSLiad Kaufman 	};
17697d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
17797d5be7eSLiad Kaufman 	int ret;
17897d5be7eSLiad Kaufman 
17997d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
18097d5be7eSLiad Kaufman 	if (ret)
18197d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
18297d5be7eSLiad Kaufman 	else
18397d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
18497d5be7eSLiad Kaufman 
18597d5be7eSLiad Kaufman 	return ret;
18697d5be7eSLiad Kaufman }
18797d5be7eSLiad Kaufman 
188bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
189bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
190bdccdb85SGolan Ben-Ami {
191bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
192bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
193bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
194bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
195bdccdb85SGolan Ben-Ami 	int i;
196bdccdb85SGolan Ben-Ami 
197bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
198bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
199bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
200bdccdb85SGolan Ben-Ami 
201bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
202bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
203bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
204bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
205bdccdb85SGolan Ben-Ami 			       n_words + i,
206bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
207bdccdb85SGolan Ben-Ami }
208bdccdb85SGolan Ben-Ami 
209e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
210e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
211e705c121SKalle Valo {
212e705c121SKalle Valo 	struct iwl_mvm *mvm =
213e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
214e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
2155c228d63SSara Sharon 	struct mvm_alive_resp_v3 *palive3;
216e705c121SKalle Valo 	struct mvm_alive_resp *palive;
2175c228d63SSara Sharon 	struct iwl_umac_alive *umac;
2185c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
2195c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
2205c228d63SSara Sharon 	u16 status;
22122463857SShahar S Matityahu 	u32 lmac_error_event_table, umac_error_event_table;
222e705c121SKalle Valo 
2235c228d63SSara Sharon 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
224e705c121SKalle Valo 		palive = (void *)pkt->data;
2255c228d63SSara Sharon 		umac = &palive->umac_data;
2265c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2275c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2285c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2295c228d63SSara Sharon 	} else {
2305c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2315c228d63SSara Sharon 		umac = &palive3->umac_data;
2325c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2335c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2345c228d63SSara Sharon 	}
235e705c121SKalle Valo 
23622463857SShahar S Matityahu 	lmac_error_event_table =
23722463857SShahar S Matityahu 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
23822463857SShahar S Matityahu 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
239e705c121SKalle Valo 
24022463857SShahar S Matityahu 	if (lmac2)
24122463857SShahar S Matityahu 		mvm->trans->lmac_error_event_table[1] =
24222463857SShahar S Matityahu 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
24322463857SShahar S Matityahu 
24422463857SShahar S Matityahu 	umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
2455c228d63SSara Sharon 
2463485e76eSLuca Coelho 	if (!umac_error_event_table) {
2473485e76eSLuca Coelho 		mvm->support_umac_log = false;
2483485e76eSLuca Coelho 	} else if (umac_error_event_table >=
2493485e76eSLuca Coelho 		   mvm->trans->cfg->min_umac_error_event_table) {
2503485e76eSLuca Coelho 		mvm->support_umac_log = true;
2513485e76eSLuca Coelho 	} else {
252fb5b2846SLuca Coelho 		IWL_ERR(mvm,
253fb5b2846SLuca Coelho 			"Not valid error log pointer 0x%08X for %s uCode\n",
25422463857SShahar S Matityahu 			umac_error_event_table,
255fb5b2846SLuca Coelho 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
256fb5b2846SLuca Coelho 			"Init" : "RT");
2573485e76eSLuca Coelho 		mvm->support_umac_log = false;
2583485e76eSLuca Coelho 	}
259fb5b2846SLuca Coelho 
26022463857SShahar S Matityahu 	if (mvm->support_umac_log)
26122463857SShahar S Matityahu 		iwl_fw_umac_set_alive_err_table(mvm->trans,
26222463857SShahar S Matityahu 						umac_error_event_table);
26322463857SShahar S Matityahu 
26422463857SShahar S Matityahu 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2655c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
266e705c121SKalle Valo 
267e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2685c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2695c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2705c228d63SSara Sharon 
2715c228d63SSara Sharon 	if (lmac2)
2725c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
273e705c121SKalle Valo 
274e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
275e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2765c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2775c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
278e705c121SKalle Valo 
279e705c121SKalle Valo 	return true;
280e705c121SKalle Valo }
281e705c121SKalle Valo 
2821f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2831f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2841f370650SSara Sharon {
2851f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2861f370650SSara Sharon 
2871f370650SSara Sharon 	return true;
2881f370650SSara Sharon }
2891f370650SSara Sharon 
290e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
291e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
292e705c121SKalle Valo {
293e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
294e705c121SKalle Valo 
295e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
296e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
297e705c121SKalle Valo 		return true;
298e705c121SKalle Valo 	}
299e705c121SKalle Valo 
300ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
301e705c121SKalle Valo 
302e705c121SKalle Valo 	return false;
303e705c121SKalle Valo }
304e705c121SKalle Valo 
305e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
306e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
307e705c121SKalle Valo {
308e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
30994a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
310e705c121SKalle Valo 	const struct fw_img *fw;
311cfbc6c4cSSara Sharon 	int ret;
312702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
313e705c121SKalle Valo 	static const u16 alive_cmd[] = { MVM_ALIVE };
314e705c121SKalle Valo 
315e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
3163d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3173d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
3183d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
319612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
320e705c121SKalle Valo 	else
321612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
322e705c121SKalle Valo 	if (WARN_ON(!fw))
323e705c121SKalle Valo 		return -EINVAL;
324702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
32565b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
326e705c121SKalle Valo 
327e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
328e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
329e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
330e705c121SKalle Valo 
331e705c121SKalle Valo 	ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
332e705c121SKalle Valo 	if (ret) {
333702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
334e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
335e705c121SKalle Valo 		return ret;
336e705c121SKalle Valo 	}
337e705c121SKalle Valo 
338e705c121SKalle Valo 	/*
339e705c121SKalle Valo 	 * Some things may run in the background now, but we
340e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
341e705c121SKalle Valo 	 */
342e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
343e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
344e705c121SKalle Valo 	if (ret) {
345d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
346d6be9c1dSSara Sharon 
34767b8261cSShahar S Matityahu 		if (ret == -ETIMEDOUT)
348700b3799SShahar S Matityahu 			iwl_fw_dbg_error_collect(&mvm->fwrt,
349700b3799SShahar S Matityahu 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
35067b8261cSShahar S Matityahu 
3515f01df3fSGolan Ben Ami 		if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000)
352e705c121SKalle Valo 			IWL_ERR(mvm,
353e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
354d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
355d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
3566e584873SSara Sharon 		else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
357d6be9c1dSSara Sharon 			IWL_ERR(mvm,
358d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
359d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
360d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
361702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
362e705c121SKalle Valo 		return ret;
363e705c121SKalle Valo 	}
364e705c121SKalle Valo 
365e705c121SKalle Valo 	if (!alive_data.valid) {
366e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
367702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
368e705c121SKalle Valo 		return -EIO;
369e705c121SKalle Valo 	}
370e705c121SKalle Valo 
371e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
372e705c121SKalle Valo 
373e705c121SKalle Valo 	/*
374e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
375e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
376e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
377e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
378e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
379e705c121SKalle Valo 	 * will be empty.
380e705c121SKalle Valo 	 */
381e705c121SKalle Valo 
382e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
3831c14089eSJohannes Berg 	/*
3841c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
3851c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
3861c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
3871c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
3881c14089eSJohannes Berg 	 */
3891c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
3901c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
391e705c121SKalle Valo 
39265b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
393f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
394f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
395f7805b33SLior Cohen #endif
396e705c121SKalle Valo 
397e705c121SKalle Valo 	return 0;
398e705c121SKalle Valo }
399e705c121SKalle Valo 
4008c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
4018c5f47b1SJohannes Berg {
4028c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
4038c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
4048c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4058c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4068c5f47b1SJohannes Berg 	};
4078c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4088c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4098c5f47b1SJohannes Berg 	};
4108c5f47b1SJohannes Berg 	int ret;
4118c5f47b1SJohannes Berg 
4128c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4138c5f47b1SJohannes Berg 
4148c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4158c5f47b1SJohannes Berg 				   &init_wait,
4168c5f47b1SJohannes Berg 				   init_complete,
4178c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4188c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4198c5f47b1SJohannes Berg 				   NULL);
4208c5f47b1SJohannes Berg 
4218c5f47b1SJohannes Berg 	/* Will also start the device */
4228c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4238c5f47b1SJohannes Berg 	if (ret) {
4248c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4258c5f47b1SJohannes Berg 		goto error;
4268c5f47b1SJohannes Berg 	}
4278c5f47b1SJohannes Berg 
4288c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
4298c5f47b1SJohannes Berg 	 * commands
4308c5f47b1SJohannes Berg 	 */
4318c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
4328c5f47b1SJohannes Berg 						INIT_EXTENDED_CFG_CMD), 0,
4338c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
4348c5f47b1SJohannes Berg 	if (ret) {
4358c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
4368c5f47b1SJohannes Berg 			ret);
4378c5f47b1SJohannes Berg 		goto error;
4388c5f47b1SJohannes Berg 	}
4398c5f47b1SJohannes Berg 
440e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
441e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
4429c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
4439c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
4448c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
445e9e1ba3dSSara Sharon 	}
4468c5f47b1SJohannes Berg 
447d4f3695eSSara Sharon 	if (IWL_MVM_PARSE_NVM && read_nvm) {
4485bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
449d4f3695eSSara Sharon 		if (ret) {
450d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
451d4f3695eSSara Sharon 			goto error;
452d4f3695eSSara Sharon 		}
453d4f3695eSSara Sharon 	}
454d4f3695eSSara Sharon 
4558c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
4568c5f47b1SJohannes Berg 						NVM_ACCESS_COMPLETE), 0,
4578c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
4588c5f47b1SJohannes Berg 	if (ret) {
4598c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4608c5f47b1SJohannes Berg 			ret);
4618c5f47b1SJohannes Berg 		goto error;
4628c5f47b1SJohannes Berg 	}
4638c5f47b1SJohannes Berg 
4648c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
465e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
4668c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
467e9e1ba3dSSara Sharon 	if (ret)
468e9e1ba3dSSara Sharon 		return ret;
469e9e1ba3dSSara Sharon 
470e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
471d4f3695eSSara Sharon 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
4724c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
473c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
474c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
475c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
476e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
477e9e1ba3dSSara Sharon 			return ret;
478e9e1ba3dSSara Sharon 		}
479e9e1ba3dSSara Sharon 	}
480e9e1ba3dSSara Sharon 
481e9e1ba3dSSara Sharon 	return 0;
4828c5f47b1SJohannes Berg 
4838c5f47b1SJohannes Berg error:
4848c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
4858c5f47b1SJohannes Berg 	return ret;
4868c5f47b1SJohannes Berg }
4878c5f47b1SJohannes Berg 
488e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
489e705c121SKalle Valo {
490e705c121SKalle Valo 	struct iwl_phy_cfg_cmd phy_cfg_cmd;
491702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
492e705c121SKalle Valo 
493e705c121SKalle Valo 	/* Set parameters */
494e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
49586a2b204SLuca Coelho 
49686a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
49786a2b204SLuca Coelho 	phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
49886a2b204SLuca Coelho 
499e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
500e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
501e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
502e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
503e705c121SKalle Valo 
504e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
505e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
506e705c121SKalle Valo 
507e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
508e705c121SKalle Valo 				    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
509e705c121SKalle Valo }
510e705c121SKalle Valo 
511e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
512e705c121SKalle Valo {
513e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
514e705c121SKalle Valo 	static const u16 init_complete[] = {
515e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
516e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
517e705c121SKalle Valo 	};
518e705c121SKalle Valo 	int ret;
519e705c121SKalle Valo 
5207d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
5218c5f47b1SJohannes Berg 		return iwl_run_unified_mvm_ucode(mvm, true);
5228c5f47b1SJohannes Berg 
523e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
524e705c121SKalle Valo 
525e705c121SKalle Valo 	if (WARN_ON_ONCE(mvm->calibrating))
526e705c121SKalle Valo 		return 0;
527e705c121SKalle Valo 
528e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
529e705c121SKalle Valo 				   &calib_wait,
530e705c121SKalle Valo 				   init_complete,
531e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
532e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
533e705c121SKalle Valo 				   mvm->phy_db);
534e705c121SKalle Valo 
535e705c121SKalle Valo 	/* Will also start the device */
536e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
537e705c121SKalle Valo 	if (ret) {
538e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
53900e0c6c8SLuca Coelho 		goto remove_notif;
540e705c121SKalle Valo 	}
541e705c121SKalle Valo 
542b3de3ef4SEmmanuel Grumbach 	if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
543b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
544e705c121SKalle Valo 		if (ret)
54500e0c6c8SLuca Coelho 			goto remove_notif;
546b3de3ef4SEmmanuel Grumbach 	}
547e705c121SKalle Valo 
548e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
549e705c121SKalle Valo 	if (read_nvm) {
5505bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
551e705c121SKalle Valo 		if (ret) {
552e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
55300e0c6c8SLuca Coelho 			goto remove_notif;
554e705c121SKalle Valo 		}
555e705c121SKalle Valo 	}
556e705c121SKalle Valo 
557e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
558e705c121SKalle Valo 	if (mvm->nvm_file_name)
559e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
560e705c121SKalle Valo 
56164866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
56264866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
56364866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
564e705c121SKalle Valo 
565e705c121SKalle Valo 	/*
566e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
567e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
568e705c121SKalle Valo 	 */
569e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
570e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
571e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
57200e0c6c8SLuca Coelho 		goto remove_notif;
573e705c121SKalle Valo 	}
574e705c121SKalle Valo 
575e705c121SKalle Valo 	mvm->calibrating = true;
576e705c121SKalle Valo 
577e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
578e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
579e705c121SKalle Valo 	if (ret)
58000e0c6c8SLuca Coelho 		goto remove_notif;
581e705c121SKalle Valo 
582e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
583e705c121SKalle Valo 	if (ret) {
584e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
585e705c121SKalle Valo 			ret);
58600e0c6c8SLuca Coelho 		goto remove_notif;
587e705c121SKalle Valo 	}
588e705c121SKalle Valo 
589e705c121SKalle Valo 	/*
590e705c121SKalle Valo 	 * Some things may run in the background now, but we
591e705c121SKalle Valo 	 * just wait for the calibration complete notification.
592e705c121SKalle Valo 	 */
593e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
594e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
59500e0c6c8SLuca Coelho 	if (!ret)
596e705c121SKalle Valo 		goto out;
597e705c121SKalle Valo 
59800e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
59900e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
60000e0c6c8SLuca Coelho 		ret = 0;
60100e0c6c8SLuca Coelho 	} else {
60200e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
60300e0c6c8SLuca Coelho 			ret);
60400e0c6c8SLuca Coelho 	}
60500e0c6c8SLuca Coelho 
60600e0c6c8SLuca Coelho 	goto out;
60700e0c6c8SLuca Coelho 
60800e0c6c8SLuca Coelho remove_notif:
609e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
610e705c121SKalle Valo out:
611e705c121SKalle Valo 	mvm->calibrating = false;
612e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
613e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
614e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
615e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
616e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
617e705c121SKalle Valo 					GFP_KERNEL);
618e705c121SKalle Valo 		if (!mvm->nvm_data)
619e705c121SKalle Valo 			return -ENOMEM;
620e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
621e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
622e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
623e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
624e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
625e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
626e705c121SKalle Valo 	}
627e705c121SKalle Valo 
628e705c121SKalle Valo 	return ret;
629e705c121SKalle Valo }
630e705c121SKalle Valo 
631e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
632e705c121SKalle Valo {
633e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
634e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
635e705c121SKalle Valo 	};
636e705c121SKalle Valo 
637e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
638e705c121SKalle Valo 		return 0;
639e705c121SKalle Valo 
640e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
641e705c121SKalle Valo 				    sizeof(cmd), &cmd);
642e705c121SKalle Valo }
643e705c121SKalle Valo 
644c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
645c386dacbSHaim Dreyfuss static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
646c386dacbSHaim Dreyfuss 				   union acpi_object *table,
647c386dacbSHaim Dreyfuss 				   struct iwl_mvm_sar_profile *profile,
648c386dacbSHaim Dreyfuss 				   bool enabled)
649da2830acSLuca Coelho {
650c386dacbSHaim Dreyfuss 	int i;
651da2830acSLuca Coelho 
652c386dacbSHaim Dreyfuss 	profile->enabled = enabled;
653da2830acSLuca Coelho 
654e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
655c386dacbSHaim Dreyfuss 		if ((table[i].type != ACPI_TYPE_INTEGER) ||
656c386dacbSHaim Dreyfuss 		    (table[i].integer.value > U8_MAX))
657da2830acSLuca Coelho 			return -EINVAL;
658da2830acSLuca Coelho 
659c386dacbSHaim Dreyfuss 		profile->table[i] = table[i].integer.value;
660da2830acSLuca Coelho 	}
661da2830acSLuca Coelho 
662da2830acSLuca Coelho 	return 0;
663da2830acSLuca Coelho }
664da2830acSLuca Coelho 
665c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
666c386dacbSHaim Dreyfuss {
667813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *table, *data;
668c386dacbSHaim Dreyfuss 	bool enabled;
669da2830acSLuca Coelho 	int ret;
670da2830acSLuca Coelho 
671813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
672813df5ceSLuca Coelho 	if (IS_ERR(data))
673813df5ceSLuca Coelho 		return PTR_ERR(data);
674da2830acSLuca Coelho 
6752fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
676c386dacbSHaim Dreyfuss 					 ACPI_WRDS_WIFI_DATA_SIZE);
677c386dacbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
678c386dacbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
679c386dacbSHaim Dreyfuss 		goto out_free;
680c386dacbSHaim Dreyfuss 	}
681da2830acSLuca Coelho 
682c386dacbSHaim Dreyfuss 	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
683c386dacbSHaim Dreyfuss 		ret = -EINVAL;
684c386dacbSHaim Dreyfuss 		goto out_free;
685c386dacbSHaim Dreyfuss 	}
686c386dacbSHaim Dreyfuss 
687c386dacbSHaim Dreyfuss 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
688c386dacbSHaim Dreyfuss 
689c386dacbSHaim Dreyfuss 	/* position of the actual table */
690c386dacbSHaim Dreyfuss 	table = &wifi_pkg->package.elements[2];
691c386dacbSHaim Dreyfuss 
692c386dacbSHaim Dreyfuss 	/* The profile from WRDS is officially profile 1, but goes
693c386dacbSHaim Dreyfuss 	 * into sar_profiles[0] (because we don't have a profile 0).
694c386dacbSHaim Dreyfuss 	 */
695c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
696c386dacbSHaim Dreyfuss 				      enabled);
697c386dacbSHaim Dreyfuss out_free:
698813df5ceSLuca Coelho 	kfree(data);
699da2830acSLuca Coelho 	return ret;
700da2830acSLuca Coelho }
701da2830acSLuca Coelho 
70269964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
70369964905SLuca Coelho {
704813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
70569964905SLuca Coelho 	bool enabled;
70669964905SLuca Coelho 	int i, n_profiles, ret;
70769964905SLuca Coelho 
708813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
709813df5ceSLuca Coelho 	if (IS_ERR(data))
710813df5ceSLuca Coelho 		return PTR_ERR(data);
71169964905SLuca Coelho 
7122fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
71369964905SLuca Coelho 					 ACPI_EWRD_WIFI_DATA_SIZE);
71469964905SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
71569964905SLuca Coelho 		ret = PTR_ERR(wifi_pkg);
71669964905SLuca Coelho 		goto out_free;
71769964905SLuca Coelho 	}
71869964905SLuca Coelho 
71969964905SLuca Coelho 	if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
72069964905SLuca Coelho 	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
72169964905SLuca Coelho 		ret = -EINVAL;
72269964905SLuca Coelho 		goto out_free;
72369964905SLuca Coelho 	}
72469964905SLuca Coelho 
72569964905SLuca Coelho 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
72669964905SLuca Coelho 	n_profiles = wifi_pkg->package.elements[2].integer.value;
72769964905SLuca Coelho 
7282e1976bbSLuca Coelho 	/*
7292e1976bbSLuca Coelho 	 * Check the validity of n_profiles.  The EWRD profiles start
7302e1976bbSLuca Coelho 	 * from index 1, so the maximum value allowed here is
7312e1976bbSLuca Coelho 	 * ACPI_SAR_PROFILES_NUM - 1.
7322e1976bbSLuca Coelho 	 */
7332e1976bbSLuca Coelho 	if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
734e2ef1476SSharon Dvir 		ret = -EINVAL;
735e2ef1476SSharon Dvir 		goto out_free;
736e2ef1476SSharon Dvir 	}
737e2ef1476SSharon Dvir 
73869964905SLuca Coelho 	for (i = 0; i < n_profiles; i++) {
73969964905SLuca Coelho 		/* the tables start at element 3 */
74069964905SLuca Coelho 		static int pos = 3;
74169964905SLuca Coelho 
74269964905SLuca Coelho 		/* The EWRD profiles officially go from 2 to 4, but we
74369964905SLuca Coelho 		 * save them in sar_profiles[1-3] (because we don't
74469964905SLuca Coelho 		 * have profile 0).  So in the array we start from 1.
74569964905SLuca Coelho 		 */
74669964905SLuca Coelho 		ret = iwl_mvm_sar_set_profile(mvm,
74769964905SLuca Coelho 					      &wifi_pkg->package.elements[pos],
74869964905SLuca Coelho 					      &mvm->sar_profiles[i + 1],
74969964905SLuca Coelho 					      enabled);
75069964905SLuca Coelho 		if (ret < 0)
75169964905SLuca Coelho 			break;
75269964905SLuca Coelho 
75369964905SLuca Coelho 		/* go to the next table */
754e7a3b8d8SLuca Coelho 		pos += ACPI_SAR_TABLE_SIZE;
75569964905SLuca Coelho 	}
75669964905SLuca Coelho 
75769964905SLuca Coelho out_free:
758813df5ceSLuca Coelho 	kfree(data);
75969964905SLuca Coelho 	return ret;
76069964905SLuca Coelho }
76169964905SLuca Coelho 
7627fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
763a6bff3cbSHaim Dreyfuss {
764813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
7657fe90e0eSHaim Dreyfuss 	int i, j, ret;
7667fe90e0eSHaim Dreyfuss 	int idx = 1;
767a6bff3cbSHaim Dreyfuss 
768813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
769813df5ceSLuca Coelho 	if (IS_ERR(data))
770813df5ceSLuca Coelho 		return PTR_ERR(data);
771a6bff3cbSHaim Dreyfuss 
7722fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
773a6bff3cbSHaim Dreyfuss 					 ACPI_WGDS_WIFI_DATA_SIZE);
774a6bff3cbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
775a6bff3cbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
776a6bff3cbSHaim Dreyfuss 		goto out_free;
777a6bff3cbSHaim Dreyfuss 	}
778a6bff3cbSHaim Dreyfuss 
779e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
780e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
781a6bff3cbSHaim Dreyfuss 			union acpi_object *entry;
782a6bff3cbSHaim Dreyfuss 
7837fe90e0eSHaim Dreyfuss 			entry = &wifi_pkg->package.elements[idx++];
784a6bff3cbSHaim Dreyfuss 			if ((entry->type != ACPI_TYPE_INTEGER) ||
785aae9d563SChristophe Jaillet 			    (entry->integer.value > U8_MAX)) {
786aae9d563SChristophe Jaillet 				ret = -EINVAL;
787aae9d563SChristophe Jaillet 				goto out_free;
788aae9d563SChristophe Jaillet 			}
789a6bff3cbSHaim Dreyfuss 
7907fe90e0eSHaim Dreyfuss 			mvm->geo_profiles[i].values[j] = entry->integer.value;
7917fe90e0eSHaim Dreyfuss 		}
792a6bff3cbSHaim Dreyfuss 	}
793a6bff3cbSHaim Dreyfuss 	ret = 0;
794a6bff3cbSHaim Dreyfuss out_free:
795813df5ceSLuca Coelho 	kfree(data);
796a6bff3cbSHaim Dreyfuss 	return ret;
797a6bff3cbSHaim Dreyfuss }
798a6bff3cbSHaim Dreyfuss 
79942ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
800da2830acSLuca Coelho {
8010791c2fcSHaim Dreyfuss 	union {
8020791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd v5;
8030791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd_v4 v4;
8040791c2fcSHaim Dreyfuss 	} cmd;
80542ce76d6SLuca Coelho 	int i, j, idx;
806e7a3b8d8SLuca Coelho 	int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
8070791c2fcSHaim Dreyfuss 	int len;
808da2830acSLuca Coelho 
809e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
810e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
811e7a3b8d8SLuca Coelho 		     ACPI_SAR_TABLE_SIZE);
81242ce76d6SLuca Coelho 
8130791c2fcSHaim Dreyfuss 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
8140791c2fcSHaim Dreyfuss 
8150791c2fcSHaim Dreyfuss 	if (fw_has_api(&mvm->fw->ucode_capa,
8160791c2fcSHaim Dreyfuss 		       IWL_UCODE_TLV_API_REDUCE_TX_POWER))
8170791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
8180791c2fcSHaim Dreyfuss 	else if (fw_has_capa(&mvm->fw->ucode_capa,
8190791c2fcSHaim Dreyfuss 			     IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
8200791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4);
8210791c2fcSHaim Dreyfuss 	else
8220791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4.v3);
82355bfa4b9SLuca Coelho 
824e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
82542ce76d6SLuca Coelho 		struct iwl_mvm_sar_profile *prof;
82642ce76d6SLuca Coelho 
82742ce76d6SLuca Coelho 		/* don't allow SAR to be disabled (profile 0 means disable) */
82842ce76d6SLuca Coelho 		if (profs[i] == 0)
82942ce76d6SLuca Coelho 			return -EPERM;
83042ce76d6SLuca Coelho 
831e7a3b8d8SLuca Coelho 		/* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
832e7a3b8d8SLuca Coelho 		if (profs[i] > ACPI_SAR_PROFILE_NUM)
83342ce76d6SLuca Coelho 			return -EINVAL;
83442ce76d6SLuca Coelho 
83542ce76d6SLuca Coelho 		/* profiles go from 1 to 4, so decrement to access the array */
83642ce76d6SLuca Coelho 		prof = &mvm->sar_profiles[profs[i] - 1];
83742ce76d6SLuca Coelho 
83842ce76d6SLuca Coelho 		/* if the profile is disabled, do nothing */
83942ce76d6SLuca Coelho 		if (!prof->enabled) {
84042ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
84142ce76d6SLuca Coelho 					profs[i]);
84242ce76d6SLuca Coelho 			/* if one of the profiles is disabled, we fail all */
84342ce76d6SLuca Coelho 			return -ENOENT;
84442ce76d6SLuca Coelho 		}
84542ce76d6SLuca Coelho 
84642ce76d6SLuca Coelho 		IWL_DEBUG_RADIO(mvm, "  Chain[%d]:\n", i);
847e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
848e7a3b8d8SLuca Coelho 			idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
8490791c2fcSHaim Dreyfuss 			cmd.v5.v3.per_chain_restriction[i][j] =
85042ce76d6SLuca Coelho 				cpu_to_le16(prof->table[idx]);
85142ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "    Band[%d] = %d * .125dBm\n",
85242ce76d6SLuca Coelho 					j, prof->table[idx]);
85342ce76d6SLuca Coelho 		}
85442ce76d6SLuca Coelho 	}
85542ce76d6SLuca Coelho 
85642ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
85742ce76d6SLuca Coelho 
85842ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
85942ce76d6SLuca Coelho }
86042ce76d6SLuca Coelho 
8617fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
8627fe90e0eSHaim Dreyfuss {
8637fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_resp *resp;
8647fe90e0eSHaim Dreyfuss 	int ret;
8657fe90e0eSHaim Dreyfuss 
8667fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
8677fe90e0eSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
8687fe90e0eSHaim Dreyfuss 	};
8697fe90e0eSHaim Dreyfuss 	struct iwl_host_cmd cmd = {
8707fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
8717fe90e0eSHaim Dreyfuss 		.len = { sizeof(geo_cmd), },
8727fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
8737fe90e0eSHaim Dreyfuss 		.data = { &geo_cmd },
8747fe90e0eSHaim Dreyfuss 	};
8757fe90e0eSHaim Dreyfuss 
8767fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8777fe90e0eSHaim Dreyfuss 	if (ret) {
8787fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8797fe90e0eSHaim Dreyfuss 		return ret;
8807fe90e0eSHaim Dreyfuss 	}
8817fe90e0eSHaim Dreyfuss 
8827fe90e0eSHaim Dreyfuss 	resp = (void *)cmd.resp_pkt->data;
8837fe90e0eSHaim Dreyfuss 	ret = le32_to_cpu(resp->profile_idx);
884e7a3b8d8SLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
8857fe90e0eSHaim Dreyfuss 		ret = -EIO;
8867fe90e0eSHaim Dreyfuss 		IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
8877fe90e0eSHaim Dreyfuss 	}
8887fe90e0eSHaim Dreyfuss 
8897fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8907fe90e0eSHaim Dreyfuss 	return ret;
8917fe90e0eSHaim Dreyfuss }
8927fe90e0eSHaim Dreyfuss 
893a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
894a6bff3cbSHaim Dreyfuss {
895a6bff3cbSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd cmd = {
896a6bff3cbSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
897a6bff3cbSHaim Dreyfuss 	};
8987fe90e0eSHaim Dreyfuss 	int ret, i, j;
899a6bff3cbSHaim Dreyfuss 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
900a6bff3cbSHaim Dreyfuss 
901eca1e56cSEmmanuel Grumbach 	/*
902eca1e56cSEmmanuel Grumbach 	 * This command is not supported on earlier firmware versions.
903eca1e56cSEmmanuel Grumbach 	 * Unfortunately, we don't have a TLV API flag to rely on, so
904eca1e56cSEmmanuel Grumbach 	 * rely on the major version which is in the first byte of
905eca1e56cSEmmanuel Grumbach 	 * ucode_ver.
906eca1e56cSEmmanuel Grumbach 	 */
907eca1e56cSEmmanuel Grumbach 	if (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) < 41)
908eca1e56cSEmmanuel Grumbach 		return 0;
909eca1e56cSEmmanuel Grumbach 
9107fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wgds_table(mvm);
911a6bff3cbSHaim Dreyfuss 	if (ret < 0) {
912a6bff3cbSHaim Dreyfuss 		IWL_DEBUG_RADIO(mvm,
913a6bff3cbSHaim Dreyfuss 				"Geo SAR BIOS table invalid or unavailable. (%d)\n",
914a6bff3cbSHaim Dreyfuss 				ret);
915a6bff3cbSHaim Dreyfuss 		/* we don't fail if the table is not available */
916a6bff3cbSHaim Dreyfuss 		return 0;
917a6bff3cbSHaim Dreyfuss 	}
918a6bff3cbSHaim Dreyfuss 
919a6bff3cbSHaim Dreyfuss 	IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
920a6bff3cbSHaim Dreyfuss 
921e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
92266e83903SMatt Chen 		     ACPI_WGDS_TABLE_SIZE + 1 !=  ACPI_WGDS_WIFI_DATA_SIZE);
923a6bff3cbSHaim Dreyfuss 
924e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
925e7a3b8d8SLuca Coelho 
926e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
927a6bff3cbSHaim Dreyfuss 		struct iwl_per_chain_offset *chain =
928a6bff3cbSHaim Dreyfuss 			(struct iwl_per_chain_offset *)&cmd.table[i];
929a6bff3cbSHaim Dreyfuss 
930a6bff3cbSHaim Dreyfuss 		for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
931a6bff3cbSHaim Dreyfuss 			u8 *value;
932a6bff3cbSHaim Dreyfuss 
9337fe90e0eSHaim Dreyfuss 			value = &mvm->geo_profiles[i].values[j *
934e7a3b8d8SLuca Coelho 				ACPI_GEO_PER_CHAIN_SIZE];
935a6bff3cbSHaim Dreyfuss 			chain[j].max_tx_power = cpu_to_le16(value[0]);
936a6bff3cbSHaim Dreyfuss 			chain[j].chain_a = value[1];
937a6bff3cbSHaim Dreyfuss 			chain[j].chain_b = value[2];
938a6bff3cbSHaim Dreyfuss 			IWL_DEBUG_RADIO(mvm,
939a6bff3cbSHaim Dreyfuss 					"SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
940a6bff3cbSHaim Dreyfuss 					i, j, value[1], value[2], value[0]);
941a6bff3cbSHaim Dreyfuss 		}
942a6bff3cbSHaim Dreyfuss 	}
943a6bff3cbSHaim Dreyfuss 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
944a6bff3cbSHaim Dreyfuss }
945a6bff3cbSHaim Dreyfuss 
94669964905SLuca Coelho #else /* CONFIG_ACPI */
94769964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
94869964905SLuca Coelho {
94969964905SLuca Coelho 	return -ENOENT;
95069964905SLuca Coelho }
95169964905SLuca Coelho 
95269964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
95369964905SLuca Coelho {
95469964905SLuca Coelho 	return -ENOENT;
95569964905SLuca Coelho }
956a6bff3cbSHaim Dreyfuss 
9575d041c46SLuca Coelho static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
9585d041c46SLuca Coelho {
9595d041c46SLuca Coelho 	return -ENOENT;
9605d041c46SLuca Coelho }
9615d041c46SLuca Coelho 
962a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
963a6bff3cbSHaim Dreyfuss {
964a6bff3cbSHaim Dreyfuss 	return 0;
965a6bff3cbSHaim Dreyfuss }
96618f1755dSLuca Coelho 
96718f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
96818f1755dSLuca Coelho 			       int prof_b)
96918f1755dSLuca Coelho {
97018f1755dSLuca Coelho 	return -ENOENT;
97118f1755dSLuca Coelho }
97218f1755dSLuca Coelho 
97318f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
97418f1755dSLuca Coelho {
97518f1755dSLuca Coelho 	return -ENOENT;
97618f1755dSLuca Coelho }
97769964905SLuca Coelho #endif /* CONFIG_ACPI */
97869964905SLuca Coelho 
979f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
980f130bb75SMordechay Goodstein {
981f130bb75SMordechay Goodstein 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
982f130bb75SMordechay Goodstein 	int ret;
983f130bb75SMordechay Goodstein 	u32 resp;
984f130bb75SMordechay Goodstein 
985f130bb75SMordechay Goodstein 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
986f130bb75SMordechay Goodstein 		.flags = cpu_to_le32(flags),
987f130bb75SMordechay Goodstein 		.buf_size = 0,
988f130bb75SMordechay Goodstein 	};
989f130bb75SMordechay Goodstein 	struct iwl_host_cmd host_cmd = {
990f130bb75SMordechay Goodstein 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
991f130bb75SMordechay Goodstein 		.flags = CMD_WANT_SKB,
992f130bb75SMordechay Goodstein 		.data = {&recovery_cmd, },
993f130bb75SMordechay Goodstein 		.len = {sizeof(recovery_cmd), },
994f130bb75SMordechay Goodstein 	};
995f130bb75SMordechay Goodstein 
996f130bb75SMordechay Goodstein 	/* no error log was defined in TLV */
997f130bb75SMordechay Goodstein 	if (!error_log_size)
998f130bb75SMordechay Goodstein 		return;
999f130bb75SMordechay Goodstein 
1000f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1001f130bb75SMordechay Goodstein 		/* no buf was allocated while HW reset */
1002f130bb75SMordechay Goodstein 		if (!mvm->error_recovery_buf)
1003f130bb75SMordechay Goodstein 			return;
1004f130bb75SMordechay Goodstein 
1005f130bb75SMordechay Goodstein 		host_cmd.data[1] = mvm->error_recovery_buf;
1006f130bb75SMordechay Goodstein 		host_cmd.len[1] =  error_log_size;
1007f130bb75SMordechay Goodstein 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1008f130bb75SMordechay Goodstein 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1009f130bb75SMordechay Goodstein 	}
1010f130bb75SMordechay Goodstein 
1011f130bb75SMordechay Goodstein 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1012f130bb75SMordechay Goodstein 	kfree(mvm->error_recovery_buf);
1013f130bb75SMordechay Goodstein 	mvm->error_recovery_buf = NULL;
1014f130bb75SMordechay Goodstein 
1015f130bb75SMordechay Goodstein 	if (ret) {
1016f130bb75SMordechay Goodstein 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1017f130bb75SMordechay Goodstein 		return;
1018f130bb75SMordechay Goodstein 	}
1019f130bb75SMordechay Goodstein 
1020f130bb75SMordechay Goodstein 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1021f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1022f130bb75SMordechay Goodstein 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1023f130bb75SMordechay Goodstein 		if (resp)
1024f130bb75SMordechay Goodstein 			IWL_ERR(mvm,
1025f130bb75SMordechay Goodstein 				"Failed to send recovery cmd blob was invalid %d\n",
1026f130bb75SMordechay Goodstein 				resp);
1027f130bb75SMordechay Goodstein 	}
1028f130bb75SMordechay Goodstein }
1029f130bb75SMordechay Goodstein 
103042ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
103142ce76d6SLuca Coelho {
103242ce76d6SLuca Coelho 	int ret;
103342ce76d6SLuca Coelho 
1034c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wrds_table(mvm);
1035da2830acSLuca Coelho 	if (ret < 0) {
1036da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
103769964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1038da2830acSLuca Coelho 				ret);
10395d041c46SLuca Coelho 		/*
10405d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
10415d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
10425d041c46SLuca Coelho 		 */
10435d041c46SLuca Coelho 		return 1;
1044da2830acSLuca Coelho 	}
1045da2830acSLuca Coelho 
104669964905SLuca Coelho 	ret = iwl_mvm_sar_get_ewrd_table(mvm);
104769964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
104869964905SLuca Coelho 	if (ret < 0)
104969964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
105069964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
105169964905SLuca Coelho 				ret);
105269964905SLuca Coelho 
105342ce76d6SLuca Coelho 	/* choose profile 1 (WRDS) as default for both chains */
105442ce76d6SLuca Coelho 	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
105542ce76d6SLuca Coelho 
10565d041c46SLuca Coelho 	/*
10575d041c46SLuca Coelho 	 * If we don't have profile 0 from BIOS, just skip it.  This
10585d041c46SLuca Coelho 	 * means that SAR Geo will not be enabled either, even if we
10595d041c46SLuca Coelho 	 * have other valid profiles.
10605d041c46SLuca Coelho 	 */
106142ce76d6SLuca Coelho 	if (ret == -ENOENT)
10625d041c46SLuca Coelho 		return 1;
1063da2830acSLuca Coelho 
1064da2830acSLuca Coelho 	return ret;
1065da2830acSLuca Coelho }
1066da2830acSLuca Coelho 
10671f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
10681f370650SSara Sharon {
10691f370650SSara Sharon 	int ret;
10701f370650SSara Sharon 
10717d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
10721f370650SSara Sharon 		return iwl_run_unified_mvm_ucode(mvm, false);
10731f370650SSara Sharon 
10741f370650SSara Sharon 	ret = iwl_run_init_mvm_ucode(mvm, false);
10751f370650SSara Sharon 
10761f370650SSara Sharon 	if (ret) {
10771f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1078f4744258SLiad Kaufman 
1079f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1080f4744258SLiad Kaufman 			return 0;
10811f370650SSara Sharon 		return ret;
10821f370650SSara Sharon 	}
10831f370650SSara Sharon 
10841f370650SSara Sharon 	/*
10851f370650SSara Sharon 	 * Stop and start the transport without entering low power
10861f370650SSara Sharon 	 * mode. This will save the state of other components on the
10871f370650SSara Sharon 	 * device that are triggered by the INIT firwmare (MFUART).
10881f370650SSara Sharon 	 */
10891f370650SSara Sharon 	_iwl_trans_stop_device(mvm->trans, false);
10901f370650SSara Sharon 	ret = _iwl_trans_start_hw(mvm->trans, false);
10911f370650SSara Sharon 	if (ret)
10921f370650SSara Sharon 		return ret;
10931f370650SSara Sharon 
1094da2eb669SSara Sharon 	iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY);
1095da2eb669SSara Sharon 
10961f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
10971f370650SSara Sharon 	if (ret)
10981f370650SSara Sharon 		return ret;
10991f370650SSara Sharon 
1100da2eb669SSara Sharon 	iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE);
1101da2eb669SSara Sharon 
1102702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
11031f370650SSara Sharon }
11041f370650SSara Sharon 
1105e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1106e705c121SKalle Valo {
1107e705c121SKalle Valo 	int ret, i;
1108e705c121SKalle Valo 	struct ieee80211_channel *chan;
1109e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1110e705c121SKalle Valo 
1111e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1112e705c121SKalle Valo 
1113e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1114e705c121SKalle Valo 	if (ret)
1115e705c121SKalle Valo 		return ret;
1116e705c121SKalle Valo 
11171f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1118e705c121SKalle Valo 	if (ret) {
1119e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1120700b3799SShahar S Matityahu 		iwl_fw_dbg_error_collect(&mvm->fwrt, FW_DBG_TRIGGER_DRIVER);
1121e705c121SKalle Valo 		goto error;
1122e705c121SKalle Valo 	}
1123e705c121SKalle Valo 
1124d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1125e705c121SKalle Valo 
1126e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1127e705c121SKalle Valo 	if (ret)
1128e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1129e705c121SKalle Valo 
11307a14c23dSSara Sharon 	if (!mvm->trans->ini_valid) {
11317174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1132e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
113317b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
11347174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
11357174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
11367a14c23dSSara Sharon 	}
1137e705c121SKalle Valo 
1138e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1139e705c121SKalle Valo 	if (ret)
1140e705c121SKalle Valo 		goto error;
1141e705c121SKalle Valo 
11427d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1143e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1144e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1145e705c121SKalle Valo 		if (ret)
1146e705c121SKalle Valo 			goto error;
1147e705c121SKalle Valo 
1148e705c121SKalle Valo 		ret = iwl_send_phy_cfg_cmd(mvm);
1149e705c121SKalle Valo 		if (ret)
1150e705c121SKalle Valo 			goto error;
11511f370650SSara Sharon 	}
1152e705c121SKalle Valo 
1153b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1154b3de3ef4SEmmanuel Grumbach 	if (ret)
1155b3de3ef4SEmmanuel Grumbach 		goto error;
1156b3de3ef4SEmmanuel Grumbach 
115743413a97SSara Sharon 	/* Init RSS configuration */
11588edbfaa1SSara Sharon 	if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
11598edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
11608edbfaa1SSara Sharon 		if (ret) {
11618edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
11628edbfaa1SSara Sharon 				ret);
11638edbfaa1SSara Sharon 			goto error;
11648edbfaa1SSara Sharon 		}
11658edbfaa1SSara Sharon 	}
11668edbfaa1SSara Sharon 
11678edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
116843413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
116943413a97SSara Sharon 		if (ret) {
117043413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
117143413a97SSara Sharon 				ret);
117243413a97SSara Sharon 			goto error;
117343413a97SSara Sharon 		}
117443413a97SSara Sharon 	}
117543413a97SSara Sharon 
1176e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
11770ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1178e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1179e705c121SKalle Valo 
11800ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1181e705c121SKalle Valo 
1182e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1183e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1184e705c121SKalle Valo 
118597d5be7eSLiad Kaufman 	ret = iwl_mvm_send_dqa_cmd(mvm);
118697d5be7eSLiad Kaufman 	if (ret)
118797d5be7eSLiad Kaufman 		goto error;
118897d5be7eSLiad Kaufman 
1189e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1190e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1191e705c121SKalle Valo 	if (ret)
1192e705c121SKalle Valo 		goto error;
1193e705c121SKalle Valo 
1194e705c121SKalle Valo 	/* Add all the PHY contexts */
119557fbcce3SJohannes Berg 	chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1196e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1197e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1198e705c121SKalle Valo 		/*
1199e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1200e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1201e705c121SKalle Valo 		 * For now use the first channel we have.
1202e705c121SKalle Valo 		 */
1203e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1204e705c121SKalle Valo 					   &chandef, 1, 1);
1205e705c121SKalle Valo 		if (ret)
1206e705c121SKalle Valo 			goto error;
1207e705c121SKalle Valo 	}
1208e705c121SKalle Valo 
1209c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL
1210c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1211c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1212c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1213c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1214c221daf2SChaya Rachel Ivgi 		 */
1215c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1216c221daf2SChaya Rachel Ivgi 	} else {
1217e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1218e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1219c221daf2SChaya Rachel Ivgi 	}
12205c89e7bcSChaya Rachel Ivgi 
12215c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1222944eafc2SChaya Rachel Ivgi 
1223944eafc2SChaya Rachel Ivgi 	/*
1224944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1225944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1226944eafc2SChaya Rachel Ivgi 	 */
1227944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
12285c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
12295c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
123075cfe338SLuca Coelho 		if (ret)
123175cfe338SLuca Coelho 			goto error;
123275cfe338SLuca Coelho 	}
1233c221daf2SChaya Rachel Ivgi #else
1234c221daf2SChaya Rachel Ivgi 	/* Initialize tx backoffs to the minimal possible */
1235c221daf2SChaya Rachel Ivgi 	iwl_mvm_tt_tx_backoff(mvm, 0);
1236c221daf2SChaya Rachel Ivgi #endif
1237e705c121SKalle Valo 
1238e705c121SKalle Valo 	WARN_ON(iwl_mvm_config_ltr(mvm));
1239e705c121SKalle Valo 
1240e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1241e705c121SKalle Valo 	if (ret)
1242e705c121SKalle Valo 		goto error;
1243e705c121SKalle Valo 
1244e705c121SKalle Valo 	/*
1245e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1246e705c121SKalle Valo 	 * anyway, so don't init MCC.
1247e705c121SKalle Valo 	 */
1248e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1249e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1250e705c121SKalle Valo 		if (ret)
1251e705c121SKalle Valo 			goto error;
1252e705c121SKalle Valo 	}
1253e705c121SKalle Valo 
1254e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
12554ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1256b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1257e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1258e705c121SKalle Valo 		if (ret)
1259e705c121SKalle Valo 			goto error;
1260e705c121SKalle Valo 	}
1261e705c121SKalle Valo 
1262e705c121SKalle Valo 	/* allow FW/transport low power modes if not during restart */
1263e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1264e705c121SKalle Valo 		iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1265e705c121SKalle Valo 
1266f130bb75SMordechay Goodstein 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1267f130bb75SMordechay Goodstein 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1268f130bb75SMordechay Goodstein 
1269da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
12705d041c46SLuca Coelho 	if (ret == 0) {
1271a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
12725d041c46SLuca Coelho 	} else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
12735d041c46SLuca Coelho 		/*
12745d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
12755d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
12765d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
12775d041c46SLuca Coelho 		 * Geo without basic SAR.
12785d041c46SLuca Coelho 		 */
12795d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
12805d041c46SLuca Coelho 	}
12815d041c46SLuca Coelho 
12825d041c46SLuca Coelho 	if (ret < 0)
1283a6bff3cbSHaim Dreyfuss 		goto error;
1284a6bff3cbSHaim Dreyfuss 
12857089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
12867089ae63SJohannes Berg 
1287e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1288e705c121SKalle Valo 	return 0;
1289e705c121SKalle Valo  error:
1290f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1291fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1292e705c121SKalle Valo 	return ret;
1293e705c121SKalle Valo }
1294e705c121SKalle Valo 
1295e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1296e705c121SKalle Valo {
1297e705c121SKalle Valo 	int ret, i;
1298e705c121SKalle Valo 
1299e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1300e705c121SKalle Valo 
1301e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1302e705c121SKalle Valo 	if (ret)
1303e705c121SKalle Valo 		return ret;
1304e705c121SKalle Valo 
1305e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1306e705c121SKalle Valo 	if (ret) {
1307e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1308e705c121SKalle Valo 		goto error;
1309e705c121SKalle Valo 	}
1310e705c121SKalle Valo 
1311e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1312e705c121SKalle Valo 	if (ret)
1313e705c121SKalle Valo 		goto error;
1314e705c121SKalle Valo 
1315e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1316e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1317e705c121SKalle Valo 	if (ret)
1318e705c121SKalle Valo 		goto error;
1319e705c121SKalle Valo 
1320e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1321e705c121SKalle Valo 	if (ret)
1322e705c121SKalle Valo 		goto error;
1323e705c121SKalle Valo 
1324e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
13250ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1326e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1327e705c121SKalle Valo 
1328e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1329e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1330e705c121SKalle Valo 	if (ret)
1331e705c121SKalle Valo 		goto error;
1332e705c121SKalle Valo 
1333e705c121SKalle Valo 	return 0;
1334e705c121SKalle Valo  error:
1335fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1336e705c121SKalle Valo 	return ret;
1337e705c121SKalle Valo }
1338e705c121SKalle Valo 
1339e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1340e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1341e705c121SKalle Valo {
1342e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1343e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1344e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1345e705c121SKalle Valo 
1346e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1347e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1348e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1349e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1350e705c121SKalle Valo 			  "Reached" : "Not reached");
1351e705c121SKalle Valo }
1352e705c121SKalle Valo 
1353e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1354e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1355e705c121SKalle Valo {
1356e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1357e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1358e705c121SKalle Valo 
1359e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1360e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1361e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1362e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1363e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1364e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
13650c8d0a47SGolan Ben-Ami 
13660c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
13670c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
13680c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
13690c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1370e705c121SKalle Valo }
1371