1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10e705c121SKalle Valo * 11e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 12e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 13e705c121SKalle Valo * published by the Free Software Foundation. 14e705c121SKalle Valo * 15e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 16e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 17e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18e705c121SKalle Valo * General Public License for more details. 19e705c121SKalle Valo * 20e705c121SKalle Valo * You should have received a copy of the GNU General Public License 21e705c121SKalle Valo * along with this program; if not, write to the Free Software 22e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 23e705c121SKalle Valo * USA 24e705c121SKalle Valo * 25e705c121SKalle Valo * The full GNU General Public License is included in this distribution 26e705c121SKalle Valo * in the file called COPYING. 27e705c121SKalle Valo * 28e705c121SKalle Valo * Contact Information: 29e705c121SKalle Valo * Intel Linux Wireless <ilw@linux.intel.com> 30e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 31e705c121SKalle Valo * 32e705c121SKalle Valo * BSD LICENSE 33e705c121SKalle Valo * 34e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 35e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 36e705c121SKalle Valo * All rights reserved. 37e705c121SKalle Valo * 38e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 39e705c121SKalle Valo * modification, are permitted provided that the following conditions 40e705c121SKalle Valo * are met: 41e705c121SKalle Valo * 42e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 43e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 44e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 45e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 46e705c121SKalle Valo * the documentation and/or other materials provided with the 47e705c121SKalle Valo * distribution. 48e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 49e705c121SKalle Valo * contributors may be used to endorse or promote products derived 50e705c121SKalle Valo * from this software without specific prior written permission. 51e705c121SKalle Valo * 52e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 53e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 54e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 55e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 56e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 58e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 62e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63e705c121SKalle Valo * 64e705c121SKalle Valo *****************************************************************************/ 65e705c121SKalle Valo #include <net/mac80211.h> 66e705c121SKalle Valo 67e705c121SKalle Valo #include "iwl-trans.h" 68e705c121SKalle Valo #include "iwl-op-mode.h" 69e705c121SKalle Valo #include "iwl-fw.h" 70e705c121SKalle Valo #include "iwl-debug.h" 71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 73e705c121SKalle Valo #include "iwl-prph.h" 74e705c121SKalle Valo #include "iwl-eeprom-parse.h" 75e705c121SKalle Valo 76e705c121SKalle Valo #include "mvm.h" 77e705c121SKalle Valo #include "iwl-phy-db.h" 78e705c121SKalle Valo 79e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 80e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 81e705c121SKalle Valo 82e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 83e705c121SKalle Valo 84e705c121SKalle Valo struct iwl_mvm_alive_data { 85e705c121SKalle Valo bool valid; 86e705c121SKalle Valo u32 scd_base_addr; 87e705c121SKalle Valo }; 88e705c121SKalle Valo 89e705c121SKalle Valo static inline const struct fw_img * 90e705c121SKalle Valo iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type) 91e705c121SKalle Valo { 92e705c121SKalle Valo if (ucode_type >= IWL_UCODE_TYPE_MAX) 93e705c121SKalle Valo return NULL; 94e705c121SKalle Valo 95e705c121SKalle Valo return &mvm->fw->img[ucode_type]; 96e705c121SKalle Valo } 97e705c121SKalle Valo 98e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 99e705c121SKalle Valo { 100e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 101e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 102e705c121SKalle Valo }; 103e705c121SKalle Valo 104e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 105e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 106e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 107e705c121SKalle Valo } 108e705c121SKalle Valo 109e705c121SKalle Valo static void iwl_free_fw_paging(struct iwl_mvm *mvm) 110e705c121SKalle Valo { 111e705c121SKalle Valo int i; 112e705c121SKalle Valo 113e705c121SKalle Valo if (!mvm->fw_paging_db[0].fw_paging_block) 114e705c121SKalle Valo return; 115e705c121SKalle Valo 116e705c121SKalle Valo for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) { 117e705c121SKalle Valo if (!mvm->fw_paging_db[i].fw_paging_block) { 118e705c121SKalle Valo IWL_DEBUG_FW(mvm, 119e705c121SKalle Valo "Paging: block %d already freed, continue to next page\n", 120e705c121SKalle Valo i); 121e705c121SKalle Valo 122e705c121SKalle Valo continue; 123e705c121SKalle Valo } 124e705c121SKalle Valo 125e705c121SKalle Valo __free_pages(mvm->fw_paging_db[i].fw_paging_block, 126e705c121SKalle Valo get_order(mvm->fw_paging_db[i].fw_paging_size)); 127e705c121SKalle Valo } 128e705c121SKalle Valo kfree(mvm->trans->paging_download_buf); 129e705c121SKalle Valo memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db)); 130e705c121SKalle Valo } 131e705c121SKalle Valo 132e705c121SKalle Valo static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image) 133e705c121SKalle Valo { 134e705c121SKalle Valo int sec_idx, idx; 135e705c121SKalle Valo u32 offset = 0; 136e705c121SKalle Valo 137e705c121SKalle Valo /* 138e705c121SKalle Valo * find where is the paging image start point: 139e705c121SKalle Valo * if CPU2 exist and it's in paging format, then the image looks like: 140e705c121SKalle Valo * CPU1 sections (2 or more) 141e705c121SKalle Valo * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2 142e705c121SKalle Valo * CPU2 sections (not paged) 143e705c121SKalle Valo * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2 144e705c121SKalle Valo * non paged to CPU2 paging sec 145e705c121SKalle Valo * CPU2 paging CSS 146e705c121SKalle Valo * CPU2 paging image (including instruction and data) 147e705c121SKalle Valo */ 148e705c121SKalle Valo for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) { 149e705c121SKalle Valo if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) { 150e705c121SKalle Valo sec_idx++; 151e705c121SKalle Valo break; 152e705c121SKalle Valo } 153e705c121SKalle Valo } 154e705c121SKalle Valo 155e705c121SKalle Valo if (sec_idx >= IWL_UCODE_SECTION_MAX) { 156e705c121SKalle Valo IWL_ERR(mvm, "driver didn't find paging image\n"); 157e705c121SKalle Valo iwl_free_fw_paging(mvm); 158e705c121SKalle Valo return -EINVAL; 159e705c121SKalle Valo } 160e705c121SKalle Valo 161e705c121SKalle Valo /* copy the CSS block to the dram */ 162e705c121SKalle Valo IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n", 163e705c121SKalle Valo sec_idx); 164e705c121SKalle Valo 165e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block), 166e705c121SKalle Valo image->sec[sec_idx].data, 167e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 168e705c121SKalle Valo 169e705c121SKalle Valo IWL_DEBUG_FW(mvm, 170e705c121SKalle Valo "Paging: copied %d CSS bytes to first block\n", 171e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 172e705c121SKalle Valo 173e705c121SKalle Valo sec_idx++; 174e705c121SKalle Valo 175e705c121SKalle Valo /* 176e705c121SKalle Valo * copy the paging blocks to the dram 177e705c121SKalle Valo * loop index start from 1 since that CSS block already copied to dram 178e705c121SKalle Valo * and CSS index is 0. 179e705c121SKalle Valo * loop stop at num_of_paging_blk since that last block is not full. 180e705c121SKalle Valo */ 181e705c121SKalle Valo for (idx = 1; idx < mvm->num_of_paging_blk; idx++) { 182e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 183e705c121SKalle Valo image->sec[sec_idx].data + offset, 184e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size); 185e705c121SKalle Valo 186e705c121SKalle Valo IWL_DEBUG_FW(mvm, 187e705c121SKalle Valo "Paging: copied %d paging bytes to block %d\n", 188e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size, 189e705c121SKalle Valo idx); 190e705c121SKalle Valo 191e705c121SKalle Valo offset += mvm->fw_paging_db[idx].fw_paging_size; 192e705c121SKalle Valo } 193e705c121SKalle Valo 194e705c121SKalle Valo /* copy the last paging block */ 195e705c121SKalle Valo if (mvm->num_of_pages_in_last_blk > 0) { 196e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 197e705c121SKalle Valo image->sec[sec_idx].data + offset, 198e705c121SKalle Valo FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk); 199e705c121SKalle Valo 200e705c121SKalle Valo IWL_DEBUG_FW(mvm, 201e705c121SKalle Valo "Paging: copied %d pages in the last block %d\n", 202e705c121SKalle Valo mvm->num_of_pages_in_last_blk, idx); 203e705c121SKalle Valo } 204e705c121SKalle Valo 205e705c121SKalle Valo return 0; 206e705c121SKalle Valo } 207e705c121SKalle Valo 208e705c121SKalle Valo static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm, 209e705c121SKalle Valo const struct fw_img *image) 210e705c121SKalle Valo { 211e705c121SKalle Valo struct page *block; 212e705c121SKalle Valo dma_addr_t phys = 0; 213e705c121SKalle Valo int blk_idx = 0; 214e705c121SKalle Valo int order, num_of_pages; 215e705c121SKalle Valo int dma_enabled; 216e705c121SKalle Valo 217e705c121SKalle Valo if (mvm->fw_paging_db[0].fw_paging_block) 218e705c121SKalle Valo return 0; 219e705c121SKalle Valo 220e705c121SKalle Valo dma_enabled = is_device_dma_capable(mvm->trans->dev); 221e705c121SKalle Valo 222e705c121SKalle Valo /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */ 223e705c121SKalle Valo BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE); 224e705c121SKalle Valo 225e705c121SKalle Valo num_of_pages = image->paging_mem_size / FW_PAGING_SIZE; 226e705c121SKalle Valo mvm->num_of_paging_blk = ((num_of_pages - 1) / 227e705c121SKalle Valo NUM_OF_PAGE_PER_GROUP) + 1; 228e705c121SKalle Valo 229e705c121SKalle Valo mvm->num_of_pages_in_last_blk = 230e705c121SKalle Valo num_of_pages - 231e705c121SKalle Valo NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1); 232e705c121SKalle Valo 233e705c121SKalle Valo IWL_DEBUG_FW(mvm, 234e705c121SKalle Valo "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n", 235e705c121SKalle Valo mvm->num_of_paging_blk, 236e705c121SKalle Valo mvm->num_of_pages_in_last_blk); 237e705c121SKalle Valo 238e705c121SKalle Valo /* allocate block of 4Kbytes for paging CSS */ 239e705c121SKalle Valo order = get_order(FW_PAGING_SIZE); 240e705c121SKalle Valo block = alloc_pages(GFP_KERNEL, order); 241e705c121SKalle Valo if (!block) { 242e705c121SKalle Valo /* free all the previous pages since we failed */ 243e705c121SKalle Valo iwl_free_fw_paging(mvm); 244e705c121SKalle Valo return -ENOMEM; 245e705c121SKalle Valo } 246e705c121SKalle Valo 247e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_block = block; 248e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE; 249e705c121SKalle Valo 250e705c121SKalle Valo if (dma_enabled) { 251e705c121SKalle Valo phys = dma_map_page(mvm->trans->dev, block, 0, 252e705c121SKalle Valo PAGE_SIZE << order, DMA_BIDIRECTIONAL); 253e705c121SKalle Valo if (dma_mapping_error(mvm->trans->dev, phys)) { 254e705c121SKalle Valo /* 255e705c121SKalle Valo * free the previous pages and the current one since 256e705c121SKalle Valo * we failed to map_page. 257e705c121SKalle Valo */ 258e705c121SKalle Valo iwl_free_fw_paging(mvm); 259e705c121SKalle Valo return -ENOMEM; 260e705c121SKalle Valo } 261e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; 262e705c121SKalle Valo } else { 263e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG | 264e705c121SKalle Valo blk_idx << BLOCK_2_EXP_SIZE; 265e705c121SKalle Valo } 266e705c121SKalle Valo 267e705c121SKalle Valo IWL_DEBUG_FW(mvm, 268e705c121SKalle Valo "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n", 269e705c121SKalle Valo order); 270e705c121SKalle Valo 271e705c121SKalle Valo /* 272e705c121SKalle Valo * allocate blocks in dram. 273e705c121SKalle Valo * since that CSS allocated in fw_paging_db[0] loop start from index 1 274e705c121SKalle Valo */ 275e705c121SKalle Valo for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 276e705c121SKalle Valo /* allocate block of PAGING_BLOCK_SIZE (32K) */ 277e705c121SKalle Valo order = get_order(PAGING_BLOCK_SIZE); 278e705c121SKalle Valo block = alloc_pages(GFP_KERNEL, order); 279e705c121SKalle Valo if (!block) { 280e705c121SKalle Valo /* free all the previous pages since we failed */ 281e705c121SKalle Valo iwl_free_fw_paging(mvm); 282e705c121SKalle Valo return -ENOMEM; 283e705c121SKalle Valo } 284e705c121SKalle Valo 285e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_block = block; 286e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE; 287e705c121SKalle Valo 288e705c121SKalle Valo if (dma_enabled) { 289e705c121SKalle Valo phys = dma_map_page(mvm->trans->dev, block, 0, 290e705c121SKalle Valo PAGE_SIZE << order, 291e705c121SKalle Valo DMA_BIDIRECTIONAL); 292e705c121SKalle Valo if (dma_mapping_error(mvm->trans->dev, phys)) { 293e705c121SKalle Valo /* 294e705c121SKalle Valo * free the previous pages and the current one 295e705c121SKalle Valo * since we failed to map_page. 296e705c121SKalle Valo */ 297e705c121SKalle Valo iwl_free_fw_paging(mvm); 298e705c121SKalle Valo return -ENOMEM; 299e705c121SKalle Valo } 300e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; 301e705c121SKalle Valo } else { 302e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = 303e705c121SKalle Valo PAGING_ADDR_SIG | 304e705c121SKalle Valo blk_idx << BLOCK_2_EXP_SIZE; 305e705c121SKalle Valo } 306e705c121SKalle Valo 307e705c121SKalle Valo IWL_DEBUG_FW(mvm, 308e705c121SKalle Valo "Paging: allocated 32K bytes (order %d) for firmware paging.\n", 309e705c121SKalle Valo order); 310e705c121SKalle Valo } 311e705c121SKalle Valo 312e705c121SKalle Valo return 0; 313e705c121SKalle Valo } 314e705c121SKalle Valo 315e705c121SKalle Valo static int iwl_save_fw_paging(struct iwl_mvm *mvm, 316e705c121SKalle Valo const struct fw_img *fw) 317e705c121SKalle Valo { 318e705c121SKalle Valo int ret; 319e705c121SKalle Valo 320e705c121SKalle Valo ret = iwl_alloc_fw_paging_mem(mvm, fw); 321e705c121SKalle Valo if (ret) 322e705c121SKalle Valo return ret; 323e705c121SKalle Valo 324e705c121SKalle Valo return iwl_fill_paging_mem(mvm, fw); 325e705c121SKalle Valo } 326e705c121SKalle Valo 327e705c121SKalle Valo /* send paging cmd to FW in case CPU2 has paging image */ 328e705c121SKalle Valo static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw) 329e705c121SKalle Valo { 330e705c121SKalle Valo int blk_idx; 331e705c121SKalle Valo __le32 dev_phy_addr; 332e705c121SKalle Valo struct iwl_fw_paging_cmd fw_paging_cmd = { 333e705c121SKalle Valo .flags = 334e705c121SKalle Valo cpu_to_le32(PAGING_CMD_IS_SECURED | 335e705c121SKalle Valo PAGING_CMD_IS_ENABLED | 336e705c121SKalle Valo (mvm->num_of_pages_in_last_blk << 337e705c121SKalle Valo PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)), 338e705c121SKalle Valo .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE), 339e705c121SKalle Valo .block_num = cpu_to_le32(mvm->num_of_paging_blk), 340e705c121SKalle Valo }; 341e705c121SKalle Valo 342e705c121SKalle Valo /* loop for for all paging blocks + CSS block */ 343e705c121SKalle Valo for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 344e705c121SKalle Valo dev_phy_addr = 345e705c121SKalle Valo cpu_to_le32(mvm->fw_paging_db[blk_idx].fw_paging_phys >> 346e705c121SKalle Valo PAGE_2_EXP_SIZE); 347e705c121SKalle Valo fw_paging_cmd.device_phy_addr[blk_idx] = dev_phy_addr; 348e705c121SKalle Valo } 349e705c121SKalle Valo 350e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD, 351e705c121SKalle Valo IWL_ALWAYS_LONG_GROUP, 0), 352e705c121SKalle Valo 0, sizeof(fw_paging_cmd), &fw_paging_cmd); 353e705c121SKalle Valo } 354e705c121SKalle Valo 355e705c121SKalle Valo /* 356e705c121SKalle Valo * Send paging item cmd to FW in case CPU2 has paging image 357e705c121SKalle Valo */ 358e705c121SKalle Valo static int iwl_trans_get_paging_item(struct iwl_mvm *mvm) 359e705c121SKalle Valo { 360e705c121SKalle Valo int ret; 361e705c121SKalle Valo struct iwl_fw_get_item_cmd fw_get_item_cmd = { 362e705c121SKalle Valo .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING), 363e705c121SKalle Valo }; 364e705c121SKalle Valo 365e705c121SKalle Valo struct iwl_fw_get_item_resp *item_resp; 366e705c121SKalle Valo struct iwl_host_cmd cmd = { 367e705c121SKalle Valo .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0), 368e705c121SKalle Valo .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 369e705c121SKalle Valo .data = { &fw_get_item_cmd, }, 370e705c121SKalle Valo }; 371e705c121SKalle Valo 372e705c121SKalle Valo cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd); 373e705c121SKalle Valo 374e705c121SKalle Valo ret = iwl_mvm_send_cmd(mvm, &cmd); 375e705c121SKalle Valo if (ret) { 376e705c121SKalle Valo IWL_ERR(mvm, 377e705c121SKalle Valo "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n", 378e705c121SKalle Valo ret); 379e705c121SKalle Valo return ret; 380e705c121SKalle Valo } 381e705c121SKalle Valo 382e705c121SKalle Valo item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data; 383e705c121SKalle Valo if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) { 384e705c121SKalle Valo IWL_ERR(mvm, 385e705c121SKalle Valo "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n", 386e705c121SKalle Valo le32_to_cpu(item_resp->item_id)); 387e705c121SKalle Valo ret = -EIO; 388e705c121SKalle Valo goto exit; 389e705c121SKalle Valo } 390e705c121SKalle Valo 391e705c121SKalle Valo mvm->trans->paging_download_buf = kzalloc(MAX_PAGING_IMAGE_SIZE, 392e705c121SKalle Valo GFP_KERNEL); 393e705c121SKalle Valo if (!mvm->trans->paging_download_buf) { 394e705c121SKalle Valo ret = -ENOMEM; 395e705c121SKalle Valo goto exit; 396e705c121SKalle Valo } 397e705c121SKalle Valo mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val); 398e705c121SKalle Valo mvm->trans->paging_db = mvm->fw_paging_db; 399e705c121SKalle Valo IWL_DEBUG_FW(mvm, 400e705c121SKalle Valo "Paging: got paging request address (paging_req_addr 0x%08x)\n", 401e705c121SKalle Valo mvm->trans->paging_req_addr); 402e705c121SKalle Valo 403e705c121SKalle Valo exit: 404e705c121SKalle Valo iwl_free_resp(&cmd); 405e705c121SKalle Valo 406e705c121SKalle Valo return ret; 407e705c121SKalle Valo } 408e705c121SKalle Valo 409e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 410e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 411e705c121SKalle Valo { 412e705c121SKalle Valo struct iwl_mvm *mvm = 413e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 414e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 415e705c121SKalle Valo struct mvm_alive_resp_ver1 *palive1; 416e705c121SKalle Valo struct mvm_alive_resp_ver2 *palive2; 417e705c121SKalle Valo struct mvm_alive_resp *palive; 418e705c121SKalle Valo 419e705c121SKalle Valo if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) { 420e705c121SKalle Valo palive1 = (void *)pkt->data; 421e705c121SKalle Valo 422e705c121SKalle Valo mvm->support_umac_log = false; 423e705c121SKalle Valo mvm->error_event_table = 424e705c121SKalle Valo le32_to_cpu(palive1->error_event_table_ptr); 425e705c121SKalle Valo mvm->log_event_table = 426e705c121SKalle Valo le32_to_cpu(palive1->log_event_table_ptr); 427e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr); 428e705c121SKalle Valo 429e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive1->status) == 430e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 431e705c121SKalle Valo IWL_DEBUG_FW(mvm, 432e705c121SKalle Valo "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 433e705c121SKalle Valo le16_to_cpu(palive1->status), palive1->ver_type, 434e705c121SKalle Valo palive1->ver_subtype, palive1->flags); 435e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) { 436e705c121SKalle Valo palive2 = (void *)pkt->data; 437e705c121SKalle Valo 438e705c121SKalle Valo mvm->error_event_table = 439e705c121SKalle Valo le32_to_cpu(palive2->error_event_table_ptr); 440e705c121SKalle Valo mvm->log_event_table = 441e705c121SKalle Valo le32_to_cpu(palive2->log_event_table_ptr); 442e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr); 443e705c121SKalle Valo mvm->umac_error_event_table = 444e705c121SKalle Valo le32_to_cpu(palive2->error_info_addr); 445e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr); 446e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size); 447e705c121SKalle Valo 448e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive2->status) == 449e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 450e705c121SKalle Valo if (mvm->umac_error_event_table) 451e705c121SKalle Valo mvm->support_umac_log = true; 452e705c121SKalle Valo 453e705c121SKalle Valo IWL_DEBUG_FW(mvm, 454e705c121SKalle Valo "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 455e705c121SKalle Valo le16_to_cpu(palive2->status), palive2->ver_type, 456e705c121SKalle Valo palive2->ver_subtype, palive2->flags); 457e705c121SKalle Valo 458e705c121SKalle Valo IWL_DEBUG_FW(mvm, 459e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 460e705c121SKalle Valo palive2->umac_major, palive2->umac_minor); 461e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 462e705c121SKalle Valo palive = (void *)pkt->data; 463e705c121SKalle Valo 464e705c121SKalle Valo mvm->error_event_table = 465e705c121SKalle Valo le32_to_cpu(palive->error_event_table_ptr); 466e705c121SKalle Valo mvm->log_event_table = 467e705c121SKalle Valo le32_to_cpu(palive->log_event_table_ptr); 468e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr); 469e705c121SKalle Valo mvm->umac_error_event_table = 470e705c121SKalle Valo le32_to_cpu(palive->error_info_addr); 471e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr); 472e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size); 473e705c121SKalle Valo 474e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive->status) == 475e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 476e705c121SKalle Valo if (mvm->umac_error_event_table) 477e705c121SKalle Valo mvm->support_umac_log = true; 478e705c121SKalle Valo 479e705c121SKalle Valo IWL_DEBUG_FW(mvm, 480e705c121SKalle Valo "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 481e705c121SKalle Valo le16_to_cpu(palive->status), palive->ver_type, 482e705c121SKalle Valo palive->ver_subtype, palive->flags); 483e705c121SKalle Valo 484e705c121SKalle Valo IWL_DEBUG_FW(mvm, 485e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 486e705c121SKalle Valo le32_to_cpu(palive->umac_major), 487e705c121SKalle Valo le32_to_cpu(palive->umac_minor)); 488e705c121SKalle Valo } 489e705c121SKalle Valo 490e705c121SKalle Valo return true; 491e705c121SKalle Valo } 492e705c121SKalle Valo 493e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 494e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 495e705c121SKalle Valo { 496e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 497e705c121SKalle Valo 498e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 499e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 500e705c121SKalle Valo return true; 501e705c121SKalle Valo } 502e705c121SKalle Valo 503e705c121SKalle Valo WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC)); 504e705c121SKalle Valo 505e705c121SKalle Valo return false; 506e705c121SKalle Valo } 507e705c121SKalle Valo 508e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 509e705c121SKalle Valo enum iwl_ucode_type ucode_type) 510e705c121SKalle Valo { 511e705c121SKalle Valo struct iwl_notification_wait alive_wait; 512e705c121SKalle Valo struct iwl_mvm_alive_data alive_data; 513e705c121SKalle Valo const struct fw_img *fw; 514e705c121SKalle Valo int ret, i; 515e705c121SKalle Valo enum iwl_ucode_type old_type = mvm->cur_ucode; 516e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 517e705c121SKalle Valo struct iwl_sf_region st_fwrd_space; 518e705c121SKalle Valo 519e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 520e705c121SKalle Valo iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE)) 521e705c121SKalle Valo fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER); 522e705c121SKalle Valo else 523e705c121SKalle Valo fw = iwl_get_ucode_image(mvm, ucode_type); 524e705c121SKalle Valo if (WARN_ON(!fw)) 525e705c121SKalle Valo return -EINVAL; 526e705c121SKalle Valo mvm->cur_ucode = ucode_type; 527e705c121SKalle Valo mvm->ucode_loaded = false; 528e705c121SKalle Valo 529e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 530e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 531e705c121SKalle Valo iwl_alive_fn, &alive_data); 532e705c121SKalle Valo 533e705c121SKalle Valo ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); 534e705c121SKalle Valo if (ret) { 535e705c121SKalle Valo mvm->cur_ucode = old_type; 536e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 537e705c121SKalle Valo return ret; 538e705c121SKalle Valo } 539e705c121SKalle Valo 540e705c121SKalle Valo /* 541e705c121SKalle Valo * Some things may run in the background now, but we 542e705c121SKalle Valo * just wait for the ALIVE notification here. 543e705c121SKalle Valo */ 544e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 545e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 546e705c121SKalle Valo if (ret) { 547e705c121SKalle Valo if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) 548e705c121SKalle Valo IWL_ERR(mvm, 549e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 550e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_1_STATUS), 551e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_2_STATUS)); 552e705c121SKalle Valo mvm->cur_ucode = old_type; 553e705c121SKalle Valo return ret; 554e705c121SKalle Valo } 555e705c121SKalle Valo 556e705c121SKalle Valo if (!alive_data.valid) { 557e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 558e705c121SKalle Valo mvm->cur_ucode = old_type; 559e705c121SKalle Valo return -EIO; 560e705c121SKalle Valo } 561e705c121SKalle Valo 562e705c121SKalle Valo /* 563e705c121SKalle Valo * update the sdio allocation according to the pointer we get in the 564e705c121SKalle Valo * alive notification. 565e705c121SKalle Valo */ 566e705c121SKalle Valo st_fwrd_space.addr = mvm->sf_space.addr; 567e705c121SKalle Valo st_fwrd_space.size = mvm->sf_space.size; 568e705c121SKalle Valo ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space); 569e705c121SKalle Valo if (ret) { 570e705c121SKalle Valo IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret); 571e705c121SKalle Valo return ret; 572e705c121SKalle Valo } 573e705c121SKalle Valo 574e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 575e705c121SKalle Valo 576e705c121SKalle Valo /* 577e705c121SKalle Valo * configure and operate fw paging mechanism. 578e705c121SKalle Valo * driver configures the paging flow only once, CPU2 paging image 579e705c121SKalle Valo * included in the IWL_UCODE_INIT image. 580e705c121SKalle Valo */ 581e705c121SKalle Valo if (fw->paging_mem_size) { 582e705c121SKalle Valo /* 583e705c121SKalle Valo * When dma is not enabled, the driver needs to copy / write 584e705c121SKalle Valo * the downloaded / uploaded page to / from the smem. 585e705c121SKalle Valo * This gets the location of the place were the pages are 586e705c121SKalle Valo * stored. 587e705c121SKalle Valo */ 588e705c121SKalle Valo if (!is_device_dma_capable(mvm->trans->dev)) { 589e705c121SKalle Valo ret = iwl_trans_get_paging_item(mvm); 590e705c121SKalle Valo if (ret) { 591e705c121SKalle Valo IWL_ERR(mvm, "failed to get FW paging item\n"); 592e705c121SKalle Valo return ret; 593e705c121SKalle Valo } 594e705c121SKalle Valo } 595e705c121SKalle Valo 596e705c121SKalle Valo ret = iwl_save_fw_paging(mvm, fw); 597e705c121SKalle Valo if (ret) { 598e705c121SKalle Valo IWL_ERR(mvm, "failed to save the FW paging image\n"); 599e705c121SKalle Valo return ret; 600e705c121SKalle Valo } 601e705c121SKalle Valo 602e705c121SKalle Valo ret = iwl_send_paging_cmd(mvm, fw); 603e705c121SKalle Valo if (ret) { 604e705c121SKalle Valo IWL_ERR(mvm, "failed to send the paging cmd\n"); 605e705c121SKalle Valo iwl_free_fw_paging(mvm); 606e705c121SKalle Valo return ret; 607e705c121SKalle Valo } 608e705c121SKalle Valo } 609e705c121SKalle Valo 610e705c121SKalle Valo /* 611e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 612e705c121SKalle Valo * initialization, but in firmware restart scenarios they 613e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 614e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 615e705c121SKalle Valo * reconfiguration completes. During normal startup, they 616e705c121SKalle Valo * will be empty. 617e705c121SKalle Valo */ 618e705c121SKalle Valo 619e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 620e705c121SKalle Valo mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1; 621e705c121SKalle Valo 622e705c121SKalle Valo for (i = 0; i < IEEE80211_MAX_QUEUES; i++) 623e705c121SKalle Valo atomic_set(&mvm->mac80211_queue_stop_count[i], 0); 624e705c121SKalle Valo 625e705c121SKalle Valo mvm->ucode_loaded = true; 626e705c121SKalle Valo 627e705c121SKalle Valo return 0; 628e705c121SKalle Valo } 629e705c121SKalle Valo 630e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 631e705c121SKalle Valo { 632e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 633e705c121SKalle Valo enum iwl_ucode_type ucode_type = mvm->cur_ucode; 634e705c121SKalle Valo 635e705c121SKalle Valo /* Set parameters */ 636e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 637e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 638e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 639e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 640e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 641e705c121SKalle Valo 642e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 643e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 644e705c121SKalle Valo 645e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 646e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 647e705c121SKalle Valo } 648e705c121SKalle Valo 649e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 650e705c121SKalle Valo { 651e705c121SKalle Valo struct iwl_notification_wait calib_wait; 652e705c121SKalle Valo static const u16 init_complete[] = { 653e705c121SKalle Valo INIT_COMPLETE_NOTIF, 654e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 655e705c121SKalle Valo }; 656e705c121SKalle Valo int ret; 657e705c121SKalle Valo 658e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 659e705c121SKalle Valo 660e705c121SKalle Valo if (WARN_ON_ONCE(mvm->calibrating)) 661e705c121SKalle Valo return 0; 662e705c121SKalle Valo 663e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 664e705c121SKalle Valo &calib_wait, 665e705c121SKalle Valo init_complete, 666e705c121SKalle Valo ARRAY_SIZE(init_complete), 667e705c121SKalle Valo iwl_wait_phy_db_entry, 668e705c121SKalle Valo mvm->phy_db); 669e705c121SKalle Valo 670e705c121SKalle Valo /* Will also start the device */ 671e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 672e705c121SKalle Valo if (ret) { 673e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 674e705c121SKalle Valo goto error; 675e705c121SKalle Valo } 676e705c121SKalle Valo 677e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 678e705c121SKalle Valo if (ret) 679e705c121SKalle Valo goto error; 680e705c121SKalle Valo 681e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 682e705c121SKalle Valo if (read_nvm) { 683e705c121SKalle Valo /* Read nvm */ 684e705c121SKalle Valo ret = iwl_nvm_init(mvm, true); 685e705c121SKalle Valo if (ret) { 686e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 687e705c121SKalle Valo goto error; 688e705c121SKalle Valo } 689e705c121SKalle Valo } 690e705c121SKalle Valo 691e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 692e705c121SKalle Valo if (mvm->nvm_file_name) 693e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 694e705c121SKalle Valo 695e705c121SKalle Valo ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); 696e705c121SKalle Valo WARN_ON(ret); 697e705c121SKalle Valo 698e705c121SKalle Valo /* 699e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 700e705c121SKalle Valo * the init seq later when RF kill will switch to off 701e705c121SKalle Valo */ 702e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 703e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 704e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 705e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 706e705c121SKalle Valo ret = 1; 707e705c121SKalle Valo goto out; 708e705c121SKalle Valo } 709e705c121SKalle Valo 710e705c121SKalle Valo mvm->calibrating = true; 711e705c121SKalle Valo 712e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 713e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 714e705c121SKalle Valo if (ret) 715e705c121SKalle Valo goto error; 716e705c121SKalle Valo 717e705c121SKalle Valo /* 718e705c121SKalle Valo * Send phy configurations command to init uCode 719e705c121SKalle Valo * to start the 16.0 uCode init image internal calibrations. 720e705c121SKalle Valo */ 721e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 722e705c121SKalle Valo if (ret) { 723e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 724e705c121SKalle Valo ret); 725e705c121SKalle Valo goto error; 726e705c121SKalle Valo } 727e705c121SKalle Valo 728e705c121SKalle Valo /* 729e705c121SKalle Valo * Some things may run in the background now, but we 730e705c121SKalle Valo * just wait for the calibration complete notification. 731e705c121SKalle Valo */ 732e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 733e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 734e705c121SKalle Valo 735e705c121SKalle Valo if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { 736e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 737e705c121SKalle Valo ret = 1; 738e705c121SKalle Valo } 739e705c121SKalle Valo goto out; 740e705c121SKalle Valo 741e705c121SKalle Valo error: 742e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 743e705c121SKalle Valo out: 744e705c121SKalle Valo mvm->calibrating = false; 745e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 746e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 747e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 748e705c121SKalle Valo sizeof(struct ieee80211_channel) + 749e705c121SKalle Valo sizeof(struct ieee80211_rate), 750e705c121SKalle Valo GFP_KERNEL); 751e705c121SKalle Valo if (!mvm->nvm_data) 752e705c121SKalle Valo return -ENOMEM; 753e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 754e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 755e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 756e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 757e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 758e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 759e705c121SKalle Valo } 760e705c121SKalle Valo 761e705c121SKalle Valo return ret; 762e705c121SKalle Valo } 763e705c121SKalle Valo 764e705c121SKalle Valo static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm) 765e705c121SKalle Valo { 766e705c121SKalle Valo struct iwl_host_cmd cmd = { 767e705c121SKalle Valo .id = SHARED_MEM_CFG, 768e705c121SKalle Valo .flags = CMD_WANT_SKB, 769e705c121SKalle Valo .data = { NULL, }, 770e705c121SKalle Valo .len = { 0, }, 771e705c121SKalle Valo }; 772e705c121SKalle Valo struct iwl_rx_packet *pkt; 773e705c121SKalle Valo struct iwl_shared_mem_cfg *mem_cfg; 774e705c121SKalle Valo u32 i; 775e705c121SKalle Valo 776e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 777e705c121SKalle Valo 778e705c121SKalle Valo if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd))) 779e705c121SKalle Valo return; 780e705c121SKalle Valo 781e705c121SKalle Valo pkt = cmd.resp_pkt; 782e705c121SKalle Valo mem_cfg = (void *)pkt->data; 783e705c121SKalle Valo 784e705c121SKalle Valo mvm->shared_mem_cfg.shared_mem_addr = 785e705c121SKalle Valo le32_to_cpu(mem_cfg->shared_mem_addr); 786e705c121SKalle Valo mvm->shared_mem_cfg.shared_mem_size = 787e705c121SKalle Valo le32_to_cpu(mem_cfg->shared_mem_size); 788e705c121SKalle Valo mvm->shared_mem_cfg.sample_buff_addr = 789e705c121SKalle Valo le32_to_cpu(mem_cfg->sample_buff_addr); 790e705c121SKalle Valo mvm->shared_mem_cfg.sample_buff_size = 791e705c121SKalle Valo le32_to_cpu(mem_cfg->sample_buff_size); 792e705c121SKalle Valo mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr); 793e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++) 794e705c121SKalle Valo mvm->shared_mem_cfg.txfifo_size[i] = 795e705c121SKalle Valo le32_to_cpu(mem_cfg->txfifo_size[i]); 796e705c121SKalle Valo for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) 797e705c121SKalle Valo mvm->shared_mem_cfg.rxfifo_size[i] = 798e705c121SKalle Valo le32_to_cpu(mem_cfg->rxfifo_size[i]); 799e705c121SKalle Valo mvm->shared_mem_cfg.page_buff_addr = 800e705c121SKalle Valo le32_to_cpu(mem_cfg->page_buff_addr); 801e705c121SKalle Valo mvm->shared_mem_cfg.page_buff_size = 802e705c121SKalle Valo le32_to_cpu(mem_cfg->page_buff_size); 803e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n"); 804e705c121SKalle Valo 805e705c121SKalle Valo iwl_free_resp(&cmd); 806e705c121SKalle Valo } 807e705c121SKalle Valo 808e705c121SKalle Valo int iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm *mvm, 809e705c121SKalle Valo struct iwl_mvm_dump_desc *desc, 810e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trigger) 811e705c121SKalle Valo { 812e705c121SKalle Valo unsigned int delay = 0; 813e705c121SKalle Valo 814e705c121SKalle Valo if (trigger) 815e705c121SKalle Valo delay = msecs_to_jiffies(le32_to_cpu(trigger->stop_delay)); 816e705c121SKalle Valo 817e705c121SKalle Valo if (test_and_set_bit(IWL_MVM_STATUS_DUMPING_FW_LOG, &mvm->status)) 818e705c121SKalle Valo return -EBUSY; 819e705c121SKalle Valo 820e705c121SKalle Valo if (WARN_ON(mvm->fw_dump_desc)) 821e705c121SKalle Valo iwl_mvm_free_fw_dump_desc(mvm); 822e705c121SKalle Valo 823e705c121SKalle Valo IWL_WARN(mvm, "Collecting data: trigger %d fired.\n", 824e705c121SKalle Valo le32_to_cpu(desc->trig_desc.type)); 825e705c121SKalle Valo 826e705c121SKalle Valo mvm->fw_dump_desc = desc; 827e705c121SKalle Valo mvm->fw_dump_trig = trigger; 828e705c121SKalle Valo 829e705c121SKalle Valo queue_delayed_work(system_wq, &mvm->fw_dump_wk, delay); 830e705c121SKalle Valo 831e705c121SKalle Valo return 0; 832e705c121SKalle Valo } 833e705c121SKalle Valo 834e705c121SKalle Valo int iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm, enum iwl_fw_dbg_trigger trig, 835e705c121SKalle Valo const char *str, size_t len, 836e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trigger) 837e705c121SKalle Valo { 838e705c121SKalle Valo struct iwl_mvm_dump_desc *desc; 839e705c121SKalle Valo 840e705c121SKalle Valo desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC); 841e705c121SKalle Valo if (!desc) 842e705c121SKalle Valo return -ENOMEM; 843e705c121SKalle Valo 844e705c121SKalle Valo desc->len = len; 845e705c121SKalle Valo desc->trig_desc.type = cpu_to_le32(trig); 846e705c121SKalle Valo memcpy(desc->trig_desc.data, str, len); 847e705c121SKalle Valo 848e705c121SKalle Valo return iwl_mvm_fw_dbg_collect_desc(mvm, desc, trigger); 849e705c121SKalle Valo } 850e705c121SKalle Valo 851e705c121SKalle Valo int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm *mvm, 852e705c121SKalle Valo struct iwl_fw_dbg_trigger_tlv *trigger, 853e705c121SKalle Valo const char *fmt, ...) 854e705c121SKalle Valo { 855e705c121SKalle Valo u16 occurrences = le16_to_cpu(trigger->occurrences); 856e705c121SKalle Valo int ret, len = 0; 857e705c121SKalle Valo char buf[64]; 858e705c121SKalle Valo 859e705c121SKalle Valo if (!occurrences) 860e705c121SKalle Valo return 0; 861e705c121SKalle Valo 862e705c121SKalle Valo if (fmt) { 863e705c121SKalle Valo va_list ap; 864e705c121SKalle Valo 865e705c121SKalle Valo buf[sizeof(buf) - 1] = '\0'; 866e705c121SKalle Valo 867e705c121SKalle Valo va_start(ap, fmt); 868e705c121SKalle Valo vsnprintf(buf, sizeof(buf), fmt, ap); 869e705c121SKalle Valo va_end(ap); 870e705c121SKalle Valo 871e705c121SKalle Valo /* check for truncation */ 872e705c121SKalle Valo if (WARN_ON_ONCE(buf[sizeof(buf) - 1])) 873e705c121SKalle Valo buf[sizeof(buf) - 1] = '\0'; 874e705c121SKalle Valo 875e705c121SKalle Valo len = strlen(buf) + 1; 876e705c121SKalle Valo } 877e705c121SKalle Valo 878e705c121SKalle Valo ret = iwl_mvm_fw_dbg_collect(mvm, le32_to_cpu(trigger->id), buf, len, 879e705c121SKalle Valo trigger); 880e705c121SKalle Valo 881e705c121SKalle Valo if (ret) 882e705c121SKalle Valo return ret; 883e705c121SKalle Valo 884e705c121SKalle Valo trigger->occurrences = cpu_to_le16(occurrences - 1); 885e705c121SKalle Valo return 0; 886e705c121SKalle Valo } 887e705c121SKalle Valo 888e705c121SKalle Valo static inline void iwl_mvm_restart_early_start(struct iwl_mvm *mvm) 889e705c121SKalle Valo { 890e705c121SKalle Valo if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) 891e705c121SKalle Valo iwl_clear_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100); 892e705c121SKalle Valo else 893e705c121SKalle Valo iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 1); 894e705c121SKalle Valo } 895e705c121SKalle Valo 896e705c121SKalle Valo int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id) 897e705c121SKalle Valo { 898e705c121SKalle Valo u8 *ptr; 899e705c121SKalle Valo int ret; 900e705c121SKalle Valo int i; 901e705c121SKalle Valo 902e705c121SKalle Valo if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv), 903e705c121SKalle Valo "Invalid configuration %d\n", conf_id)) 904e705c121SKalle Valo return -EINVAL; 905e705c121SKalle Valo 906e705c121SKalle Valo /* EARLY START - firmware's configuration is hard coded */ 907e705c121SKalle Valo if ((!mvm->fw->dbg_conf_tlv[conf_id] || 908e705c121SKalle Valo !mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) && 909e705c121SKalle Valo conf_id == FW_DBG_START_FROM_ALIVE) { 910e705c121SKalle Valo iwl_mvm_restart_early_start(mvm); 911e705c121SKalle Valo return 0; 912e705c121SKalle Valo } 913e705c121SKalle Valo 914e705c121SKalle Valo if (!mvm->fw->dbg_conf_tlv[conf_id]) 915e705c121SKalle Valo return -EINVAL; 916e705c121SKalle Valo 917e705c121SKalle Valo if (mvm->fw_dbg_conf != FW_DBG_INVALID) 918e705c121SKalle Valo IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n", 919e705c121SKalle Valo mvm->fw_dbg_conf); 920e705c121SKalle Valo 921e705c121SKalle Valo /* Send all HCMDs for configuring the FW debug */ 922e705c121SKalle Valo ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd; 923e705c121SKalle Valo for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) { 924e705c121SKalle Valo struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr; 925e705c121SKalle Valo 926e705c121SKalle Valo ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0, 927e705c121SKalle Valo le16_to_cpu(cmd->len), cmd->data); 928e705c121SKalle Valo if (ret) 929e705c121SKalle Valo return ret; 930e705c121SKalle Valo 931e705c121SKalle Valo ptr += sizeof(*cmd); 932e705c121SKalle Valo ptr += le16_to_cpu(cmd->len); 933e705c121SKalle Valo } 934e705c121SKalle Valo 935e705c121SKalle Valo mvm->fw_dbg_conf = conf_id; 936e705c121SKalle Valo return ret; 937e705c121SKalle Valo } 938e705c121SKalle Valo 939e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 940e705c121SKalle Valo { 941e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 942e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 943e705c121SKalle Valo }; 944e705c121SKalle Valo 945e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 946e705c121SKalle Valo return 0; 947e705c121SKalle Valo 948e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 949e705c121SKalle Valo sizeof(cmd), &cmd); 950e705c121SKalle Valo } 951e705c121SKalle Valo 952e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 953e705c121SKalle Valo { 954e705c121SKalle Valo int ret, i; 955e705c121SKalle Valo struct ieee80211_channel *chan; 956e705c121SKalle Valo struct cfg80211_chan_def chandef; 957e705c121SKalle Valo 958e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 959e705c121SKalle Valo 960e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 961e705c121SKalle Valo if (ret) 962e705c121SKalle Valo return ret; 963e705c121SKalle Valo 964e705c121SKalle Valo /* 965e705c121SKalle Valo * If we haven't completed the run of the init ucode during 966e705c121SKalle Valo * module loading, load init ucode now 967e705c121SKalle Valo * (for example, if we were in RFKILL) 968e705c121SKalle Valo */ 969e705c121SKalle Valo ret = iwl_run_init_mvm_ucode(mvm, false); 970e705c121SKalle Valo if (ret && !iwlmvm_mod_params.init_dbg) { 971e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 972e705c121SKalle Valo /* this can't happen */ 973e705c121SKalle Valo if (WARN_ON(ret > 0)) 974e705c121SKalle Valo ret = -ERFKILL; 975e705c121SKalle Valo goto error; 976e705c121SKalle Valo } 977e705c121SKalle Valo if (!iwlmvm_mod_params.init_dbg) { 978e705c121SKalle Valo /* 979e705c121SKalle Valo * Stop and start the transport without entering low power 980e705c121SKalle Valo * mode. This will save the state of other components on the 981e705c121SKalle Valo * device that are triggered by the INIT firwmare (MFUART). 982e705c121SKalle Valo */ 983e705c121SKalle Valo _iwl_trans_stop_device(mvm->trans, false); 984e705c121SKalle Valo ret = _iwl_trans_start_hw(mvm->trans, false); 985e705c121SKalle Valo if (ret) 986e705c121SKalle Valo goto error; 987e705c121SKalle Valo } 988e705c121SKalle Valo 989e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg) 990e705c121SKalle Valo return 0; 991e705c121SKalle Valo 992e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 993e705c121SKalle Valo if (ret) { 994e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 995e705c121SKalle Valo goto error; 996e705c121SKalle Valo } 997e705c121SKalle Valo 998e705c121SKalle Valo iwl_mvm_get_shared_mem_conf(mvm); 999e705c121SKalle Valo 1000e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1001e705c121SKalle Valo if (ret) 1002e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1003e705c121SKalle Valo 1004e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_INVALID; 1005e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 1006e705c121SKalle Valo if (mvm->fw->dbg_dest_tlv) 1007e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE; 1008e705c121SKalle Valo iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE); 1009e705c121SKalle Valo 1010e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1011e705c121SKalle Valo if (ret) 1012e705c121SKalle Valo goto error; 1013e705c121SKalle Valo 1014e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 1015e705c121SKalle Valo if (ret) 1016e705c121SKalle Valo goto error; 1017e705c121SKalle Valo 1018e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1019e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1020e705c121SKalle Valo if (ret) 1021e705c121SKalle Valo goto error; 1022e705c121SKalle Valo 1023e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1024e705c121SKalle Valo if (ret) 1025e705c121SKalle Valo goto error; 1026e705c121SKalle Valo 1027e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1028e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1029e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1030e705c121SKalle Valo 1031e705c121SKalle Valo mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT; 1032e705c121SKalle Valo 1033e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1034e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1035e705c121SKalle Valo 1036e705c121SKalle Valo /* Add auxiliary station for scanning */ 1037e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1038e705c121SKalle Valo if (ret) 1039e705c121SKalle Valo goto error; 1040e705c121SKalle Valo 1041e705c121SKalle Valo /* Add all the PHY contexts */ 1042e705c121SKalle Valo chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0]; 1043e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1044e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1045e705c121SKalle Valo /* 1046e705c121SKalle Valo * The channel used here isn't relevant as it's 1047e705c121SKalle Valo * going to be overwritten in the other flows. 1048e705c121SKalle Valo * For now use the first channel we have. 1049e705c121SKalle Valo */ 1050e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1051e705c121SKalle Valo &chandef, 1, 1); 1052e705c121SKalle Valo if (ret) 1053e705c121SKalle Valo goto error; 1054e705c121SKalle Valo } 1055e705c121SKalle Valo 1056e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1057e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1058e705c121SKalle Valo 1059e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1060e705c121SKalle Valo 1061e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1062e705c121SKalle Valo if (ret) 1063e705c121SKalle Valo goto error; 1064e705c121SKalle Valo 1065e705c121SKalle Valo /* 1066e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1067e705c121SKalle Valo * anyway, so don't init MCC. 1068e705c121SKalle Valo */ 1069e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1070e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1071e705c121SKalle Valo if (ret) 1072e705c121SKalle Valo goto error; 1073e705c121SKalle Valo } 1074e705c121SKalle Valo 1075e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 1076e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1077e705c121SKalle Valo if (ret) 1078e705c121SKalle Valo goto error; 1079e705c121SKalle Valo } 1080e705c121SKalle Valo 1081e705c121SKalle Valo if (iwl_mvm_is_csum_supported(mvm) && 1082e705c121SKalle Valo mvm->cfg->features & NETIF_F_RXCSUM) 1083e705c121SKalle Valo iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3); 1084e705c121SKalle Valo 1085e705c121SKalle Valo /* allow FW/transport low power modes if not during restart */ 1086e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1087e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); 1088e705c121SKalle Valo 1089e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1090e705c121SKalle Valo return 0; 1091e705c121SKalle Valo error: 1092e705c121SKalle Valo iwl_trans_stop_device(mvm->trans); 1093e705c121SKalle Valo return ret; 1094e705c121SKalle Valo } 1095e705c121SKalle Valo 1096e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1097e705c121SKalle Valo { 1098e705c121SKalle Valo int ret, i; 1099e705c121SKalle Valo 1100e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1101e705c121SKalle Valo 1102e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1103e705c121SKalle Valo if (ret) 1104e705c121SKalle Valo return ret; 1105e705c121SKalle Valo 1106e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1107e705c121SKalle Valo if (ret) { 1108e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1109e705c121SKalle Valo goto error; 1110e705c121SKalle Valo } 1111e705c121SKalle Valo 1112e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1113e705c121SKalle Valo if (ret) 1114e705c121SKalle Valo goto error; 1115e705c121SKalle Valo 1116e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1117e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1118e705c121SKalle Valo if (ret) 1119e705c121SKalle Valo goto error; 1120e705c121SKalle Valo 1121e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1122e705c121SKalle Valo if (ret) 1123e705c121SKalle Valo goto error; 1124e705c121SKalle Valo 1125e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1126e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1127e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1128e705c121SKalle Valo 1129e705c121SKalle Valo /* Add auxiliary station for scanning */ 1130e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1131e705c121SKalle Valo if (ret) 1132e705c121SKalle Valo goto error; 1133e705c121SKalle Valo 1134e705c121SKalle Valo return 0; 1135e705c121SKalle Valo error: 1136e705c121SKalle Valo iwl_trans_stop_device(mvm->trans); 1137e705c121SKalle Valo return ret; 1138e705c121SKalle Valo } 1139e705c121SKalle Valo 1140e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1141e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1142e705c121SKalle Valo { 1143e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1144e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1145e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1146e705c121SKalle Valo 1147e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1148e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1149e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1150e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1151e705c121SKalle Valo "Reached" : "Not reached"); 1152e705c121SKalle Valo } 1153e705c121SKalle Valo 1154e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1155e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1156e705c121SKalle Valo { 1157e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1158e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1159e705c121SKalle Valo 1160e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1161e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1162e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1163e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1164e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1165e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 1166e705c121SKalle Valo } 1167