1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
119c4f7d51SShaul Triebitz  * Copyright(c) 2018        Intel Corporation
12e705c121SKalle Valo  *
13e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
14e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
15e705c121SKalle Valo  * published by the Free Software Foundation.
16e705c121SKalle Valo  *
17e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
18e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
19e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
20e705c121SKalle Valo  * General Public License for more details.
21e705c121SKalle Valo  *
22e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
23e705c121SKalle Valo  * in the file called COPYING.
24e705c121SKalle Valo  *
25e705c121SKalle Valo  * Contact Information:
26cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
27e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * BSD LICENSE
30e705c121SKalle Valo  *
31e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
349c4f7d51SShaul Triebitz  * Copyright(c) 2018        Intel Corporation
35e705c121SKalle Valo  * All rights reserved.
36e705c121SKalle Valo  *
37e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
38e705c121SKalle Valo  * modification, are permitted provided that the following conditions
39e705c121SKalle Valo  * are met:
40e705c121SKalle Valo  *
41e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
42e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
43e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
44e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
45e705c121SKalle Valo  *    the documentation and/or other materials provided with the
46e705c121SKalle Valo  *    distribution.
47e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
48e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
49e705c121SKalle Valo  *    from this software without specific prior written permission.
50e705c121SKalle Valo  *
51e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62e705c121SKalle Valo  *
63e705c121SKalle Valo  *****************************************************************************/
64e705c121SKalle Valo #include <net/mac80211.h>
65854d773eSSara Sharon #include <linux/netdevice.h>
66e705c121SKalle Valo 
67e705c121SKalle Valo #include "iwl-trans.h"
68e705c121SKalle Valo #include "iwl-op-mode.h"
69d962f9b1SJohannes Berg #include "fw/img.h"
70e705c121SKalle Valo #include "iwl-debug.h"
71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
73e705c121SKalle Valo #include "iwl-prph.h"
74813df5ceSLuca Coelho #include "fw/acpi.h"
75e705c121SKalle Valo 
76e705c121SKalle Valo #include "mvm.h"
777174beb6SJohannes Berg #include "fw/dbg.h"
78e705c121SKalle Valo #include "iwl-phy-db.h"
799c4f7d51SShaul Triebitz #include "iwl-modparams.h"
809c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
81e705c121SKalle Valo 
82e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT	HZ
83e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
84e705c121SKalle Valo 
85e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
86e705c121SKalle Valo 
87e705c121SKalle Valo struct iwl_mvm_alive_data {
88e705c121SKalle Valo 	bool valid;
89e705c121SKalle Valo 	u32 scd_base_addr;
90e705c121SKalle Valo };
91e705c121SKalle Valo 
92e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93e705c121SKalle Valo {
94e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
96e705c121SKalle Valo 	};
97e705c121SKalle Valo 
98e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
99e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
100e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
101e705c121SKalle Valo }
102e705c121SKalle Valo 
10343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
10443413a97SSara Sharon {
10543413a97SSara Sharon 	int i;
10643413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
10743413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
108608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
109608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
110608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
111608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
112608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
113608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
11443413a97SSara Sharon 	};
11543413a97SSara Sharon 
116f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
117f43495fdSSara Sharon 		return 0;
118f43495fdSSara Sharon 
119854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
12043413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
121854d773eSSara Sharon 		cmd.indirection_table[i] =
122854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
123854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
12443413a97SSara Sharon 
12543413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
12643413a97SSara Sharon }
12743413a97SSara Sharon 
1288edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
1298edbfaa1SSara Sharon {
130dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
1318edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
132dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
133dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
134dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
135dbf592f3SJohannes Berg 	};
1368edbfaa1SSara Sharon 
1378edbfaa1SSara Sharon 	/* Do not configure default queue, it is configured via context info */
1388edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
1398edbfaa1SSara Sharon 
140dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
1418edbfaa1SSara Sharon 
1428edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
1438edbfaa1SSara Sharon 	if (!cmd)
1448edbfaa1SSara Sharon 		return -ENOMEM;
1458edbfaa1SSara Sharon 
1468edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
1478edbfaa1SSara Sharon 
1488edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1498edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1508edbfaa1SSara Sharon 
1518edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1528edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1538edbfaa1SSara Sharon 
1548edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1558edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1568edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1578edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1588edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1598edbfaa1SSara Sharon 	}
1608edbfaa1SSara Sharon 
161dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
162dbf592f3SJohannes Berg 	hcmd.len[0] = size;
163dbf592f3SJohannes Berg 
164dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
165dbf592f3SJohannes Berg 
166dbf592f3SJohannes Berg 	kfree(cmd);
167dbf592f3SJohannes Berg 
168dbf592f3SJohannes Berg 	return ret;
1698edbfaa1SSara Sharon }
1708edbfaa1SSara Sharon 
17197d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
17297d5be7eSLiad Kaufman {
17397d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
17497d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
17597d5be7eSLiad Kaufman 	};
17697d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
17797d5be7eSLiad Kaufman 	int ret;
17897d5be7eSLiad Kaufman 
17997d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
18097d5be7eSLiad Kaufman 	if (ret)
18197d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
18297d5be7eSLiad Kaufman 	else
18397d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
18497d5be7eSLiad Kaufman 
18597d5be7eSLiad Kaufman 	return ret;
18697d5be7eSLiad Kaufman }
18797d5be7eSLiad Kaufman 
188bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
189bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
190bdccdb85SGolan Ben-Ami {
191bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
192bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
193bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
194bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
195bdccdb85SGolan Ben-Ami 	int i;
196bdccdb85SGolan Ben-Ami 
197bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
198bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
199bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
200bdccdb85SGolan Ben-Ami 
201bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
202bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
203bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
204bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
205bdccdb85SGolan Ben-Ami 			       n_words + i,
206bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
207bdccdb85SGolan Ben-Ami }
208bdccdb85SGolan Ben-Ami 
209e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
210e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
211e705c121SKalle Valo {
212e705c121SKalle Valo 	struct iwl_mvm *mvm =
213e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
214e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
2155c228d63SSara Sharon 	struct mvm_alive_resp_v3 *palive3;
216e705c121SKalle Valo 	struct mvm_alive_resp *palive;
2175c228d63SSara Sharon 	struct iwl_umac_alive *umac;
2185c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
2195c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
2205c228d63SSara Sharon 	u16 status;
2213485e76eSLuca Coelho 	u32 umac_error_event_table;
222e705c121SKalle Valo 
2235c228d63SSara Sharon 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
224e705c121SKalle Valo 		palive = (void *)pkt->data;
2255c228d63SSara Sharon 		umac = &palive->umac_data;
2265c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2275c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2285c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2295c228d63SSara Sharon 	} else {
2305c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2315c228d63SSara Sharon 		umac = &palive3->umac_data;
2325c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2335c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2345c228d63SSara Sharon 	}
235e705c121SKalle Valo 
2365c228d63SSara Sharon 	mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
2375c228d63SSara Sharon 	if (lmac2)
2385c228d63SSara Sharon 		mvm->error_event_table[1] =
2395c228d63SSara Sharon 			le32_to_cpu(lmac2->error_event_table_ptr);
2405c228d63SSara Sharon 	mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
241e705c121SKalle Valo 
2423485e76eSLuca Coelho 	umac_error_event_table = le32_to_cpu(umac->error_info_addr);
2435c228d63SSara Sharon 
2443485e76eSLuca Coelho 	if (!umac_error_event_table) {
2453485e76eSLuca Coelho 		mvm->support_umac_log = false;
2463485e76eSLuca Coelho 	} else if (umac_error_event_table >=
2473485e76eSLuca Coelho 		   mvm->trans->cfg->min_umac_error_event_table) {
2483485e76eSLuca Coelho 		mvm->support_umac_log = true;
2493485e76eSLuca Coelho 		mvm->umac_error_event_table = umac_error_event_table;
2503485e76eSLuca Coelho 	} else {
251fb5b2846SLuca Coelho 		IWL_ERR(mvm,
252fb5b2846SLuca Coelho 			"Not valid error log pointer 0x%08X for %s uCode\n",
253fb5b2846SLuca Coelho 			mvm->umac_error_event_table,
254fb5b2846SLuca Coelho 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
255fb5b2846SLuca Coelho 			"Init" : "RT");
2563485e76eSLuca Coelho 		mvm->support_umac_log = false;
2573485e76eSLuca Coelho 	}
258fb5b2846SLuca Coelho 
2595c228d63SSara Sharon 	alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
2605c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
261e705c121SKalle Valo 
262e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2635c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2645c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2655c228d63SSara Sharon 
2665c228d63SSara Sharon 	if (lmac2)
2675c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
268e705c121SKalle Valo 
269e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
270e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2715c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2725c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
273e705c121SKalle Valo 
274e705c121SKalle Valo 	return true;
275e705c121SKalle Valo }
276e705c121SKalle Valo 
2771f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2781f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2791f370650SSara Sharon {
2801f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2811f370650SSara Sharon 
2821f370650SSara Sharon 	return true;
2831f370650SSara Sharon }
2841f370650SSara Sharon 
285e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
286e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
287e705c121SKalle Valo {
288e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
289e705c121SKalle Valo 
290e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
291e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
292e705c121SKalle Valo 		return true;
293e705c121SKalle Valo 	}
294e705c121SKalle Valo 
295ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
296e705c121SKalle Valo 
297e705c121SKalle Valo 	return false;
298e705c121SKalle Valo }
299e705c121SKalle Valo 
300e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
301e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
302e705c121SKalle Valo {
303e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
30494a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
305e705c121SKalle Valo 	const struct fw_img *fw;
306cfbc6c4cSSara Sharon 	int ret;
307702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
308e705c121SKalle Valo 	static const u16 alive_cmd[] = { MVM_ALIVE };
309e705c121SKalle Valo 
310e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
3113d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3123d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
3133d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
314612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
315e705c121SKalle Valo 	else
316612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
317e705c121SKalle Valo 	if (WARN_ON(!fw))
318e705c121SKalle Valo 		return -EINVAL;
319702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
32065b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
321e705c121SKalle Valo 
322e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
323e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
324e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
325e705c121SKalle Valo 
326e705c121SKalle Valo 	ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
327e705c121SKalle Valo 	if (ret) {
328702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
329e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
330e705c121SKalle Valo 		return ret;
331e705c121SKalle Valo 	}
332e705c121SKalle Valo 
333e705c121SKalle Valo 	/*
334e705c121SKalle Valo 	 * Some things may run in the background now, but we
335e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
336e705c121SKalle Valo 	 */
337e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
338e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
339e705c121SKalle Valo 	if (ret) {
340d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
341d6be9c1dSSara Sharon 
34267b8261cSShahar S Matityahu 		if (ret == -ETIMEDOUT)
343700b3799SShahar S Matityahu 			iwl_fw_dbg_error_collect(&mvm->fwrt,
344700b3799SShahar S Matityahu 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
34567b8261cSShahar S Matityahu 
3465f01df3fSGolan Ben Ami 		if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000)
347e705c121SKalle Valo 			IWL_ERR(mvm,
348e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
349d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
350d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
3516e584873SSara Sharon 		else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
352d6be9c1dSSara Sharon 			IWL_ERR(mvm,
353d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
354d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
355d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
356702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
357e705c121SKalle Valo 		return ret;
358e705c121SKalle Valo 	}
359e705c121SKalle Valo 
360e705c121SKalle Valo 	if (!alive_data.valid) {
361e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
362702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
363e705c121SKalle Valo 		return -EIO;
364e705c121SKalle Valo 	}
365e705c121SKalle Valo 
366e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
367e705c121SKalle Valo 
368e705c121SKalle Valo 	/*
369e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
370e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
371e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
372e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
373e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
374e705c121SKalle Valo 	 * will be empty.
375e705c121SKalle Valo 	 */
376e705c121SKalle Valo 
377e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
3781c14089eSJohannes Berg 	/*
3791c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
3801c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
3811c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
3821c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
3831c14089eSJohannes Berg 	 */
3841c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
3851c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
386e705c121SKalle Valo 
38765b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
388f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
389f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
390f7805b33SLior Cohen #endif
391e705c121SKalle Valo 
392e705c121SKalle Valo 	return 0;
393e705c121SKalle Valo }
394e705c121SKalle Valo 
3958c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
3968c5f47b1SJohannes Berg {
3978c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
3988c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
3998c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4008c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4018c5f47b1SJohannes Berg 	};
4028c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4038c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4048c5f47b1SJohannes Berg 	};
4058c5f47b1SJohannes Berg 	int ret;
4068c5f47b1SJohannes Berg 
4078c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4088c5f47b1SJohannes Berg 
4098c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4108c5f47b1SJohannes Berg 				   &init_wait,
4118c5f47b1SJohannes Berg 				   init_complete,
4128c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4138c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4148c5f47b1SJohannes Berg 				   NULL);
4158c5f47b1SJohannes Berg 
4168c5f47b1SJohannes Berg 	/* Will also start the device */
4178c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4188c5f47b1SJohannes Berg 	if (ret) {
4198c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4208c5f47b1SJohannes Berg 		goto error;
4218c5f47b1SJohannes Berg 	}
4228c5f47b1SJohannes Berg 
4238c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
4248c5f47b1SJohannes Berg 	 * commands
4258c5f47b1SJohannes Berg 	 */
4268c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
4278c5f47b1SJohannes Berg 						INIT_EXTENDED_CFG_CMD), 0,
4288c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
4298c5f47b1SJohannes Berg 	if (ret) {
4308c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
4318c5f47b1SJohannes Berg 			ret);
4328c5f47b1SJohannes Berg 		goto error;
4338c5f47b1SJohannes Berg 	}
4348c5f47b1SJohannes Berg 
435e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
436e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
4379c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
4389c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
4398c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
440e9e1ba3dSSara Sharon 	}
4418c5f47b1SJohannes Berg 
442d4f3695eSSara Sharon 	if (IWL_MVM_PARSE_NVM && read_nvm) {
4435bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
444d4f3695eSSara Sharon 		if (ret) {
445d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
446d4f3695eSSara Sharon 			goto error;
447d4f3695eSSara Sharon 		}
448d4f3695eSSara Sharon 	}
449d4f3695eSSara Sharon 
4508c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
4518c5f47b1SJohannes Berg 						NVM_ACCESS_COMPLETE), 0,
4528c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
4538c5f47b1SJohannes Berg 	if (ret) {
4548c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4558c5f47b1SJohannes Berg 			ret);
4568c5f47b1SJohannes Berg 		goto error;
4578c5f47b1SJohannes Berg 	}
4588c5f47b1SJohannes Berg 
4598c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
460e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
4618c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
462e9e1ba3dSSara Sharon 	if (ret)
463e9e1ba3dSSara Sharon 		return ret;
464e9e1ba3dSSara Sharon 
465e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
466d4f3695eSSara Sharon 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
4674c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
468c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
469c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
470c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
471e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
472e9e1ba3dSSara Sharon 			return ret;
473e9e1ba3dSSara Sharon 		}
474e9e1ba3dSSara Sharon 	}
475e9e1ba3dSSara Sharon 
476e9e1ba3dSSara Sharon 	return 0;
4778c5f47b1SJohannes Berg 
4788c5f47b1SJohannes Berg error:
4798c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
4808c5f47b1SJohannes Berg 	return ret;
4818c5f47b1SJohannes Berg }
4828c5f47b1SJohannes Berg 
483e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
484e705c121SKalle Valo {
485e705c121SKalle Valo 	struct iwl_phy_cfg_cmd phy_cfg_cmd;
486702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
487e705c121SKalle Valo 
488e705c121SKalle Valo 	/* Set parameters */
489e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
49086a2b204SLuca Coelho 
49186a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
49286a2b204SLuca Coelho 	phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
49386a2b204SLuca Coelho 
494e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
495e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
496e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
497e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
498e705c121SKalle Valo 
499e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
500e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
501e705c121SKalle Valo 
502e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
503e705c121SKalle Valo 				    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
504e705c121SKalle Valo }
505e705c121SKalle Valo 
506e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
507e705c121SKalle Valo {
508e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
509e705c121SKalle Valo 	static const u16 init_complete[] = {
510e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
511e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
512e705c121SKalle Valo 	};
513e705c121SKalle Valo 	int ret;
514e705c121SKalle Valo 
5157d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
5168c5f47b1SJohannes Berg 		return iwl_run_unified_mvm_ucode(mvm, true);
5178c5f47b1SJohannes Berg 
518e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
519e705c121SKalle Valo 
520e705c121SKalle Valo 	if (WARN_ON_ONCE(mvm->calibrating))
521e705c121SKalle Valo 		return 0;
522e705c121SKalle Valo 
523e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
524e705c121SKalle Valo 				   &calib_wait,
525e705c121SKalle Valo 				   init_complete,
526e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
527e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
528e705c121SKalle Valo 				   mvm->phy_db);
529e705c121SKalle Valo 
530e705c121SKalle Valo 	/* Will also start the device */
531e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
532e705c121SKalle Valo 	if (ret) {
533e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
53400e0c6c8SLuca Coelho 		goto remove_notif;
535e705c121SKalle Valo 	}
536e705c121SKalle Valo 
537b3de3ef4SEmmanuel Grumbach 	if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
538b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
539e705c121SKalle Valo 		if (ret)
54000e0c6c8SLuca Coelho 			goto remove_notif;
541b3de3ef4SEmmanuel Grumbach 	}
542e705c121SKalle Valo 
543e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
544e705c121SKalle Valo 	if (read_nvm) {
5455bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
546e705c121SKalle Valo 		if (ret) {
547e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
54800e0c6c8SLuca Coelho 			goto remove_notif;
549e705c121SKalle Valo 		}
550e705c121SKalle Valo 	}
551e705c121SKalle Valo 
552e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
553e705c121SKalle Valo 	if (mvm->nvm_file_name)
554e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
555e705c121SKalle Valo 
55664866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
55764866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
55864866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
559e705c121SKalle Valo 
560e705c121SKalle Valo 	/*
561e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
562e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
563e705c121SKalle Valo 	 */
564e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
565e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
566e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
56700e0c6c8SLuca Coelho 		goto remove_notif;
568e705c121SKalle Valo 	}
569e705c121SKalle Valo 
570e705c121SKalle Valo 	mvm->calibrating = true;
571e705c121SKalle Valo 
572e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
573e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
574e705c121SKalle Valo 	if (ret)
57500e0c6c8SLuca Coelho 		goto remove_notif;
576e705c121SKalle Valo 
577e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
578e705c121SKalle Valo 	if (ret) {
579e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
580e705c121SKalle Valo 			ret);
58100e0c6c8SLuca Coelho 		goto remove_notif;
582e705c121SKalle Valo 	}
583e705c121SKalle Valo 
584e705c121SKalle Valo 	/*
585e705c121SKalle Valo 	 * Some things may run in the background now, but we
586e705c121SKalle Valo 	 * just wait for the calibration complete notification.
587e705c121SKalle Valo 	 */
588e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
589e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
59000e0c6c8SLuca Coelho 	if (!ret)
591e705c121SKalle Valo 		goto out;
592e705c121SKalle Valo 
59300e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
59400e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
59500e0c6c8SLuca Coelho 		ret = 0;
59600e0c6c8SLuca Coelho 	} else {
59700e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
59800e0c6c8SLuca Coelho 			ret);
59900e0c6c8SLuca Coelho 	}
60000e0c6c8SLuca Coelho 
60100e0c6c8SLuca Coelho 	goto out;
60200e0c6c8SLuca Coelho 
60300e0c6c8SLuca Coelho remove_notif:
604e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
605e705c121SKalle Valo out:
606e705c121SKalle Valo 	mvm->calibrating = false;
607e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
608e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
609e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
610e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
611e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
612e705c121SKalle Valo 					GFP_KERNEL);
613e705c121SKalle Valo 		if (!mvm->nvm_data)
614e705c121SKalle Valo 			return -ENOMEM;
615e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
616e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
617e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
618e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
619e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
620e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
621e705c121SKalle Valo 	}
622e705c121SKalle Valo 
623e705c121SKalle Valo 	return ret;
624e705c121SKalle Valo }
625e705c121SKalle Valo 
626e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
627e705c121SKalle Valo {
628e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
629e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
630e705c121SKalle Valo 	};
631e705c121SKalle Valo 
632e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
633e705c121SKalle Valo 		return 0;
634e705c121SKalle Valo 
635e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
636e705c121SKalle Valo 				    sizeof(cmd), &cmd);
637e705c121SKalle Valo }
638e705c121SKalle Valo 
639c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
640c386dacbSHaim Dreyfuss static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
641c386dacbSHaim Dreyfuss 				   union acpi_object *table,
642c386dacbSHaim Dreyfuss 				   struct iwl_mvm_sar_profile *profile,
643c386dacbSHaim Dreyfuss 				   bool enabled)
644da2830acSLuca Coelho {
645c386dacbSHaim Dreyfuss 	int i;
646da2830acSLuca Coelho 
647c386dacbSHaim Dreyfuss 	profile->enabled = enabled;
648da2830acSLuca Coelho 
649e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
650c386dacbSHaim Dreyfuss 		if ((table[i].type != ACPI_TYPE_INTEGER) ||
651c386dacbSHaim Dreyfuss 		    (table[i].integer.value > U8_MAX))
652da2830acSLuca Coelho 			return -EINVAL;
653da2830acSLuca Coelho 
654c386dacbSHaim Dreyfuss 		profile->table[i] = table[i].integer.value;
655da2830acSLuca Coelho 	}
656da2830acSLuca Coelho 
657da2830acSLuca Coelho 	return 0;
658da2830acSLuca Coelho }
659da2830acSLuca Coelho 
660c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
661c386dacbSHaim Dreyfuss {
662813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *table, *data;
663c386dacbSHaim Dreyfuss 	bool enabled;
664da2830acSLuca Coelho 	int ret;
665da2830acSLuca Coelho 
666813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
667813df5ceSLuca Coelho 	if (IS_ERR(data))
668813df5ceSLuca Coelho 		return PTR_ERR(data);
669da2830acSLuca Coelho 
6702fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
671c386dacbSHaim Dreyfuss 					 ACPI_WRDS_WIFI_DATA_SIZE);
672c386dacbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
673c386dacbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
674c386dacbSHaim Dreyfuss 		goto out_free;
675c386dacbSHaim Dreyfuss 	}
676da2830acSLuca Coelho 
677c386dacbSHaim Dreyfuss 	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
678c386dacbSHaim Dreyfuss 		ret = -EINVAL;
679c386dacbSHaim Dreyfuss 		goto out_free;
680c386dacbSHaim Dreyfuss 	}
681c386dacbSHaim Dreyfuss 
682c386dacbSHaim Dreyfuss 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
683c386dacbSHaim Dreyfuss 
684c386dacbSHaim Dreyfuss 	/* position of the actual table */
685c386dacbSHaim Dreyfuss 	table = &wifi_pkg->package.elements[2];
686c386dacbSHaim Dreyfuss 
687c386dacbSHaim Dreyfuss 	/* The profile from WRDS is officially profile 1, but goes
688c386dacbSHaim Dreyfuss 	 * into sar_profiles[0] (because we don't have a profile 0).
689c386dacbSHaim Dreyfuss 	 */
690c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
691c386dacbSHaim Dreyfuss 				      enabled);
692c386dacbSHaim Dreyfuss out_free:
693813df5ceSLuca Coelho 	kfree(data);
694da2830acSLuca Coelho 	return ret;
695da2830acSLuca Coelho }
696da2830acSLuca Coelho 
69769964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
69869964905SLuca Coelho {
699813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
70069964905SLuca Coelho 	bool enabled;
70169964905SLuca Coelho 	int i, n_profiles, ret;
70269964905SLuca Coelho 
703813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
704813df5ceSLuca Coelho 	if (IS_ERR(data))
705813df5ceSLuca Coelho 		return PTR_ERR(data);
70669964905SLuca Coelho 
7072fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
70869964905SLuca Coelho 					 ACPI_EWRD_WIFI_DATA_SIZE);
70969964905SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
71069964905SLuca Coelho 		ret = PTR_ERR(wifi_pkg);
71169964905SLuca Coelho 		goto out_free;
71269964905SLuca Coelho 	}
71369964905SLuca Coelho 
71469964905SLuca Coelho 	if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
71569964905SLuca Coelho 	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
71669964905SLuca Coelho 		ret = -EINVAL;
71769964905SLuca Coelho 		goto out_free;
71869964905SLuca Coelho 	}
71969964905SLuca Coelho 
72069964905SLuca Coelho 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
72169964905SLuca Coelho 	n_profiles = wifi_pkg->package.elements[2].integer.value;
72269964905SLuca Coelho 
7232e1976bbSLuca Coelho 	/*
7242e1976bbSLuca Coelho 	 * Check the validity of n_profiles.  The EWRD profiles start
7252e1976bbSLuca Coelho 	 * from index 1, so the maximum value allowed here is
7262e1976bbSLuca Coelho 	 * ACPI_SAR_PROFILES_NUM - 1.
7272e1976bbSLuca Coelho 	 */
7282e1976bbSLuca Coelho 	if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
729e2ef1476SSharon Dvir 		ret = -EINVAL;
730e2ef1476SSharon Dvir 		goto out_free;
731e2ef1476SSharon Dvir 	}
732e2ef1476SSharon Dvir 
73369964905SLuca Coelho 	for (i = 0; i < n_profiles; i++) {
73469964905SLuca Coelho 		/* the tables start at element 3 */
73569964905SLuca Coelho 		static int pos = 3;
73669964905SLuca Coelho 
73769964905SLuca Coelho 		/* The EWRD profiles officially go from 2 to 4, but we
73869964905SLuca Coelho 		 * save them in sar_profiles[1-3] (because we don't
73969964905SLuca Coelho 		 * have profile 0).  So in the array we start from 1.
74069964905SLuca Coelho 		 */
74169964905SLuca Coelho 		ret = iwl_mvm_sar_set_profile(mvm,
74269964905SLuca Coelho 					      &wifi_pkg->package.elements[pos],
74369964905SLuca Coelho 					      &mvm->sar_profiles[i + 1],
74469964905SLuca Coelho 					      enabled);
74569964905SLuca Coelho 		if (ret < 0)
74669964905SLuca Coelho 			break;
74769964905SLuca Coelho 
74869964905SLuca Coelho 		/* go to the next table */
749e7a3b8d8SLuca Coelho 		pos += ACPI_SAR_TABLE_SIZE;
75069964905SLuca Coelho 	}
75169964905SLuca Coelho 
75269964905SLuca Coelho out_free:
753813df5ceSLuca Coelho 	kfree(data);
75469964905SLuca Coelho 	return ret;
75569964905SLuca Coelho }
75669964905SLuca Coelho 
7577fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
758a6bff3cbSHaim Dreyfuss {
759813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
7607fe90e0eSHaim Dreyfuss 	int i, j, ret;
7617fe90e0eSHaim Dreyfuss 	int idx = 1;
762a6bff3cbSHaim Dreyfuss 
763813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
764813df5ceSLuca Coelho 	if (IS_ERR(data))
765813df5ceSLuca Coelho 		return PTR_ERR(data);
766a6bff3cbSHaim Dreyfuss 
7672fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
768a6bff3cbSHaim Dreyfuss 					 ACPI_WGDS_WIFI_DATA_SIZE);
769a6bff3cbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
770a6bff3cbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
771a6bff3cbSHaim Dreyfuss 		goto out_free;
772a6bff3cbSHaim Dreyfuss 	}
773a6bff3cbSHaim Dreyfuss 
774e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
775e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
776a6bff3cbSHaim Dreyfuss 			union acpi_object *entry;
777a6bff3cbSHaim Dreyfuss 
7787fe90e0eSHaim Dreyfuss 			entry = &wifi_pkg->package.elements[idx++];
779a6bff3cbSHaim Dreyfuss 			if ((entry->type != ACPI_TYPE_INTEGER) ||
780aae9d563SChristophe Jaillet 			    (entry->integer.value > U8_MAX)) {
781aae9d563SChristophe Jaillet 				ret = -EINVAL;
782aae9d563SChristophe Jaillet 				goto out_free;
783aae9d563SChristophe Jaillet 			}
784a6bff3cbSHaim Dreyfuss 
7857fe90e0eSHaim Dreyfuss 			mvm->geo_profiles[i].values[j] = entry->integer.value;
7867fe90e0eSHaim Dreyfuss 		}
787a6bff3cbSHaim Dreyfuss 	}
788a6bff3cbSHaim Dreyfuss 	ret = 0;
789a6bff3cbSHaim Dreyfuss out_free:
790813df5ceSLuca Coelho 	kfree(data);
791a6bff3cbSHaim Dreyfuss 	return ret;
792a6bff3cbSHaim Dreyfuss }
793a6bff3cbSHaim Dreyfuss 
79442ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
795da2830acSLuca Coelho {
7960791c2fcSHaim Dreyfuss 	union {
7970791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd v5;
7980791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd_v4 v4;
7990791c2fcSHaim Dreyfuss 	} cmd;
80042ce76d6SLuca Coelho 	int i, j, idx;
801e7a3b8d8SLuca Coelho 	int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
8020791c2fcSHaim Dreyfuss 	int len;
803da2830acSLuca Coelho 
804e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
805e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
806e7a3b8d8SLuca Coelho 		     ACPI_SAR_TABLE_SIZE);
80742ce76d6SLuca Coelho 
8080791c2fcSHaim Dreyfuss 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
8090791c2fcSHaim Dreyfuss 
8100791c2fcSHaim Dreyfuss 	if (fw_has_api(&mvm->fw->ucode_capa,
8110791c2fcSHaim Dreyfuss 		       IWL_UCODE_TLV_API_REDUCE_TX_POWER))
8120791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
8130791c2fcSHaim Dreyfuss 	else if (fw_has_capa(&mvm->fw->ucode_capa,
8140791c2fcSHaim Dreyfuss 			     IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
8150791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4);
8160791c2fcSHaim Dreyfuss 	else
8170791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4.v3);
81855bfa4b9SLuca Coelho 
819e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
82042ce76d6SLuca Coelho 		struct iwl_mvm_sar_profile *prof;
82142ce76d6SLuca Coelho 
82242ce76d6SLuca Coelho 		/* don't allow SAR to be disabled (profile 0 means disable) */
82342ce76d6SLuca Coelho 		if (profs[i] == 0)
82442ce76d6SLuca Coelho 			return -EPERM;
82542ce76d6SLuca Coelho 
826e7a3b8d8SLuca Coelho 		/* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
827e7a3b8d8SLuca Coelho 		if (profs[i] > ACPI_SAR_PROFILE_NUM)
82842ce76d6SLuca Coelho 			return -EINVAL;
82942ce76d6SLuca Coelho 
83042ce76d6SLuca Coelho 		/* profiles go from 1 to 4, so decrement to access the array */
83142ce76d6SLuca Coelho 		prof = &mvm->sar_profiles[profs[i] - 1];
83242ce76d6SLuca Coelho 
83342ce76d6SLuca Coelho 		/* if the profile is disabled, do nothing */
83442ce76d6SLuca Coelho 		if (!prof->enabled) {
83542ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
83642ce76d6SLuca Coelho 					profs[i]);
83742ce76d6SLuca Coelho 			/* if one of the profiles is disabled, we fail all */
83842ce76d6SLuca Coelho 			return -ENOENT;
83942ce76d6SLuca Coelho 		}
84042ce76d6SLuca Coelho 
84142ce76d6SLuca Coelho 		IWL_DEBUG_RADIO(mvm, "  Chain[%d]:\n", i);
842e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
843e7a3b8d8SLuca Coelho 			idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
8440791c2fcSHaim Dreyfuss 			cmd.v5.v3.per_chain_restriction[i][j] =
84542ce76d6SLuca Coelho 				cpu_to_le16(prof->table[idx]);
84642ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "    Band[%d] = %d * .125dBm\n",
84742ce76d6SLuca Coelho 					j, prof->table[idx]);
84842ce76d6SLuca Coelho 		}
84942ce76d6SLuca Coelho 	}
85042ce76d6SLuca Coelho 
85142ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
85242ce76d6SLuca Coelho 
85342ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
85442ce76d6SLuca Coelho }
85542ce76d6SLuca Coelho 
8567fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
8577fe90e0eSHaim Dreyfuss {
8587fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_resp *resp;
8597fe90e0eSHaim Dreyfuss 	int ret;
8607fe90e0eSHaim Dreyfuss 
8617fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
8627fe90e0eSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
8637fe90e0eSHaim Dreyfuss 	};
8647fe90e0eSHaim Dreyfuss 	struct iwl_host_cmd cmd = {
8657fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
8667fe90e0eSHaim Dreyfuss 		.len = { sizeof(geo_cmd), },
8677fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
8687fe90e0eSHaim Dreyfuss 		.data = { &geo_cmd },
8697fe90e0eSHaim Dreyfuss 	};
8707fe90e0eSHaim Dreyfuss 
8717fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8727fe90e0eSHaim Dreyfuss 	if (ret) {
8737fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8747fe90e0eSHaim Dreyfuss 		return ret;
8757fe90e0eSHaim Dreyfuss 	}
8767fe90e0eSHaim Dreyfuss 
8777fe90e0eSHaim Dreyfuss 	resp = (void *)cmd.resp_pkt->data;
8787fe90e0eSHaim Dreyfuss 	ret = le32_to_cpu(resp->profile_idx);
879e7a3b8d8SLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
8807fe90e0eSHaim Dreyfuss 		ret = -EIO;
8817fe90e0eSHaim Dreyfuss 		IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
8827fe90e0eSHaim Dreyfuss 	}
8837fe90e0eSHaim Dreyfuss 
8847fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8857fe90e0eSHaim Dreyfuss 	return ret;
8867fe90e0eSHaim Dreyfuss }
8877fe90e0eSHaim Dreyfuss 
888a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
889a6bff3cbSHaim Dreyfuss {
890a6bff3cbSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd cmd = {
891a6bff3cbSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
892a6bff3cbSHaim Dreyfuss 	};
8937fe90e0eSHaim Dreyfuss 	int ret, i, j;
894a6bff3cbSHaim Dreyfuss 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
895a6bff3cbSHaim Dreyfuss 
896eca1e56cSEmmanuel Grumbach 	/*
897eca1e56cSEmmanuel Grumbach 	 * This command is not supported on earlier firmware versions.
898eca1e56cSEmmanuel Grumbach 	 * Unfortunately, we don't have a TLV API flag to rely on, so
899eca1e56cSEmmanuel Grumbach 	 * rely on the major version which is in the first byte of
900eca1e56cSEmmanuel Grumbach 	 * ucode_ver.
901eca1e56cSEmmanuel Grumbach 	 */
902eca1e56cSEmmanuel Grumbach 	if (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) < 41)
903eca1e56cSEmmanuel Grumbach 		return 0;
904eca1e56cSEmmanuel Grumbach 
9057fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wgds_table(mvm);
906a6bff3cbSHaim Dreyfuss 	if (ret < 0) {
907a6bff3cbSHaim Dreyfuss 		IWL_DEBUG_RADIO(mvm,
908a6bff3cbSHaim Dreyfuss 				"Geo SAR BIOS table invalid or unavailable. (%d)\n",
909a6bff3cbSHaim Dreyfuss 				ret);
910a6bff3cbSHaim Dreyfuss 		/* we don't fail if the table is not available */
911a6bff3cbSHaim Dreyfuss 		return 0;
912a6bff3cbSHaim Dreyfuss 	}
913a6bff3cbSHaim Dreyfuss 
914a6bff3cbSHaim Dreyfuss 	IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
915a6bff3cbSHaim Dreyfuss 
916e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
91766e83903SMatt Chen 		     ACPI_WGDS_TABLE_SIZE + 1 !=  ACPI_WGDS_WIFI_DATA_SIZE);
918a6bff3cbSHaim Dreyfuss 
919e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
920e7a3b8d8SLuca Coelho 
921e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
922a6bff3cbSHaim Dreyfuss 		struct iwl_per_chain_offset *chain =
923a6bff3cbSHaim Dreyfuss 			(struct iwl_per_chain_offset *)&cmd.table[i];
924a6bff3cbSHaim Dreyfuss 
925a6bff3cbSHaim Dreyfuss 		for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
926a6bff3cbSHaim Dreyfuss 			u8 *value;
927a6bff3cbSHaim Dreyfuss 
9287fe90e0eSHaim Dreyfuss 			value = &mvm->geo_profiles[i].values[j *
929e7a3b8d8SLuca Coelho 				ACPI_GEO_PER_CHAIN_SIZE];
930a6bff3cbSHaim Dreyfuss 			chain[j].max_tx_power = cpu_to_le16(value[0]);
931a6bff3cbSHaim Dreyfuss 			chain[j].chain_a = value[1];
932a6bff3cbSHaim Dreyfuss 			chain[j].chain_b = value[2];
933a6bff3cbSHaim Dreyfuss 			IWL_DEBUG_RADIO(mvm,
934a6bff3cbSHaim Dreyfuss 					"SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
935a6bff3cbSHaim Dreyfuss 					i, j, value[1], value[2], value[0]);
936a6bff3cbSHaim Dreyfuss 		}
937a6bff3cbSHaim Dreyfuss 	}
938a6bff3cbSHaim Dreyfuss 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
939a6bff3cbSHaim Dreyfuss }
940a6bff3cbSHaim Dreyfuss 
94169964905SLuca Coelho #else /* CONFIG_ACPI */
94269964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
94369964905SLuca Coelho {
94469964905SLuca Coelho 	return -ENOENT;
94569964905SLuca Coelho }
94669964905SLuca Coelho 
94769964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
94869964905SLuca Coelho {
94969964905SLuca Coelho 	return -ENOENT;
95069964905SLuca Coelho }
951a6bff3cbSHaim Dreyfuss 
9525d041c46SLuca Coelho static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
9535d041c46SLuca Coelho {
9545d041c46SLuca Coelho 	return -ENOENT;
9555d041c46SLuca Coelho }
9565d041c46SLuca Coelho 
957a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
958a6bff3cbSHaim Dreyfuss {
959a6bff3cbSHaim Dreyfuss 	return 0;
960a6bff3cbSHaim Dreyfuss }
96118f1755dSLuca Coelho 
96218f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
96318f1755dSLuca Coelho 			       int prof_b)
96418f1755dSLuca Coelho {
96518f1755dSLuca Coelho 	return -ENOENT;
96618f1755dSLuca Coelho }
96718f1755dSLuca Coelho 
96818f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
96918f1755dSLuca Coelho {
97018f1755dSLuca Coelho 	return -ENOENT;
97118f1755dSLuca Coelho }
97269964905SLuca Coelho #endif /* CONFIG_ACPI */
97369964905SLuca Coelho 
97442ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
97542ce76d6SLuca Coelho {
97642ce76d6SLuca Coelho 	int ret;
97742ce76d6SLuca Coelho 
978c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wrds_table(mvm);
979da2830acSLuca Coelho 	if (ret < 0) {
980da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
98169964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
982da2830acSLuca Coelho 				ret);
9835d041c46SLuca Coelho 		/*
9845d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
9855d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
9865d041c46SLuca Coelho 		 */
9875d041c46SLuca Coelho 		return 1;
988da2830acSLuca Coelho 	}
989da2830acSLuca Coelho 
99069964905SLuca Coelho 	ret = iwl_mvm_sar_get_ewrd_table(mvm);
99169964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
99269964905SLuca Coelho 	if (ret < 0)
99369964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
99469964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
99569964905SLuca Coelho 				ret);
99669964905SLuca Coelho 
99742ce76d6SLuca Coelho 	/* choose profile 1 (WRDS) as default for both chains */
99842ce76d6SLuca Coelho 	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
99942ce76d6SLuca Coelho 
10005d041c46SLuca Coelho 	/*
10015d041c46SLuca Coelho 	 * If we don't have profile 0 from BIOS, just skip it.  This
10025d041c46SLuca Coelho 	 * means that SAR Geo will not be enabled either, even if we
10035d041c46SLuca Coelho 	 * have other valid profiles.
10045d041c46SLuca Coelho 	 */
100542ce76d6SLuca Coelho 	if (ret == -ENOENT)
10065d041c46SLuca Coelho 		return 1;
1007da2830acSLuca Coelho 
1008da2830acSLuca Coelho 	return ret;
1009da2830acSLuca Coelho }
1010da2830acSLuca Coelho 
10111f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
10121f370650SSara Sharon {
10131f370650SSara Sharon 	int ret;
10141f370650SSara Sharon 
10157d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
10161f370650SSara Sharon 		return iwl_run_unified_mvm_ucode(mvm, false);
10171f370650SSara Sharon 
10181f370650SSara Sharon 	ret = iwl_run_init_mvm_ucode(mvm, false);
10191f370650SSara Sharon 
10201f370650SSara Sharon 	if (ret) {
10211f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1022f4744258SLiad Kaufman 
1023f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1024f4744258SLiad Kaufman 			return 0;
10251f370650SSara Sharon 		return ret;
10261f370650SSara Sharon 	}
10271f370650SSara Sharon 
10281f370650SSara Sharon 	/*
10291f370650SSara Sharon 	 * Stop and start the transport without entering low power
10301f370650SSara Sharon 	 * mode. This will save the state of other components on the
10311f370650SSara Sharon 	 * device that are triggered by the INIT firwmare (MFUART).
10321f370650SSara Sharon 	 */
10331f370650SSara Sharon 	_iwl_trans_stop_device(mvm->trans, false);
10341f370650SSara Sharon 	ret = _iwl_trans_start_hw(mvm->trans, false);
10351f370650SSara Sharon 	if (ret)
10361f370650SSara Sharon 		return ret;
10371f370650SSara Sharon 
1038da2eb669SSara Sharon 	iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY);
1039da2eb669SSara Sharon 
10401f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
10411f370650SSara Sharon 	if (ret)
10421f370650SSara Sharon 		return ret;
10431f370650SSara Sharon 
1044da2eb669SSara Sharon 	iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE);
1045da2eb669SSara Sharon 
1046702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
10471f370650SSara Sharon }
10481f370650SSara Sharon 
1049e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1050e705c121SKalle Valo {
1051e705c121SKalle Valo 	int ret, i;
1052e705c121SKalle Valo 	struct ieee80211_channel *chan;
1053e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1054e705c121SKalle Valo 
1055e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1056e705c121SKalle Valo 
1057e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1058e705c121SKalle Valo 	if (ret)
1059e705c121SKalle Valo 		return ret;
1060e705c121SKalle Valo 
10611f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1062e705c121SKalle Valo 	if (ret) {
1063e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1064700b3799SShahar S Matityahu 		iwl_fw_dbg_error_collect(&mvm->fwrt, FW_DBG_TRIGGER_DRIVER);
1065e705c121SKalle Valo 		goto error;
1066e705c121SKalle Valo 	}
1067e705c121SKalle Valo 
1068d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1069e705c121SKalle Valo 
1070e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1071e705c121SKalle Valo 	if (ret)
1072e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1073e705c121SKalle Valo 
10747a14c23dSSara Sharon 	if (!mvm->trans->ini_valid) {
10757174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1076e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
107717b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
10787174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
10797174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
10807a14c23dSSara Sharon 	}
1081e705c121SKalle Valo 
1082e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1083e705c121SKalle Valo 	if (ret)
1084e705c121SKalle Valo 		goto error;
1085e705c121SKalle Valo 
10867d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1087e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1088e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1089e705c121SKalle Valo 		if (ret)
1090e705c121SKalle Valo 			goto error;
1091e705c121SKalle Valo 
1092e705c121SKalle Valo 		ret = iwl_send_phy_cfg_cmd(mvm);
1093e705c121SKalle Valo 		if (ret)
1094e705c121SKalle Valo 			goto error;
10951f370650SSara Sharon 	}
1096e705c121SKalle Valo 
1097b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1098b3de3ef4SEmmanuel Grumbach 	if (ret)
1099b3de3ef4SEmmanuel Grumbach 		goto error;
1100b3de3ef4SEmmanuel Grumbach 
110143413a97SSara Sharon 	/* Init RSS configuration */
11028edbfaa1SSara Sharon 	if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
11038edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
11048edbfaa1SSara Sharon 		if (ret) {
11058edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
11068edbfaa1SSara Sharon 				ret);
11078edbfaa1SSara Sharon 			goto error;
11088edbfaa1SSara Sharon 		}
11098edbfaa1SSara Sharon 	}
11108edbfaa1SSara Sharon 
11118edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
111243413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
111343413a97SSara Sharon 		if (ret) {
111443413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
111543413a97SSara Sharon 				ret);
111643413a97SSara Sharon 			goto error;
111743413a97SSara Sharon 		}
111843413a97SSara Sharon 	}
111943413a97SSara Sharon 
1120e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
11210ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1122e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1123e705c121SKalle Valo 
11240ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1125e705c121SKalle Valo 
1126e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1127e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1128e705c121SKalle Valo 
112997d5be7eSLiad Kaufman 	ret = iwl_mvm_send_dqa_cmd(mvm);
113097d5be7eSLiad Kaufman 	if (ret)
113197d5be7eSLiad Kaufman 		goto error;
113297d5be7eSLiad Kaufman 
1133e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1134e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1135e705c121SKalle Valo 	if (ret)
1136e705c121SKalle Valo 		goto error;
1137e705c121SKalle Valo 
1138e705c121SKalle Valo 	/* Add all the PHY contexts */
113957fbcce3SJohannes Berg 	chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1140e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1141e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1142e705c121SKalle Valo 		/*
1143e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1144e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1145e705c121SKalle Valo 		 * For now use the first channel we have.
1146e705c121SKalle Valo 		 */
1147e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1148e705c121SKalle Valo 					   &chandef, 1, 1);
1149e705c121SKalle Valo 		if (ret)
1150e705c121SKalle Valo 			goto error;
1151e705c121SKalle Valo 	}
1152e705c121SKalle Valo 
1153c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL
1154c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1155c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1156c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1157c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1158c221daf2SChaya Rachel Ivgi 		 */
1159c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1160c221daf2SChaya Rachel Ivgi 	} else {
1161e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1162e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1163c221daf2SChaya Rachel Ivgi 	}
11645c89e7bcSChaya Rachel Ivgi 
11655c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1166944eafc2SChaya Rachel Ivgi 
1167944eafc2SChaya Rachel Ivgi 	/*
1168944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1169944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1170944eafc2SChaya Rachel Ivgi 	 */
1171944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
11725c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
11735c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
117475cfe338SLuca Coelho 		if (ret)
117575cfe338SLuca Coelho 			goto error;
117675cfe338SLuca Coelho 	}
1177c221daf2SChaya Rachel Ivgi #else
1178c221daf2SChaya Rachel Ivgi 	/* Initialize tx backoffs to the minimal possible */
1179c221daf2SChaya Rachel Ivgi 	iwl_mvm_tt_tx_backoff(mvm, 0);
1180c221daf2SChaya Rachel Ivgi #endif
1181e705c121SKalle Valo 
1182e705c121SKalle Valo 	WARN_ON(iwl_mvm_config_ltr(mvm));
1183e705c121SKalle Valo 
1184e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1185e705c121SKalle Valo 	if (ret)
1186e705c121SKalle Valo 		goto error;
1187e705c121SKalle Valo 
1188e705c121SKalle Valo 	/*
1189e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1190e705c121SKalle Valo 	 * anyway, so don't init MCC.
1191e705c121SKalle Valo 	 */
1192e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1193e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1194e705c121SKalle Valo 		if (ret)
1195e705c121SKalle Valo 			goto error;
1196e705c121SKalle Valo 	}
1197e705c121SKalle Valo 
1198e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
11994ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1200b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1201e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1202e705c121SKalle Valo 		if (ret)
1203e705c121SKalle Valo 			goto error;
1204e705c121SKalle Valo 	}
1205e705c121SKalle Valo 
1206e705c121SKalle Valo 	/* allow FW/transport low power modes if not during restart */
1207e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1208e705c121SKalle Valo 		iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1209e705c121SKalle Valo 
1210da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
12115d041c46SLuca Coelho 	if (ret == 0) {
1212a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
12135d041c46SLuca Coelho 	} else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
12145d041c46SLuca Coelho 		/*
12155d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
12165d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
12175d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
12185d041c46SLuca Coelho 		 * Geo without basic SAR.
12195d041c46SLuca Coelho 		 */
12205d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
12215d041c46SLuca Coelho 	}
12225d041c46SLuca Coelho 
12235d041c46SLuca Coelho 	if (ret < 0)
1224a6bff3cbSHaim Dreyfuss 		goto error;
1225a6bff3cbSHaim Dreyfuss 
12267089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
12277089ae63SJohannes Berg 
1228e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1229e705c121SKalle Valo 	return 0;
1230e705c121SKalle Valo  error:
1231f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1232fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1233e705c121SKalle Valo 	return ret;
1234e705c121SKalle Valo }
1235e705c121SKalle Valo 
1236e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1237e705c121SKalle Valo {
1238e705c121SKalle Valo 	int ret, i;
1239e705c121SKalle Valo 
1240e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1241e705c121SKalle Valo 
1242e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1243e705c121SKalle Valo 	if (ret)
1244e705c121SKalle Valo 		return ret;
1245e705c121SKalle Valo 
1246e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1247e705c121SKalle Valo 	if (ret) {
1248e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1249e705c121SKalle Valo 		goto error;
1250e705c121SKalle Valo 	}
1251e705c121SKalle Valo 
1252e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1253e705c121SKalle Valo 	if (ret)
1254e705c121SKalle Valo 		goto error;
1255e705c121SKalle Valo 
1256e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1257e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1258e705c121SKalle Valo 	if (ret)
1259e705c121SKalle Valo 		goto error;
1260e705c121SKalle Valo 
1261e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1262e705c121SKalle Valo 	if (ret)
1263e705c121SKalle Valo 		goto error;
1264e705c121SKalle Valo 
1265e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
12660ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1267e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1268e705c121SKalle Valo 
1269e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1270e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1271e705c121SKalle Valo 	if (ret)
1272e705c121SKalle Valo 		goto error;
1273e705c121SKalle Valo 
1274e705c121SKalle Valo 	return 0;
1275e705c121SKalle Valo  error:
1276fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1277e705c121SKalle Valo 	return ret;
1278e705c121SKalle Valo }
1279e705c121SKalle Valo 
1280e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1281e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1282e705c121SKalle Valo {
1283e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1284e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1285e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1286e705c121SKalle Valo 
1287e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1288e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1289e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1290e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1291e705c121SKalle Valo 			  "Reached" : "Not reached");
1292e705c121SKalle Valo }
1293e705c121SKalle Valo 
1294e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1295e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1296e705c121SKalle Valo {
1297e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1298e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1299e705c121SKalle Valo 
1300e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1301e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1302e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1303e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1304e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1305e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
13060c8d0a47SGolan Ben-Ami 
13070c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
13080c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
13090c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
13100c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1311e705c121SKalle Valo }
1312