1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 1043413a97SSara Sharon * Copyright(c) 2016 Intel Deutschland GmbH 11e705c121SKalle Valo * 12e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 13e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 14e705c121SKalle Valo * published by the Free Software Foundation. 15e705c121SKalle Valo * 16e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 17e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 18e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19e705c121SKalle Valo * General Public License for more details. 20e705c121SKalle Valo * 21e705c121SKalle Valo * You should have received a copy of the GNU General Public License 22e705c121SKalle Valo * along with this program; if not, write to the Free Software 23e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24e705c121SKalle Valo * USA 25e705c121SKalle Valo * 26e705c121SKalle Valo * The full GNU General Public License is included in this distribution 27e705c121SKalle Valo * in the file called COPYING. 28e705c121SKalle Valo * 29e705c121SKalle Valo * Contact Information: 30cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 31e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32e705c121SKalle Valo * 33e705c121SKalle Valo * BSD LICENSE 34e705c121SKalle Valo * 35e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 36e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 37e705c121SKalle Valo * All rights reserved. 38e705c121SKalle Valo * 39e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 40e705c121SKalle Valo * modification, are permitted provided that the following conditions 41e705c121SKalle Valo * are met: 42e705c121SKalle Valo * 43e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 45e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 46e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 47e705c121SKalle Valo * the documentation and/or other materials provided with the 48e705c121SKalle Valo * distribution. 49e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 50e705c121SKalle Valo * contributors may be used to endorse or promote products derived 51e705c121SKalle Valo * from this software without specific prior written permission. 52e705c121SKalle Valo * 53e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 54e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 55e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 56e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 57e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 58e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 59e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 63e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64e705c121SKalle Valo * 65e705c121SKalle Valo *****************************************************************************/ 66e705c121SKalle Valo #include <net/mac80211.h> 67854d773eSSara Sharon #include <linux/netdevice.h> 68da2830acSLuca Coelho #include <linux/acpi.h> 69e705c121SKalle Valo 70e705c121SKalle Valo #include "iwl-trans.h" 71e705c121SKalle Valo #include "iwl-op-mode.h" 72e705c121SKalle Valo #include "iwl-fw.h" 73e705c121SKalle Valo #include "iwl-debug.h" 74e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 75e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 76e705c121SKalle Valo #include "iwl-prph.h" 77e705c121SKalle Valo #include "iwl-eeprom-parse.h" 78e705c121SKalle Valo 79e705c121SKalle Valo #include "mvm.h" 802f89a5d7SGolan Ben-Ami #include "fw-dbg.h" 81e705c121SKalle Valo #include "iwl-phy-db.h" 82e705c121SKalle Valo 83e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 84e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 85e705c121SKalle Valo 86e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 87e705c121SKalle Valo 88e705c121SKalle Valo struct iwl_mvm_alive_data { 89e705c121SKalle Valo bool valid; 90e705c121SKalle Valo u32 scd_base_addr; 91e705c121SKalle Valo }; 92e705c121SKalle Valo 93e705c121SKalle Valo static inline const struct fw_img * 94e705c121SKalle Valo iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type) 95e705c121SKalle Valo { 96e705c121SKalle Valo if (ucode_type >= IWL_UCODE_TYPE_MAX) 97e705c121SKalle Valo return NULL; 98e705c121SKalle Valo 99e705c121SKalle Valo return &mvm->fw->img[ucode_type]; 100e705c121SKalle Valo } 101e705c121SKalle Valo 102e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 103e705c121SKalle Valo { 104e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 105e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 106e705c121SKalle Valo }; 107e705c121SKalle Valo 108e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 109e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 110e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 111e705c121SKalle Valo } 112e705c121SKalle Valo 11343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 11443413a97SSara Sharon { 11543413a97SSara Sharon int i; 11643413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 11743413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 11843413a97SSara Sharon .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | 119854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV4_UDP | 12043413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | 12143413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_TCP | 122854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV6_UDP | 12343413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, 12443413a97SSara Sharon }; 12543413a97SSara Sharon 126f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 127f43495fdSSara Sharon return 0; 128f43495fdSSara Sharon 129854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 13043413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 131854d773eSSara Sharon cmd.indirection_table[i] = 132854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 133854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 13443413a97SSara Sharon 13543413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 13643413a97SSara Sharon } 13743413a97SSara Sharon 13897d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 13997d5be7eSLiad Kaufman { 14097d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 14197d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 14297d5be7eSLiad Kaufman }; 14397d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 14497d5be7eSLiad Kaufman int ret; 14597d5be7eSLiad Kaufman 14697d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 14797d5be7eSLiad Kaufman if (ret) 14897d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 14997d5be7eSLiad Kaufman else 15097d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 15197d5be7eSLiad Kaufman 15297d5be7eSLiad Kaufman return ret; 15397d5be7eSLiad Kaufman } 15497d5be7eSLiad Kaufman 155905e36aeSMatti Gottlieb void iwl_free_fw_paging(struct iwl_mvm *mvm) 156e705c121SKalle Valo { 157e705c121SKalle Valo int i; 158e705c121SKalle Valo 159e705c121SKalle Valo if (!mvm->fw_paging_db[0].fw_paging_block) 160e705c121SKalle Valo return; 161e705c121SKalle Valo 162e705c121SKalle Valo for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) { 1633edbc7daSEmmanuel Grumbach struct iwl_fw_paging *paging = &mvm->fw_paging_db[i]; 1643edbc7daSEmmanuel Grumbach 1653edbc7daSEmmanuel Grumbach if (!paging->fw_paging_block) { 166e705c121SKalle Valo IWL_DEBUG_FW(mvm, 167e705c121SKalle Valo "Paging: block %d already freed, continue to next page\n", 168e705c121SKalle Valo i); 169e705c121SKalle Valo 170e705c121SKalle Valo continue; 171e705c121SKalle Valo } 1723edbc7daSEmmanuel Grumbach dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys, 1733edbc7daSEmmanuel Grumbach paging->fw_paging_size, DMA_BIDIRECTIONAL); 174e705c121SKalle Valo 1753edbc7daSEmmanuel Grumbach __free_pages(paging->fw_paging_block, 1763edbc7daSEmmanuel Grumbach get_order(paging->fw_paging_size)); 1773edbc7daSEmmanuel Grumbach paging->fw_paging_block = NULL; 178e705c121SKalle Valo } 179e705c121SKalle Valo kfree(mvm->trans->paging_download_buf); 180905e36aeSMatti Gottlieb mvm->trans->paging_download_buf = NULL; 181f742aaf3SMatti Gottlieb mvm->trans->paging_db = NULL; 182905e36aeSMatti Gottlieb 183e705c121SKalle Valo memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db)); 184e705c121SKalle Valo } 185e705c121SKalle Valo 186e705c121SKalle Valo static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image) 187e705c121SKalle Valo { 188e705c121SKalle Valo int sec_idx, idx; 189e705c121SKalle Valo u32 offset = 0; 190e705c121SKalle Valo 191e705c121SKalle Valo /* 192e705c121SKalle Valo * find where is the paging image start point: 193e705c121SKalle Valo * if CPU2 exist and it's in paging format, then the image looks like: 194e705c121SKalle Valo * CPU1 sections (2 or more) 195e705c121SKalle Valo * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2 196e705c121SKalle Valo * CPU2 sections (not paged) 197e705c121SKalle Valo * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2 198e705c121SKalle Valo * non paged to CPU2 paging sec 199e705c121SKalle Valo * CPU2 paging CSS 200e705c121SKalle Valo * CPU2 paging image (including instruction and data) 201e705c121SKalle Valo */ 202e705c121SKalle Valo for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) { 203e705c121SKalle Valo if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) { 204e705c121SKalle Valo sec_idx++; 205e705c121SKalle Valo break; 206e705c121SKalle Valo } 207e705c121SKalle Valo } 208e705c121SKalle Valo 209cd47a3d3SMatti Gottlieb /* 210cd47a3d3SMatti Gottlieb * If paging is enabled there should be at least 2 more sections left 211cd47a3d3SMatti Gottlieb * (one for CSS and one for Paging data) 212cd47a3d3SMatti Gottlieb */ 213cd47a3d3SMatti Gottlieb if (sec_idx >= ARRAY_SIZE(image->sec) - 1) { 214cd47a3d3SMatti Gottlieb IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n"); 215e705c121SKalle Valo iwl_free_fw_paging(mvm); 216e705c121SKalle Valo return -EINVAL; 217e705c121SKalle Valo } 218e705c121SKalle Valo 219e705c121SKalle Valo /* copy the CSS block to the dram */ 220e705c121SKalle Valo IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n", 221e705c121SKalle Valo sec_idx); 222e705c121SKalle Valo 223e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block), 224e705c121SKalle Valo image->sec[sec_idx].data, 225e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 226e705c121SKalle Valo 227e705c121SKalle Valo IWL_DEBUG_FW(mvm, 228e705c121SKalle Valo "Paging: copied %d CSS bytes to first block\n", 229e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 230e705c121SKalle Valo 231e705c121SKalle Valo sec_idx++; 232e705c121SKalle Valo 233e705c121SKalle Valo /* 234e705c121SKalle Valo * copy the paging blocks to the dram 235e705c121SKalle Valo * loop index start from 1 since that CSS block already copied to dram 236e705c121SKalle Valo * and CSS index is 0. 237e705c121SKalle Valo * loop stop at num_of_paging_blk since that last block is not full. 238e705c121SKalle Valo */ 239e705c121SKalle Valo for (idx = 1; idx < mvm->num_of_paging_blk; idx++) { 240e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 241e705c121SKalle Valo image->sec[sec_idx].data + offset, 242e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size); 243e705c121SKalle Valo 244e705c121SKalle Valo IWL_DEBUG_FW(mvm, 245e705c121SKalle Valo "Paging: copied %d paging bytes to block %d\n", 246e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size, 247e705c121SKalle Valo idx); 248e705c121SKalle Valo 249e705c121SKalle Valo offset += mvm->fw_paging_db[idx].fw_paging_size; 250e705c121SKalle Valo } 251e705c121SKalle Valo 252e705c121SKalle Valo /* copy the last paging block */ 253e705c121SKalle Valo if (mvm->num_of_pages_in_last_blk > 0) { 254e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 255e705c121SKalle Valo image->sec[sec_idx].data + offset, 256e705c121SKalle Valo FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk); 257e705c121SKalle Valo 258e705c121SKalle Valo IWL_DEBUG_FW(mvm, 259e705c121SKalle Valo "Paging: copied %d pages in the last block %d\n", 260e705c121SKalle Valo mvm->num_of_pages_in_last_blk, idx); 261e705c121SKalle Valo } 262e705c121SKalle Valo 263e705c121SKalle Valo return 0; 264e705c121SKalle Valo } 265e705c121SKalle Valo 266e705c121SKalle Valo static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm, 267e705c121SKalle Valo const struct fw_img *image) 268e705c121SKalle Valo { 269e705c121SKalle Valo struct page *block; 270e705c121SKalle Valo dma_addr_t phys = 0; 271e705c121SKalle Valo int blk_idx = 0; 272e705c121SKalle Valo int order, num_of_pages; 273e705c121SKalle Valo int dma_enabled; 274e705c121SKalle Valo 275e705c121SKalle Valo if (mvm->fw_paging_db[0].fw_paging_block) 276e705c121SKalle Valo return 0; 277e705c121SKalle Valo 278e705c121SKalle Valo dma_enabled = is_device_dma_capable(mvm->trans->dev); 279e705c121SKalle Valo 280e705c121SKalle Valo /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */ 281e705c121SKalle Valo BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE); 282e705c121SKalle Valo 283e705c121SKalle Valo num_of_pages = image->paging_mem_size / FW_PAGING_SIZE; 284e705c121SKalle Valo mvm->num_of_paging_blk = ((num_of_pages - 1) / 285e705c121SKalle Valo NUM_OF_PAGE_PER_GROUP) + 1; 286e705c121SKalle Valo 287e705c121SKalle Valo mvm->num_of_pages_in_last_blk = 288e705c121SKalle Valo num_of_pages - 289e705c121SKalle Valo NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1); 290e705c121SKalle Valo 291e705c121SKalle Valo IWL_DEBUG_FW(mvm, 292e705c121SKalle Valo "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n", 293e705c121SKalle Valo mvm->num_of_paging_blk, 294e705c121SKalle Valo mvm->num_of_pages_in_last_blk); 295e705c121SKalle Valo 296e705c121SKalle Valo /* allocate block of 4Kbytes for paging CSS */ 297e705c121SKalle Valo order = get_order(FW_PAGING_SIZE); 298e705c121SKalle Valo block = alloc_pages(GFP_KERNEL, order); 299e705c121SKalle Valo if (!block) { 300e705c121SKalle Valo /* free all the previous pages since we failed */ 301e705c121SKalle Valo iwl_free_fw_paging(mvm); 302e705c121SKalle Valo return -ENOMEM; 303e705c121SKalle Valo } 304e705c121SKalle Valo 305e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_block = block; 306e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE; 307e705c121SKalle Valo 308e705c121SKalle Valo if (dma_enabled) { 309e705c121SKalle Valo phys = dma_map_page(mvm->trans->dev, block, 0, 310e705c121SKalle Valo PAGE_SIZE << order, DMA_BIDIRECTIONAL); 311e705c121SKalle Valo if (dma_mapping_error(mvm->trans->dev, phys)) { 312e705c121SKalle Valo /* 313e705c121SKalle Valo * free the previous pages and the current one since 314e705c121SKalle Valo * we failed to map_page. 315e705c121SKalle Valo */ 316e705c121SKalle Valo iwl_free_fw_paging(mvm); 317e705c121SKalle Valo return -ENOMEM; 318e705c121SKalle Valo } 319e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; 320e705c121SKalle Valo } else { 321e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG | 322e705c121SKalle Valo blk_idx << BLOCK_2_EXP_SIZE; 323e705c121SKalle Valo } 324e705c121SKalle Valo 325e705c121SKalle Valo IWL_DEBUG_FW(mvm, 326e705c121SKalle Valo "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n", 327e705c121SKalle Valo order); 328e705c121SKalle Valo 329e705c121SKalle Valo /* 330e705c121SKalle Valo * allocate blocks in dram. 331e705c121SKalle Valo * since that CSS allocated in fw_paging_db[0] loop start from index 1 332e705c121SKalle Valo */ 333e705c121SKalle Valo for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 334e705c121SKalle Valo /* allocate block of PAGING_BLOCK_SIZE (32K) */ 335e705c121SKalle Valo order = get_order(PAGING_BLOCK_SIZE); 336e705c121SKalle Valo block = alloc_pages(GFP_KERNEL, order); 337e705c121SKalle Valo if (!block) { 338e705c121SKalle Valo /* free all the previous pages since we failed */ 339e705c121SKalle Valo iwl_free_fw_paging(mvm); 340e705c121SKalle Valo return -ENOMEM; 341e705c121SKalle Valo } 342e705c121SKalle Valo 343e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_block = block; 344e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE; 345e705c121SKalle Valo 346e705c121SKalle Valo if (dma_enabled) { 347e705c121SKalle Valo phys = dma_map_page(mvm->trans->dev, block, 0, 348e705c121SKalle Valo PAGE_SIZE << order, 349e705c121SKalle Valo DMA_BIDIRECTIONAL); 350e705c121SKalle Valo if (dma_mapping_error(mvm->trans->dev, phys)) { 351e705c121SKalle Valo /* 352e705c121SKalle Valo * free the previous pages and the current one 353e705c121SKalle Valo * since we failed to map_page. 354e705c121SKalle Valo */ 355e705c121SKalle Valo iwl_free_fw_paging(mvm); 356e705c121SKalle Valo return -ENOMEM; 357e705c121SKalle Valo } 358e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; 359e705c121SKalle Valo } else { 360e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = 361e705c121SKalle Valo PAGING_ADDR_SIG | 362e705c121SKalle Valo blk_idx << BLOCK_2_EXP_SIZE; 363e705c121SKalle Valo } 364e705c121SKalle Valo 365e705c121SKalle Valo IWL_DEBUG_FW(mvm, 366e705c121SKalle Valo "Paging: allocated 32K bytes (order %d) for firmware paging.\n", 367e705c121SKalle Valo order); 368e705c121SKalle Valo } 369e705c121SKalle Valo 370e705c121SKalle Valo return 0; 371e705c121SKalle Valo } 372e705c121SKalle Valo 373e705c121SKalle Valo static int iwl_save_fw_paging(struct iwl_mvm *mvm, 374e705c121SKalle Valo const struct fw_img *fw) 375e705c121SKalle Valo { 376e705c121SKalle Valo int ret; 377e705c121SKalle Valo 378e705c121SKalle Valo ret = iwl_alloc_fw_paging_mem(mvm, fw); 379e705c121SKalle Valo if (ret) 380e705c121SKalle Valo return ret; 381e705c121SKalle Valo 382e705c121SKalle Valo return iwl_fill_paging_mem(mvm, fw); 383e705c121SKalle Valo } 384e705c121SKalle Valo 385e705c121SKalle Valo /* send paging cmd to FW in case CPU2 has paging image */ 386e705c121SKalle Valo static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw) 387e705c121SKalle Valo { 388d975d720SSara Sharon struct iwl_fw_paging_cmd paging_cmd = { 389e705c121SKalle Valo .flags = 390e705c121SKalle Valo cpu_to_le32(PAGING_CMD_IS_SECURED | 391e705c121SKalle Valo PAGING_CMD_IS_ENABLED | 392e705c121SKalle Valo (mvm->num_of_pages_in_last_blk << 393e705c121SKalle Valo PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)), 394e705c121SKalle Valo .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE), 395e705c121SKalle Valo .block_num = cpu_to_le32(mvm->num_of_paging_blk), 396e705c121SKalle Valo }; 397d975d720SSara Sharon int blk_idx, size = sizeof(paging_cmd); 398d975d720SSara Sharon 399d975d720SSara Sharon /* A bit hard coded - but this is the old API and will be deprecated */ 400d975d720SSara Sharon if (!iwl_mvm_has_new_tx_api(mvm)) 401d975d720SSara Sharon size -= NUM_OF_FW_PAGING_BLOCKS * 4; 402e705c121SKalle Valo 403e705c121SKalle Valo /* loop for for all paging blocks + CSS block */ 404e705c121SKalle Valo for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 405d975d720SSara Sharon dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys; 406d975d720SSara Sharon 407d975d720SSara Sharon addr = addr >> PAGE_2_EXP_SIZE; 408d975d720SSara Sharon 409d975d720SSara Sharon if (iwl_mvm_has_new_tx_api(mvm)) { 410d975d720SSara Sharon __le64 phy_addr = cpu_to_le64(addr); 411d975d720SSara Sharon 412d975d720SSara Sharon paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr; 413d975d720SSara Sharon } else { 414d975d720SSara Sharon __le32 phy_addr = cpu_to_le32(addr); 415d975d720SSara Sharon 416d975d720SSara Sharon paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr; 417d975d720SSara Sharon } 418e705c121SKalle Valo } 419e705c121SKalle Valo 420e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD, 421e705c121SKalle Valo IWL_ALWAYS_LONG_GROUP, 0), 422d975d720SSara Sharon 0, size, &paging_cmd); 423e705c121SKalle Valo } 424e705c121SKalle Valo 425e705c121SKalle Valo /* 426e705c121SKalle Valo * Send paging item cmd to FW in case CPU2 has paging image 427e705c121SKalle Valo */ 428e705c121SKalle Valo static int iwl_trans_get_paging_item(struct iwl_mvm *mvm) 429e705c121SKalle Valo { 430e705c121SKalle Valo int ret; 431e705c121SKalle Valo struct iwl_fw_get_item_cmd fw_get_item_cmd = { 432e705c121SKalle Valo .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING), 433e705c121SKalle Valo }; 434e705c121SKalle Valo 435e705c121SKalle Valo struct iwl_fw_get_item_resp *item_resp; 436e705c121SKalle Valo struct iwl_host_cmd cmd = { 437e705c121SKalle Valo .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0), 438e705c121SKalle Valo .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 439e705c121SKalle Valo .data = { &fw_get_item_cmd, }, 440e705c121SKalle Valo }; 441e705c121SKalle Valo 442e705c121SKalle Valo cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd); 443e705c121SKalle Valo 444e705c121SKalle Valo ret = iwl_mvm_send_cmd(mvm, &cmd); 445e705c121SKalle Valo if (ret) { 446e705c121SKalle Valo IWL_ERR(mvm, 447e705c121SKalle Valo "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n", 448e705c121SKalle Valo ret); 449e705c121SKalle Valo return ret; 450e705c121SKalle Valo } 451e705c121SKalle Valo 452e705c121SKalle Valo item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data; 453e705c121SKalle Valo if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) { 454e705c121SKalle Valo IWL_ERR(mvm, 455e705c121SKalle Valo "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n", 456e705c121SKalle Valo le32_to_cpu(item_resp->item_id)); 457e705c121SKalle Valo ret = -EIO; 458e705c121SKalle Valo goto exit; 459e705c121SKalle Valo } 460e705c121SKalle Valo 461c94d7996SMatti Gottlieb /* Add an extra page for headers */ 462c94d7996SMatti Gottlieb mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE + 463c94d7996SMatti Gottlieb FW_PAGING_SIZE, 464e705c121SKalle Valo GFP_KERNEL); 465e705c121SKalle Valo if (!mvm->trans->paging_download_buf) { 466e705c121SKalle Valo ret = -ENOMEM; 467e705c121SKalle Valo goto exit; 468e705c121SKalle Valo } 469e705c121SKalle Valo mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val); 470e705c121SKalle Valo mvm->trans->paging_db = mvm->fw_paging_db; 471e705c121SKalle Valo IWL_DEBUG_FW(mvm, 472e705c121SKalle Valo "Paging: got paging request address (paging_req_addr 0x%08x)\n", 473e705c121SKalle Valo mvm->trans->paging_req_addr); 474e705c121SKalle Valo 475e705c121SKalle Valo exit: 476e705c121SKalle Valo iwl_free_resp(&cmd); 477e705c121SKalle Valo 478e705c121SKalle Valo return ret; 479e705c121SKalle Valo } 480e705c121SKalle Valo 481e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 482e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 483e705c121SKalle Valo { 484e705c121SKalle Valo struct iwl_mvm *mvm = 485e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 486e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 487e705c121SKalle Valo struct mvm_alive_resp_ver1 *palive1; 488e705c121SKalle Valo struct mvm_alive_resp_ver2 *palive2; 489e705c121SKalle Valo struct mvm_alive_resp *palive; 490e705c121SKalle Valo 491e705c121SKalle Valo if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) { 492e705c121SKalle Valo palive1 = (void *)pkt->data; 493e705c121SKalle Valo 494e705c121SKalle Valo mvm->support_umac_log = false; 495e705c121SKalle Valo mvm->error_event_table = 496e705c121SKalle Valo le32_to_cpu(palive1->error_event_table_ptr); 497e705c121SKalle Valo mvm->log_event_table = 498e705c121SKalle Valo le32_to_cpu(palive1->log_event_table_ptr); 499e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr); 500e705c121SKalle Valo 501e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive1->status) == 502e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 503e705c121SKalle Valo IWL_DEBUG_FW(mvm, 504e705c121SKalle Valo "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 505e705c121SKalle Valo le16_to_cpu(palive1->status), palive1->ver_type, 506e705c121SKalle Valo palive1->ver_subtype, palive1->flags); 507e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) { 508e705c121SKalle Valo palive2 = (void *)pkt->data; 509e705c121SKalle Valo 510e705c121SKalle Valo mvm->error_event_table = 511e705c121SKalle Valo le32_to_cpu(palive2->error_event_table_ptr); 512e705c121SKalle Valo mvm->log_event_table = 513e705c121SKalle Valo le32_to_cpu(palive2->log_event_table_ptr); 514e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr); 515e705c121SKalle Valo mvm->umac_error_event_table = 516e705c121SKalle Valo le32_to_cpu(palive2->error_info_addr); 517e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr); 518e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size); 519e705c121SKalle Valo 520e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive2->status) == 521e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 522e705c121SKalle Valo if (mvm->umac_error_event_table) 523e705c121SKalle Valo mvm->support_umac_log = true; 524e705c121SKalle Valo 525e705c121SKalle Valo IWL_DEBUG_FW(mvm, 526e705c121SKalle Valo "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 527e705c121SKalle Valo le16_to_cpu(palive2->status), palive2->ver_type, 528e705c121SKalle Valo palive2->ver_subtype, palive2->flags); 529e705c121SKalle Valo 530e705c121SKalle Valo IWL_DEBUG_FW(mvm, 531e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 532e705c121SKalle Valo palive2->umac_major, palive2->umac_minor); 533e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 534e705c121SKalle Valo palive = (void *)pkt->data; 535e705c121SKalle Valo 536e705c121SKalle Valo mvm->error_event_table = 537e705c121SKalle Valo le32_to_cpu(palive->error_event_table_ptr); 538e705c121SKalle Valo mvm->log_event_table = 539e705c121SKalle Valo le32_to_cpu(palive->log_event_table_ptr); 540e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr); 541e705c121SKalle Valo mvm->umac_error_event_table = 542e705c121SKalle Valo le32_to_cpu(palive->error_info_addr); 543e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr); 544e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size); 545e705c121SKalle Valo 546e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive->status) == 547e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 548e705c121SKalle Valo if (mvm->umac_error_event_table) 549e705c121SKalle Valo mvm->support_umac_log = true; 550e705c121SKalle Valo 551e705c121SKalle Valo IWL_DEBUG_FW(mvm, 552e705c121SKalle Valo "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 553e705c121SKalle Valo le16_to_cpu(palive->status), palive->ver_type, 554e705c121SKalle Valo palive->ver_subtype, palive->flags); 555e705c121SKalle Valo 556e705c121SKalle Valo IWL_DEBUG_FW(mvm, 557e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 558e705c121SKalle Valo le32_to_cpu(palive->umac_major), 559e705c121SKalle Valo le32_to_cpu(palive->umac_minor)); 560e705c121SKalle Valo } 561e705c121SKalle Valo 562e705c121SKalle Valo return true; 563e705c121SKalle Valo } 564e705c121SKalle Valo 565e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 566e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 567e705c121SKalle Valo { 568e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 569e705c121SKalle Valo 570e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 571e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 572e705c121SKalle Valo return true; 573e705c121SKalle Valo } 574e705c121SKalle Valo 575ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 576e705c121SKalle Valo 577e705c121SKalle Valo return false; 578e705c121SKalle Valo } 579e705c121SKalle Valo 580e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 581e705c121SKalle Valo enum iwl_ucode_type ucode_type) 582e705c121SKalle Valo { 583e705c121SKalle Valo struct iwl_notification_wait alive_wait; 584e705c121SKalle Valo struct iwl_mvm_alive_data alive_data; 585e705c121SKalle Valo const struct fw_img *fw; 586e705c121SKalle Valo int ret, i; 587e705c121SKalle Valo enum iwl_ucode_type old_type = mvm->cur_ucode; 588e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 589e705c121SKalle Valo struct iwl_sf_region st_fwrd_space; 590e705c121SKalle Valo 591e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 5923d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 5933d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 5943d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 595e705c121SKalle Valo fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER); 596e705c121SKalle Valo else 597e705c121SKalle Valo fw = iwl_get_ucode_image(mvm, ucode_type); 598e705c121SKalle Valo if (WARN_ON(!fw)) 599e705c121SKalle Valo return -EINVAL; 600e705c121SKalle Valo mvm->cur_ucode = ucode_type; 601e705c121SKalle Valo mvm->ucode_loaded = false; 602e705c121SKalle Valo 603e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 604e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 605e705c121SKalle Valo iwl_alive_fn, &alive_data); 606e705c121SKalle Valo 607e705c121SKalle Valo ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); 608e705c121SKalle Valo if (ret) { 609e705c121SKalle Valo mvm->cur_ucode = old_type; 610e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 611e705c121SKalle Valo return ret; 612e705c121SKalle Valo } 613e705c121SKalle Valo 614e705c121SKalle Valo /* 615e705c121SKalle Valo * Some things may run in the background now, but we 616e705c121SKalle Valo * just wait for the ALIVE notification here. 617e705c121SKalle Valo */ 618e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 619e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 620e705c121SKalle Valo if (ret) { 621e705c121SKalle Valo if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) 622e705c121SKalle Valo IWL_ERR(mvm, 623e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 624e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_1_STATUS), 625e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_2_STATUS)); 626e705c121SKalle Valo mvm->cur_ucode = old_type; 627e705c121SKalle Valo return ret; 628e705c121SKalle Valo } 629e705c121SKalle Valo 630e705c121SKalle Valo if (!alive_data.valid) { 631e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 632e705c121SKalle Valo mvm->cur_ucode = old_type; 633e705c121SKalle Valo return -EIO; 634e705c121SKalle Valo } 635e705c121SKalle Valo 636e705c121SKalle Valo /* 637e705c121SKalle Valo * update the sdio allocation according to the pointer we get in the 638e705c121SKalle Valo * alive notification. 639e705c121SKalle Valo */ 640e705c121SKalle Valo st_fwrd_space.addr = mvm->sf_space.addr; 641e705c121SKalle Valo st_fwrd_space.size = mvm->sf_space.size; 642e705c121SKalle Valo ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space); 643e705c121SKalle Valo if (ret) { 644e705c121SKalle Valo IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret); 645e705c121SKalle Valo return ret; 646e705c121SKalle Valo } 647e705c121SKalle Valo 648e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 649e705c121SKalle Valo 650e705c121SKalle Valo /* 651e705c121SKalle Valo * configure and operate fw paging mechanism. 652e705c121SKalle Valo * driver configures the paging flow only once, CPU2 paging image 653e705c121SKalle Valo * included in the IWL_UCODE_INIT image. 654e705c121SKalle Valo */ 655e705c121SKalle Valo if (fw->paging_mem_size) { 656e705c121SKalle Valo /* 657e705c121SKalle Valo * When dma is not enabled, the driver needs to copy / write 658e705c121SKalle Valo * the downloaded / uploaded page to / from the smem. 659e705c121SKalle Valo * This gets the location of the place were the pages are 660e705c121SKalle Valo * stored. 661e705c121SKalle Valo */ 662e705c121SKalle Valo if (!is_device_dma_capable(mvm->trans->dev)) { 663e705c121SKalle Valo ret = iwl_trans_get_paging_item(mvm); 664e705c121SKalle Valo if (ret) { 665e705c121SKalle Valo IWL_ERR(mvm, "failed to get FW paging item\n"); 666e705c121SKalle Valo return ret; 667e705c121SKalle Valo } 668e705c121SKalle Valo } 669e705c121SKalle Valo 670e705c121SKalle Valo ret = iwl_save_fw_paging(mvm, fw); 671e705c121SKalle Valo if (ret) { 672e705c121SKalle Valo IWL_ERR(mvm, "failed to save the FW paging image\n"); 673e705c121SKalle Valo return ret; 674e705c121SKalle Valo } 675e705c121SKalle Valo 676e705c121SKalle Valo ret = iwl_send_paging_cmd(mvm, fw); 677e705c121SKalle Valo if (ret) { 678e705c121SKalle Valo IWL_ERR(mvm, "failed to send the paging cmd\n"); 679e705c121SKalle Valo iwl_free_fw_paging(mvm); 680e705c121SKalle Valo return ret; 681e705c121SKalle Valo } 682e705c121SKalle Valo } 683e705c121SKalle Valo 684e705c121SKalle Valo /* 685e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 686e705c121SKalle Valo * initialization, but in firmware restart scenarios they 687e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 688e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 689e705c121SKalle Valo * reconfiguration completes. During normal startup, they 690e705c121SKalle Valo * will be empty. 691e705c121SKalle Valo */ 692e705c121SKalle Valo 693e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 694097129c9SLiad Kaufman if (iwl_mvm_is_dqa_supported(mvm)) 695097129c9SLiad Kaufman mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; 696097129c9SLiad Kaufman else 697e705c121SKalle Valo mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1; 698e705c121SKalle Valo 699e705c121SKalle Valo for (i = 0; i < IEEE80211_MAX_QUEUES; i++) 700e705c121SKalle Valo atomic_set(&mvm->mac80211_queue_stop_count[i], 0); 701e705c121SKalle Valo 702e705c121SKalle Valo mvm->ucode_loaded = true; 703e705c121SKalle Valo 704e705c121SKalle Valo return 0; 705e705c121SKalle Valo } 706e705c121SKalle Valo 707e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 708e705c121SKalle Valo { 709e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 710e705c121SKalle Valo enum iwl_ucode_type ucode_type = mvm->cur_ucode; 711e705c121SKalle Valo 712e705c121SKalle Valo /* Set parameters */ 713e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 714e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 715e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 716e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 717e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 718e705c121SKalle Valo 719e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 720e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 721e705c121SKalle Valo 722e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 723e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 724e705c121SKalle Valo } 725e705c121SKalle Valo 726e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 727e705c121SKalle Valo { 728e705c121SKalle Valo struct iwl_notification_wait calib_wait; 729e705c121SKalle Valo static const u16 init_complete[] = { 730e705c121SKalle Valo INIT_COMPLETE_NOTIF, 731e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 732e705c121SKalle Valo }; 733e705c121SKalle Valo int ret; 734e705c121SKalle Valo 735e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 736e705c121SKalle Valo 737e705c121SKalle Valo if (WARN_ON_ONCE(mvm->calibrating)) 738e705c121SKalle Valo return 0; 739e705c121SKalle Valo 740e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 741e705c121SKalle Valo &calib_wait, 742e705c121SKalle Valo init_complete, 743e705c121SKalle Valo ARRAY_SIZE(init_complete), 744e705c121SKalle Valo iwl_wait_phy_db_entry, 745e705c121SKalle Valo mvm->phy_db); 746e705c121SKalle Valo 747e705c121SKalle Valo /* Will also start the device */ 748e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 749e705c121SKalle Valo if (ret) { 750e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 751e705c121SKalle Valo goto error; 752e705c121SKalle Valo } 753e705c121SKalle Valo 754e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 755e705c121SKalle Valo if (ret) 756e705c121SKalle Valo goto error; 757e705c121SKalle Valo 758e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 759e705c121SKalle Valo if (read_nvm) { 760e705c121SKalle Valo /* Read nvm */ 761e705c121SKalle Valo ret = iwl_nvm_init(mvm, true); 762e705c121SKalle Valo if (ret) { 763e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 764e705c121SKalle Valo goto error; 765e705c121SKalle Valo } 766e705c121SKalle Valo } 767e705c121SKalle Valo 768e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 769e705c121SKalle Valo if (mvm->nvm_file_name) 770e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 771e705c121SKalle Valo 772e705c121SKalle Valo ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); 773e705c121SKalle Valo WARN_ON(ret); 774e705c121SKalle Valo 775e705c121SKalle Valo /* 776e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 777e705c121SKalle Valo * the init seq later when RF kill will switch to off 778e705c121SKalle Valo */ 779e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 780e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 781e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 782e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 783e705c121SKalle Valo ret = 1; 784e705c121SKalle Valo goto out; 785e705c121SKalle Valo } 786e705c121SKalle Valo 787e705c121SKalle Valo mvm->calibrating = true; 788e705c121SKalle Valo 789e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 790e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 791e705c121SKalle Valo if (ret) 792e705c121SKalle Valo goto error; 793e705c121SKalle Valo 794e705c121SKalle Valo /* 795e705c121SKalle Valo * Send phy configurations command to init uCode 796e705c121SKalle Valo * to start the 16.0 uCode init image internal calibrations. 797e705c121SKalle Valo */ 798e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 799e705c121SKalle Valo if (ret) { 800e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 801e705c121SKalle Valo ret); 802e705c121SKalle Valo goto error; 803e705c121SKalle Valo } 804e705c121SKalle Valo 805e705c121SKalle Valo /* 806e705c121SKalle Valo * Some things may run in the background now, but we 807e705c121SKalle Valo * just wait for the calibration complete notification. 808e705c121SKalle Valo */ 809e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 810e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 811e705c121SKalle Valo 812e705c121SKalle Valo if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { 813e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 814e705c121SKalle Valo ret = 1; 815e705c121SKalle Valo } 816e705c121SKalle Valo goto out; 817e705c121SKalle Valo 818e705c121SKalle Valo error: 819e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 820e705c121SKalle Valo out: 821e705c121SKalle Valo mvm->calibrating = false; 822e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 823e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 824e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 825e705c121SKalle Valo sizeof(struct ieee80211_channel) + 826e705c121SKalle Valo sizeof(struct ieee80211_rate), 827e705c121SKalle Valo GFP_KERNEL); 828e705c121SKalle Valo if (!mvm->nvm_data) 829e705c121SKalle Valo return -ENOMEM; 830e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 831e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 832e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 833e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 834e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 835e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 836e705c121SKalle Valo } 837e705c121SKalle Valo 838e705c121SKalle Valo return ret; 839e705c121SKalle Valo } 840e705c121SKalle Valo 841db06f04dSSara Sharon static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm, 842db06f04dSSara Sharon struct iwl_rx_packet *pkt) 843db06f04dSSara Sharon { 844db06f04dSSara Sharon struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data; 845db06f04dSSara Sharon int i; 846db06f04dSSara Sharon 847db06f04dSSara Sharon mvm->shared_mem_cfg.num_txfifo_entries = 848db06f04dSSara Sharon ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); 849db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) 850db06f04dSSara Sharon mvm->shared_mem_cfg.txfifo_size[i] = 851db06f04dSSara Sharon le32_to_cpu(mem_cfg->txfifo_size[i]); 852db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) 853db06f04dSSara Sharon mvm->shared_mem_cfg.rxfifo_size[i] = 854db06f04dSSara Sharon le32_to_cpu(mem_cfg->rxfifo_size[i]); 855db06f04dSSara Sharon 856db06f04dSSara Sharon BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != 857db06f04dSSara Sharon sizeof(mem_cfg->internal_txfifo_size)); 858db06f04dSSara Sharon 859db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); 860db06f04dSSara Sharon i++) 861db06f04dSSara Sharon mvm->shared_mem_cfg.internal_txfifo_size[i] = 862db06f04dSSara Sharon le32_to_cpu(mem_cfg->internal_txfifo_size[i]); 863db06f04dSSara Sharon } 864db06f04dSSara Sharon 865db06f04dSSara Sharon static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm, 866db06f04dSSara Sharon struct iwl_rx_packet *pkt) 867db06f04dSSara Sharon { 868db06f04dSSara Sharon struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data; 869db06f04dSSara Sharon int i; 870db06f04dSSara Sharon 871db06f04dSSara Sharon mvm->shared_mem_cfg.num_txfifo_entries = 872db06f04dSSara Sharon ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); 873db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) 874db06f04dSSara Sharon mvm->shared_mem_cfg.txfifo_size[i] = 875db06f04dSSara Sharon le32_to_cpu(mem_cfg->txfifo_size[i]); 876db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) 877db06f04dSSara Sharon mvm->shared_mem_cfg.rxfifo_size[i] = 878db06f04dSSara Sharon le32_to_cpu(mem_cfg->rxfifo_size[i]); 879db06f04dSSara Sharon 880db06f04dSSara Sharon /* new API has more data, from rxfifo_addr field and on */ 881db06f04dSSara Sharon if (fw_has_capa(&mvm->fw->ucode_capa, 882db06f04dSSara Sharon IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) { 883db06f04dSSara Sharon BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != 884db06f04dSSara Sharon sizeof(mem_cfg->internal_txfifo_size)); 885db06f04dSSara Sharon 886db06f04dSSara Sharon for (i = 0; 887db06f04dSSara Sharon i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); 888db06f04dSSara Sharon i++) 889db06f04dSSara Sharon mvm->shared_mem_cfg.internal_txfifo_size[i] = 890db06f04dSSara Sharon le32_to_cpu(mem_cfg->internal_txfifo_size[i]); 891db06f04dSSara Sharon } 892db06f04dSSara Sharon } 893db06f04dSSara Sharon 894e705c121SKalle Valo static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm) 895e705c121SKalle Valo { 896e705c121SKalle Valo struct iwl_host_cmd cmd = { 897e705c121SKalle Valo .flags = CMD_WANT_SKB, 898e705c121SKalle Valo .data = { NULL, }, 899e705c121SKalle Valo .len = { 0, }, 900e705c121SKalle Valo }; 9015b086414SGolan Ben-Ami struct iwl_rx_packet *pkt; 902e705c121SKalle Valo 903e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 904e705c121SKalle Valo 9055b086414SGolan Ben-Ami if (fw_has_capa(&mvm->fw->ucode_capa, 9065b086414SGolan Ben-Ami IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) 9075b086414SGolan Ben-Ami cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0); 9085b086414SGolan Ben-Ami else 9095b086414SGolan Ben-Ami cmd.id = SHARED_MEM_CFG; 9105b086414SGolan Ben-Ami 911e705c121SKalle Valo if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd))) 912e705c121SKalle Valo return; 913e705c121SKalle Valo 914e705c121SKalle Valo pkt = cmd.resp_pkt; 915db06f04dSSara Sharon if (iwl_mvm_has_new_tx_api(mvm)) 916db06f04dSSara Sharon iwl_mvm_parse_shared_mem_a000(mvm, pkt); 917db06f04dSSara Sharon else 918db06f04dSSara Sharon iwl_mvm_parse_shared_mem(mvm, pkt); 9195b086414SGolan Ben-Ami 920e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n"); 921e705c121SKalle Valo 922e705c121SKalle Valo iwl_free_resp(&cmd); 923e705c121SKalle Valo } 924e705c121SKalle Valo 925e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 926e705c121SKalle Valo { 927e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 928e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 929e705c121SKalle Valo }; 930e705c121SKalle Valo 931e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 932e705c121SKalle Valo return 0; 933e705c121SKalle Valo 934e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 935e705c121SKalle Valo sizeof(cmd), &cmd); 936e705c121SKalle Valo } 937e705c121SKalle Valo 938da2830acSLuca Coelho #define ACPI_WRDS_METHOD "WRDS" 939da2830acSLuca Coelho #define ACPI_WRDS_WIFI (0x07) 940da2830acSLuca Coelho #define ACPI_WRDS_TABLE_SIZE 10 941da2830acSLuca Coelho 942da2830acSLuca Coelho struct iwl_mvm_sar_table { 943da2830acSLuca Coelho bool enabled; 944da2830acSLuca Coelho u8 values[ACPI_WRDS_TABLE_SIZE]; 945da2830acSLuca Coelho }; 946da2830acSLuca Coelho 947da2830acSLuca Coelho #ifdef CONFIG_ACPI 948da2830acSLuca Coelho static int iwl_mvm_sar_get_wrds(struct iwl_mvm *mvm, union acpi_object *wrds, 949da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 950da2830acSLuca Coelho { 951da2830acSLuca Coelho union acpi_object *data_pkg; 952da2830acSLuca Coelho u32 i; 953da2830acSLuca Coelho 954da2830acSLuca Coelho /* We need at least two packages, one for the revision and one 955da2830acSLuca Coelho * for the data itself. Also check that the revision is valid 956da2830acSLuca Coelho * (i.e. it is an integer set to 0). 957da2830acSLuca Coelho */ 958da2830acSLuca Coelho if (wrds->type != ACPI_TYPE_PACKAGE || 959da2830acSLuca Coelho wrds->package.count < 2 || 960da2830acSLuca Coelho wrds->package.elements[0].type != ACPI_TYPE_INTEGER || 961da2830acSLuca Coelho wrds->package.elements[0].integer.value != 0) { 962da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "Unsupported wrds structure\n"); 963da2830acSLuca Coelho return -EINVAL; 964da2830acSLuca Coelho } 965da2830acSLuca Coelho 966da2830acSLuca Coelho /* loop through all the packages to find the one for WiFi */ 967da2830acSLuca Coelho for (i = 1; i < wrds->package.count; i++) { 968da2830acSLuca Coelho union acpi_object *domain; 969da2830acSLuca Coelho 970da2830acSLuca Coelho data_pkg = &wrds->package.elements[i]; 971da2830acSLuca Coelho 972da2830acSLuca Coelho /* Skip anything that is not a package with the right 973da2830acSLuca Coelho * amount of elements (i.e. domain_type, 974da2830acSLuca Coelho * enabled/disabled plus the sar table size. 975da2830acSLuca Coelho */ 976da2830acSLuca Coelho if (data_pkg->type != ACPI_TYPE_PACKAGE || 977da2830acSLuca Coelho data_pkg->package.count != ACPI_WRDS_TABLE_SIZE + 2) 978da2830acSLuca Coelho continue; 979da2830acSLuca Coelho 980da2830acSLuca Coelho domain = &data_pkg->package.elements[0]; 981da2830acSLuca Coelho if (domain->type == ACPI_TYPE_INTEGER && 982da2830acSLuca Coelho domain->integer.value == ACPI_WRDS_WIFI) 983da2830acSLuca Coelho break; 984da2830acSLuca Coelho 985da2830acSLuca Coelho data_pkg = NULL; 986da2830acSLuca Coelho } 987da2830acSLuca Coelho 988da2830acSLuca Coelho if (!data_pkg) 989da2830acSLuca Coelho return -ENOENT; 990da2830acSLuca Coelho 991da2830acSLuca Coelho if (data_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) 992da2830acSLuca Coelho return -EINVAL; 993da2830acSLuca Coelho 994da2830acSLuca Coelho sar_table->enabled = !!(data_pkg->package.elements[1].integer.value); 995da2830acSLuca Coelho 996da2830acSLuca Coelho for (i = 0; i < ACPI_WRDS_TABLE_SIZE; i++) { 997da2830acSLuca Coelho union acpi_object *entry; 998da2830acSLuca Coelho 999da2830acSLuca Coelho entry = &data_pkg->package.elements[i + 2]; 1000da2830acSLuca Coelho if ((entry->type != ACPI_TYPE_INTEGER) || 1001da2830acSLuca Coelho (entry->integer.value > U8_MAX)) 1002da2830acSLuca Coelho return -EINVAL; 1003da2830acSLuca Coelho 1004da2830acSLuca Coelho sar_table->values[i] = entry->integer.value; 1005da2830acSLuca Coelho } 1006da2830acSLuca Coelho 1007da2830acSLuca Coelho return 0; 1008da2830acSLuca Coelho } 1009da2830acSLuca Coelho 1010da2830acSLuca Coelho static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm, 1011da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 1012da2830acSLuca Coelho { 1013da2830acSLuca Coelho acpi_handle root_handle; 1014da2830acSLuca Coelho acpi_handle handle; 1015da2830acSLuca Coelho struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL}; 1016da2830acSLuca Coelho acpi_status status; 1017da2830acSLuca Coelho int ret; 1018da2830acSLuca Coelho 1019da2830acSLuca Coelho root_handle = ACPI_HANDLE(mvm->dev); 1020da2830acSLuca Coelho if (!root_handle) { 1021da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 1022da2830acSLuca Coelho "Could not retrieve root port ACPI handle\n"); 1023da2830acSLuca Coelho return -ENOENT; 1024da2830acSLuca Coelho } 1025da2830acSLuca Coelho 1026da2830acSLuca Coelho /* Get the method's handle */ 1027da2830acSLuca Coelho status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD, 1028da2830acSLuca Coelho &handle); 1029da2830acSLuca Coelho if (ACPI_FAILURE(status)) { 1030da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "WRDS method not found\n"); 1031da2830acSLuca Coelho return -ENOENT; 1032da2830acSLuca Coelho } 1033da2830acSLuca Coelho 1034da2830acSLuca Coelho /* Call WRDS with no arguments */ 1035da2830acSLuca Coelho status = acpi_evaluate_object(handle, NULL, NULL, &wrds); 1036da2830acSLuca Coelho if (ACPI_FAILURE(status)) { 1037da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status); 1038da2830acSLuca Coelho return -ENOENT; 1039da2830acSLuca Coelho } 1040da2830acSLuca Coelho 1041da2830acSLuca Coelho ret = iwl_mvm_sar_get_wrds(mvm, wrds.pointer, sar_table); 1042da2830acSLuca Coelho kfree(wrds.pointer); 1043da2830acSLuca Coelho 1044da2830acSLuca Coelho return ret; 1045da2830acSLuca Coelho } 1046da2830acSLuca Coelho #else /* CONFIG_ACPI */ 1047da2830acSLuca Coelho static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm, 1048da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 1049da2830acSLuca Coelho { 1050da2830acSLuca Coelho return -ENOENT; 1051da2830acSLuca Coelho } 1052da2830acSLuca Coelho #endif /* CONFIG_ACPI */ 1053da2830acSLuca Coelho 1054da2830acSLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1055da2830acSLuca Coelho { 1056da2830acSLuca Coelho struct iwl_mvm_sar_table sar_table; 1057da2830acSLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 105855bfa4b9SLuca Coelho .v3.v2.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 1059da2830acSLuca Coelho }; 1060da2830acSLuca Coelho int ret, i, j, idx; 106155bfa4b9SLuca Coelho int len = sizeof(cmd); 1062da2830acSLuca Coelho 1063da2830acSLuca Coelho /* we can't do anything with the table if the FW doesn't support it */ 1064da2830acSLuca Coelho if (!fw_has_api(&mvm->fw->ucode_capa, 1065da2830acSLuca Coelho IWL_UCODE_TLV_API_TX_POWER_CHAIN)) { 1066da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 1067da2830acSLuca Coelho "FW doesn't support per-chain TX power settings.\n"); 1068da2830acSLuca Coelho return 0; 1069da2830acSLuca Coelho } 1070da2830acSLuca Coelho 107155bfa4b9SLuca Coelho if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 107255bfa4b9SLuca Coelho len = sizeof(cmd.v3); 107355bfa4b9SLuca Coelho 1074da2830acSLuca Coelho ret = iwl_mvm_sar_get_table(mvm, &sar_table); 1075da2830acSLuca Coelho if (ret < 0) { 1076da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 1077da2830acSLuca Coelho "SAR BIOS table invalid or unavailable. (%d)\n", 1078da2830acSLuca Coelho ret); 1079da2830acSLuca Coelho /* we don't fail if the table is not available */ 1080da2830acSLuca Coelho return 0; 1081da2830acSLuca Coelho } 1082da2830acSLuca Coelho 1083da2830acSLuca Coelho if (!sar_table.enabled) 1084da2830acSLuca Coelho return 0; 1085da2830acSLuca Coelho 1086da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 1087da2830acSLuca Coelho 1088da2830acSLuca Coelho BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS != 1089da2830acSLuca Coelho ACPI_WRDS_TABLE_SIZE); 1090da2830acSLuca Coelho 1091da2830acSLuca Coelho for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1092da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); 1093da2830acSLuca Coelho for (j = 0; j < IWL_NUM_SUB_BANDS; j++) { 1094da2830acSLuca Coelho idx = (i * IWL_NUM_SUB_BANDS) + j; 109555bfa4b9SLuca Coelho cmd.v3.per_chain_restriction[i][j] = 1096da2830acSLuca Coelho cpu_to_le16(sar_table.values[idx]); 1097da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", 1098da2830acSLuca Coelho j, sar_table.values[idx]); 1099da2830acSLuca Coelho } 1100da2830acSLuca Coelho } 1101da2830acSLuca Coelho 110255bfa4b9SLuca Coelho ret = iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 1103da2830acSLuca Coelho if (ret) 1104da2830acSLuca Coelho IWL_ERR(mvm, "failed to set per-chain TX power: %d\n", ret); 1105da2830acSLuca Coelho 1106da2830acSLuca Coelho return ret; 1107da2830acSLuca Coelho } 1108da2830acSLuca Coelho 1109e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1110e705c121SKalle Valo { 1111e705c121SKalle Valo int ret, i; 1112e705c121SKalle Valo struct ieee80211_channel *chan; 1113e705c121SKalle Valo struct cfg80211_chan_def chandef; 1114e705c121SKalle Valo 1115e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1116e705c121SKalle Valo 1117e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1118e705c121SKalle Valo if (ret) 1119e705c121SKalle Valo return ret; 1120e705c121SKalle Valo 1121e705c121SKalle Valo /* 1122e705c121SKalle Valo * If we haven't completed the run of the init ucode during 1123e705c121SKalle Valo * module loading, load init ucode now 1124e705c121SKalle Valo * (for example, if we were in RFKILL) 1125e705c121SKalle Valo */ 1126e705c121SKalle Valo ret = iwl_run_init_mvm_ucode(mvm, false); 1127e705c121SKalle Valo if (ret && !iwlmvm_mod_params.init_dbg) { 1128e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1129e705c121SKalle Valo /* this can't happen */ 1130e705c121SKalle Valo if (WARN_ON(ret > 0)) 1131e705c121SKalle Valo ret = -ERFKILL; 1132e705c121SKalle Valo goto error; 1133e705c121SKalle Valo } 1134e705c121SKalle Valo if (!iwlmvm_mod_params.init_dbg) { 1135e705c121SKalle Valo /* 1136e705c121SKalle Valo * Stop and start the transport without entering low power 1137e705c121SKalle Valo * mode. This will save the state of other components on the 1138e705c121SKalle Valo * device that are triggered by the INIT firwmare (MFUART). 1139e705c121SKalle Valo */ 1140e705c121SKalle Valo _iwl_trans_stop_device(mvm->trans, false); 1141e705c121SKalle Valo ret = _iwl_trans_start_hw(mvm->trans, false); 1142e705c121SKalle Valo if (ret) 1143e705c121SKalle Valo goto error; 1144e705c121SKalle Valo } 1145e705c121SKalle Valo 1146e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg) 1147e705c121SKalle Valo return 0; 1148e705c121SKalle Valo 1149e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 1150e705c121SKalle Valo if (ret) { 1151e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1152e705c121SKalle Valo goto error; 1153e705c121SKalle Valo } 1154e705c121SKalle Valo 1155e705c121SKalle Valo iwl_mvm_get_shared_mem_conf(mvm); 1156e705c121SKalle Valo 1157e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1158e705c121SKalle Valo if (ret) 1159e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1160e705c121SKalle Valo 1161e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_INVALID; 1162e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 1163e705c121SKalle Valo if (mvm->fw->dbg_dest_tlv) 1164e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE; 1165e705c121SKalle Valo iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE); 1166e705c121SKalle Valo 1167e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1168e705c121SKalle Valo if (ret) 1169e705c121SKalle Valo goto error; 1170e705c121SKalle Valo 1171e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 1172e705c121SKalle Valo if (ret) 1173e705c121SKalle Valo goto error; 1174e705c121SKalle Valo 1175e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1176e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1177e705c121SKalle Valo if (ret) 1178e705c121SKalle Valo goto error; 1179e705c121SKalle Valo 1180e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1181e705c121SKalle Valo if (ret) 1182e705c121SKalle Valo goto error; 1183e705c121SKalle Valo 118443413a97SSara Sharon /* Init RSS configuration */ 118543413a97SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 118643413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 118743413a97SSara Sharon if (ret) { 118843413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 118943413a97SSara Sharon ret); 119043413a97SSara Sharon goto error; 119143413a97SSara Sharon } 119243413a97SSara Sharon } 119343413a97SSara Sharon 1194e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1195e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1196e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1197e705c121SKalle Valo 1198e705c121SKalle Valo mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT; 1199e705c121SKalle Valo 1200e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1201e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1202e705c121SKalle Valo 120397d5be7eSLiad Kaufman /* Enable DQA-mode if required */ 120497d5be7eSLiad Kaufman if (iwl_mvm_is_dqa_supported(mvm)) { 120597d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 120697d5be7eSLiad Kaufman if (ret) 120797d5be7eSLiad Kaufman goto error; 120897d5be7eSLiad Kaufman } else { 120997d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n"); 121097d5be7eSLiad Kaufman } 121197d5be7eSLiad Kaufman 1212e705c121SKalle Valo /* Add auxiliary station for scanning */ 1213e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1214e705c121SKalle Valo if (ret) 1215e705c121SKalle Valo goto error; 1216e705c121SKalle Valo 1217e705c121SKalle Valo /* Add all the PHY contexts */ 121857fbcce3SJohannes Berg chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; 1219e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1220e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1221e705c121SKalle Valo /* 1222e705c121SKalle Valo * The channel used here isn't relevant as it's 1223e705c121SKalle Valo * going to be overwritten in the other flows. 1224e705c121SKalle Valo * For now use the first channel we have. 1225e705c121SKalle Valo */ 1226e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1227e705c121SKalle Valo &chandef, 1, 1); 1228e705c121SKalle Valo if (ret) 1229e705c121SKalle Valo goto error; 1230e705c121SKalle Valo } 1231e705c121SKalle Valo 1232c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL 1233c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1234c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1235c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1236c221daf2SChaya Rachel Ivgi * cmd during init time 1237c221daf2SChaya Rachel Ivgi */ 1238c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1239c221daf2SChaya Rachel Ivgi } else { 1240e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1241e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1242c221daf2SChaya Rachel Ivgi } 12435c89e7bcSChaya Rachel Ivgi 12445c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 12455c89e7bcSChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) 12465c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 12475c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 1248c221daf2SChaya Rachel Ivgi #else 1249c221daf2SChaya Rachel Ivgi /* Initialize tx backoffs to the minimal possible */ 1250c221daf2SChaya Rachel Ivgi iwl_mvm_tt_tx_backoff(mvm, 0); 1251c221daf2SChaya Rachel Ivgi #endif 1252e705c121SKalle Valo 1253e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1254e705c121SKalle Valo 1255e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1256e705c121SKalle Valo if (ret) 1257e705c121SKalle Valo goto error; 1258e705c121SKalle Valo 1259e705c121SKalle Valo /* 1260e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1261e705c121SKalle Valo * anyway, so don't init MCC. 1262e705c121SKalle Valo */ 1263e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1264e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1265e705c121SKalle Valo if (ret) 1266e705c121SKalle Valo goto error; 1267e705c121SKalle Valo } 1268e705c121SKalle Valo 1269e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 12704ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1271e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1272e705c121SKalle Valo if (ret) 1273e705c121SKalle Valo goto error; 1274e705c121SKalle Valo } 1275e705c121SKalle Valo 1276e705c121SKalle Valo if (iwl_mvm_is_csum_supported(mvm) && 1277e705c121SKalle Valo mvm->cfg->features & NETIF_F_RXCSUM) 1278e705c121SKalle Valo iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3); 1279e705c121SKalle Valo 1280e705c121SKalle Valo /* allow FW/transport low power modes if not during restart */ 1281e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1282e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); 1283e705c121SKalle Valo 1284da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 1285da2830acSLuca Coelho if (ret) 1286da2830acSLuca Coelho goto error; 1287da2830acSLuca Coelho 1288e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1289e705c121SKalle Valo return 0; 1290e705c121SKalle Valo error: 1291fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1292e705c121SKalle Valo return ret; 1293e705c121SKalle Valo } 1294e705c121SKalle Valo 1295e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1296e705c121SKalle Valo { 1297e705c121SKalle Valo int ret, i; 1298e705c121SKalle Valo 1299e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1300e705c121SKalle Valo 1301e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1302e705c121SKalle Valo if (ret) 1303e705c121SKalle Valo return ret; 1304e705c121SKalle Valo 1305e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1306e705c121SKalle Valo if (ret) { 1307e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1308e705c121SKalle Valo goto error; 1309e705c121SKalle Valo } 1310e705c121SKalle Valo 1311e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1312e705c121SKalle Valo if (ret) 1313e705c121SKalle Valo goto error; 1314e705c121SKalle Valo 1315e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1316e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1317e705c121SKalle Valo if (ret) 1318e705c121SKalle Valo goto error; 1319e705c121SKalle Valo 1320e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1321e705c121SKalle Valo if (ret) 1322e705c121SKalle Valo goto error; 1323e705c121SKalle Valo 1324e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1325e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1326e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1327e705c121SKalle Valo 1328e705c121SKalle Valo /* Add auxiliary station for scanning */ 1329e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1330e705c121SKalle Valo if (ret) 1331e705c121SKalle Valo goto error; 1332e705c121SKalle Valo 1333e705c121SKalle Valo return 0; 1334e705c121SKalle Valo error: 1335fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1336e705c121SKalle Valo return ret; 1337e705c121SKalle Valo } 1338e705c121SKalle Valo 1339e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1340e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1341e705c121SKalle Valo { 1342e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1343e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1344e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1345e705c121SKalle Valo 1346e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1347e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1348e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1349e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1350e705c121SKalle Valo "Reached" : "Not reached"); 1351e705c121SKalle Valo } 1352e705c121SKalle Valo 1353e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1354e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1355e705c121SKalle Valo { 1356e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1357e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1358e705c121SKalle Valo 1359e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1360e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1361e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1362e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1363e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1364e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 1365e705c121SKalle Valo } 1366