1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
9bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
10cceb4507SShahar S Matityahu  * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
11e705c121SKalle Valo  *
12e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
13e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
14e705c121SKalle Valo  * published by the Free Software Foundation.
15e705c121SKalle Valo  *
16e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
17e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
18e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19e705c121SKalle Valo  * General Public License for more details.
20e705c121SKalle Valo  *
21e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
22e705c121SKalle Valo  * in the file called COPYING.
23e705c121SKalle Valo  *
24e705c121SKalle Valo  * Contact Information:
25cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
26e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27e705c121SKalle Valo  *
28e705c121SKalle Valo  * BSD LICENSE
29e705c121SKalle Valo  *
30e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
31bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
32cceb4507SShahar S Matityahu  * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation
33e705c121SKalle Valo  * All rights reserved.
34e705c121SKalle Valo  *
35e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
36e705c121SKalle Valo  * modification, are permitted provided that the following conditions
37e705c121SKalle Valo  * are met:
38e705c121SKalle Valo  *
39e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
40e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
41e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
42e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
43e705c121SKalle Valo  *    the documentation and/or other materials provided with the
44e705c121SKalle Valo  *    distribution.
45e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
46e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
47e705c121SKalle Valo  *    from this software without specific prior written permission.
48e705c121SKalle Valo  *
49e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60e705c121SKalle Valo  *
61e705c121SKalle Valo  *****************************************************************************/
62e705c121SKalle Valo #include <net/mac80211.h>
63854d773eSSara Sharon #include <linux/netdevice.h>
64e705c121SKalle Valo 
65e705c121SKalle Valo #include "iwl-trans.h"
66e705c121SKalle Valo #include "iwl-op-mode.h"
67d962f9b1SJohannes Berg #include "fw/img.h"
68e705c121SKalle Valo #include "iwl-debug.h"
69e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
70e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
71e705c121SKalle Valo #include "iwl-prph.h"
72813df5ceSLuca Coelho #include "fw/acpi.h"
73b3e4c0f3SLuca Coelho #include "fw/pnvm.h"
74e705c121SKalle Valo 
75e705c121SKalle Valo #include "mvm.h"
767174beb6SJohannes Berg #include "fw/dbg.h"
77e705c121SKalle Valo #include "iwl-phy-db.h"
789c4f7d51SShaul Triebitz #include "iwl-modparams.h"
799c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
80e705c121SKalle Valo 
81b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
82e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
83e705c121SKalle Valo 
84e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
85e705c121SKalle Valo 
86e705c121SKalle Valo struct iwl_mvm_alive_data {
87e705c121SKalle Valo 	bool valid;
88e705c121SKalle Valo 	u32 scd_base_addr;
89e705c121SKalle Valo };
90e705c121SKalle Valo 
91e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
92e705c121SKalle Valo {
93e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
94e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
95e705c121SKalle Valo 	};
96e705c121SKalle Valo 
97e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
98e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
99e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
100e705c121SKalle Valo }
101e705c121SKalle Valo 
10243413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
10343413a97SSara Sharon {
10443413a97SSara Sharon 	int i;
10543413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
10643413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
107608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
108608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
109608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
110608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
111608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
112608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
11343413a97SSara Sharon 	};
11443413a97SSara Sharon 
115f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
116f43495fdSSara Sharon 		return 0;
117f43495fdSSara Sharon 
118854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
11943413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
120854d773eSSara Sharon 		cmd.indirection_table[i] =
121854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
122854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
12343413a97SSara Sharon 
12443413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
12543413a97SSara Sharon }
12643413a97SSara Sharon 
1278edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
1288edbfaa1SSara Sharon {
129dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
1308edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
131dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
132dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
133dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
134dbf592f3SJohannes Berg 	};
1358edbfaa1SSara Sharon 
13664f55156SLuca Coelho 	/*
13764f55156SLuca Coelho 	 * The default queue is configured via context info, so if we
13864f55156SLuca Coelho 	 * have a single queue, there's nothing to do here.
13964f55156SLuca Coelho 	 */
14064f55156SLuca Coelho 	if (mvm->trans->num_rx_queues == 1)
14164f55156SLuca Coelho 		return 0;
14264f55156SLuca Coelho 
14364f55156SLuca Coelho 	/* skip the default queue */
1448edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
1458edbfaa1SSara Sharon 
146dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
1478edbfaa1SSara Sharon 
1488edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
1498edbfaa1SSara Sharon 	if (!cmd)
1508edbfaa1SSara Sharon 		return -ENOMEM;
1518edbfaa1SSara Sharon 
1528edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
1538edbfaa1SSara Sharon 
1548edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1558edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1568edbfaa1SSara Sharon 
1578edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1588edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1598edbfaa1SSara Sharon 
1608edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1618edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1628edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1638edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1648edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1658edbfaa1SSara Sharon 	}
1668edbfaa1SSara Sharon 
167dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
168dbf592f3SJohannes Berg 	hcmd.len[0] = size;
169dbf592f3SJohannes Berg 
170dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
171dbf592f3SJohannes Berg 
172dbf592f3SJohannes Berg 	kfree(cmd);
173dbf592f3SJohannes Berg 
174dbf592f3SJohannes Berg 	return ret;
1758edbfaa1SSara Sharon }
1768edbfaa1SSara Sharon 
17797d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
17897d5be7eSLiad Kaufman {
17997d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
18097d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
18197d5be7eSLiad Kaufman 	};
18297d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
18397d5be7eSLiad Kaufman 	int ret;
18497d5be7eSLiad Kaufman 
18597d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
18697d5be7eSLiad Kaufman 	if (ret)
18797d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
18897d5be7eSLiad Kaufman 	else
18997d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
19097d5be7eSLiad Kaufman 
19197d5be7eSLiad Kaufman 	return ret;
19297d5be7eSLiad Kaufman }
19397d5be7eSLiad Kaufman 
194bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
195bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
196bdccdb85SGolan Ben-Ami {
197bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
198bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
199bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
200bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
201bdccdb85SGolan Ben-Ami 	int i;
202bdccdb85SGolan Ben-Ami 
203bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
204bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
205bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
206bdccdb85SGolan Ben-Ami 
207bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
208bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
209bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
210bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
211bdccdb85SGolan Ben-Ami 			       n_words + i,
212bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
213bdccdb85SGolan Ben-Ami }
214bdccdb85SGolan Ben-Ami 
215e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
216e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
217e705c121SKalle Valo {
218e705c121SKalle Valo 	struct iwl_mvm *mvm =
219e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
220e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
2215c228d63SSara Sharon 	struct iwl_umac_alive *umac;
2225c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
2235c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
2245c228d63SSara Sharon 	u16 status;
225cfa5d0caSMordechay Goodstein 	u32 lmac_error_event_table, umac_error_table;
226e705c121SKalle Valo 
22790824f2fSLuca Coelho 	/*
22890824f2fSLuca Coelho 	 * For v5 and above, we can check the version, for older
22990824f2fSLuca Coelho 	 * versions we need to check the size.
23090824f2fSLuca Coelho 	 */
231b4248c08SAndrei Otcheretianski 	if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
23290824f2fSLuca Coelho 				    UCODE_ALIVE_NTFY, 0) == 5) {
23390824f2fSLuca Coelho 		struct iwl_alive_ntf_v5 *palive;
23490824f2fSLuca Coelho 
23590824f2fSLuca Coelho 		palive = (void *)pkt->data;
23690824f2fSLuca Coelho 		umac = &palive->umac_data;
23790824f2fSLuca Coelho 		lmac1 = &palive->lmac_data[0];
23890824f2fSLuca Coelho 		lmac2 = &palive->lmac_data[1];
23990824f2fSLuca Coelho 		status = le16_to_cpu(palive->status);
24090824f2fSLuca Coelho 
24190824f2fSLuca Coelho 		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
24290824f2fSLuca Coelho 		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
24390824f2fSLuca Coelho 		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
24490824f2fSLuca Coelho 
24590824f2fSLuca Coelho 		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
24690824f2fSLuca Coelho 			     mvm->trans->sku_id[0],
24790824f2fSLuca Coelho 			     mvm->trans->sku_id[1],
24890824f2fSLuca Coelho 			     mvm->trans->sku_id[2]);
24990824f2fSLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
2509422b978SLuca Coelho 		struct iwl_alive_ntf_v4 *palive;
2519422b978SLuca Coelho 
252e705c121SKalle Valo 		palive = (void *)pkt->data;
2535c228d63SSara Sharon 		umac = &palive->umac_data;
2545c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2555c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2565c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2579422b978SLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) ==
2589422b978SLuca Coelho 		   sizeof(struct iwl_alive_ntf_v3)) {
2599422b978SLuca Coelho 		struct iwl_alive_ntf_v3 *palive3;
2609422b978SLuca Coelho 
2615c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2625c228d63SSara Sharon 		umac = &palive3->umac_data;
2635c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2645c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2659422b978SLuca Coelho 	} else {
2669422b978SLuca Coelho 		WARN(1, "unsupported alive notification (size %d)\n",
2679422b978SLuca Coelho 		     iwl_rx_packet_payload_len(pkt));
2689422b978SLuca Coelho 		/* get timeout later */
2699422b978SLuca Coelho 		return false;
2705c228d63SSara Sharon 	}
271e705c121SKalle Valo 
27222463857SShahar S Matityahu 	lmac_error_event_table =
27322463857SShahar S Matityahu 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
27422463857SShahar S Matityahu 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
275e705c121SKalle Valo 
27622463857SShahar S Matityahu 	if (lmac2)
27791c28b83SShahar S Matityahu 		mvm->trans->dbg.lmac_error_event_table[1] =
27822463857SShahar S Matityahu 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
27922463857SShahar S Matityahu 
280cfa5d0caSMordechay Goodstein 	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
2815c228d63SSara Sharon 
282cfa5d0caSMordechay Goodstein 	if (umac_error_table) {
283cfa5d0caSMordechay Goodstein 		if (umac_error_table >=
2843485e76eSLuca Coelho 		    mvm->trans->cfg->min_umac_error_event_table) {
285cfa5d0caSMordechay Goodstein 			iwl_fw_umac_set_alive_err_table(mvm->trans,
286cfa5d0caSMordechay Goodstein 							umac_error_table);
2873485e76eSLuca Coelho 		} else {
288fb5b2846SLuca Coelho 			IWL_ERR(mvm,
289fb5b2846SLuca Coelho 				"Not valid error log pointer 0x%08X for %s uCode\n",
290cfa5d0caSMordechay Goodstein 				umac_error_table,
291fb5b2846SLuca Coelho 				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
292fb5b2846SLuca Coelho 				"Init" : "RT");
2933485e76eSLuca Coelho 		}
294cfa5d0caSMordechay Goodstein 	}
29522463857SShahar S Matityahu 
29622463857SShahar S Matityahu 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2975c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
298e705c121SKalle Valo 
299e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
3005c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
3015c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
3025c228d63SSara Sharon 
3035c228d63SSara Sharon 	if (lmac2)
3045c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
305e705c121SKalle Valo 
306e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
307e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
3085c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
3095c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
310e705c121SKalle Valo 
3110a3a3e9eSShahar S Matityahu 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
3120a3a3e9eSShahar S Matityahu 
313e705c121SKalle Valo 	return true;
314e705c121SKalle Valo }
315e705c121SKalle Valo 
3161f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
3171f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
3181f370650SSara Sharon {
3191f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
3201f370650SSara Sharon 
3211f370650SSara Sharon 	return true;
3221f370650SSara Sharon }
3231f370650SSara Sharon 
324e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
325e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
326e705c121SKalle Valo {
327e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
328e705c121SKalle Valo 
329e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
330e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
331e705c121SKalle Valo 		return true;
332e705c121SKalle Valo 	}
333e705c121SKalle Valo 
334ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
335e705c121SKalle Valo 
336e705c121SKalle Valo 	return false;
337e705c121SKalle Valo }
338e705c121SKalle Valo 
339e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
340e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
341e705c121SKalle Valo {
342e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
34394a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
344e705c121SKalle Valo 	const struct fw_img *fw;
345cfbc6c4cSSara Sharon 	int ret;
346702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
3479422b978SLuca Coelho 	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
348b3500b47SEmmanuel Grumbach 	bool run_in_rfkill =
349b3500b47SEmmanuel Grumbach 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
350e705c121SKalle Valo 
351e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
3523d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3533d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
3543d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
355612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
356e705c121SKalle Valo 	else
357612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
358e705c121SKalle Valo 	if (WARN_ON(!fw))
359e705c121SKalle Valo 		return -EINVAL;
360702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
36165b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
362e705c121SKalle Valo 
363e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
364e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
365e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
366e705c121SKalle Valo 
367b3500b47SEmmanuel Grumbach 	/*
368b3500b47SEmmanuel Grumbach 	 * We want to load the INIT firmware even in RFKILL
369b3500b47SEmmanuel Grumbach 	 * For the unified firmware case, the ucode_type is not
370b3500b47SEmmanuel Grumbach 	 * INIT, but we still need to run it.
371b3500b47SEmmanuel Grumbach 	 */
372b3500b47SEmmanuel Grumbach 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
373e705c121SKalle Valo 	if (ret) {
374702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
375e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
376e705c121SKalle Valo 		return ret;
377e705c121SKalle Valo 	}
378e705c121SKalle Valo 
379e705c121SKalle Valo 	/*
380e705c121SKalle Valo 	 * Some things may run in the background now, but we
381e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
382e705c121SKalle Valo 	 */
383e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
384e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
385e705c121SKalle Valo 	if (ret) {
386d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
387d6be9c1dSSara Sharon 
38820f5aef5SJohannes Berg 		if (trans->trans_cfg->device_family >=
38920f5aef5SJohannes Berg 					IWL_DEVICE_FAMILY_22000) {
390e705c121SKalle Valo 			IWL_ERR(mvm,
391e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
392ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
393ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans,
394ea695b7cSShaul Triebitz 						   UMAG_SB_CPU_2_STATUS));
39520f5aef5SJohannes Berg 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
39620f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
39720f5aef5SJohannes Berg 						   UREG_UMAC_CURRENT_PC));
39820f5aef5SJohannes Berg 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
39920f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
40020f5aef5SJohannes Berg 						   UREG_LMAC1_CURRENT_PC));
40120f5aef5SJohannes Berg 			if (iwl_mvm_is_cdb_supported(mvm))
40220f5aef5SJohannes Berg 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
40320f5aef5SJohannes Berg 					iwl_read_umac_prph(trans,
40420f5aef5SJohannes Berg 						UREG_LMAC2_CURRENT_PC));
40520f5aef5SJohannes Berg 		} else if (trans->trans_cfg->device_family >=
40620f5aef5SJohannes Berg 			   IWL_DEVICE_FAMILY_8000) {
407d6be9c1dSSara Sharon 			IWL_ERR(mvm,
408d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
409d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
410d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
41120f5aef5SJohannes Berg 		}
41220f5aef5SJohannes Berg 
41320f5aef5SJohannes Berg 		if (ret == -ETIMEDOUT)
41420f5aef5SJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
41520f5aef5SJohannes Berg 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
41620f5aef5SJohannes Berg 
417702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
418e705c121SKalle Valo 		return ret;
419e705c121SKalle Valo 	}
420e705c121SKalle Valo 
421e705c121SKalle Valo 	if (!alive_data.valid) {
422e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
423702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
424e705c121SKalle Valo 		return -EIO;
425e705c121SKalle Valo 	}
426e705c121SKalle Valo 
427b3e4c0f3SLuca Coelho 	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
42870d3ca86SLuca Coelho 	if (ret) {
42970d3ca86SLuca Coelho 		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
43070d3ca86SLuca Coelho 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
43170d3ca86SLuca Coelho 		return ret;
43270d3ca86SLuca Coelho 	}
43370d3ca86SLuca Coelho 
434e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
435e705c121SKalle Valo 
436e705c121SKalle Valo 	/*
437e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
438e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
439e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
440e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
441e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
442e705c121SKalle Valo 	 * will be empty.
443e705c121SKalle Valo 	 */
444e705c121SKalle Valo 
445e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
4461c14089eSJohannes Berg 	/*
4471c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
4481c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
4491c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
4501c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
4511c14089eSJohannes Berg 	 */
4521c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
4531c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
454e705c121SKalle Valo 
45565b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
456f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
457f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
458f7805b33SLior Cohen #endif
459e705c121SKalle Valo 
460e705c121SKalle Valo 	return 0;
461e705c121SKalle Valo }
462e705c121SKalle Valo 
46352b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
4648c5f47b1SJohannes Berg {
4658c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
4668c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
4678c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4688c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4698c5f47b1SJohannes Berg 	};
4708c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4718c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4728c5f47b1SJohannes Berg 	};
4738c5f47b1SJohannes Berg 	int ret;
4748c5f47b1SJohannes Berg 
475a4584729SHaim Dreyfuss 	if (mvm->trans->cfg->tx_with_siso_diversity)
476a4584729SHaim Dreyfuss 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
477a4584729SHaim Dreyfuss 
4788c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4798c5f47b1SJohannes Berg 
48094022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
48194022562SEmmanuel Grumbach 
4828c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4838c5f47b1SJohannes Berg 				   &init_wait,
4848c5f47b1SJohannes Berg 				   init_complete,
4858c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4868c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4878c5f47b1SJohannes Berg 				   NULL);
4888c5f47b1SJohannes Berg 
489b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
49086ce5c74SShahar S Matityahu 
4918c5f47b1SJohannes Berg 	/* Will also start the device */
4928c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4938c5f47b1SJohannes Berg 	if (ret) {
4948c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4958c5f47b1SJohannes Berg 		goto error;
4968c5f47b1SJohannes Berg 	}
497b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
498b108d8c7SShahar S Matityahu 			       NULL);
4998c5f47b1SJohannes Berg 
5008c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
5018c5f47b1SJohannes Berg 	 * commands
5028c5f47b1SJohannes Berg 	 */
5038c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
504b3500b47SEmmanuel Grumbach 						INIT_EXTENDED_CFG_CMD),
505b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
5068c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
5078c5f47b1SJohannes Berg 	if (ret) {
5088c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
5098c5f47b1SJohannes Berg 			ret);
5108c5f47b1SJohannes Berg 		goto error;
5118c5f47b1SJohannes Berg 	}
5128c5f47b1SJohannes Berg 
513e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
514e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
5159c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
5169c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
5178c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
518e9e1ba3dSSara Sharon 	}
5198c5f47b1SJohannes Berg 
52052b15521SEmmanuel Grumbach 	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
5215bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
522d4f3695eSSara Sharon 		if (ret) {
523d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
524d4f3695eSSara Sharon 			goto error;
525d4f3695eSSara Sharon 		}
526d4f3695eSSara Sharon 	}
527d4f3695eSSara Sharon 
5288c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
529b3500b47SEmmanuel Grumbach 						NVM_ACCESS_COMPLETE),
530b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
5318c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
5328c5f47b1SJohannes Berg 	if (ret) {
5338c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
5348c5f47b1SJohannes Berg 			ret);
5358c5f47b1SJohannes Berg 		goto error;
5368c5f47b1SJohannes Berg 	}
5378c5f47b1SJohannes Berg 
5388c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
539e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
5408c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
541e9e1ba3dSSara Sharon 	if (ret)
542e9e1ba3dSSara Sharon 		return ret;
543e9e1ba3dSSara Sharon 
544e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
54552b15521SEmmanuel Grumbach 	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
5464c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
547c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
548c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
549c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
550e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
551e9e1ba3dSSara Sharon 			return ret;
552e9e1ba3dSSara Sharon 		}
553e9e1ba3dSSara Sharon 	}
554e9e1ba3dSSara Sharon 
555b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
556b3500b47SEmmanuel Grumbach 
557e9e1ba3dSSara Sharon 	return 0;
5588c5f47b1SJohannes Berg 
5598c5f47b1SJohannes Berg error:
5608c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
5618c5f47b1SJohannes Berg 	return ret;
5628c5f47b1SJohannes Berg }
5638c5f47b1SJohannes Berg 
564c4ace426SGil Adam #ifdef CONFIG_ACPI
565c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
566c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
567c4ace426SGil Adam {
568c4ace426SGil Adam 	/*
569c4ace426SGil Adam 	 * TODO: read specific phy config from BIOS
570c4ace426SGil Adam 	 * ACPI table for this feature has not been defined yet,
571c4ace426SGil Adam 	 * so for now we use hardcoded values.
572c4ace426SGil Adam 	 */
573c4ace426SGil Adam 
574c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
575c4ace426SGil Adam 		phy_filters->filter_cfg_chain_a =
576c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
577c4ace426SGil Adam 	}
578c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
579c4ace426SGil Adam 		phy_filters->filter_cfg_chain_b =
580c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
581c4ace426SGil Adam 	}
582c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
583c4ace426SGil Adam 		phy_filters->filter_cfg_chain_c =
584c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
585c4ace426SGil Adam 	}
586c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
587c4ace426SGil Adam 		phy_filters->filter_cfg_chain_d =
588c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
589c4ace426SGil Adam 	}
590c4ace426SGil Adam }
591c4ace426SGil Adam 
592c4ace426SGil Adam #else /* CONFIG_ACPI */
593c4ace426SGil Adam 
594c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
595c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
596c4ace426SGil Adam {
597c4ace426SGil Adam }
598c4ace426SGil Adam #endif /* CONFIG_ACPI */
599c4ace426SGil Adam 
600e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
601e705c121SKalle Valo {
602c4ace426SGil Adam 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
603702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
604c4ace426SGil Adam 	struct iwl_phy_specific_cfg phy_filters = {};
605c4ace426SGil Adam 	u8 cmd_ver;
606c4ace426SGil Adam 	size_t cmd_size;
607e705c121SKalle Valo 
608bb99ff9bSLuca Coelho 	if (iwl_mvm_has_unified_ucode(mvm) &&
609d923b020SLuca Coelho 	    !mvm->trans->cfg->tx_with_siso_diversity)
610bb99ff9bSLuca Coelho 		return 0;
611d923b020SLuca Coelho 
612d923b020SLuca Coelho 	if (mvm->trans->cfg->tx_with_siso_diversity) {
613bb99ff9bSLuca Coelho 		/*
614bb99ff9bSLuca Coelho 		 * TODO: currently we don't set the antenna but letting the NIC
615bb99ff9bSLuca Coelho 		 * to decide which antenna to use. This should come from BIOS.
616bb99ff9bSLuca Coelho 		 */
617bb99ff9bSLuca Coelho 		phy_cfg_cmd.phy_cfg =
618bb99ff9bSLuca Coelho 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
619bb99ff9bSLuca Coelho 	}
620bb99ff9bSLuca Coelho 
621e705c121SKalle Valo 	/* Set parameters */
622e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
62386a2b204SLuca Coelho 
62486a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
6257897dfa2SLuca Coelho 	phy_cfg_cmd.phy_cfg |=
6267897dfa2SLuca Coelho 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
62786a2b204SLuca Coelho 
628e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
629e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
630e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
631e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
632e705c121SKalle Valo 
633c4ace426SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
634e80bfd11SMordechay Goodstein 					PHY_CONFIGURATION_CMD,
635e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
636c4ace426SGil Adam 	if (cmd_ver == 3) {
637c4ace426SGil Adam 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
638c4ace426SGil Adam 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
639c4ace426SGil Adam 		       sizeof(struct iwl_phy_specific_cfg));
640c4ace426SGil Adam 	}
641c4ace426SGil Adam 
642e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
643e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
644c4ace426SGil Adam 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
645c4ace426SGil Adam 				    sizeof(struct iwl_phy_cfg_cmd_v1);
646e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
647c4ace426SGil Adam 				    cmd_size, &phy_cfg_cmd);
648e705c121SKalle Valo }
649e705c121SKalle Valo 
6503b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
651e705c121SKalle Valo {
652e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
653e705c121SKalle Valo 	static const u16 init_complete[] = {
654e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
655e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
656e705c121SKalle Valo 	};
657e705c121SKalle Valo 	int ret;
658e705c121SKalle Valo 
6597d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
66052b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
6618c5f47b1SJohannes Berg 
662e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
663e705c121SKalle Valo 
66494022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
665e705c121SKalle Valo 
666e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
667e705c121SKalle Valo 				   &calib_wait,
668e705c121SKalle Valo 				   init_complete,
669e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
670e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
671e705c121SKalle Valo 				   mvm->phy_db);
672e705c121SKalle Valo 
673e705c121SKalle Valo 	/* Will also start the device */
674e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
675e705c121SKalle Valo 	if (ret) {
676e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
67700e0c6c8SLuca Coelho 		goto remove_notif;
678e705c121SKalle Valo 	}
679e705c121SKalle Valo 
6807d34a7d7SLuca Coelho 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
681b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
682e705c121SKalle Valo 		if (ret)
68300e0c6c8SLuca Coelho 			goto remove_notif;
684b3de3ef4SEmmanuel Grumbach 	}
685e705c121SKalle Valo 
686e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
6873b25f1afSEmmanuel Grumbach 	if (!mvm->nvm_data) {
6885bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
689e705c121SKalle Valo 		if (ret) {
690e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
69100e0c6c8SLuca Coelho 			goto remove_notif;
692e705c121SKalle Valo 		}
693e705c121SKalle Valo 	}
694e705c121SKalle Valo 
695e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
696e705c121SKalle Valo 	if (mvm->nvm_file_name)
697e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
698e705c121SKalle Valo 
69964866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
70064866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
70164866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
702e705c121SKalle Valo 
703e705c121SKalle Valo 	/*
704e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
705e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
706e705c121SKalle Valo 	 */
707e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
708e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
709e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
71000e0c6c8SLuca Coelho 		goto remove_notif;
711e705c121SKalle Valo 	}
712e705c121SKalle Valo 
713b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
714e705c121SKalle Valo 
715e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
716e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
717e705c121SKalle Valo 	if (ret)
71800e0c6c8SLuca Coelho 		goto remove_notif;
719e705c121SKalle Valo 
720e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
721e705c121SKalle Valo 	if (ret) {
722e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
723e705c121SKalle Valo 			ret);
72400e0c6c8SLuca Coelho 		goto remove_notif;
725e705c121SKalle Valo 	}
726e705c121SKalle Valo 
727e705c121SKalle Valo 	/*
728e705c121SKalle Valo 	 * Some things may run in the background now, but we
729e705c121SKalle Valo 	 * just wait for the calibration complete notification.
730e705c121SKalle Valo 	 */
731e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
732e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
73300e0c6c8SLuca Coelho 	if (!ret)
734e705c121SKalle Valo 		goto out;
735e705c121SKalle Valo 
73600e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
73700e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
73800e0c6c8SLuca Coelho 		ret = 0;
73900e0c6c8SLuca Coelho 	} else {
74000e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
74100e0c6c8SLuca Coelho 			ret);
74200e0c6c8SLuca Coelho 	}
74300e0c6c8SLuca Coelho 
74400e0c6c8SLuca Coelho 	goto out;
74500e0c6c8SLuca Coelho 
74600e0c6c8SLuca Coelho remove_notif:
747e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
748e705c121SKalle Valo out:
749b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
750e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
751e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
752e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
753e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
754e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
755e705c121SKalle Valo 					GFP_KERNEL);
756e705c121SKalle Valo 		if (!mvm->nvm_data)
757e705c121SKalle Valo 			return -ENOMEM;
758e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
759e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
760e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
761e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
762e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
763e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
764e705c121SKalle Valo 	}
765e705c121SKalle Valo 
766e705c121SKalle Valo 	return ret;
767e705c121SKalle Valo }
768e705c121SKalle Valo 
769e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
770e705c121SKalle Valo {
771e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
772e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
773e705c121SKalle Valo 	};
774e705c121SKalle Valo 
775e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
776e705c121SKalle Valo 		return 0;
777e705c121SKalle Valo 
778e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
779e705c121SKalle Valo 				    sizeof(cmd), &cmd);
780e705c121SKalle Valo }
781e705c121SKalle Valo 
782c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
78342ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
784da2830acSLuca Coelho {
785216cdfb5SLuca Coelho 	struct iwl_dev_tx_power_cmd cmd = {
786216cdfb5SLuca Coelho 		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
78771e9378bSLuca Coelho 	};
7889c08cef8SLuca Coelho 	__le16 *per_chain;
7891edd56e6SLuca Coelho 	int ret;
79039c1a972SIhab Zhaika 	u16 len = 0;
791fbb7957dSLuca Coelho 	u32 n_subbands;
792fbb7957dSLuca Coelho 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
793e80bfd11SMordechay Goodstein 					   REDUCE_TX_POWER_CMD,
794e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
79542ce76d6SLuca Coelho 
796fbb7957dSLuca Coelho 	if (cmd_ver == 6) {
797fbb7957dSLuca Coelho 		len = sizeof(cmd.v6);
798fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS_V2;
799fbb7957dSLuca Coelho 		per_chain = cmd.v6.per_chain[0][0];
800fbb7957dSLuca Coelho 	} else if (fw_has_api(&mvm->fw->ucode_capa,
8019c08cef8SLuca Coelho 			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
8020791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
803fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
8049c08cef8SLuca Coelho 		per_chain = cmd.v5.per_chain[0][0];
8059c08cef8SLuca Coelho 	} else if (fw_has_capa(&mvm->fw->ucode_capa,
8069c08cef8SLuca Coelho 			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
807216cdfb5SLuca Coelho 		len = sizeof(cmd.v4);
808fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
8099c08cef8SLuca Coelho 		per_chain = cmd.v4.per_chain[0][0];
8109c08cef8SLuca Coelho 	} else {
811216cdfb5SLuca Coelho 		len = sizeof(cmd.v3);
812fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
8139c08cef8SLuca Coelho 		per_chain = cmd.v3.per_chain[0][0];
8149c08cef8SLuca Coelho 	}
81555bfa4b9SLuca Coelho 
816216cdfb5SLuca Coelho 	/* all structs have the same common part, add it */
817216cdfb5SLuca Coelho 	len += sizeof(cmd.common);
81842ce76d6SLuca Coelho 
8199c08cef8SLuca Coelho 	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, ACPI_SAR_NUM_TABLES,
820fbb7957dSLuca Coelho 				     n_subbands, prof_a, prof_b);
8211edd56e6SLuca Coelho 
8221edd56e6SLuca Coelho 	/* return on error or if the profile is disabled (positive number) */
8231edd56e6SLuca Coelho 	if (ret)
8241edd56e6SLuca Coelho 		return ret;
8251edd56e6SLuca Coelho 
82642ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
82742ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
82842ce76d6SLuca Coelho }
82942ce76d6SLuca Coelho 
8307fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
8317fe90e0eSHaim Dreyfuss {
832dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
833f604324eSLuca Coelho 	struct iwl_geo_tx_power_profiles_resp *resp;
8340c3d7282SHaim Dreyfuss 	u16 len;
83539c1a972SIhab Zhaika 	int ret;
8360c3d7282SHaim Dreyfuss 	struct iwl_host_cmd cmd;
837e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
838e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
839e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
8407fe90e0eSHaim Dreyfuss 
841dd2a1256SLuca Coelho 	/* the ops field is at the same spot for all versions, so set in v1 */
842dd2a1256SLuca Coelho 	geo_tx_cmd.v1.ops =
843dd2a1256SLuca Coelho 		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
844dd2a1256SLuca Coelho 
8450ea788edSLuca Coelho 	if (cmd_ver == 3)
8460ea788edSLuca Coelho 		len = sizeof(geo_tx_cmd.v3);
8470ea788edSLuca Coelho 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
848dd2a1256SLuca Coelho 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
849dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v2);
850dd2a1256SLuca Coelho 	else
851dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v1);
8520c3d7282SHaim Dreyfuss 
85339c1a972SIhab Zhaika 	if (!iwl_sar_geo_support(&mvm->fwrt))
85439c1a972SIhab Zhaika 		return -EOPNOTSUPP;
85539c1a972SIhab Zhaika 
8560c3d7282SHaim Dreyfuss 	cmd = (struct iwl_host_cmd){
8577fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
8580c3d7282SHaim Dreyfuss 		.len = { len, },
8597fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
86039c1a972SIhab Zhaika 		.data = { &geo_tx_cmd },
8617fe90e0eSHaim Dreyfuss 	};
8627fe90e0eSHaim Dreyfuss 
8637fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8647fe90e0eSHaim Dreyfuss 	if (ret) {
8657fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8667fe90e0eSHaim Dreyfuss 		return ret;
8677fe90e0eSHaim Dreyfuss 	}
868f604324eSLuca Coelho 
869f604324eSLuca Coelho 	resp = (void *)cmd.resp_pkt->data;
870f604324eSLuca Coelho 	ret = le32_to_cpu(resp->profile_idx);
871f604324eSLuca Coelho 
872f604324eSLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES))
873f604324eSLuca Coelho 		ret = -EIO;
874f604324eSLuca Coelho 
8757fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8767fe90e0eSHaim Dreyfuss 	return ret;
8777fe90e0eSHaim Dreyfuss }
8787fe90e0eSHaim Dreyfuss 
879a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
880a6bff3cbSHaim Dreyfuss {
881dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd cmd;
88239c1a972SIhab Zhaika 	u16 len;
88345acebf8SNaftali Goldstein 	u32 n_bands;
8840433ae55SGolan Ben Ami 	int ret;
885e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
886e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
887e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
888a6bff3cbSHaim Dreyfuss 
88945acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
89045acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
89145acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
89245acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops));
89345acebf8SNaftali Goldstein 	/* the ops field is at the same spot for all versions, so set in v1 */
89445acebf8SNaftali Goldstein 	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
89545acebf8SNaftali Goldstein 
89645acebf8SNaftali Goldstein 	if (cmd_ver == 3) {
89745acebf8SNaftali Goldstein 		len = sizeof(cmd.v3);
89845acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
89945acebf8SNaftali Goldstein 		cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
90045acebf8SNaftali Goldstein 	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
90145acebf8SNaftali Goldstein 			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
90245acebf8SNaftali Goldstein 		len = sizeof(cmd.v2);
90345acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
90445acebf8SNaftali Goldstein 		cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
90545acebf8SNaftali Goldstein 	} else {
90645acebf8SNaftali Goldstein 		len = sizeof(cmd.v1);
90745acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
90845acebf8SNaftali Goldstein 	}
90945acebf8SNaftali Goldstein 
91045acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
91145acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
91245acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
91345acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table));
91445acebf8SNaftali Goldstein 	/* the table is at the same position for all versions, so set use v1 */
91545acebf8SNaftali Goldstein 	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], n_bands);
916eca1e56cSEmmanuel Grumbach 
9170433ae55SGolan Ben Ami 	/*
9180433ae55SGolan Ben Ami 	 * It is a valid scenario to not support SAR, or miss wgds table,
9190433ae55SGolan Ben Ami 	 * but in that case there is no need to send the command.
9200433ae55SGolan Ben Ami 	 */
9210433ae55SGolan Ben Ami 	if (ret)
9220433ae55SGolan Ben Ami 		return 0;
923a6bff3cbSHaim Dreyfuss 
924dd2a1256SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm,
925dd2a1256SLuca Coelho 				    WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
926dd2a1256SLuca Coelho 				    0, len, &cmd);
927a6bff3cbSHaim Dreyfuss }
928a6bff3cbSHaim Dreyfuss 
9296ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
9306ce1e5c0SGil Adam {
9316ce1e5c0SGil Adam 	union acpi_object *wifi_pkg, *data, *enabled;
932f2134f66SGil Adam 	union iwl_ppag_table_cmd ppag_table;
933f2134f66SGil Adam 	int i, j, ret, tbl_rev, num_sub_bands;
9346ce1e5c0SGil Adam 	int idx = 2;
935f2134f66SGil Adam 	s8 *gain;
9366ce1e5c0SGil Adam 
937f2134f66SGil Adam 	/*
938f2134f66SGil Adam 	 * The 'enabled' field is the same in v1 and v2 so we can just
939f2134f66SGil Adam 	 * use v1 to access it.
940f2134f66SGil Adam 	 */
941f2134f66SGil Adam 	mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0);
9426ce1e5c0SGil Adam 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
9436ce1e5c0SGil Adam 	if (IS_ERR(data))
9446ce1e5c0SGil Adam 		return PTR_ERR(data);
9456ce1e5c0SGil Adam 
946f2134f66SGil Adam 	/* try to read ppag table revision 1 */
9476ce1e5c0SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
948f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
949f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
950f2134f66SGil Adam 		if (tbl_rev != 1) {
951f2134f66SGil Adam 			ret = -EINVAL;
9526ce1e5c0SGil Adam 			goto out_free;
9536ce1e5c0SGil Adam 		}
954f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
955f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
956f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 2;
957f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v2 (tbl_rev=1)\n");
958f2134f66SGil Adam 		goto read_table;
959f2134f66SGil Adam 	}
9606ce1e5c0SGil Adam 
961f2134f66SGil Adam 	/* try to read ppag table revision 0 */
962f2134f66SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
963f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
964f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
9653ed83da3SLuca Coelho 		if (tbl_rev != 0) {
9663ed83da3SLuca Coelho 			ret = -EINVAL;
9673ed83da3SLuca Coelho 			goto out_free;
9683ed83da3SLuca Coelho 		}
969f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
970f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
971f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 1;
972f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
973f2134f66SGil Adam 		goto read_table;
974f2134f66SGil Adam 	}
975f2134f66SGil Adam 	ret = PTR_ERR(wifi_pkg);
976f2134f66SGil Adam 	goto out_free;
9773ed83da3SLuca Coelho 
978f2134f66SGil Adam read_table:
9796ce1e5c0SGil Adam 	enabled = &wifi_pkg->package.elements[1];
9806ce1e5c0SGil Adam 	if (enabled->type != ACPI_TYPE_INTEGER ||
9816ce1e5c0SGil Adam 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
9826ce1e5c0SGil Adam 		ret = -EINVAL;
9836ce1e5c0SGil Adam 		goto out_free;
9846ce1e5c0SGil Adam 	}
9856ce1e5c0SGil Adam 
986f2134f66SGil Adam 	ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value);
987f2134f66SGil Adam 	if (!ppag_table.v1.enabled) {
9886ce1e5c0SGil Adam 		ret = 0;
9896ce1e5c0SGil Adam 		goto out_free;
9906ce1e5c0SGil Adam 	}
9916ce1e5c0SGil Adam 
9926ce1e5c0SGil Adam 	/*
9936ce1e5c0SGil Adam 	 * read, verify gain values and save them into the PPAG table.
9946ce1e5c0SGil Adam 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
9956ce1e5c0SGil Adam 	 * following sub-bands to High-Band (5GHz).
9966ce1e5c0SGil Adam 	 */
997f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
998f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
9996ce1e5c0SGil Adam 			union acpi_object *ent;
10006ce1e5c0SGil Adam 
10016ce1e5c0SGil Adam 			ent = &wifi_pkg->package.elements[idx++];
10026ce1e5c0SGil Adam 			if (ent->type != ACPI_TYPE_INTEGER ||
10036ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
10046ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
10056ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
10066ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
1007f2134f66SGil Adam 				ppag_table.v1.enabled = cpu_to_le32(0);
10086ce1e5c0SGil Adam 				ret = -EINVAL;
10096ce1e5c0SGil Adam 				goto out_free;
10106ce1e5c0SGil Adam 			}
1011f2134f66SGil Adam 			gain[i * num_sub_bands + j] = ent->integer.value;
10126ce1e5c0SGil Adam 		}
10136ce1e5c0SGil Adam 	}
10146ce1e5c0SGil Adam 	ret = 0;
10156ce1e5c0SGil Adam out_free:
10166ce1e5c0SGil Adam 	kfree(data);
10176ce1e5c0SGil Adam 	return ret;
10186ce1e5c0SGil Adam }
10196ce1e5c0SGil Adam 
10206ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
10216ce1e5c0SGil Adam {
1022f2134f66SGil Adam 	u8 cmd_ver;
1023f2134f66SGil Adam 	int i, j, ret, num_sub_bands, cmd_size;
1024f2134f66SGil Adam 	union iwl_ppag_table_cmd ppag_table;
1025f2134f66SGil Adam 	s8 *gain;
10266ce1e5c0SGil Adam 
10276ce1e5c0SGil Adam 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
10286ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10296ce1e5c0SGil Adam 				"PPAG capability not supported by FW, command not sent.\n");
10306ce1e5c0SGil Adam 		return 0;
10316ce1e5c0SGil Adam 	}
1032f2134f66SGil Adam 	if (!mvm->fwrt.ppag_table.v1.enabled) {
1033f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
1034160bab43SGil Adam 		return 0;
1035160bab43SGil Adam 	}
1036160bab43SGil Adam 
1037f2134f66SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
1038e80bfd11SMordechay Goodstein 					PER_PLATFORM_ANT_GAIN_CMD,
1039e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
1040f2134f66SGil Adam 	if (cmd_ver == 1) {
1041f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
1042f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
1043f2134f66SGil Adam 		cmd_size = sizeof(ppag_table.v1);
1044f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 2) {
1045f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
1046f2134f66SGil Adam 					"PPAG table is v2 but FW supports v1, sending truncated table\n");
1047f2134f66SGil Adam 		}
1048f2134f66SGil Adam 	} else if (cmd_ver == 2) {
1049f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1050f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
1051f2134f66SGil Adam 		cmd_size = sizeof(ppag_table.v2);
1052f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 1) {
1053f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
1054f2134f66SGil Adam 					"PPAG table is v1 but FW supports v2, sending padded table\n");
1055f2134f66SGil Adam 		}
1056f2134f66SGil Adam 	} else {
1057f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1058f2134f66SGil Adam 		return 0;
1059f2134f66SGil Adam 	}
10606ce1e5c0SGil Adam 
1061f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1062f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
10636ce1e5c0SGil Adam 			IWL_DEBUG_RADIO(mvm,
10646ce1e5c0SGil Adam 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
1065f2134f66SGil Adam 					i, j, gain[i * num_sub_bands + j]);
10666ce1e5c0SGil Adam 		}
10676ce1e5c0SGil Adam 	}
1068f2134f66SGil Adam 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
10696ce1e5c0SGil Adam 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
10706ce1e5c0SGil Adam 						PER_PLATFORM_ANT_GAIN_CMD),
1071f2134f66SGil Adam 				   0, cmd_size, &ppag_table);
10726ce1e5c0SGil Adam 	if (ret < 0)
10736ce1e5c0SGil Adam 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
10746ce1e5c0SGil Adam 			ret);
10756ce1e5c0SGil Adam 
10766ce1e5c0SGil Adam 	return ret;
10776ce1e5c0SGil Adam }
10786ce1e5c0SGil Adam 
10796ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
10806ce1e5c0SGil Adam {
10816ce1e5c0SGil Adam 	int ret;
10826ce1e5c0SGil Adam 
10836ce1e5c0SGil Adam 	ret = iwl_mvm_get_ppag_table(mvm);
10846ce1e5c0SGil Adam 	if (ret < 0) {
10856ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10866ce1e5c0SGil Adam 				"PPAG BIOS table invalid or unavailable. (%d)\n",
10876ce1e5c0SGil Adam 				ret);
10886ce1e5c0SGil Adam 		return 0;
10896ce1e5c0SGil Adam 	}
10906ce1e5c0SGil Adam 	return iwl_mvm_ppag_send_cmd(mvm);
10916ce1e5c0SGil Adam }
10926ce1e5c0SGil Adam 
109328dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
109428dd7ccdSMordechay Goodstein {
109528dd7ccdSMordechay Goodstein 	int ret;
109628dd7ccdSMordechay Goodstein 	struct iwl_tas_config_cmd cmd = {};
109728dd7ccdSMordechay Goodstein 	int list_size;
109828dd7ccdSMordechay Goodstein 
1099*cdaba917SEmmanuel Grumbach 	BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) <
110028dd7ccdSMordechay Goodstein 		     APCI_WTAS_BLACK_LIST_MAX);
110128dd7ccdSMordechay Goodstein 
110228dd7ccdSMordechay Goodstein 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
110328dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
110428dd7ccdSMordechay Goodstein 		return;
110528dd7ccdSMordechay Goodstein 	}
110628dd7ccdSMordechay Goodstein 
1107*cdaba917SEmmanuel Grumbach 	ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size);
110828dd7ccdSMordechay Goodstein 	if (ret < 0) {
110928dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm,
111028dd7ccdSMordechay Goodstein 				"TAS table invalid or unavailable. (%d)\n",
111128dd7ccdSMordechay Goodstein 				ret);
111228dd7ccdSMordechay Goodstein 		return;
111328dd7ccdSMordechay Goodstein 	}
111428dd7ccdSMordechay Goodstein 
111528dd7ccdSMordechay Goodstein 	if (list_size < 0)
111628dd7ccdSMordechay Goodstein 		return;
111728dd7ccdSMordechay Goodstein 
111828dd7ccdSMordechay Goodstein 	/* list size if TAS enabled can only be non-negative */
1119*cdaba917SEmmanuel Grumbach 	cmd.block_list_size = cpu_to_le32((u32)list_size);
112028dd7ccdSMordechay Goodstein 
112128dd7ccdSMordechay Goodstein 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
112228dd7ccdSMordechay Goodstein 						TAS_CONFIG),
112328dd7ccdSMordechay Goodstein 				   0, sizeof(cmd), &cmd);
112428dd7ccdSMordechay Goodstein 	if (ret < 0)
112528dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
112628dd7ccdSMordechay Goodstein }
1127f5b1cb2eSGil Adam 
112802d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_indonesia_5g2(struct iwl_mvm *mvm)
1129f5b1cb2eSGil Adam {
1130f5b1cb2eSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
1131f5b1cb2eSGil Adam 				      DSM_FUNC_ENABLE_INDONESIA_5G2);
1132f5b1cb2eSGil Adam 
113302d31e9bSGil Adam 	if (ret < 0)
1134f5b1cb2eSGil Adam 		IWL_DEBUG_RADIO(mvm,
113502d31e9bSGil Adam 				"Failed to evaluate DSM function ENABLE_INDONESIA_5G2, ret=%d\n",
1136f5b1cb2eSGil Adam 				ret);
1137f5b1cb2eSGil Adam 
113802d31e9bSGil Adam 	else if (ret >= DSM_VALUE_INDONESIA_MAX)
113902d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
114002d31e9bSGil Adam 				"DSM function ENABLE_INDONESIA_5G2 return invalid value, ret=%d\n",
114102d31e9bSGil Adam 				ret);
114202d31e9bSGil Adam 
114302d31e9bSGil Adam 	else if (ret == DSM_VALUE_INDONESIA_ENABLE) {
114402d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
114502d31e9bSGil Adam 				"Evaluated DSM function ENABLE_INDONESIA_5G2: Enabling 5g2\n");
114602d31e9bSGil Adam 		return DSM_VALUE_INDONESIA_ENABLE;
114702d31e9bSGil Adam 	}
114802d31e9bSGil Adam 	/* default behaviour is disabled */
114902d31e9bSGil Adam 	return DSM_VALUE_INDONESIA_DISABLE;
115002d31e9bSGil Adam }
115102d31e9bSGil Adam 
115202d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_disable_srd(struct iwl_mvm *mvm)
115302d31e9bSGil Adam {
115402d31e9bSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
115502d31e9bSGil Adam 				      DSM_FUNC_DISABLE_SRD);
115602d31e9bSGil Adam 
115702d31e9bSGil Adam 	if (ret < 0)
115802d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
115902d31e9bSGil Adam 				"Failed to evaluate DSM function DISABLE_SRD, ret=%d\n",
116002d31e9bSGil Adam 				ret);
116102d31e9bSGil Adam 
116202d31e9bSGil Adam 	else if (ret >= DSM_VALUE_SRD_MAX)
116302d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
116402d31e9bSGil Adam 				"DSM function DISABLE_SRD return invalid value, ret=%d\n",
116502d31e9bSGil Adam 				ret);
116602d31e9bSGil Adam 
116702d31e9bSGil Adam 	else if (ret == DSM_VALUE_SRD_PASSIVE) {
116802d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
116902d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: setting SRD to passive\n");
117002d31e9bSGil Adam 		return DSM_VALUE_SRD_PASSIVE;
117102d31e9bSGil Adam 
117202d31e9bSGil Adam 	} else if (ret == DSM_VALUE_SRD_DISABLE) {
117302d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
117402d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: disabling SRD\n");
117502d31e9bSGil Adam 		return DSM_VALUE_SRD_DISABLE;
117602d31e9bSGil Adam 	}
117702d31e9bSGil Adam 	/* default behaviour is active */
117802d31e9bSGil Adam 	return DSM_VALUE_SRD_ACTIVE;
1179f5b1cb2eSGil Adam }
1180f5b1cb2eSGil Adam 
1181f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1182f5b1cb2eSGil Adam {
118302d31e9bSGil Adam 	u8 ret;
118402d31e9bSGil Adam 	int cmd_ret;
1185f5b1cb2eSGil Adam 	struct iwl_lari_config_change_cmd cmd = {};
1186f5b1cb2eSGil Adam 
118702d31e9bSGil Adam 	if (iwl_mvm_eval_dsm_indonesia_5g2(mvm) == DSM_VALUE_INDONESIA_ENABLE)
1188f5b1cb2eSGil Adam 		cmd.config_bitmap |=
1189f5b1cb2eSGil Adam 			cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1190f5b1cb2eSGil Adam 
119102d31e9bSGil Adam 	ret = iwl_mvm_eval_dsm_disable_srd(mvm);
119202d31e9bSGil Adam 	if (ret == DSM_VALUE_SRD_PASSIVE)
119302d31e9bSGil Adam 		cmd.config_bitmap |=
119402d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
119502d31e9bSGil Adam 
119602d31e9bSGil Adam 	else if (ret == DSM_VALUE_SRD_DISABLE)
119702d31e9bSGil Adam 		cmd.config_bitmap |=
119802d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
119902d31e9bSGil Adam 
1200f5b1cb2eSGil Adam 	/* apply more config masks here */
1201f5b1cb2eSGil Adam 
1202f5b1cb2eSGil Adam 	if (cmd.config_bitmap) {
120302d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm, "sending LARI_CONFIG_CHANGE\n");
120402d31e9bSGil Adam 		cmd_ret = iwl_mvm_send_cmd_pdu(mvm,
1205f5b1cb2eSGil Adam 					       WIDE_ID(REGULATORY_AND_NVM_GROUP,
1206f5b1cb2eSGil Adam 						       LARI_CONFIG_CHANGE),
1207f5b1cb2eSGil Adam 					       0, sizeof(cmd), &cmd);
120802d31e9bSGil Adam 		if (cmd_ret < 0)
1209f5b1cb2eSGil Adam 			IWL_DEBUG_RADIO(mvm,
1210f5b1cb2eSGil Adam 					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
121102d31e9bSGil Adam 					cmd_ret);
1212f5b1cb2eSGil Adam 	}
1213f5b1cb2eSGil Adam }
121469964905SLuca Coelho #else /* CONFIG_ACPI */
121539c1a972SIhab Zhaika 
121639c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
121739c1a972SIhab Zhaika 				      int prof_a, int prof_b)
121869964905SLuca Coelho {
121969964905SLuca Coelho 	return -ENOENT;
122069964905SLuca Coelho }
122169964905SLuca Coelho 
122239c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
12235d041c46SLuca Coelho {
12245d041c46SLuca Coelho 	return -ENOENT;
12255d041c46SLuca Coelho }
12265d041c46SLuca Coelho 
1227a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1228a6bff3cbSHaim Dreyfuss {
1229a6bff3cbSHaim Dreyfuss 	return 0;
1230a6bff3cbSHaim Dreyfuss }
123118f1755dSLuca Coelho 
12326ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
12336ce1e5c0SGil Adam {
12346ce1e5c0SGil Adam 	return -ENOENT;
12356ce1e5c0SGil Adam }
12366ce1e5c0SGil Adam 
12376ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
12386ce1e5c0SGil Adam {
12397937fd32SJohannes Berg 	return 0;
12406ce1e5c0SGil Adam }
124128dd7ccdSMordechay Goodstein 
124228dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
124328dd7ccdSMordechay Goodstein {
124428dd7ccdSMordechay Goodstein }
1245f5b1cb2eSGil Adam 
1246f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1247f5b1cb2eSGil Adam {
1248f5b1cb2eSGil Adam }
124969964905SLuca Coelho #endif /* CONFIG_ACPI */
125069964905SLuca Coelho 
1251f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1252f130bb75SMordechay Goodstein {
1253f130bb75SMordechay Goodstein 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1254f130bb75SMordechay Goodstein 	int ret;
1255f130bb75SMordechay Goodstein 	u32 resp;
1256f130bb75SMordechay Goodstein 
1257f130bb75SMordechay Goodstein 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1258f130bb75SMordechay Goodstein 		.flags = cpu_to_le32(flags),
1259f130bb75SMordechay Goodstein 		.buf_size = 0,
1260f130bb75SMordechay Goodstein 	};
1261f130bb75SMordechay Goodstein 	struct iwl_host_cmd host_cmd = {
1262f130bb75SMordechay Goodstein 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1263f130bb75SMordechay Goodstein 		.flags = CMD_WANT_SKB,
1264f130bb75SMordechay Goodstein 		.data = {&recovery_cmd, },
1265f130bb75SMordechay Goodstein 		.len = {sizeof(recovery_cmd), },
1266f130bb75SMordechay Goodstein 	};
1267f130bb75SMordechay Goodstein 
1268f130bb75SMordechay Goodstein 	/* no error log was defined in TLV */
1269f130bb75SMordechay Goodstein 	if (!error_log_size)
1270f130bb75SMordechay Goodstein 		return;
1271f130bb75SMordechay Goodstein 
1272f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1273f130bb75SMordechay Goodstein 		/* no buf was allocated while HW reset */
1274f130bb75SMordechay Goodstein 		if (!mvm->error_recovery_buf)
1275f130bb75SMordechay Goodstein 			return;
1276f130bb75SMordechay Goodstein 
1277f130bb75SMordechay Goodstein 		host_cmd.data[1] = mvm->error_recovery_buf;
1278f130bb75SMordechay Goodstein 		host_cmd.len[1] =  error_log_size;
1279f130bb75SMordechay Goodstein 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1280f130bb75SMordechay Goodstein 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1281f130bb75SMordechay Goodstein 	}
1282f130bb75SMordechay Goodstein 
1283f130bb75SMordechay Goodstein 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1284f130bb75SMordechay Goodstein 	kfree(mvm->error_recovery_buf);
1285f130bb75SMordechay Goodstein 	mvm->error_recovery_buf = NULL;
1286f130bb75SMordechay Goodstein 
1287f130bb75SMordechay Goodstein 	if (ret) {
1288f130bb75SMordechay Goodstein 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1289f130bb75SMordechay Goodstein 		return;
1290f130bb75SMordechay Goodstein 	}
1291f130bb75SMordechay Goodstein 
1292f130bb75SMordechay Goodstein 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1293f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1294f130bb75SMordechay Goodstein 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1295f130bb75SMordechay Goodstein 		if (resp)
1296f130bb75SMordechay Goodstein 			IWL_ERR(mvm,
1297f130bb75SMordechay Goodstein 				"Failed to send recovery cmd blob was invalid %d\n",
1298f130bb75SMordechay Goodstein 				resp);
1299f130bb75SMordechay Goodstein 	}
1300f130bb75SMordechay Goodstein }
1301f130bb75SMordechay Goodstein 
130242ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
130342ce76d6SLuca Coelho {
130442ce76d6SLuca Coelho 	int ret;
130542ce76d6SLuca Coelho 
130639c1a972SIhab Zhaika 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1307da2830acSLuca Coelho 	if (ret < 0) {
1308da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
130969964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1310da2830acSLuca Coelho 				ret);
13115d041c46SLuca Coelho 		/*
13125d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
13135d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
13145d041c46SLuca Coelho 		 */
13155d041c46SLuca Coelho 		return 1;
1316da2830acSLuca Coelho 	}
1317da2830acSLuca Coelho 
131839c1a972SIhab Zhaika 	ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
131969964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
132069964905SLuca Coelho 	if (ret < 0)
132169964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
132269964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
132369964905SLuca Coelho 				ret);
132469964905SLuca Coelho 
13251edd56e6SLuca Coelho 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1326da2830acSLuca Coelho }
1327da2830acSLuca Coelho 
13281f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
13291f370650SSara Sharon {
13301f370650SSara Sharon 	int ret;
13311f370650SSara Sharon 
13327d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
133352b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
13341f370650SSara Sharon 
13353b25f1afSEmmanuel Grumbach 	WARN_ON(!mvm->nvm_data);
13363b25f1afSEmmanuel Grumbach 	ret = iwl_run_init_mvm_ucode(mvm);
13371f370650SSara Sharon 
13381f370650SSara Sharon 	if (ret) {
13391f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1340f4744258SLiad Kaufman 
1341f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1342f4744258SLiad Kaufman 			return 0;
13431f370650SSara Sharon 		return ret;
13441f370650SSara Sharon 	}
13451f370650SSara Sharon 
1346203c83d3SShahar S Matityahu 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1347bab3cb92SEmmanuel Grumbach 	iwl_trans_stop_device(mvm->trans);
1348bab3cb92SEmmanuel Grumbach 	ret = iwl_trans_start_hw(mvm->trans);
13491f370650SSara Sharon 	if (ret)
13501f370650SSara Sharon 		return ret;
13511f370650SSara Sharon 
1352b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
1353da2eb669SSara Sharon 
135494022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
13551f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
13561f370650SSara Sharon 	if (ret)
13571f370650SSara Sharon 		return ret;
13581f370650SSara Sharon 
135994022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
136094022562SEmmanuel Grumbach 
1361b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1362b108d8c7SShahar S Matityahu 			       NULL);
1363da2eb669SSara Sharon 
1364702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
13651f370650SSara Sharon }
13661f370650SSara Sharon 
1367e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1368e705c121SKalle Valo {
1369e705c121SKalle Valo 	int ret, i;
1370e705c121SKalle Valo 	struct ieee80211_channel *chan;
1371e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1372dd36a507STova Mussai 	struct ieee80211_supported_band *sband = NULL;
1373e705c121SKalle Valo 
1374e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1375e705c121SKalle Valo 
1376e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1377e705c121SKalle Valo 	if (ret)
1378e705c121SKalle Valo 		return ret;
1379e705c121SKalle Valo 
13801f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1381e705c121SKalle Valo 	if (ret) {
1382e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
138372d3c7bbSJohannes Berg 		if (ret != -ERFKILL)
138472d3c7bbSJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
138572d3c7bbSJohannes Berg 						 FW_DBG_TRIGGER_DRIVER);
1386e705c121SKalle Valo 		goto error;
1387e705c121SKalle Valo 	}
1388e705c121SKalle Valo 
1389d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1390e705c121SKalle Valo 
1391e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1392e705c121SKalle Valo 	if (ret)
1393e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1394e705c121SKalle Valo 
1395a1af4c48SShahar S Matityahu 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
13967174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1397e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
139817b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
13997174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
14007174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
14017a14c23dSSara Sharon 	}
1402e705c121SKalle Valo 
1403e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1404e705c121SKalle Valo 	if (ret)
1405e705c121SKalle Valo 		goto error;
1406e705c121SKalle Valo 
14077d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1408e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1409e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1410e705c121SKalle Valo 		if (ret)
1411e705c121SKalle Valo 			goto error;
1412bb99ff9bSLuca Coelho 	}
1413e705c121SKalle Valo 
1414e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1415e705c121SKalle Valo 	if (ret)
1416e705c121SKalle Valo 		goto error;
1417e705c121SKalle Valo 
1418b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1419b3de3ef4SEmmanuel Grumbach 	if (ret)
1420b3de3ef4SEmmanuel Grumbach 		goto error;
1421b3de3ef4SEmmanuel Grumbach 
1422cceb4507SShahar S Matityahu 	if (fw_has_capa(&mvm->fw->ucode_capa,
1423cceb4507SShahar S Matityahu 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1424a8eb340fSEmmanuel Grumbach 		ret = iwl_set_soc_latency(&mvm->fwrt);
1425cceb4507SShahar S Matityahu 		if (ret)
1426cceb4507SShahar S Matityahu 			goto error;
1427cceb4507SShahar S Matityahu 	}
1428cceb4507SShahar S Matityahu 
142943413a97SSara Sharon 	/* Init RSS configuration */
1430286ca8ebSLuca Coelho 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
14318edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
14328edbfaa1SSara Sharon 		if (ret) {
14338edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
14348edbfaa1SSara Sharon 				ret);
14358edbfaa1SSara Sharon 			goto error;
14368edbfaa1SSara Sharon 		}
14378edbfaa1SSara Sharon 	}
14388edbfaa1SSara Sharon 
14398edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
144043413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
144143413a97SSara Sharon 		if (ret) {
144243413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
144343413a97SSara Sharon 				ret);
144443413a97SSara Sharon 			goto error;
144543413a97SSara Sharon 		}
144643413a97SSara Sharon 	}
144743413a97SSara Sharon 
1448e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1449be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1450e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1451e705c121SKalle Valo 
14520ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1453e705c121SKalle Valo 
1454e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1455e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1456e705c121SKalle Valo 
145779660869SIlia Lin 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
145897d5be7eSLiad Kaufman 		ret = iwl_mvm_send_dqa_cmd(mvm);
145997d5be7eSLiad Kaufman 		if (ret)
146097d5be7eSLiad Kaufman 			goto error;
146179660869SIlia Lin 	}
146297d5be7eSLiad Kaufman 
14632c2c3647SNathan Errera 	/*
14642c2c3647SNathan Errera 	 * Add auxiliary station for scanning.
14652c2c3647SNathan Errera 	 * Newer versions of this command implies that the fw uses
14662c2c3647SNathan Errera 	 * internal aux station for all aux activities that don't
14672c2c3647SNathan Errera 	 * requires a dedicated data queue.
14682c2c3647SNathan Errera 	 */
14692c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
14702c2c3647SNathan Errera 				  ADD_STA,
14712c2c3647SNathan Errera 				  0) < 12) {
14722c2c3647SNathan Errera 		 /*
14732c2c3647SNathan Errera 		  * In old version the aux station uses mac id like other
14742c2c3647SNathan Errera 		  * station and not lmac id
14752c2c3647SNathan Errera 		  */
14762c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1477e705c121SKalle Valo 		if (ret)
1478e705c121SKalle Valo 			goto error;
14792c2c3647SNathan Errera 	}
1480e705c121SKalle Valo 
1481e705c121SKalle Valo 	/* Add all the PHY contexts */
1482dd36a507STova Mussai 	i = 0;
1483dd36a507STova Mussai 	while (!sband && i < NUM_NL80211_BANDS)
1484dd36a507STova Mussai 		sband = mvm->hw->wiphy->bands[i++];
1485dd36a507STova Mussai 
1486dd36a507STova Mussai 	if (WARN_ON_ONCE(!sband))
1487dd36a507STova Mussai 		goto error;
1488dd36a507STova Mussai 
1489dd36a507STova Mussai 	chan = &sband->channels[0];
1490dd36a507STova Mussai 
1491e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1492e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1493e705c121SKalle Valo 		/*
1494e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1495e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1496e705c121SKalle Valo 		 * For now use the first channel we have.
1497e705c121SKalle Valo 		 */
1498e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1499e705c121SKalle Valo 					   &chandef, 1, 1);
1500e705c121SKalle Valo 		if (ret)
1501e705c121SKalle Valo 			goto error;
1502e705c121SKalle Valo 	}
1503e705c121SKalle Valo 
1504c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1505c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1506c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1507c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1508c221daf2SChaya Rachel Ivgi 		 */
1509c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1510c221daf2SChaya Rachel Ivgi 	} else {
1511e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1512e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1513c221daf2SChaya Rachel Ivgi 	}
15145c89e7bcSChaya Rachel Ivgi 
1515242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL
15165c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1517944eafc2SChaya Rachel Ivgi 
1518944eafc2SChaya Rachel Ivgi 	/*
1519944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1520944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1521944eafc2SChaya Rachel Ivgi 	 */
1522944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
15235c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
15245c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
152575cfe338SLuca Coelho 		if (ret)
152675cfe338SLuca Coelho 			goto error;
152775cfe338SLuca Coelho 	}
1528c221daf2SChaya Rachel Ivgi #endif
1529e705c121SKalle Valo 
1530aa43ae12SAlex Malamud 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1531e705c121SKalle Valo 		WARN_ON(iwl_mvm_config_ltr(mvm));
1532e705c121SKalle Valo 
1533e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1534e705c121SKalle Valo 	if (ret)
1535e705c121SKalle Valo 		goto error;
1536e705c121SKalle Valo 
1537f5b1cb2eSGil Adam 	iwl_mvm_lari_cfg(mvm);
1538e705c121SKalle Valo 	/*
1539e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1540e705c121SKalle Valo 	 * anyway, so don't init MCC.
1541e705c121SKalle Valo 	 */
1542e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1543e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1544e705c121SKalle Valo 		if (ret)
1545e705c121SKalle Valo 			goto error;
1546e705c121SKalle Valo 	}
1547e705c121SKalle Valo 
1548e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
15494ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1550b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1551e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1552e705c121SKalle Valo 		if (ret)
1553e705c121SKalle Valo 			goto error;
1554e705c121SKalle Valo 	}
1555e705c121SKalle Valo 
1556f130bb75SMordechay Goodstein 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1557f130bb75SMordechay Goodstein 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1558f130bb75SMordechay Goodstein 
155948e775e6SHaim Dreyfuss 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
156048e775e6SHaim Dreyfuss 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
156148e775e6SHaim Dreyfuss 
15626ce1e5c0SGil Adam 	ret = iwl_mvm_ppag_init(mvm);
15636ce1e5c0SGil Adam 	if (ret)
15646ce1e5c0SGil Adam 		goto error;
15656ce1e5c0SGil Adam 
1566da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
15675d041c46SLuca Coelho 	if (ret == 0) {
1568a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
15691edd56e6SLuca Coelho 	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
15705d041c46SLuca Coelho 		/*
15715d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
15725d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
15735d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
15745d041c46SLuca Coelho 		 * Geo without basic SAR.
15755d041c46SLuca Coelho 		 */
15765d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
15775d041c46SLuca Coelho 	}
15785d041c46SLuca Coelho 
15795d041c46SLuca Coelho 	if (ret < 0)
1580a6bff3cbSHaim Dreyfuss 		goto error;
1581a6bff3cbSHaim Dreyfuss 
158228dd7ccdSMordechay Goodstein 	iwl_mvm_tas_init(mvm);
15837089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
15847089ae63SJohannes Berg 
1585b68bd2e3SIlan Peer 	iwl_mvm_ftm_initiator_smooth_config(mvm);
1586b68bd2e3SIlan Peer 
1587e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1588e705c121SKalle Valo 	return 0;
1589e705c121SKalle Valo  error:
1590f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1591fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1592e705c121SKalle Valo 	return ret;
1593e705c121SKalle Valo }
1594e705c121SKalle Valo 
1595e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1596e705c121SKalle Valo {
1597e705c121SKalle Valo 	int ret, i;
1598e705c121SKalle Valo 
1599e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1600e705c121SKalle Valo 
1601e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1602e705c121SKalle Valo 	if (ret)
1603e705c121SKalle Valo 		return ret;
1604e705c121SKalle Valo 
1605e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1606e705c121SKalle Valo 	if (ret) {
1607e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1608e705c121SKalle Valo 		goto error;
1609e705c121SKalle Valo 	}
1610e705c121SKalle Valo 
1611e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1612e705c121SKalle Valo 	if (ret)
1613e705c121SKalle Valo 		goto error;
1614e705c121SKalle Valo 
1615e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1616e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1617e705c121SKalle Valo 	if (ret)
1618e705c121SKalle Valo 		goto error;
1619e705c121SKalle Valo 
1620e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1621e705c121SKalle Valo 	if (ret)
1622e705c121SKalle Valo 		goto error;
1623e705c121SKalle Valo 
1624e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1625be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1626e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1627e705c121SKalle Valo 
16282c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
16292c2c3647SNathan Errera 				  ADD_STA,
16302c2c3647SNathan Errera 				  0) < 12) {
16312c2c3647SNathan Errera 		/*
16322c2c3647SNathan Errera 		 * Add auxiliary station for scanning.
16332c2c3647SNathan Errera 		 * Newer versions of this command implies that the fw uses
16342c2c3647SNathan Errera 		 * internal aux station for all aux activities that don't
16352c2c3647SNathan Errera 		 * requires a dedicated data queue.
16362c2c3647SNathan Errera 		 * In old version the aux station uses mac id like other
16372c2c3647SNathan Errera 		 * station and not lmac id
16382c2c3647SNathan Errera 		 */
16392c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1640e705c121SKalle Valo 		if (ret)
1641e705c121SKalle Valo 			goto error;
16422c2c3647SNathan Errera 	}
1643e705c121SKalle Valo 
1644e705c121SKalle Valo 	return 0;
1645e705c121SKalle Valo  error:
1646fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1647e705c121SKalle Valo 	return ret;
1648e705c121SKalle Valo }
1649e705c121SKalle Valo 
1650e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1651e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1652e705c121SKalle Valo {
1653e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1654e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1655e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1656e705c121SKalle Valo 
1657e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1658e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1659e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1660e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1661e705c121SKalle Valo 			  "Reached" : "Not reached");
1662e705c121SKalle Valo }
1663e705c121SKalle Valo 
1664e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1665e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1666e705c121SKalle Valo {
1667e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1668e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1669e705c121SKalle Valo 
1670e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1671e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1672e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1673e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1674e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1675e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
16760c8d0a47SGolan Ben-Ami 
16770c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
16780c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
16790c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
16800c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1681e705c121SKalle Valo }
1682