1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11e705c121SKalle Valo  *
12e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
13e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
14e705c121SKalle Valo  * published by the Free Software Foundation.
15e705c121SKalle Valo  *
16e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
17e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
18e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19e705c121SKalle Valo  * General Public License for more details.
20e705c121SKalle Valo  *
21e705c121SKalle Valo  * You should have received a copy of the GNU General Public License
22e705c121SKalle Valo  * along with this program; if not, write to the Free Software
23e705c121SKalle Valo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24e705c121SKalle Valo  * USA
25e705c121SKalle Valo  *
26e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
27e705c121SKalle Valo  * in the file called COPYING.
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * Contact Information:
30cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
31e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32e705c121SKalle Valo  *
33e705c121SKalle Valo  * BSD LICENSE
34e705c121SKalle Valo  *
35e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
38e705c121SKalle Valo  * All rights reserved.
39e705c121SKalle Valo  *
40e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
41e705c121SKalle Valo  * modification, are permitted provided that the following conditions
42e705c121SKalle Valo  * are met:
43e705c121SKalle Valo  *
44e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
45e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
46e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
47e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
48e705c121SKalle Valo  *    the documentation and/or other materials provided with the
49e705c121SKalle Valo  *    distribution.
50e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
51e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
52e705c121SKalle Valo  *    from this software without specific prior written permission.
53e705c121SKalle Valo  *
54e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65e705c121SKalle Valo  *
66e705c121SKalle Valo  *****************************************************************************/
67e705c121SKalle Valo #include <net/mac80211.h>
68854d773eSSara Sharon #include <linux/netdevice.h>
69e705c121SKalle Valo 
70e705c121SKalle Valo #include "iwl-trans.h"
71e705c121SKalle Valo #include "iwl-op-mode.h"
72d962f9b1SJohannes Berg #include "fw/img.h"
73e705c121SKalle Valo #include "iwl-debug.h"
74e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
75e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
76e705c121SKalle Valo #include "iwl-prph.h"
77813df5ceSLuca Coelho #include "fw/acpi.h"
78e705c121SKalle Valo 
79e705c121SKalle Valo #include "mvm.h"
807174beb6SJohannes Berg #include "fw/dbg.h"
81e705c121SKalle Valo #include "iwl-phy-db.h"
82e705c121SKalle Valo 
83e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT	HZ
84e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
85e705c121SKalle Valo 
86e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
87e705c121SKalle Valo 
88e705c121SKalle Valo struct iwl_mvm_alive_data {
89e705c121SKalle Valo 	bool valid;
90e705c121SKalle Valo 	u32 scd_base_addr;
91e705c121SKalle Valo };
92e705c121SKalle Valo 
93e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
94e705c121SKalle Valo {
95e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
96e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
97e705c121SKalle Valo 	};
98e705c121SKalle Valo 
99e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
100e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
101e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
102e705c121SKalle Valo }
103e705c121SKalle Valo 
10443413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
10543413a97SSara Sharon {
10643413a97SSara Sharon 	int i;
10743413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
10843413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
10943413a97SSara Sharon 		.hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
110854d773eSSara Sharon 			     IWL_RSS_HASH_TYPE_IPV4_UDP |
11143413a97SSara Sharon 			     IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
11243413a97SSara Sharon 			     IWL_RSS_HASH_TYPE_IPV6_TCP |
113854d773eSSara Sharon 			     IWL_RSS_HASH_TYPE_IPV6_UDP |
11443413a97SSara Sharon 			     IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
11543413a97SSara Sharon 	};
11643413a97SSara Sharon 
117f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
118f43495fdSSara Sharon 		return 0;
119f43495fdSSara Sharon 
120854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
12143413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
122854d773eSSara Sharon 		cmd.indirection_table[i] =
123854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
124854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
12543413a97SSara Sharon 
12643413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
12743413a97SSara Sharon }
12843413a97SSara Sharon 
12997d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
13097d5be7eSLiad Kaufman {
13197d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
13297d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
13397d5be7eSLiad Kaufman 	};
13497d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
13597d5be7eSLiad Kaufman 	int ret;
13697d5be7eSLiad Kaufman 
13797d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
13897d5be7eSLiad Kaufman 	if (ret)
13997d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
14097d5be7eSLiad Kaufman 	else
14197d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
14297d5be7eSLiad Kaufman 
14397d5be7eSLiad Kaufman 	return ret;
14497d5be7eSLiad Kaufman }
14597d5be7eSLiad Kaufman 
146bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
147bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
148bdccdb85SGolan Ben-Ami {
149bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
150bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
151bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
152bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
153bdccdb85SGolan Ben-Ami 	int i;
154bdccdb85SGolan Ben-Ami 
155bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
156bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
157bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
158bdccdb85SGolan Ben-Ami 
159bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
160bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
161bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
162bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
163bdccdb85SGolan Ben-Ami 			       n_words + i,
164bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
165bdccdb85SGolan Ben-Ami }
166bdccdb85SGolan Ben-Ami 
167e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
168e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
169e705c121SKalle Valo {
170e705c121SKalle Valo 	struct iwl_mvm *mvm =
171e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
172e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
1735c228d63SSara Sharon 	struct mvm_alive_resp_v3 *palive3;
174e705c121SKalle Valo 	struct mvm_alive_resp *palive;
1755c228d63SSara Sharon 	struct iwl_umac_alive *umac;
1765c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
1775c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
1785c228d63SSara Sharon 	u16 status;
1793485e76eSLuca Coelho 	u32 umac_error_event_table;
180e705c121SKalle Valo 
1815c228d63SSara Sharon 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
182e705c121SKalle Valo 		palive = (void *)pkt->data;
1835c228d63SSara Sharon 		umac = &palive->umac_data;
1845c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
1855c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
1865c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
1875c228d63SSara Sharon 	} else {
1885c228d63SSara Sharon 		palive3 = (void *)pkt->data;
1895c228d63SSara Sharon 		umac = &palive3->umac_data;
1905c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
1915c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
1925c228d63SSara Sharon 	}
193e705c121SKalle Valo 
1945c228d63SSara Sharon 	mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
1955c228d63SSara Sharon 	if (lmac2)
1965c228d63SSara Sharon 		mvm->error_event_table[1] =
1975c228d63SSara Sharon 			le32_to_cpu(lmac2->error_event_table_ptr);
1985c228d63SSara Sharon 	mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
199e705c121SKalle Valo 
2003485e76eSLuca Coelho 	umac_error_event_table = le32_to_cpu(umac->error_info_addr);
2015c228d63SSara Sharon 
2023485e76eSLuca Coelho 	if (!umac_error_event_table) {
2033485e76eSLuca Coelho 		mvm->support_umac_log = false;
2043485e76eSLuca Coelho 	} else if (umac_error_event_table >=
2053485e76eSLuca Coelho 		   mvm->trans->cfg->min_umac_error_event_table) {
2063485e76eSLuca Coelho 		mvm->support_umac_log = true;
2073485e76eSLuca Coelho 		mvm->umac_error_event_table = umac_error_event_table;
2083485e76eSLuca Coelho 	} else {
209fb5b2846SLuca Coelho 		IWL_ERR(mvm,
210fb5b2846SLuca Coelho 			"Not valid error log pointer 0x%08X for %s uCode\n",
211fb5b2846SLuca Coelho 			mvm->umac_error_event_table,
212fb5b2846SLuca Coelho 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
213fb5b2846SLuca Coelho 			"Init" : "RT");
2143485e76eSLuca Coelho 		mvm->support_umac_log = false;
2153485e76eSLuca Coelho 	}
216fb5b2846SLuca Coelho 
2175c228d63SSara Sharon 	alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
2185c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
219e705c121SKalle Valo 
220e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2215c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2225c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2235c228d63SSara Sharon 
2245c228d63SSara Sharon 	if (lmac2)
2255c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
226e705c121SKalle Valo 
227e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
228e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2295c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2305c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
231e705c121SKalle Valo 
232e705c121SKalle Valo 	return true;
233e705c121SKalle Valo }
234e705c121SKalle Valo 
2351f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2361f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2371f370650SSara Sharon {
2381f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2391f370650SSara Sharon 
2401f370650SSara Sharon 	return true;
2411f370650SSara Sharon }
2421f370650SSara Sharon 
243e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
244e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
245e705c121SKalle Valo {
246e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
247e705c121SKalle Valo 
248e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
249e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
250e705c121SKalle Valo 		return true;
251e705c121SKalle Valo 	}
252e705c121SKalle Valo 
253ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
254e705c121SKalle Valo 
255e705c121SKalle Valo 	return false;
256e705c121SKalle Valo }
257e705c121SKalle Valo 
258e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
259e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
260e705c121SKalle Valo {
261e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
262e705c121SKalle Valo 	struct iwl_mvm_alive_data alive_data;
263e705c121SKalle Valo 	const struct fw_img *fw;
264e705c121SKalle Valo 	int ret, i;
265702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
266e705c121SKalle Valo 	static const u16 alive_cmd[] = { MVM_ALIVE };
267e705c121SKalle Valo 
268e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
2693d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
2703d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
2713d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
272612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
273e705c121SKalle Valo 	else
274612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
275e705c121SKalle Valo 	if (WARN_ON(!fw))
276e705c121SKalle Valo 		return -EINVAL;
277702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
27865b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
279e705c121SKalle Valo 
280e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
281e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
282e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
283e705c121SKalle Valo 
284e705c121SKalle Valo 	ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
285e705c121SKalle Valo 	if (ret) {
286702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
287e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
288e705c121SKalle Valo 		return ret;
289e705c121SKalle Valo 	}
290e705c121SKalle Valo 
291e705c121SKalle Valo 	/*
292e705c121SKalle Valo 	 * Some things may run in the background now, but we
293e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
294e705c121SKalle Valo 	 */
295e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
296e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
297e705c121SKalle Valo 	if (ret) {
298d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
299d6be9c1dSSara Sharon 
3002f7a3863SLuca Coelho 		if (trans->cfg->device_family == IWL_DEVICE_FAMILY_22000)
301e705c121SKalle Valo 			IWL_ERR(mvm,
302e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
303d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
304d6be9c1dSSara Sharon 				iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
3056e584873SSara Sharon 		else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
306d6be9c1dSSara Sharon 			IWL_ERR(mvm,
307d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
308d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
309d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
310702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
311e705c121SKalle Valo 		return ret;
312e705c121SKalle Valo 	}
313e705c121SKalle Valo 
314e705c121SKalle Valo 	if (!alive_data.valid) {
315e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
316702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
317e705c121SKalle Valo 		return -EIO;
318e705c121SKalle Valo 	}
319e705c121SKalle Valo 
320e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
321e705c121SKalle Valo 
322e705c121SKalle Valo 	/*
323e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
324e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
325e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
326e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
327e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
328e705c121SKalle Valo 	 * will be empty.
329e705c121SKalle Valo 	 */
330e705c121SKalle Valo 
331e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
332097129c9SLiad Kaufman 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
333e705c121SKalle Valo 
334e705c121SKalle Valo 	for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
335e705c121SKalle Valo 		atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
336e705c121SKalle Valo 
33765b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
338e705c121SKalle Valo 
339e705c121SKalle Valo 	return 0;
340e705c121SKalle Valo }
341e705c121SKalle Valo 
3428c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
3438c5f47b1SJohannes Berg {
3448c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
3458c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
3468c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
3478c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
3488c5f47b1SJohannes Berg 	};
3498c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
3508c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
3518c5f47b1SJohannes Berg 	};
3528c5f47b1SJohannes Berg 	int ret;
3538c5f47b1SJohannes Berg 
3548c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
3558c5f47b1SJohannes Berg 
3568c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
3578c5f47b1SJohannes Berg 				   &init_wait,
3588c5f47b1SJohannes Berg 				   init_complete,
3598c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
3608c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
3618c5f47b1SJohannes Berg 				   NULL);
3628c5f47b1SJohannes Berg 
3638c5f47b1SJohannes Berg 	/* Will also start the device */
3648c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
3658c5f47b1SJohannes Berg 	if (ret) {
3668c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
3678c5f47b1SJohannes Berg 		goto error;
3688c5f47b1SJohannes Berg 	}
3698c5f47b1SJohannes Berg 
3708c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
3718c5f47b1SJohannes Berg 	 * commands
3728c5f47b1SJohannes Berg 	 */
3738c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
3748c5f47b1SJohannes Berg 						INIT_EXTENDED_CFG_CMD), 0,
3758c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
3768c5f47b1SJohannes Berg 	if (ret) {
3778c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
3788c5f47b1SJohannes Berg 			ret);
3798c5f47b1SJohannes Berg 		goto error;
3808c5f47b1SJohannes Berg 	}
3818c5f47b1SJohannes Berg 
382e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
383e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
384e9e1ba3dSSara Sharon 		iwl_mvm_read_external_nvm(mvm);
3858c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
386e9e1ba3dSSara Sharon 	}
3878c5f47b1SJohannes Berg 
388d4f3695eSSara Sharon 	if (IWL_MVM_PARSE_NVM && read_nvm) {
3895bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
390d4f3695eSSara Sharon 		if (ret) {
391d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
392d4f3695eSSara Sharon 			goto error;
393d4f3695eSSara Sharon 		}
394d4f3695eSSara Sharon 	}
395d4f3695eSSara Sharon 
3968c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
3978c5f47b1SJohannes Berg 						NVM_ACCESS_COMPLETE), 0,
3988c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
3998c5f47b1SJohannes Berg 	if (ret) {
4008c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4018c5f47b1SJohannes Berg 			ret);
4028c5f47b1SJohannes Berg 		goto error;
4038c5f47b1SJohannes Berg 	}
4048c5f47b1SJohannes Berg 
4058c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
406e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
4078c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
408e9e1ba3dSSara Sharon 	if (ret)
409e9e1ba3dSSara Sharon 		return ret;
410e9e1ba3dSSara Sharon 
411e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
412d4f3695eSSara Sharon 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
413c135cb56SShaul Triebitz 		mvm->nvm_data = iwl_fw_get_nvm(&mvm->fwrt);
414c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
415c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
416c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
417e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
418e9e1ba3dSSara Sharon 			return ret;
419e9e1ba3dSSara Sharon 		}
420e9e1ba3dSSara Sharon 	}
421e9e1ba3dSSara Sharon 
422e9e1ba3dSSara Sharon 	return 0;
4238c5f47b1SJohannes Berg 
4248c5f47b1SJohannes Berg error:
4258c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
4268c5f47b1SJohannes Berg 	return ret;
4278c5f47b1SJohannes Berg }
4288c5f47b1SJohannes Berg 
429e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
430e705c121SKalle Valo {
431e705c121SKalle Valo 	struct iwl_phy_cfg_cmd phy_cfg_cmd;
432702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
433e705c121SKalle Valo 
434e705c121SKalle Valo 	/* Set parameters */
435e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
43686a2b204SLuca Coelho 
43786a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
43886a2b204SLuca Coelho 	phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
43986a2b204SLuca Coelho 
440e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
441e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
442e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
443e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
444e705c121SKalle Valo 
445e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
446e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
447e705c121SKalle Valo 
448e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
449e705c121SKalle Valo 				    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
450e705c121SKalle Valo }
451e705c121SKalle Valo 
452e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
453e705c121SKalle Valo {
454e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
455e705c121SKalle Valo 	static const u16 init_complete[] = {
456e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
457e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
458e705c121SKalle Valo 	};
459e705c121SKalle Valo 	int ret;
460e705c121SKalle Valo 
4617d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
4628c5f47b1SJohannes Berg 		return iwl_run_unified_mvm_ucode(mvm, true);
4638c5f47b1SJohannes Berg 
464e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
465e705c121SKalle Valo 
466e705c121SKalle Valo 	if (WARN_ON_ONCE(mvm->calibrating))
467e705c121SKalle Valo 		return 0;
468e705c121SKalle Valo 
469e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
470e705c121SKalle Valo 				   &calib_wait,
471e705c121SKalle Valo 				   init_complete,
472e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
473e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
474e705c121SKalle Valo 				   mvm->phy_db);
475e705c121SKalle Valo 
476e705c121SKalle Valo 	/* Will also start the device */
477e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
478e705c121SKalle Valo 	if (ret) {
479e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
48000e0c6c8SLuca Coelho 		goto remove_notif;
481e705c121SKalle Valo 	}
482e705c121SKalle Valo 
483b3de3ef4SEmmanuel Grumbach 	if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
484b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
485e705c121SKalle Valo 		if (ret)
48600e0c6c8SLuca Coelho 			goto remove_notif;
487b3de3ef4SEmmanuel Grumbach 	}
488e705c121SKalle Valo 
489e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
490e705c121SKalle Valo 	if (read_nvm) {
4915bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
492e705c121SKalle Valo 		if (ret) {
493e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
49400e0c6c8SLuca Coelho 			goto remove_notif;
495e705c121SKalle Valo 		}
496e705c121SKalle Valo 	}
497e705c121SKalle Valo 
498e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
499e705c121SKalle Valo 	if (mvm->nvm_file_name)
500e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
501e705c121SKalle Valo 
50200e0c6c8SLuca Coelho 	WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans));
503e705c121SKalle Valo 
504e705c121SKalle Valo 	/*
505e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
506e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
507e705c121SKalle Valo 	 */
508e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
509e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
510e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
51100e0c6c8SLuca Coelho 		goto remove_notif;
512e705c121SKalle Valo 	}
513e705c121SKalle Valo 
514e705c121SKalle Valo 	mvm->calibrating = true;
515e705c121SKalle Valo 
516e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
517e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
518e705c121SKalle Valo 	if (ret)
51900e0c6c8SLuca Coelho 		goto remove_notif;
520e705c121SKalle Valo 
521e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
522e705c121SKalle Valo 	if (ret) {
523e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
524e705c121SKalle Valo 			ret);
52500e0c6c8SLuca Coelho 		goto remove_notif;
526e705c121SKalle Valo 	}
527e705c121SKalle Valo 
528e705c121SKalle Valo 	/*
529e705c121SKalle Valo 	 * Some things may run in the background now, but we
530e705c121SKalle Valo 	 * just wait for the calibration complete notification.
531e705c121SKalle Valo 	 */
532e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
533e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
53400e0c6c8SLuca Coelho 	if (!ret)
535e705c121SKalle Valo 		goto out;
536e705c121SKalle Valo 
53700e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
53800e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
53900e0c6c8SLuca Coelho 		ret = 0;
54000e0c6c8SLuca Coelho 	} else {
54100e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
54200e0c6c8SLuca Coelho 			ret);
54300e0c6c8SLuca Coelho 	}
54400e0c6c8SLuca Coelho 
54500e0c6c8SLuca Coelho 	goto out;
54600e0c6c8SLuca Coelho 
54700e0c6c8SLuca Coelho remove_notif:
548e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
549e705c121SKalle Valo out:
550e705c121SKalle Valo 	mvm->calibrating = false;
551e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
552e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
553e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
554e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
555e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
556e705c121SKalle Valo 					GFP_KERNEL);
557e705c121SKalle Valo 		if (!mvm->nvm_data)
558e705c121SKalle Valo 			return -ENOMEM;
559e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
560e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
561e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
562e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
563e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
564e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
565e705c121SKalle Valo 	}
566e705c121SKalle Valo 
567e705c121SKalle Valo 	return ret;
568e705c121SKalle Valo }
569e705c121SKalle Valo 
570e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
571e705c121SKalle Valo {
572e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
573e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
574e705c121SKalle Valo 	};
575e705c121SKalle Valo 
576e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
577e705c121SKalle Valo 		return 0;
578e705c121SKalle Valo 
579e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
580e705c121SKalle Valo 				    sizeof(cmd), &cmd);
581e705c121SKalle Valo }
582e705c121SKalle Valo 
583c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
584c386dacbSHaim Dreyfuss static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
585c386dacbSHaim Dreyfuss 				   union acpi_object *table,
586c386dacbSHaim Dreyfuss 				   struct iwl_mvm_sar_profile *profile,
587c386dacbSHaim Dreyfuss 				   bool enabled)
588da2830acSLuca Coelho {
589c386dacbSHaim Dreyfuss 	int i;
590da2830acSLuca Coelho 
591c386dacbSHaim Dreyfuss 	profile->enabled = enabled;
592da2830acSLuca Coelho 
593e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
594c386dacbSHaim Dreyfuss 		if ((table[i].type != ACPI_TYPE_INTEGER) ||
595c386dacbSHaim Dreyfuss 		    (table[i].integer.value > U8_MAX))
596da2830acSLuca Coelho 			return -EINVAL;
597da2830acSLuca Coelho 
598c386dacbSHaim Dreyfuss 		profile->table[i] = table[i].integer.value;
599da2830acSLuca Coelho 	}
600da2830acSLuca Coelho 
601da2830acSLuca Coelho 	return 0;
602da2830acSLuca Coelho }
603da2830acSLuca Coelho 
604c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
605c386dacbSHaim Dreyfuss {
606813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *table, *data;
607c386dacbSHaim Dreyfuss 	bool enabled;
608da2830acSLuca Coelho 	int ret;
609da2830acSLuca Coelho 
610813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
611813df5ceSLuca Coelho 	if (IS_ERR(data))
612813df5ceSLuca Coelho 		return PTR_ERR(data);
613da2830acSLuca Coelho 
6142fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
615c386dacbSHaim Dreyfuss 					 ACPI_WRDS_WIFI_DATA_SIZE);
616c386dacbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
617c386dacbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
618c386dacbSHaim Dreyfuss 		goto out_free;
619c386dacbSHaim Dreyfuss 	}
620da2830acSLuca Coelho 
621c386dacbSHaim Dreyfuss 	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
622c386dacbSHaim Dreyfuss 		ret = -EINVAL;
623c386dacbSHaim Dreyfuss 		goto out_free;
624c386dacbSHaim Dreyfuss 	}
625c386dacbSHaim Dreyfuss 
626c386dacbSHaim Dreyfuss 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
627c386dacbSHaim Dreyfuss 
628c386dacbSHaim Dreyfuss 	/* position of the actual table */
629c386dacbSHaim Dreyfuss 	table = &wifi_pkg->package.elements[2];
630c386dacbSHaim Dreyfuss 
631c386dacbSHaim Dreyfuss 	/* The profile from WRDS is officially profile 1, but goes
632c386dacbSHaim Dreyfuss 	 * into sar_profiles[0] (because we don't have a profile 0).
633c386dacbSHaim Dreyfuss 	 */
634c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
635c386dacbSHaim Dreyfuss 				      enabled);
636c386dacbSHaim Dreyfuss out_free:
637813df5ceSLuca Coelho 	kfree(data);
638da2830acSLuca Coelho 	return ret;
639da2830acSLuca Coelho }
640da2830acSLuca Coelho 
64169964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
64269964905SLuca Coelho {
643813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
64469964905SLuca Coelho 	bool enabled;
64569964905SLuca Coelho 	int i, n_profiles, ret;
64669964905SLuca Coelho 
647813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
648813df5ceSLuca Coelho 	if (IS_ERR(data))
649813df5ceSLuca Coelho 		return PTR_ERR(data);
65069964905SLuca Coelho 
6512fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
65269964905SLuca Coelho 					 ACPI_EWRD_WIFI_DATA_SIZE);
65369964905SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
65469964905SLuca Coelho 		ret = PTR_ERR(wifi_pkg);
65569964905SLuca Coelho 		goto out_free;
65669964905SLuca Coelho 	}
65769964905SLuca Coelho 
65869964905SLuca Coelho 	if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
65969964905SLuca Coelho 	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
66069964905SLuca Coelho 		ret = -EINVAL;
66169964905SLuca Coelho 		goto out_free;
66269964905SLuca Coelho 	}
66369964905SLuca Coelho 
66469964905SLuca Coelho 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
66569964905SLuca Coelho 	n_profiles = wifi_pkg->package.elements[2].integer.value;
66669964905SLuca Coelho 
667e2ef1476SSharon Dvir 	/* in case of BIOS bug */
668e2ef1476SSharon Dvir 	if (n_profiles <= 0) {
669e2ef1476SSharon Dvir 		ret = -EINVAL;
670e2ef1476SSharon Dvir 		goto out_free;
671e2ef1476SSharon Dvir 	}
672e2ef1476SSharon Dvir 
67369964905SLuca Coelho 	for (i = 0; i < n_profiles; i++) {
67469964905SLuca Coelho 		/* the tables start at element 3 */
67569964905SLuca Coelho 		static int pos = 3;
67669964905SLuca Coelho 
67769964905SLuca Coelho 		/* The EWRD profiles officially go from 2 to 4, but we
67869964905SLuca Coelho 		 * save them in sar_profiles[1-3] (because we don't
67969964905SLuca Coelho 		 * have profile 0).  So in the array we start from 1.
68069964905SLuca Coelho 		 */
68169964905SLuca Coelho 		ret = iwl_mvm_sar_set_profile(mvm,
68269964905SLuca Coelho 					      &wifi_pkg->package.elements[pos],
68369964905SLuca Coelho 					      &mvm->sar_profiles[i + 1],
68469964905SLuca Coelho 					      enabled);
68569964905SLuca Coelho 		if (ret < 0)
68669964905SLuca Coelho 			break;
68769964905SLuca Coelho 
68869964905SLuca Coelho 		/* go to the next table */
689e7a3b8d8SLuca Coelho 		pos += ACPI_SAR_TABLE_SIZE;
69069964905SLuca Coelho 	}
69169964905SLuca Coelho 
69269964905SLuca Coelho out_free:
693813df5ceSLuca Coelho 	kfree(data);
69469964905SLuca Coelho 	return ret;
69569964905SLuca Coelho }
69669964905SLuca Coelho 
6977fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
698a6bff3cbSHaim Dreyfuss {
699813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
7007fe90e0eSHaim Dreyfuss 	int i, j, ret;
7017fe90e0eSHaim Dreyfuss 	int idx = 1;
702a6bff3cbSHaim Dreyfuss 
703813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
704813df5ceSLuca Coelho 	if (IS_ERR(data))
705813df5ceSLuca Coelho 		return PTR_ERR(data);
706a6bff3cbSHaim Dreyfuss 
7072fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
708a6bff3cbSHaim Dreyfuss 					 ACPI_WGDS_WIFI_DATA_SIZE);
709a6bff3cbSHaim Dreyfuss 	if (IS_ERR(wifi_pkg)) {
710a6bff3cbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
711a6bff3cbSHaim Dreyfuss 		goto out_free;
712a6bff3cbSHaim Dreyfuss 	}
713a6bff3cbSHaim Dreyfuss 
714e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
715e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
716a6bff3cbSHaim Dreyfuss 			union acpi_object *entry;
717a6bff3cbSHaim Dreyfuss 
7187fe90e0eSHaim Dreyfuss 			entry = &wifi_pkg->package.elements[idx++];
719a6bff3cbSHaim Dreyfuss 			if ((entry->type != ACPI_TYPE_INTEGER) ||
720aae9d563SChristophe Jaillet 			    (entry->integer.value > U8_MAX)) {
721aae9d563SChristophe Jaillet 				ret = -EINVAL;
722aae9d563SChristophe Jaillet 				goto out_free;
723aae9d563SChristophe Jaillet 			}
724a6bff3cbSHaim Dreyfuss 
7257fe90e0eSHaim Dreyfuss 			mvm->geo_profiles[i].values[j] = entry->integer.value;
7267fe90e0eSHaim Dreyfuss 		}
727a6bff3cbSHaim Dreyfuss 	}
728a6bff3cbSHaim Dreyfuss 	ret = 0;
729a6bff3cbSHaim Dreyfuss out_free:
730813df5ceSLuca Coelho 	kfree(data);
731a6bff3cbSHaim Dreyfuss 	return ret;
732a6bff3cbSHaim Dreyfuss }
733a6bff3cbSHaim Dreyfuss 
73442ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
735da2830acSLuca Coelho {
736da2830acSLuca Coelho 	struct iwl_dev_tx_power_cmd cmd = {
7374b87e5afSLuca Coelho 		.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
738da2830acSLuca Coelho 	};
73942ce76d6SLuca Coelho 	int i, j, idx;
740e7a3b8d8SLuca Coelho 	int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
74155bfa4b9SLuca Coelho 	int len = sizeof(cmd);
742da2830acSLuca Coelho 
743e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
744e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
745e7a3b8d8SLuca Coelho 		     ACPI_SAR_TABLE_SIZE);
74642ce76d6SLuca Coelho 
74755bfa4b9SLuca Coelho 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
74855bfa4b9SLuca Coelho 		len = sizeof(cmd.v3);
74955bfa4b9SLuca Coelho 
750e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
75142ce76d6SLuca Coelho 		struct iwl_mvm_sar_profile *prof;
75242ce76d6SLuca Coelho 
75342ce76d6SLuca Coelho 		/* don't allow SAR to be disabled (profile 0 means disable) */
75442ce76d6SLuca Coelho 		if (profs[i] == 0)
75542ce76d6SLuca Coelho 			return -EPERM;
75642ce76d6SLuca Coelho 
757e7a3b8d8SLuca Coelho 		/* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
758e7a3b8d8SLuca Coelho 		if (profs[i] > ACPI_SAR_PROFILE_NUM)
75942ce76d6SLuca Coelho 			return -EINVAL;
76042ce76d6SLuca Coelho 
76142ce76d6SLuca Coelho 		/* profiles go from 1 to 4, so decrement to access the array */
76242ce76d6SLuca Coelho 		prof = &mvm->sar_profiles[profs[i] - 1];
76342ce76d6SLuca Coelho 
76442ce76d6SLuca Coelho 		/* if the profile is disabled, do nothing */
76542ce76d6SLuca Coelho 		if (!prof->enabled) {
76642ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
76742ce76d6SLuca Coelho 					profs[i]);
76842ce76d6SLuca Coelho 			/* if one of the profiles is disabled, we fail all */
76942ce76d6SLuca Coelho 			return -ENOENT;
77042ce76d6SLuca Coelho 		}
77142ce76d6SLuca Coelho 
77242ce76d6SLuca Coelho 		IWL_DEBUG_RADIO(mvm, "  Chain[%d]:\n", i);
773e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
774e7a3b8d8SLuca Coelho 			idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
77542ce76d6SLuca Coelho 			cmd.v3.per_chain_restriction[i][j] =
77642ce76d6SLuca Coelho 				cpu_to_le16(prof->table[idx]);
77742ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "    Band[%d] = %d * .125dBm\n",
77842ce76d6SLuca Coelho 					j, prof->table[idx]);
77942ce76d6SLuca Coelho 		}
78042ce76d6SLuca Coelho 	}
78142ce76d6SLuca Coelho 
78242ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
78342ce76d6SLuca Coelho 
78442ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
78542ce76d6SLuca Coelho }
78642ce76d6SLuca Coelho 
7877fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
7887fe90e0eSHaim Dreyfuss {
7897fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_resp *resp;
7907fe90e0eSHaim Dreyfuss 	int ret;
7917fe90e0eSHaim Dreyfuss 
7927fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
7937fe90e0eSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
7947fe90e0eSHaim Dreyfuss 	};
7957fe90e0eSHaim Dreyfuss 	struct iwl_host_cmd cmd = {
7967fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
7977fe90e0eSHaim Dreyfuss 		.len = { sizeof(geo_cmd), },
7987fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
7997fe90e0eSHaim Dreyfuss 		.data = { &geo_cmd },
8007fe90e0eSHaim Dreyfuss 	};
8017fe90e0eSHaim Dreyfuss 
8027fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8037fe90e0eSHaim Dreyfuss 	if (ret) {
8047fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8057fe90e0eSHaim Dreyfuss 		return ret;
8067fe90e0eSHaim Dreyfuss 	}
8077fe90e0eSHaim Dreyfuss 
8087fe90e0eSHaim Dreyfuss 	resp = (void *)cmd.resp_pkt->data;
8097fe90e0eSHaim Dreyfuss 	ret = le32_to_cpu(resp->profile_idx);
810e7a3b8d8SLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
8117fe90e0eSHaim Dreyfuss 		ret = -EIO;
8127fe90e0eSHaim Dreyfuss 		IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
8137fe90e0eSHaim Dreyfuss 	}
8147fe90e0eSHaim Dreyfuss 
8157fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8167fe90e0eSHaim Dreyfuss 	return ret;
8177fe90e0eSHaim Dreyfuss }
8187fe90e0eSHaim Dreyfuss 
819a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
820a6bff3cbSHaim Dreyfuss {
821a6bff3cbSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd cmd = {
822a6bff3cbSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
823a6bff3cbSHaim Dreyfuss 	};
8247fe90e0eSHaim Dreyfuss 	int ret, i, j;
825a6bff3cbSHaim Dreyfuss 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
826a6bff3cbSHaim Dreyfuss 
8277fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wgds_table(mvm);
828a6bff3cbSHaim Dreyfuss 	if (ret < 0) {
829a6bff3cbSHaim Dreyfuss 		IWL_DEBUG_RADIO(mvm,
830a6bff3cbSHaim Dreyfuss 				"Geo SAR BIOS table invalid or unavailable. (%d)\n",
831a6bff3cbSHaim Dreyfuss 				ret);
832a6bff3cbSHaim Dreyfuss 		/* we don't fail if the table is not available */
833a6bff3cbSHaim Dreyfuss 		return 0;
834a6bff3cbSHaim Dreyfuss 	}
835a6bff3cbSHaim Dreyfuss 
836a6bff3cbSHaim Dreyfuss 	IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
837a6bff3cbSHaim Dreyfuss 
838e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
839a6bff3cbSHaim Dreyfuss 		     ACPI_WGDS_TABLE_SIZE !=  ACPI_WGDS_WIFI_DATA_SIZE);
840a6bff3cbSHaim Dreyfuss 
841e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
842e7a3b8d8SLuca Coelho 
843e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
844a6bff3cbSHaim Dreyfuss 		struct iwl_per_chain_offset *chain =
845a6bff3cbSHaim Dreyfuss 			(struct iwl_per_chain_offset *)&cmd.table[i];
846a6bff3cbSHaim Dreyfuss 
847a6bff3cbSHaim Dreyfuss 		for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
848a6bff3cbSHaim Dreyfuss 			u8 *value;
849a6bff3cbSHaim Dreyfuss 
8507fe90e0eSHaim Dreyfuss 			value = &mvm->geo_profiles[i].values[j *
851e7a3b8d8SLuca Coelho 				ACPI_GEO_PER_CHAIN_SIZE];
852a6bff3cbSHaim Dreyfuss 			chain[j].max_tx_power = cpu_to_le16(value[0]);
853a6bff3cbSHaim Dreyfuss 			chain[j].chain_a = value[1];
854a6bff3cbSHaim Dreyfuss 			chain[j].chain_b = value[2];
855a6bff3cbSHaim Dreyfuss 			IWL_DEBUG_RADIO(mvm,
856a6bff3cbSHaim Dreyfuss 					"SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
857a6bff3cbSHaim Dreyfuss 					i, j, value[1], value[2], value[0]);
858a6bff3cbSHaim Dreyfuss 		}
859a6bff3cbSHaim Dreyfuss 	}
860a6bff3cbSHaim Dreyfuss 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
861a6bff3cbSHaim Dreyfuss }
862a6bff3cbSHaim Dreyfuss 
86369964905SLuca Coelho #else /* CONFIG_ACPI */
86469964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
86569964905SLuca Coelho {
86669964905SLuca Coelho 	return -ENOENT;
86769964905SLuca Coelho }
86869964905SLuca Coelho 
86969964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
87069964905SLuca Coelho {
87169964905SLuca Coelho 	return -ENOENT;
87269964905SLuca Coelho }
873a6bff3cbSHaim Dreyfuss 
874a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
875a6bff3cbSHaim Dreyfuss {
876a6bff3cbSHaim Dreyfuss 	return 0;
877a6bff3cbSHaim Dreyfuss }
87818f1755dSLuca Coelho 
87918f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
88018f1755dSLuca Coelho 			       int prof_b)
88118f1755dSLuca Coelho {
88218f1755dSLuca Coelho 	return -ENOENT;
88318f1755dSLuca Coelho }
88418f1755dSLuca Coelho 
88518f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
88618f1755dSLuca Coelho {
88718f1755dSLuca Coelho 	return -ENOENT;
88818f1755dSLuca Coelho }
88969964905SLuca Coelho #endif /* CONFIG_ACPI */
89069964905SLuca Coelho 
89142ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
89242ce76d6SLuca Coelho {
89342ce76d6SLuca Coelho 	int ret;
89442ce76d6SLuca Coelho 
895c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wrds_table(mvm);
896da2830acSLuca Coelho 	if (ret < 0) {
897da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
89869964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
899da2830acSLuca Coelho 				ret);
90069964905SLuca Coelho 		/* if not available, don't fail and don't bother with EWRD */
901da2830acSLuca Coelho 		return 0;
902da2830acSLuca Coelho 	}
903da2830acSLuca Coelho 
90469964905SLuca Coelho 	ret = iwl_mvm_sar_get_ewrd_table(mvm);
90569964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
90669964905SLuca Coelho 	if (ret < 0)
90769964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
90869964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
90969964905SLuca Coelho 				ret);
91069964905SLuca Coelho 
91142ce76d6SLuca Coelho 	/* choose profile 1 (WRDS) as default for both chains */
91242ce76d6SLuca Coelho 	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
91342ce76d6SLuca Coelho 
91442ce76d6SLuca Coelho 	/* if we don't have profile 0 from BIOS, just skip it */
91542ce76d6SLuca Coelho 	if (ret == -ENOENT)
916da2830acSLuca Coelho 		return 0;
917da2830acSLuca Coelho 
918da2830acSLuca Coelho 	return ret;
919da2830acSLuca Coelho }
920da2830acSLuca Coelho 
9211f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
9221f370650SSara Sharon {
9231f370650SSara Sharon 	int ret;
9241f370650SSara Sharon 
9257d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
9261f370650SSara Sharon 		return iwl_run_unified_mvm_ucode(mvm, false);
9271f370650SSara Sharon 
9281f370650SSara Sharon 	ret = iwl_run_init_mvm_ucode(mvm, false);
9291f370650SSara Sharon 
9301f370650SSara Sharon 	if (ret) {
9311f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
932f4744258SLiad Kaufman 
933f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
934f4744258SLiad Kaufman 			return 0;
9351f370650SSara Sharon 		return ret;
9361f370650SSara Sharon 	}
9371f370650SSara Sharon 
9381f370650SSara Sharon 	/*
9391f370650SSara Sharon 	 * Stop and start the transport without entering low power
9401f370650SSara Sharon 	 * mode. This will save the state of other components on the
9411f370650SSara Sharon 	 * device that are triggered by the INIT firwmare (MFUART).
9421f370650SSara Sharon 	 */
9431f370650SSara Sharon 	_iwl_trans_stop_device(mvm->trans, false);
9441f370650SSara Sharon 	ret = _iwl_trans_start_hw(mvm->trans, false);
9451f370650SSara Sharon 	if (ret)
9461f370650SSara Sharon 		return ret;
9471f370650SSara Sharon 
9481f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
9491f370650SSara Sharon 	if (ret)
9501f370650SSara Sharon 		return ret;
9511f370650SSara Sharon 
952702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
9531f370650SSara Sharon }
9541f370650SSara Sharon 
955e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
956e705c121SKalle Valo {
957e705c121SKalle Valo 	int ret, i;
958e705c121SKalle Valo 	struct ieee80211_channel *chan;
959e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
960e705c121SKalle Valo 
961e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
962e705c121SKalle Valo 
963e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
964e705c121SKalle Valo 	if (ret)
965e705c121SKalle Valo 		return ret;
966e705c121SKalle Valo 
9671f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
968e705c121SKalle Valo 	if (ret) {
969e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
970e705c121SKalle Valo 		goto error;
971e705c121SKalle Valo 	}
972e705c121SKalle Valo 
973d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
974e705c121SKalle Valo 
975e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
976e705c121SKalle Valo 	if (ret)
977e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
978e705c121SKalle Valo 
9797174beb6SJohannes Berg 	mvm->fwrt.dump.conf = FW_DBG_INVALID;
980e705c121SKalle Valo 	/* if we have a destination, assume EARLY START */
981e705c121SKalle Valo 	if (mvm->fw->dbg_dest_tlv)
9827174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
9837174beb6SJohannes Berg 	iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
984e705c121SKalle Valo 
985e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
986e705c121SKalle Valo 	if (ret)
987e705c121SKalle Valo 		goto error;
988e705c121SKalle Valo 
9897d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
990e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
991e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
992e705c121SKalle Valo 		if (ret)
993e705c121SKalle Valo 			goto error;
994e705c121SKalle Valo 
995e705c121SKalle Valo 		ret = iwl_send_phy_cfg_cmd(mvm);
996e705c121SKalle Valo 		if (ret)
997e705c121SKalle Valo 			goto error;
9981f370650SSara Sharon 	}
999e705c121SKalle Valo 
1000b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1001b3de3ef4SEmmanuel Grumbach 	if (ret)
1002b3de3ef4SEmmanuel Grumbach 		goto error;
1003b3de3ef4SEmmanuel Grumbach 
100443413a97SSara Sharon 	/* Init RSS configuration */
10052f7a3863SLuca Coelho 	/* TODO - remove 22000 disablement when we have RXQ config API */
1006c8c017a6SJohannes Berg 	if (iwl_mvm_has_new_rx_api(mvm) &&
10072f7a3863SLuca Coelho 	    mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_22000) {
100843413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
100943413a97SSara Sharon 		if (ret) {
101043413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
101143413a97SSara Sharon 				ret);
101243413a97SSara Sharon 			goto error;
101343413a97SSara Sharon 		}
101443413a97SSara Sharon 	}
101543413a97SSara Sharon 
1016e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
10170ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1018e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1019e705c121SKalle Valo 
10200ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1021e705c121SKalle Valo 
1022e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1023e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1024e705c121SKalle Valo 
102597d5be7eSLiad Kaufman 	ret = iwl_mvm_send_dqa_cmd(mvm);
102697d5be7eSLiad Kaufman 	if (ret)
102797d5be7eSLiad Kaufman 		goto error;
102897d5be7eSLiad Kaufman 
1029e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1030e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1031e705c121SKalle Valo 	if (ret)
1032e705c121SKalle Valo 		goto error;
1033e705c121SKalle Valo 
1034e705c121SKalle Valo 	/* Add all the PHY contexts */
103557fbcce3SJohannes Berg 	chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1036e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1037e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1038e705c121SKalle Valo 		/*
1039e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1040e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1041e705c121SKalle Valo 		 * For now use the first channel we have.
1042e705c121SKalle Valo 		 */
1043e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1044e705c121SKalle Valo 					   &chandef, 1, 1);
1045e705c121SKalle Valo 		if (ret)
1046e705c121SKalle Valo 			goto error;
1047e705c121SKalle Valo 	}
1048e705c121SKalle Valo 
1049c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL
1050c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1051c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1052c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1053c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1054c221daf2SChaya Rachel Ivgi 		 */
1055c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1056c221daf2SChaya Rachel Ivgi 	} else {
1057e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1058e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1059c221daf2SChaya Rachel Ivgi 	}
10605c89e7bcSChaya Rachel Ivgi 
10615c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1062944eafc2SChaya Rachel Ivgi 
1063944eafc2SChaya Rachel Ivgi 	/*
1064944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1065944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1066944eafc2SChaya Rachel Ivgi 	 */
1067944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
10685c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
10695c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
107075cfe338SLuca Coelho 		if (ret)
107175cfe338SLuca Coelho 			goto error;
107275cfe338SLuca Coelho 	}
1073c221daf2SChaya Rachel Ivgi #else
1074c221daf2SChaya Rachel Ivgi 	/* Initialize tx backoffs to the minimal possible */
1075c221daf2SChaya Rachel Ivgi 	iwl_mvm_tt_tx_backoff(mvm, 0);
1076c221daf2SChaya Rachel Ivgi #endif
1077e705c121SKalle Valo 
1078e705c121SKalle Valo 	WARN_ON(iwl_mvm_config_ltr(mvm));
1079e705c121SKalle Valo 
1080e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1081e705c121SKalle Valo 	if (ret)
1082e705c121SKalle Valo 		goto error;
1083e705c121SKalle Valo 
1084e705c121SKalle Valo 	/*
1085e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1086e705c121SKalle Valo 	 * anyway, so don't init MCC.
1087e705c121SKalle Valo 	 */
1088e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1089e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1090e705c121SKalle Valo 		if (ret)
1091e705c121SKalle Valo 			goto error;
1092e705c121SKalle Valo 	}
1093e705c121SKalle Valo 
1094e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
10954ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1096b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1097e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1098e705c121SKalle Valo 		if (ret)
1099e705c121SKalle Valo 			goto error;
1100e705c121SKalle Valo 	}
1101e705c121SKalle Valo 
1102e705c121SKalle Valo 	/* allow FW/transport low power modes if not during restart */
1103e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1104e705c121SKalle Valo 		iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1105e705c121SKalle Valo 
1106da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
1107da2830acSLuca Coelho 	if (ret)
1108da2830acSLuca Coelho 		goto error;
1109da2830acSLuca Coelho 
1110a6bff3cbSHaim Dreyfuss 	ret = iwl_mvm_sar_geo_init(mvm);
1111a6bff3cbSHaim Dreyfuss 	if (ret)
1112a6bff3cbSHaim Dreyfuss 		goto error;
1113a6bff3cbSHaim Dreyfuss 
11147089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
11157089ae63SJohannes Berg 
1116e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1117e705c121SKalle Valo 	return 0;
1118e705c121SKalle Valo  error:
1119f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1120fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1121e705c121SKalle Valo 	return ret;
1122e705c121SKalle Valo }
1123e705c121SKalle Valo 
1124e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1125e705c121SKalle Valo {
1126e705c121SKalle Valo 	int ret, i;
1127e705c121SKalle Valo 
1128e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1129e705c121SKalle Valo 
1130e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1131e705c121SKalle Valo 	if (ret)
1132e705c121SKalle Valo 		return ret;
1133e705c121SKalle Valo 
1134e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1135e705c121SKalle Valo 	if (ret) {
1136e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1137e705c121SKalle Valo 		goto error;
1138e705c121SKalle Valo 	}
1139e705c121SKalle Valo 
1140e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1141e705c121SKalle Valo 	if (ret)
1142e705c121SKalle Valo 		goto error;
1143e705c121SKalle Valo 
1144e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1145e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1146e705c121SKalle Valo 	if (ret)
1147e705c121SKalle Valo 		goto error;
1148e705c121SKalle Valo 
1149e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1150e705c121SKalle Valo 	if (ret)
1151e705c121SKalle Valo 		goto error;
1152e705c121SKalle Valo 
1153e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
11540ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1155e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1156e705c121SKalle Valo 
1157e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1158e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1159e705c121SKalle Valo 	if (ret)
1160e705c121SKalle Valo 		goto error;
1161e705c121SKalle Valo 
1162e705c121SKalle Valo 	return 0;
1163e705c121SKalle Valo  error:
1164fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1165e705c121SKalle Valo 	return ret;
1166e705c121SKalle Valo }
1167e705c121SKalle Valo 
1168e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1169e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1170e705c121SKalle Valo {
1171e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1172e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1173e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1174e705c121SKalle Valo 
1175e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1176e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1177e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1178e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1179e705c121SKalle Valo 			  "Reached" : "Not reached");
1180e705c121SKalle Valo }
1181e705c121SKalle Valo 
1182e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1183e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1184e705c121SKalle Valo {
1185e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1186e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1187e705c121SKalle Valo 
1188e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1189e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1190e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1191e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1192e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1193e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
11940c8d0a47SGolan Ben-Ami 
11950c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
11960c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
11970c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
11980c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1199e705c121SKalle Valo }
1200