1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 9bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 10cceb4507SShahar S Matityahu * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation 11e705c121SKalle Valo * 12e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 13e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 14e705c121SKalle Valo * published by the Free Software Foundation. 15e705c121SKalle Valo * 16e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 17e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 18e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19e705c121SKalle Valo * General Public License for more details. 20e705c121SKalle Valo * 21e705c121SKalle Valo * The full GNU General Public License is included in this distribution 22e705c121SKalle Valo * in the file called COPYING. 23e705c121SKalle Valo * 24e705c121SKalle Valo * Contact Information: 25cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 26e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27e705c121SKalle Valo * 28e705c121SKalle Valo * BSD LICENSE 29e705c121SKalle Valo * 30e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 31bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 32cceb4507SShahar S Matityahu * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation 33e705c121SKalle Valo * All rights reserved. 34e705c121SKalle Valo * 35e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 36e705c121SKalle Valo * modification, are permitted provided that the following conditions 37e705c121SKalle Valo * are met: 38e705c121SKalle Valo * 39e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 40e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 41e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 42e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 43e705c121SKalle Valo * the documentation and/or other materials provided with the 44e705c121SKalle Valo * distribution. 45e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 46e705c121SKalle Valo * contributors may be used to endorse or promote products derived 47e705c121SKalle Valo * from this software without specific prior written permission. 48e705c121SKalle Valo * 49e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60e705c121SKalle Valo * 61e705c121SKalle Valo *****************************************************************************/ 62e705c121SKalle Valo #include <net/mac80211.h> 63854d773eSSara Sharon #include <linux/netdevice.h> 64e705c121SKalle Valo 65e705c121SKalle Valo #include "iwl-trans.h" 66e705c121SKalle Valo #include "iwl-op-mode.h" 67d962f9b1SJohannes Berg #include "fw/img.h" 68e705c121SKalle Valo #include "iwl-debug.h" 69e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 70e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 71e705c121SKalle Valo #include "iwl-prph.h" 72813df5ceSLuca Coelho #include "fw/acpi.h" 73e705c121SKalle Valo 74e705c121SKalle Valo #include "mvm.h" 757174beb6SJohannes Berg #include "fw/dbg.h" 76e705c121SKalle Valo #include "iwl-phy-db.h" 779c4f7d51SShaul Triebitz #include "iwl-modparams.h" 789c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 79e705c121SKalle Valo 80e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 81e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 82e705c121SKalle Valo 83e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 84e705c121SKalle Valo 85e705c121SKalle Valo struct iwl_mvm_alive_data { 86e705c121SKalle Valo bool valid; 87e705c121SKalle Valo u32 scd_base_addr; 88e705c121SKalle Valo }; 89e705c121SKalle Valo 90e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 91e705c121SKalle Valo { 92e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 93e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 94e705c121SKalle Valo }; 95e705c121SKalle Valo 96e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 97e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 98e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 99e705c121SKalle Valo } 100e705c121SKalle Valo 10143413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 10243413a97SSara Sharon { 10343413a97SSara Sharon int i; 10443413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 10543413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 106608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 107608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 108608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 109608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 110608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 111608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 11243413a97SSara Sharon }; 11343413a97SSara Sharon 114f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 115f43495fdSSara Sharon return 0; 116f43495fdSSara Sharon 117854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 11843413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 119854d773eSSara Sharon cmd.indirection_table[i] = 120854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 121854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 12243413a97SSara Sharon 12343413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 12443413a97SSara Sharon } 12543413a97SSara Sharon 1268edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm) 1278edbfaa1SSara Sharon { 128dbf592f3SJohannes Berg int i, num_queues, size, ret; 1298edbfaa1SSara Sharon struct iwl_rfh_queue_config *cmd; 130dbf592f3SJohannes Berg struct iwl_host_cmd hcmd = { 131dbf592f3SJohannes Berg .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD), 132dbf592f3SJohannes Berg .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 133dbf592f3SJohannes Berg }; 1348edbfaa1SSara Sharon 1358edbfaa1SSara Sharon /* Do not configure default queue, it is configured via context info */ 1368edbfaa1SSara Sharon num_queues = mvm->trans->num_rx_queues - 1; 1378edbfaa1SSara Sharon 138dbf592f3SJohannes Berg size = struct_size(cmd, data, num_queues); 1398edbfaa1SSara Sharon 1408edbfaa1SSara Sharon cmd = kzalloc(size, GFP_KERNEL); 1418edbfaa1SSara Sharon if (!cmd) 1428edbfaa1SSara Sharon return -ENOMEM; 1438edbfaa1SSara Sharon 1448edbfaa1SSara Sharon cmd->num_queues = num_queues; 1458edbfaa1SSara Sharon 1468edbfaa1SSara Sharon for (i = 0; i < num_queues; i++) { 1478edbfaa1SSara Sharon struct iwl_trans_rxq_dma_data data; 1488edbfaa1SSara Sharon 1498edbfaa1SSara Sharon cmd->data[i].q_num = i + 1; 1508edbfaa1SSara Sharon iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data); 1518edbfaa1SSara Sharon 1528edbfaa1SSara Sharon cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 1538edbfaa1SSara Sharon cmd->data[i].urbd_stts_wrptr = 1548edbfaa1SSara Sharon cpu_to_le64(data.urbd_stts_wrptr); 1558edbfaa1SSara Sharon cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 1568edbfaa1SSara Sharon cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 1578edbfaa1SSara Sharon } 1588edbfaa1SSara Sharon 159dbf592f3SJohannes Berg hcmd.data[0] = cmd; 160dbf592f3SJohannes Berg hcmd.len[0] = size; 161dbf592f3SJohannes Berg 162dbf592f3SJohannes Berg ret = iwl_mvm_send_cmd(mvm, &hcmd); 163dbf592f3SJohannes Berg 164dbf592f3SJohannes Berg kfree(cmd); 165dbf592f3SJohannes Berg 166dbf592f3SJohannes Berg return ret; 1678edbfaa1SSara Sharon } 1688edbfaa1SSara Sharon 16997d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 17097d5be7eSLiad Kaufman { 17197d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 17297d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 17397d5be7eSLiad Kaufman }; 17497d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 17597d5be7eSLiad Kaufman int ret; 17697d5be7eSLiad Kaufman 17797d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 17897d5be7eSLiad Kaufman if (ret) 17997d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 18097d5be7eSLiad Kaufman else 18197d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 18297d5be7eSLiad Kaufman 18397d5be7eSLiad Kaufman return ret; 18497d5be7eSLiad Kaufman } 18597d5be7eSLiad Kaufman 186bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 187bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 188bdccdb85SGolan Ben-Ami { 189bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 190bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 191bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 192bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 193bdccdb85SGolan Ben-Ami int i; 194bdccdb85SGolan Ben-Ami 195bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 196bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 197bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 198bdccdb85SGolan Ben-Ami 199bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 200bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 201bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 202bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 203bdccdb85SGolan Ben-Ami n_words + i, 204bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 205bdccdb85SGolan Ben-Ami } 206bdccdb85SGolan Ben-Ami 207e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 208e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 209e705c121SKalle Valo { 210e705c121SKalle Valo struct iwl_mvm *mvm = 211e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 212e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 2135c228d63SSara Sharon struct iwl_umac_alive *umac; 2145c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 2155c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 2165c228d63SSara Sharon u16 status; 217cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table; 218e705c121SKalle Valo 2199422b978SLuca Coelho /* we don't use the SKU ID from v5 yet, so handle it as v4 */ 220b4248c08SAndrei Otcheretianski if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 2219422b978SLuca Coelho UCODE_ALIVE_NTFY, 0) == 5 || 2229422b978SLuca Coelho iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 2239422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive; 2249422b978SLuca Coelho 225e705c121SKalle Valo palive = (void *)pkt->data; 2265c228d63SSara Sharon umac = &palive->umac_data; 2275c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 2285c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 2295c228d63SSara Sharon status = le16_to_cpu(palive->status); 2309422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == 2319422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) { 2329422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3; 2339422b978SLuca Coelho 2345c228d63SSara Sharon palive3 = (void *)pkt->data; 2355c228d63SSara Sharon umac = &palive3->umac_data; 2365c228d63SSara Sharon lmac1 = &palive3->lmac_data; 2375c228d63SSara Sharon status = le16_to_cpu(palive3->status); 2389422b978SLuca Coelho } else { 2399422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n", 2409422b978SLuca Coelho iwl_rx_packet_payload_len(pkt)); 2419422b978SLuca Coelho /* get timeout later */ 2429422b978SLuca Coelho return false; 2435c228d63SSara Sharon } 244e705c121SKalle Valo 24522463857SShahar S Matityahu lmac_error_event_table = 24622463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 24722463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 248e705c121SKalle Valo 24922463857SShahar S Matityahu if (lmac2) 25091c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 25122463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 25222463857SShahar S Matityahu 253cfa5d0caSMordechay Goodstein umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr); 2545c228d63SSara Sharon 255cfa5d0caSMordechay Goodstein if (umac_error_table) { 256cfa5d0caSMordechay Goodstein if (umac_error_table >= 2573485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 258cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans, 259cfa5d0caSMordechay Goodstein umac_error_table); 2603485e76eSLuca Coelho } else { 261fb5b2846SLuca Coelho IWL_ERR(mvm, 262fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 263cfa5d0caSMordechay Goodstein umac_error_table, 264fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 265fb5b2846SLuca Coelho "Init" : "RT"); 2663485e76eSLuca Coelho } 267cfa5d0caSMordechay Goodstein } 26822463857SShahar S Matityahu 26922463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2705c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 271e705c121SKalle Valo 272e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2735c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2745c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2755c228d63SSara Sharon 2765c228d63SSara Sharon if (lmac2) 2775c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 278e705c121SKalle Valo 279e705c121SKalle Valo IWL_DEBUG_FW(mvm, 280e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2815c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2825c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 283e705c121SKalle Valo 2840a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2850a3a3e9eSShahar S Matityahu 286e705c121SKalle Valo return true; 287e705c121SKalle Valo } 288e705c121SKalle Valo 2891f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2901f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2911f370650SSara Sharon { 2921f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2931f370650SSara Sharon 2941f370650SSara Sharon return true; 2951f370650SSara Sharon } 2961f370650SSara Sharon 297e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 298e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 299e705c121SKalle Valo { 300e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 301e705c121SKalle Valo 302e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 303e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 304e705c121SKalle Valo return true; 305e705c121SKalle Valo } 306e705c121SKalle Valo 307ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 308e705c121SKalle Valo 309e705c121SKalle Valo return false; 310e705c121SKalle Valo } 311e705c121SKalle Valo 312e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 313e705c121SKalle Valo enum iwl_ucode_type ucode_type) 314e705c121SKalle Valo { 315e705c121SKalle Valo struct iwl_notification_wait alive_wait; 31694a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 317e705c121SKalle Valo const struct fw_img *fw; 318cfbc6c4cSSara Sharon int ret; 319702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 3209422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 321b3500b47SEmmanuel Grumbach bool run_in_rfkill = 322b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 323e705c121SKalle Valo 324e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 3253d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 3263d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 3273d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 328612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 329e705c121SKalle Valo else 330612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 331e705c121SKalle Valo if (WARN_ON(!fw)) 332e705c121SKalle Valo return -EINVAL; 333702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 33465b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 335e705c121SKalle Valo 336e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 337e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 338e705c121SKalle Valo iwl_alive_fn, &alive_data); 339e705c121SKalle Valo 340b3500b47SEmmanuel Grumbach /* 341b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 342b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 343b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 344b3500b47SEmmanuel Grumbach */ 345b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 346e705c121SKalle Valo if (ret) { 347702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 348e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 349e705c121SKalle Valo return ret; 350e705c121SKalle Valo } 351e705c121SKalle Valo 352e705c121SKalle Valo /* 353e705c121SKalle Valo * Some things may run in the background now, but we 354e705c121SKalle Valo * just wait for the ALIVE notification here. 355e705c121SKalle Valo */ 356e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 357e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 358e705c121SKalle Valo if (ret) { 359d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 360d6be9c1dSSara Sharon 36120f5aef5SJohannes Berg if (trans->trans_cfg->device_family >= 36220f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) { 363e705c121SKalle Valo IWL_ERR(mvm, 364e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 365ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 366ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 367ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 36820f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n", 36920f5aef5SJohannes Berg iwl_read_umac_prph(trans, 37020f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC)); 37120f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n", 37220f5aef5SJohannes Berg iwl_read_umac_prph(trans, 37320f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC)); 37420f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm)) 37520f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 37620f5aef5SJohannes Berg iwl_read_umac_prph(trans, 37720f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC)); 37820f5aef5SJohannes Berg } else if (trans->trans_cfg->device_family >= 37920f5aef5SJohannes Berg IWL_DEVICE_FAMILY_8000) { 380d6be9c1dSSara Sharon IWL_ERR(mvm, 381d6be9c1dSSara Sharon "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 382d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_1_STATUS), 383d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_2_STATUS)); 38420f5aef5SJohannes Berg } 38520f5aef5SJohannes Berg 38620f5aef5SJohannes Berg if (ret == -ETIMEDOUT) 38720f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 38820f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT); 38920f5aef5SJohannes Berg 390702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 391e705c121SKalle Valo return ret; 392e705c121SKalle Valo } 393e705c121SKalle Valo 394e705c121SKalle Valo if (!alive_data.valid) { 395e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 396702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 397e705c121SKalle Valo return -EIO; 398e705c121SKalle Valo } 399e705c121SKalle Valo 400e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 401e705c121SKalle Valo 402e705c121SKalle Valo /* 403e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 404e705c121SKalle Valo * initialization, but in firmware restart scenarios they 405e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 406e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 407e705c121SKalle Valo * reconfiguration completes. During normal startup, they 408e705c121SKalle Valo * will be empty. 409e705c121SKalle Valo */ 410e705c121SKalle Valo 411e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 4121c14089eSJohannes Berg /* 4131c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 4141c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 4151c14089eSJohannes Berg * we ever even consider the command queue as one we might 4161c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 4171c14089eSJohannes Berg */ 4181c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 4191c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 420e705c121SKalle Valo 42165b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 422f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 423f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 424f7805b33SLior Cohen #endif 425e705c121SKalle Valo 426e705c121SKalle Valo return 0; 427e705c121SKalle Valo } 428e705c121SKalle Valo 4298c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 4308c5f47b1SJohannes Berg { 4318c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 4328c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 4338c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 4348c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 4358c5f47b1SJohannes Berg }; 4368c5f47b1SJohannes Berg static const u16 init_complete[] = { 4378c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 4388c5f47b1SJohannes Berg }; 4398c5f47b1SJohannes Berg int ret; 4408c5f47b1SJohannes Berg 441a4584729SHaim Dreyfuss if (mvm->trans->cfg->tx_with_siso_diversity) 442a4584729SHaim Dreyfuss init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 443a4584729SHaim Dreyfuss 4448c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 4458c5f47b1SJohannes Berg 44694022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 44794022562SEmmanuel Grumbach 4488c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 4498c5f47b1SJohannes Berg &init_wait, 4508c5f47b1SJohannes Berg init_complete, 4518c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 4528c5f47b1SJohannes Berg iwl_wait_init_complete, 4538c5f47b1SJohannes Berg NULL); 4548c5f47b1SJohannes Berg 455b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 45686ce5c74SShahar S Matityahu 4578c5f47b1SJohannes Berg /* Will also start the device */ 4588c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4598c5f47b1SJohannes Berg if (ret) { 4608c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4618c5f47b1SJohannes Berg goto error; 4628c5f47b1SJohannes Berg } 463b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 464b108d8c7SShahar S Matityahu NULL); 4658c5f47b1SJohannes Berg 4668c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4678c5f47b1SJohannes Berg * commands 4688c5f47b1SJohannes Berg */ 4698c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 470b3500b47SEmmanuel Grumbach INIT_EXTENDED_CFG_CMD), 471b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4728c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4738c5f47b1SJohannes Berg if (ret) { 4748c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4758c5f47b1SJohannes Berg ret); 4768c5f47b1SJohannes Berg goto error; 4778c5f47b1SJohannes Berg } 4788c5f47b1SJohannes Berg 479e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 480e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4819c4f7d51SShaul Triebitz iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4829c4f7d51SShaul Triebitz mvm->nvm_sections); 4838c5f47b1SJohannes Berg iwl_mvm_load_nvm_to_nic(mvm); 484e9e1ba3dSSara Sharon } 4858c5f47b1SJohannes Berg 486d4f3695eSSara Sharon if (IWL_MVM_PARSE_NVM && read_nvm) { 4875bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 488d4f3695eSSara Sharon if (ret) { 489d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 490d4f3695eSSara Sharon goto error; 491d4f3695eSSara Sharon } 492d4f3695eSSara Sharon } 493d4f3695eSSara Sharon 4948c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 495b3500b47SEmmanuel Grumbach NVM_ACCESS_COMPLETE), 496b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4978c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4988c5f47b1SJohannes Berg if (ret) { 4998c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 5008c5f47b1SJohannes Berg ret); 5018c5f47b1SJohannes Berg goto error; 5028c5f47b1SJohannes Berg } 5038c5f47b1SJohannes Berg 5048c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 505e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 5068c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 507e9e1ba3dSSara Sharon if (ret) 508e9e1ba3dSSara Sharon return ret; 509e9e1ba3dSSara Sharon 510e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 511d4f3695eSSara Sharon if (!IWL_MVM_PARSE_NVM && read_nvm) { 5124c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 513c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 514c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 515c135cb56SShaul Triebitz mvm->nvm_data = NULL; 516e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 517e9e1ba3dSSara Sharon return ret; 518e9e1ba3dSSara Sharon } 519e9e1ba3dSSara Sharon } 520e9e1ba3dSSara Sharon 521b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 522b3500b47SEmmanuel Grumbach 523e9e1ba3dSSara Sharon return 0; 5248c5f47b1SJohannes Berg 5258c5f47b1SJohannes Berg error: 5268c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 5278c5f47b1SJohannes Berg return ret; 5288c5f47b1SJohannes Berg } 5298c5f47b1SJohannes Berg 530c4ace426SGil Adam #ifdef CONFIG_ACPI 531c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 532c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 533c4ace426SGil Adam { 534c4ace426SGil Adam /* 535c4ace426SGil Adam * TODO: read specific phy config from BIOS 536c4ace426SGil Adam * ACPI table for this feature has not been defined yet, 537c4ace426SGil Adam * so for now we use hardcoded values. 538c4ace426SGil Adam */ 539c4ace426SGil Adam 540c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_A) { 541c4ace426SGil Adam phy_filters->filter_cfg_chain_a = 542c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 543c4ace426SGil Adam } 544c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_B) { 545c4ace426SGil Adam phy_filters->filter_cfg_chain_b = 546c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 547c4ace426SGil Adam } 548c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_C) { 549c4ace426SGil Adam phy_filters->filter_cfg_chain_c = 550c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 551c4ace426SGil Adam } 552c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_D) { 553c4ace426SGil Adam phy_filters->filter_cfg_chain_d = 554c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 555c4ace426SGil Adam } 556c4ace426SGil Adam } 557c4ace426SGil Adam 558c4ace426SGil Adam #else /* CONFIG_ACPI */ 559c4ace426SGil Adam 560c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 561c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 562c4ace426SGil Adam { 563c4ace426SGil Adam } 564c4ace426SGil Adam #endif /* CONFIG_ACPI */ 565c4ace426SGil Adam 566e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 567e705c121SKalle Valo { 568c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 569702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 570c4ace426SGil Adam struct iwl_phy_specific_cfg phy_filters = {}; 571c4ace426SGil Adam u8 cmd_ver; 572c4ace426SGil Adam size_t cmd_size; 573e705c121SKalle Valo 574bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) && 575d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity) 576bb99ff9bSLuca Coelho return 0; 577d923b020SLuca Coelho 578d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) { 579bb99ff9bSLuca Coelho /* 580bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC 581bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS. 582bb99ff9bSLuca Coelho */ 583bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg = 584bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 585bb99ff9bSLuca Coelho } 586bb99ff9bSLuca Coelho 587e705c121SKalle Valo /* Set parameters */ 588e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 58986a2b204SLuca Coelho 59086a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 5917897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |= 5927897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 59386a2b204SLuca Coelho 594e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 595e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 596e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 597e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 598e705c121SKalle Valo 599c4ace426SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, 600e80bfd11SMordechay Goodstein PHY_CONFIGURATION_CMD, 601e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 602c4ace426SGil Adam if (cmd_ver == 3) { 603c4ace426SGil Adam iwl_mvm_phy_filter_init(mvm, &phy_filters); 604c4ace426SGil Adam memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 605c4ace426SGil Adam sizeof(struct iwl_phy_specific_cfg)); 606c4ace426SGil Adam } 607c4ace426SGil Adam 608e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 609e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 610c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 611c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1); 612e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 613c4ace426SGil Adam cmd_size, &phy_cfg_cmd); 614e705c121SKalle Valo } 615e705c121SKalle Valo 616e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 617e705c121SKalle Valo { 618e705c121SKalle Valo struct iwl_notification_wait calib_wait; 619e705c121SKalle Valo static const u16 init_complete[] = { 620e705c121SKalle Valo INIT_COMPLETE_NOTIF, 621e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 622e705c121SKalle Valo }; 623e705c121SKalle Valo int ret; 624e705c121SKalle Valo 6257d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 6268c5f47b1SJohannes Berg return iwl_run_unified_mvm_ucode(mvm, true); 6278c5f47b1SJohannes Berg 628e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 629e705c121SKalle Valo 63094022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 631e705c121SKalle Valo 632e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 633e705c121SKalle Valo &calib_wait, 634e705c121SKalle Valo init_complete, 635e705c121SKalle Valo ARRAY_SIZE(init_complete), 636e705c121SKalle Valo iwl_wait_phy_db_entry, 637e705c121SKalle Valo mvm->phy_db); 638e705c121SKalle Valo 639e705c121SKalle Valo /* Will also start the device */ 640e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 641e705c121SKalle Valo if (ret) { 642e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 64300e0c6c8SLuca Coelho goto remove_notif; 644e705c121SKalle Valo } 645e705c121SKalle Valo 6467d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 647b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 648e705c121SKalle Valo if (ret) 64900e0c6c8SLuca Coelho goto remove_notif; 650b3de3ef4SEmmanuel Grumbach } 651e705c121SKalle Valo 652e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 653e705c121SKalle Valo if (read_nvm) { 6545bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 655e705c121SKalle Valo if (ret) { 656e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 65700e0c6c8SLuca Coelho goto remove_notif; 658e705c121SKalle Valo } 659e705c121SKalle Valo } 660e705c121SKalle Valo 661e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 662e705c121SKalle Valo if (mvm->nvm_file_name) 663e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 664e705c121SKalle Valo 66564866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 66664866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 66764866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 668e705c121SKalle Valo 669e705c121SKalle Valo /* 670e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 671e705c121SKalle Valo * the init seq later when RF kill will switch to off 672e705c121SKalle Valo */ 673e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 674e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 675e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 67600e0c6c8SLuca Coelho goto remove_notif; 677e705c121SKalle Valo } 678e705c121SKalle Valo 679b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 680e705c121SKalle Valo 681e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 682e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 683e705c121SKalle Valo if (ret) 68400e0c6c8SLuca Coelho goto remove_notif; 685e705c121SKalle Valo 686e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 687e705c121SKalle Valo if (ret) { 688e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 689e705c121SKalle Valo ret); 69000e0c6c8SLuca Coelho goto remove_notif; 691e705c121SKalle Valo } 692e705c121SKalle Valo 693e705c121SKalle Valo /* 694e705c121SKalle Valo * Some things may run in the background now, but we 695e705c121SKalle Valo * just wait for the calibration complete notification. 696e705c121SKalle Valo */ 697e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 698e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 69900e0c6c8SLuca Coelho if (!ret) 700e705c121SKalle Valo goto out; 701e705c121SKalle Valo 70200e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 70300e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 70400e0c6c8SLuca Coelho ret = 0; 70500e0c6c8SLuca Coelho } else { 70600e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 70700e0c6c8SLuca Coelho ret); 70800e0c6c8SLuca Coelho } 70900e0c6c8SLuca Coelho 71000e0c6c8SLuca Coelho goto out; 71100e0c6c8SLuca Coelho 71200e0c6c8SLuca Coelho remove_notif: 713e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 714e705c121SKalle Valo out: 715b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 716e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 717e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 718e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 719e705c121SKalle Valo sizeof(struct ieee80211_channel) + 720e705c121SKalle Valo sizeof(struct ieee80211_rate), 721e705c121SKalle Valo GFP_KERNEL); 722e705c121SKalle Valo if (!mvm->nvm_data) 723e705c121SKalle Valo return -ENOMEM; 724e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 725e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 726e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 727e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 728e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 729e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 730e705c121SKalle Valo } 731e705c121SKalle Valo 732e705c121SKalle Valo return ret; 733e705c121SKalle Valo } 734e705c121SKalle Valo 735e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 736e705c121SKalle Valo { 737e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 738e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 739e705c121SKalle Valo }; 740e705c121SKalle Valo 741e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 742e705c121SKalle Valo return 0; 743e705c121SKalle Valo 744e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 745e705c121SKalle Valo sizeof(cmd), &cmd); 746e705c121SKalle Valo } 747e705c121SKalle Valo 748c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 74942ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 750da2830acSLuca Coelho { 751216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 752216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 75371e9378bSLuca Coelho }; 7549c08cef8SLuca Coelho __le16 *per_chain; 7551edd56e6SLuca Coelho int ret; 75639c1a972SIhab Zhaika u16 len = 0; 757fbb7957dSLuca Coelho u32 n_subbands; 758fbb7957dSLuca Coelho u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 759e80bfd11SMordechay Goodstein REDUCE_TX_POWER_CMD, 760e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 76142ce76d6SLuca Coelho 762fbb7957dSLuca Coelho if (cmd_ver == 6) { 763fbb7957dSLuca Coelho len = sizeof(cmd.v6); 764fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2; 765fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0]; 766fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa, 7679c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 7680791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 769fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS; 7709c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0]; 7719c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa, 7729c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 773216cdfb5SLuca Coelho len = sizeof(cmd.v4); 774fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS; 7759c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0]; 7769c08cef8SLuca Coelho } else { 777216cdfb5SLuca Coelho len = sizeof(cmd.v3); 778fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS; 7799c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0]; 7809c08cef8SLuca Coelho } 78155bfa4b9SLuca Coelho 782216cdfb5SLuca Coelho /* all structs have the same common part, add it */ 783216cdfb5SLuca Coelho len += sizeof(cmd.common); 78442ce76d6SLuca Coelho 7859c08cef8SLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, ACPI_SAR_NUM_TABLES, 786fbb7957dSLuca Coelho n_subbands, prof_a, prof_b); 7871edd56e6SLuca Coelho 7881edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */ 7891edd56e6SLuca Coelho if (ret) 7901edd56e6SLuca Coelho return ret; 7911edd56e6SLuca Coelho 79242ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 79342ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 79442ce76d6SLuca Coelho } 79542ce76d6SLuca Coelho 7967fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 7977fe90e0eSHaim Dreyfuss { 798dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 799f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp; 8000c3d7282SHaim Dreyfuss u16 len; 80139c1a972SIhab Zhaika int ret; 8020c3d7282SHaim Dreyfuss struct iwl_host_cmd cmd; 803e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 804e80bfd11SMordechay Goodstein GEO_TX_POWER_LIMIT, 805e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 8067fe90e0eSHaim Dreyfuss 807dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 808dd2a1256SLuca Coelho geo_tx_cmd.v1.ops = 809dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 810dd2a1256SLuca Coelho 8110ea788edSLuca Coelho if (cmd_ver == 3) 8120ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3); 8130ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 814dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 815dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2); 816dd2a1256SLuca Coelho else 817dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1); 8180c3d7282SHaim Dreyfuss 81939c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt)) 82039c1a972SIhab Zhaika return -EOPNOTSUPP; 82139c1a972SIhab Zhaika 8220c3d7282SHaim Dreyfuss cmd = (struct iwl_host_cmd){ 8237fe90e0eSHaim Dreyfuss .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 8240c3d7282SHaim Dreyfuss .len = { len, }, 8257fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 82639c1a972SIhab Zhaika .data = { &geo_tx_cmd }, 8277fe90e0eSHaim Dreyfuss }; 8287fe90e0eSHaim Dreyfuss 8297fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 8307fe90e0eSHaim Dreyfuss if (ret) { 8317fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8327fe90e0eSHaim Dreyfuss return ret; 8337fe90e0eSHaim Dreyfuss } 834f604324eSLuca Coelho 835f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data; 836f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx); 837f604324eSLuca Coelho 838f604324eSLuca Coelho if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) 839f604324eSLuca Coelho ret = -EIO; 840f604324eSLuca Coelho 8417fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8427fe90e0eSHaim Dreyfuss return ret; 8437fe90e0eSHaim Dreyfuss } 8447fe90e0eSHaim Dreyfuss 845a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 846a6bff3cbSHaim Dreyfuss { 847dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd; 84839c1a972SIhab Zhaika u16 len; 8490433ae55SGolan Ben Ami int ret; 850e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 851e80bfd11SMordechay Goodstein GEO_TX_POWER_LIMIT, 852e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 853a6bff3cbSHaim Dreyfuss 854dd2a1256SLuca Coelho /* the table is also at the same position both in v1 and v2 */ 8550ea788edSLuca Coelho ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 8560ea788edSLuca Coelho ACPI_WGDS_NUM_BANDS); 857eca1e56cSEmmanuel Grumbach 8580433ae55SGolan Ben Ami /* 8590433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table, 8600433ae55SGolan Ben Ami * but in that case there is no need to send the command. 8610433ae55SGolan Ben Ami */ 8620433ae55SGolan Ben Ami if (ret) 8630433ae55SGolan Ben Ami return 0; 864a6bff3cbSHaim Dreyfuss 865dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 866dd2a1256SLuca Coelho cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 867a6bff3cbSHaim Dreyfuss 8680ea788edSLuca Coelho if (cmd_ver == 3) { 8690ea788edSLuca Coelho len = sizeof(cmd.v3); 8700ea788edSLuca Coelho cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 8710ea788edSLuca Coelho } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 8720c3d7282SHaim Dreyfuss IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 873dd2a1256SLuca Coelho len = sizeof(cmd.v2); 874dd2a1256SLuca Coelho cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 87539c1a972SIhab Zhaika } else { 876dd2a1256SLuca Coelho len = sizeof(cmd.v1); 8770c3d7282SHaim Dreyfuss } 8780c3d7282SHaim Dreyfuss 879dd2a1256SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, 880dd2a1256SLuca Coelho WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 881dd2a1256SLuca Coelho 0, len, &cmd); 882a6bff3cbSHaim Dreyfuss } 883a6bff3cbSHaim Dreyfuss 8846ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 8856ce1e5c0SGil Adam { 8866ce1e5c0SGil Adam union acpi_object *wifi_pkg, *data, *enabled; 887f2134f66SGil Adam union iwl_ppag_table_cmd ppag_table; 888f2134f66SGil Adam int i, j, ret, tbl_rev, num_sub_bands; 8896ce1e5c0SGil Adam int idx = 2; 890f2134f66SGil Adam s8 *gain; 8916ce1e5c0SGil Adam 892f2134f66SGil Adam /* 893f2134f66SGil Adam * The 'enabled' field is the same in v1 and v2 so we can just 894f2134f66SGil Adam * use v1 to access it. 895f2134f66SGil Adam */ 896f2134f66SGil Adam mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0); 8976ce1e5c0SGil Adam data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 8986ce1e5c0SGil Adam if (IS_ERR(data)) 8996ce1e5c0SGil Adam return PTR_ERR(data); 9006ce1e5c0SGil Adam 901f2134f66SGil Adam /* try to read ppag table revision 1 */ 9026ce1e5c0SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 903f2134f66SGil Adam ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); 904f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 905f2134f66SGil Adam if (tbl_rev != 1) { 906f2134f66SGil Adam ret = -EINVAL; 9076ce1e5c0SGil Adam goto out_free; 9086ce1e5c0SGil Adam } 909f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS_V2; 910f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v2.gain[0]; 911f2134f66SGil Adam mvm->fwrt.ppag_ver = 2; 912f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Reading PPAG table v2 (tbl_rev=1)\n"); 913f2134f66SGil Adam goto read_table; 914f2134f66SGil Adam } 9156ce1e5c0SGil Adam 916f2134f66SGil Adam /* try to read ppag table revision 0 */ 917f2134f66SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 918f2134f66SGil Adam ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev); 919f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 9203ed83da3SLuca Coelho if (tbl_rev != 0) { 9213ed83da3SLuca Coelho ret = -EINVAL; 9223ed83da3SLuca Coelho goto out_free; 9233ed83da3SLuca Coelho } 924f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS; 925f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 926f2134f66SGil Adam mvm->fwrt.ppag_ver = 1; 927f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n"); 928f2134f66SGil Adam goto read_table; 929f2134f66SGil Adam } 930f2134f66SGil Adam ret = PTR_ERR(wifi_pkg); 931f2134f66SGil Adam goto out_free; 9323ed83da3SLuca Coelho 933f2134f66SGil Adam read_table: 9346ce1e5c0SGil Adam enabled = &wifi_pkg->package.elements[1]; 9356ce1e5c0SGil Adam if (enabled->type != ACPI_TYPE_INTEGER || 9366ce1e5c0SGil Adam (enabled->integer.value != 0 && enabled->integer.value != 1)) { 9376ce1e5c0SGil Adam ret = -EINVAL; 9386ce1e5c0SGil Adam goto out_free; 9396ce1e5c0SGil Adam } 9406ce1e5c0SGil Adam 941f2134f66SGil Adam ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value); 942f2134f66SGil Adam if (!ppag_table.v1.enabled) { 9436ce1e5c0SGil Adam ret = 0; 9446ce1e5c0SGil Adam goto out_free; 9456ce1e5c0SGil Adam } 9466ce1e5c0SGil Adam 9476ce1e5c0SGil Adam /* 9486ce1e5c0SGil Adam * read, verify gain values and save them into the PPAG table. 9496ce1e5c0SGil Adam * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 9506ce1e5c0SGil Adam * following sub-bands to High-Band (5GHz). 9516ce1e5c0SGil Adam */ 952f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 953f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 9546ce1e5c0SGil Adam union acpi_object *ent; 9556ce1e5c0SGil Adam 9566ce1e5c0SGil Adam ent = &wifi_pkg->package.elements[idx++]; 9576ce1e5c0SGil Adam if (ent->type != ACPI_TYPE_INTEGER || 9586ce1e5c0SGil Adam (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) || 9596ce1e5c0SGil Adam (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) || 9606ce1e5c0SGil Adam (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) || 9616ce1e5c0SGil Adam (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) { 962f2134f66SGil Adam ppag_table.v1.enabled = cpu_to_le32(0); 9636ce1e5c0SGil Adam ret = -EINVAL; 9646ce1e5c0SGil Adam goto out_free; 9656ce1e5c0SGil Adam } 966f2134f66SGil Adam gain[i * num_sub_bands + j] = ent->integer.value; 9676ce1e5c0SGil Adam } 9686ce1e5c0SGil Adam } 9696ce1e5c0SGil Adam ret = 0; 9706ce1e5c0SGil Adam out_free: 9716ce1e5c0SGil Adam kfree(data); 9726ce1e5c0SGil Adam return ret; 9736ce1e5c0SGil Adam } 9746ce1e5c0SGil Adam 9756ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 9766ce1e5c0SGil Adam { 977f2134f66SGil Adam u8 cmd_ver; 978f2134f66SGil Adam int i, j, ret, num_sub_bands, cmd_size; 979f2134f66SGil Adam union iwl_ppag_table_cmd ppag_table; 980f2134f66SGil Adam s8 *gain; 9816ce1e5c0SGil Adam 9826ce1e5c0SGil Adam if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 9836ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 9846ce1e5c0SGil Adam "PPAG capability not supported by FW, command not sent.\n"); 9856ce1e5c0SGil Adam return 0; 9866ce1e5c0SGil Adam } 987f2134f66SGil Adam if (!mvm->fwrt.ppag_table.v1.enabled) { 988f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n"); 989160bab43SGil Adam return 0; 990160bab43SGil Adam } 991160bab43SGil Adam 992f2134f66SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 993e80bfd11SMordechay Goodstein PER_PLATFORM_ANT_GAIN_CMD, 994e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 995f2134f66SGil Adam if (cmd_ver == 1) { 996f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS; 997f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 998f2134f66SGil Adam cmd_size = sizeof(ppag_table.v1); 999f2134f66SGil Adam if (mvm->fwrt.ppag_ver == 2) { 1000f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1001f2134f66SGil Adam "PPAG table is v2 but FW supports v1, sending truncated table\n"); 1002f2134f66SGil Adam } 1003f2134f66SGil Adam } else if (cmd_ver == 2) { 1004f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS_V2; 1005f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v2.gain[0]; 1006f2134f66SGil Adam cmd_size = sizeof(ppag_table.v2); 1007f2134f66SGil Adam if (mvm->fwrt.ppag_ver == 1) { 1008f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1009f2134f66SGil Adam "PPAG table is v1 but FW supports v2, sending padded table\n"); 1010f2134f66SGil Adam } 1011f2134f66SGil Adam } else { 1012f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n"); 1013f2134f66SGil Adam return 0; 1014f2134f66SGil Adam } 10156ce1e5c0SGil Adam 1016f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1017f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 10186ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10196ce1e5c0SGil Adam "PPAG table: chain[%d] band[%d]: gain = %d\n", 1020f2134f66SGil Adam i, j, gain[i * num_sub_bands + j]); 10216ce1e5c0SGil Adam } 10226ce1e5c0SGil Adam } 1023f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 10246ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 10256ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 1026f2134f66SGil Adam 0, cmd_size, &ppag_table); 10276ce1e5c0SGil Adam if (ret < 0) 10286ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 10296ce1e5c0SGil Adam ret); 10306ce1e5c0SGil Adam 10316ce1e5c0SGil Adam return ret; 10326ce1e5c0SGil Adam } 10336ce1e5c0SGil Adam 10346ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 10356ce1e5c0SGil Adam { 10366ce1e5c0SGil Adam int ret; 10376ce1e5c0SGil Adam 10386ce1e5c0SGil Adam ret = iwl_mvm_get_ppag_table(mvm); 10396ce1e5c0SGil Adam if (ret < 0) { 10406ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10416ce1e5c0SGil Adam "PPAG BIOS table invalid or unavailable. (%d)\n", 10426ce1e5c0SGil Adam ret); 10436ce1e5c0SGil Adam return 0; 10446ce1e5c0SGil Adam } 10456ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 10466ce1e5c0SGil Adam } 10476ce1e5c0SGil Adam 104828dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 104928dd7ccdSMordechay Goodstein { 105028dd7ccdSMordechay Goodstein int ret; 105128dd7ccdSMordechay Goodstein struct iwl_tas_config_cmd cmd = {}; 105228dd7ccdSMordechay Goodstein int list_size; 105328dd7ccdSMordechay Goodstein 105428dd7ccdSMordechay Goodstein BUILD_BUG_ON(ARRAY_SIZE(cmd.black_list_array) < 105528dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX); 105628dd7ccdSMordechay Goodstein 105728dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 105828dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 105928dd7ccdSMordechay Goodstein return; 106028dd7ccdSMordechay Goodstein } 106128dd7ccdSMordechay Goodstein 106228dd7ccdSMordechay Goodstein ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.black_list_array, &list_size); 106328dd7ccdSMordechay Goodstein if (ret < 0) { 106428dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, 106528dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n", 106628dd7ccdSMordechay Goodstein ret); 106728dd7ccdSMordechay Goodstein return; 106828dd7ccdSMordechay Goodstein } 106928dd7ccdSMordechay Goodstein 107028dd7ccdSMordechay Goodstein if (list_size < 0) 107128dd7ccdSMordechay Goodstein return; 107228dd7ccdSMordechay Goodstein 107328dd7ccdSMordechay Goodstein /* list size if TAS enabled can only be non-negative */ 107428dd7ccdSMordechay Goodstein cmd.black_list_size = cpu_to_le32((u32)list_size); 107528dd7ccdSMordechay Goodstein 107628dd7ccdSMordechay Goodstein ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 107728dd7ccdSMordechay Goodstein TAS_CONFIG), 107828dd7ccdSMordechay Goodstein 0, sizeof(cmd), &cmd); 107928dd7ccdSMordechay Goodstein if (ret < 0) 108028dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 108128dd7ccdSMordechay Goodstein } 1082f5b1cb2eSGil Adam 108302d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_indonesia_5g2(struct iwl_mvm *mvm) 1084f5b1cb2eSGil Adam { 1085f5b1cb2eSGil Adam int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0, 1086f5b1cb2eSGil Adam DSM_FUNC_ENABLE_INDONESIA_5G2); 1087f5b1cb2eSGil Adam 108802d31e9bSGil Adam if (ret < 0) 1089f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 109002d31e9bSGil Adam "Failed to evaluate DSM function ENABLE_INDONESIA_5G2, ret=%d\n", 1091f5b1cb2eSGil Adam ret); 1092f5b1cb2eSGil Adam 109302d31e9bSGil Adam else if (ret >= DSM_VALUE_INDONESIA_MAX) 109402d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 109502d31e9bSGil Adam "DSM function ENABLE_INDONESIA_5G2 return invalid value, ret=%d\n", 109602d31e9bSGil Adam ret); 109702d31e9bSGil Adam 109802d31e9bSGil Adam else if (ret == DSM_VALUE_INDONESIA_ENABLE) { 109902d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 110002d31e9bSGil Adam "Evaluated DSM function ENABLE_INDONESIA_5G2: Enabling 5g2\n"); 110102d31e9bSGil Adam return DSM_VALUE_INDONESIA_ENABLE; 110202d31e9bSGil Adam } 110302d31e9bSGil Adam /* default behaviour is disabled */ 110402d31e9bSGil Adam return DSM_VALUE_INDONESIA_DISABLE; 110502d31e9bSGil Adam } 110602d31e9bSGil Adam 110702d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_disable_srd(struct iwl_mvm *mvm) 110802d31e9bSGil Adam { 110902d31e9bSGil Adam int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0, 111002d31e9bSGil Adam DSM_FUNC_DISABLE_SRD); 111102d31e9bSGil Adam 111202d31e9bSGil Adam if (ret < 0) 111302d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 111402d31e9bSGil Adam "Failed to evaluate DSM function DISABLE_SRD, ret=%d\n", 111502d31e9bSGil Adam ret); 111602d31e9bSGil Adam 111702d31e9bSGil Adam else if (ret >= DSM_VALUE_SRD_MAX) 111802d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 111902d31e9bSGil Adam "DSM function DISABLE_SRD return invalid value, ret=%d\n", 112002d31e9bSGil Adam ret); 112102d31e9bSGil Adam 112202d31e9bSGil Adam else if (ret == DSM_VALUE_SRD_PASSIVE) { 112302d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 112402d31e9bSGil Adam "Evaluated DSM function DISABLE_SRD: setting SRD to passive\n"); 112502d31e9bSGil Adam return DSM_VALUE_SRD_PASSIVE; 112602d31e9bSGil Adam 112702d31e9bSGil Adam } else if (ret == DSM_VALUE_SRD_DISABLE) { 112802d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, 112902d31e9bSGil Adam "Evaluated DSM function DISABLE_SRD: disabling SRD\n"); 113002d31e9bSGil Adam return DSM_VALUE_SRD_DISABLE; 113102d31e9bSGil Adam } 113202d31e9bSGil Adam /* default behaviour is active */ 113302d31e9bSGil Adam return DSM_VALUE_SRD_ACTIVE; 1134f5b1cb2eSGil Adam } 1135f5b1cb2eSGil Adam 1136f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1137f5b1cb2eSGil Adam { 113802d31e9bSGil Adam u8 ret; 113902d31e9bSGil Adam int cmd_ret; 1140f5b1cb2eSGil Adam struct iwl_lari_config_change_cmd cmd = {}; 1141f5b1cb2eSGil Adam 114202d31e9bSGil Adam if (iwl_mvm_eval_dsm_indonesia_5g2(mvm) == DSM_VALUE_INDONESIA_ENABLE) 1143f5b1cb2eSGil Adam cmd.config_bitmap |= 1144f5b1cb2eSGil Adam cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK); 1145f5b1cb2eSGil Adam 114602d31e9bSGil Adam ret = iwl_mvm_eval_dsm_disable_srd(mvm); 114702d31e9bSGil Adam if (ret == DSM_VALUE_SRD_PASSIVE) 114802d31e9bSGil Adam cmd.config_bitmap |= 114902d31e9bSGil Adam cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK); 115002d31e9bSGil Adam 115102d31e9bSGil Adam else if (ret == DSM_VALUE_SRD_DISABLE) 115202d31e9bSGil Adam cmd.config_bitmap |= 115302d31e9bSGil Adam cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK); 115402d31e9bSGil Adam 1155f5b1cb2eSGil Adam /* apply more config masks here */ 1156f5b1cb2eSGil Adam 1157f5b1cb2eSGil Adam if (cmd.config_bitmap) { 115802d31e9bSGil Adam IWL_DEBUG_RADIO(mvm, "sending LARI_CONFIG_CHANGE\n"); 115902d31e9bSGil Adam cmd_ret = iwl_mvm_send_cmd_pdu(mvm, 1160f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP, 1161f5b1cb2eSGil Adam LARI_CONFIG_CHANGE), 1162f5b1cb2eSGil Adam 0, sizeof(cmd), &cmd); 116302d31e9bSGil Adam if (cmd_ret < 0) 1164f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 1165f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n", 116602d31e9bSGil Adam cmd_ret); 1167f5b1cb2eSGil Adam } 1168f5b1cb2eSGil Adam } 116969964905SLuca Coelho #else /* CONFIG_ACPI */ 117039c1a972SIhab Zhaika 117139c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 117239c1a972SIhab Zhaika int prof_a, int prof_b) 117369964905SLuca Coelho { 117469964905SLuca Coelho return -ENOENT; 117569964905SLuca Coelho } 117669964905SLuca Coelho 117739c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 11785d041c46SLuca Coelho { 11795d041c46SLuca Coelho return -ENOENT; 11805d041c46SLuca Coelho } 11815d041c46SLuca Coelho 1182a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1183a6bff3cbSHaim Dreyfuss { 1184a6bff3cbSHaim Dreyfuss return 0; 1185a6bff3cbSHaim Dreyfuss } 118618f1755dSLuca Coelho 11876ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 11886ce1e5c0SGil Adam { 11896ce1e5c0SGil Adam return -ENOENT; 11906ce1e5c0SGil Adam } 11916ce1e5c0SGil Adam 11926ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 11936ce1e5c0SGil Adam { 11947937fd32SJohannes Berg return 0; 11956ce1e5c0SGil Adam } 119628dd7ccdSMordechay Goodstein 119728dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 119828dd7ccdSMordechay Goodstein { 119928dd7ccdSMordechay Goodstein } 1200f5b1cb2eSGil Adam 1201f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1202f5b1cb2eSGil Adam { 1203f5b1cb2eSGil Adam } 120469964905SLuca Coelho #endif /* CONFIG_ACPI */ 120569964905SLuca Coelho 1206f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1207f130bb75SMordechay Goodstein { 1208f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1209f130bb75SMordechay Goodstein int ret; 1210f130bb75SMordechay Goodstein u32 resp; 1211f130bb75SMordechay Goodstein 1212f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1213f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1214f130bb75SMordechay Goodstein .buf_size = 0, 1215f130bb75SMordechay Goodstein }; 1216f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1217f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1218f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1219f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1220f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1221f130bb75SMordechay Goodstein }; 1222f130bb75SMordechay Goodstein 1223f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1224f130bb75SMordechay Goodstein if (!error_log_size) 1225f130bb75SMordechay Goodstein return; 1226f130bb75SMordechay Goodstein 1227f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1228f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1229f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1230f130bb75SMordechay Goodstein return; 1231f130bb75SMordechay Goodstein 1232f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1233f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1234f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1235f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1236f130bb75SMordechay Goodstein } 1237f130bb75SMordechay Goodstein 1238f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1239f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1240f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1241f130bb75SMordechay Goodstein 1242f130bb75SMordechay Goodstein if (ret) { 1243f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1244f130bb75SMordechay Goodstein return; 1245f130bb75SMordechay Goodstein } 1246f130bb75SMordechay Goodstein 1247f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1248f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1249f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1250f130bb75SMordechay Goodstein if (resp) 1251f130bb75SMordechay Goodstein IWL_ERR(mvm, 1252f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1253f130bb75SMordechay Goodstein resp); 1254f130bb75SMordechay Goodstein } 1255f130bb75SMordechay Goodstein } 1256f130bb75SMordechay Goodstein 125742ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 125842ce76d6SLuca Coelho { 125942ce76d6SLuca Coelho int ret; 126042ce76d6SLuca Coelho 126139c1a972SIhab Zhaika ret = iwl_sar_get_wrds_table(&mvm->fwrt); 1262da2830acSLuca Coelho if (ret < 0) { 1263da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 126469964905SLuca Coelho "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1265da2830acSLuca Coelho ret); 12665d041c46SLuca Coelho /* 12675d041c46SLuca Coelho * If not available, don't fail and don't bother with EWRD. 12685d041c46SLuca Coelho * Return 1 to tell that we can't use WGDS either. 12695d041c46SLuca Coelho */ 12705d041c46SLuca Coelho return 1; 1271da2830acSLuca Coelho } 1272da2830acSLuca Coelho 127339c1a972SIhab Zhaika ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 127469964905SLuca Coelho /* if EWRD is not available, we can still use WRDS, so don't fail */ 127569964905SLuca Coelho if (ret < 0) 127669964905SLuca Coelho IWL_DEBUG_RADIO(mvm, 127769964905SLuca Coelho "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 127869964905SLuca Coelho ret); 127969964905SLuca Coelho 12801edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1); 1281da2830acSLuca Coelho } 1282da2830acSLuca Coelho 12831f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 12841f370650SSara Sharon { 12851f370650SSara Sharon int ret; 12861f370650SSara Sharon 12877d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 12881f370650SSara Sharon return iwl_run_unified_mvm_ucode(mvm, false); 12891f370650SSara Sharon 12901f370650SSara Sharon ret = iwl_run_init_mvm_ucode(mvm, false); 12911f370650SSara Sharon 12921f370650SSara Sharon if (ret) { 12931f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1294f4744258SLiad Kaufman 1295f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1296f4744258SLiad Kaufman return 0; 12971f370650SSara Sharon return ret; 12981f370650SSara Sharon } 12991f370650SSara Sharon 1300203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1301bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1302bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 13031f370650SSara Sharon if (ret) 13041f370650SSara Sharon return ret; 13051f370650SSara Sharon 1306b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 1307da2eb669SSara Sharon 130894022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 13091f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 13101f370650SSara Sharon if (ret) 13111f370650SSara Sharon return ret; 13121f370650SSara Sharon 131394022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 131494022562SEmmanuel Grumbach 1315b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1316b108d8c7SShahar S Matityahu NULL); 1317da2eb669SSara Sharon 1318702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 13191f370650SSara Sharon } 13201f370650SSara Sharon 1321e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1322e705c121SKalle Valo { 1323e705c121SKalle Valo int ret, i; 1324e705c121SKalle Valo struct ieee80211_channel *chan; 1325e705c121SKalle Valo struct cfg80211_chan_def chandef; 1326dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1327e705c121SKalle Valo 1328e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1329e705c121SKalle Valo 1330e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1331e705c121SKalle Valo if (ret) 1332e705c121SKalle Valo return ret; 1333e705c121SKalle Valo 13341f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1335e705c121SKalle Valo if (ret) { 1336e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 133772d3c7bbSJohannes Berg if (ret != -ERFKILL) 133872d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 133972d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1340e705c121SKalle Valo goto error; 1341e705c121SKalle Valo } 1342e705c121SKalle Valo 1343d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1344e705c121SKalle Valo 1345e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1346e705c121SKalle Valo if (ret) 1347e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1348e705c121SKalle Valo 1349a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 13507174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1351e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 135217b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 13537174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 13547174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 13557a14c23dSSara Sharon } 1356e705c121SKalle Valo 1357e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1358e705c121SKalle Valo if (ret) 1359e705c121SKalle Valo goto error; 1360e705c121SKalle Valo 13617d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1362e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1363e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1364e705c121SKalle Valo if (ret) 1365e705c121SKalle Valo goto error; 1366bb99ff9bSLuca Coelho } 1367e705c121SKalle Valo 1368e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1369e705c121SKalle Valo if (ret) 1370e705c121SKalle Valo goto error; 1371e705c121SKalle Valo 1372b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1373b3de3ef4SEmmanuel Grumbach if (ret) 1374b3de3ef4SEmmanuel Grumbach goto error; 1375b3de3ef4SEmmanuel Grumbach 1376cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa, 1377cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1378a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt); 1379cceb4507SShahar S Matityahu if (ret) 1380cceb4507SShahar S Matityahu goto error; 1381cceb4507SShahar S Matityahu } 1382cceb4507SShahar S Matityahu 138343413a97SSara Sharon /* Init RSS configuration */ 1384286ca8ebSLuca Coelho if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) { 13858edbfaa1SSara Sharon ret = iwl_configure_rxq(mvm); 13868edbfaa1SSara Sharon if (ret) { 13878edbfaa1SSara Sharon IWL_ERR(mvm, "Failed to configure RX queues: %d\n", 13888edbfaa1SSara Sharon ret); 13898edbfaa1SSara Sharon goto error; 13908edbfaa1SSara Sharon } 13918edbfaa1SSara Sharon } 13928edbfaa1SSara Sharon 13938edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 139443413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 139543413a97SSara Sharon if (ret) { 139643413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 139743413a97SSara Sharon ret); 139843413a97SSara Sharon goto error; 139943413a97SSara Sharon } 140043413a97SSara Sharon } 140143413a97SSara Sharon 1402e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 14030ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1404e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1405e705c121SKalle Valo 14060ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1407e705c121SKalle Valo 1408e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1409e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1410e705c121SKalle Valo 141179660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 141297d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 141397d5be7eSLiad Kaufman if (ret) 141497d5be7eSLiad Kaufman goto error; 141579660869SIlia Lin } 141697d5be7eSLiad Kaufman 1417e705c121SKalle Valo /* Add auxiliary station for scanning */ 1418e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1419e705c121SKalle Valo if (ret) 1420e705c121SKalle Valo goto error; 1421e705c121SKalle Valo 1422e705c121SKalle Valo /* Add all the PHY contexts */ 1423dd36a507STova Mussai i = 0; 1424dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1425dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1426dd36a507STova Mussai 1427dd36a507STova Mussai if (WARN_ON_ONCE(!sband)) 1428dd36a507STova Mussai goto error; 1429dd36a507STova Mussai 1430dd36a507STova Mussai chan = &sband->channels[0]; 1431dd36a507STova Mussai 1432e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1433e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1434e705c121SKalle Valo /* 1435e705c121SKalle Valo * The channel used here isn't relevant as it's 1436e705c121SKalle Valo * going to be overwritten in the other flows. 1437e705c121SKalle Valo * For now use the first channel we have. 1438e705c121SKalle Valo */ 1439e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1440e705c121SKalle Valo &chandef, 1, 1); 1441e705c121SKalle Valo if (ret) 1442e705c121SKalle Valo goto error; 1443e705c121SKalle Valo } 1444e705c121SKalle Valo 1445c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1446c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1447c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1448c221daf2SChaya Rachel Ivgi * cmd during init time 1449c221daf2SChaya Rachel Ivgi */ 1450c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1451c221daf2SChaya Rachel Ivgi } else { 1452e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1453e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1454c221daf2SChaya Rachel Ivgi } 14555c89e7bcSChaya Rachel Ivgi 1456242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 14575c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1458944eafc2SChaya Rachel Ivgi 1459944eafc2SChaya Rachel Ivgi /* 1460944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1461944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1462944eafc2SChaya Rachel Ivgi */ 1463944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 14645c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 14655c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 146675cfe338SLuca Coelho if (ret) 146775cfe338SLuca Coelho goto error; 146875cfe338SLuca Coelho } 1469c221daf2SChaya Rachel Ivgi #endif 1470e705c121SKalle Valo 1471aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1472e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1473e705c121SKalle Valo 1474e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1475e705c121SKalle Valo if (ret) 1476e705c121SKalle Valo goto error; 1477e705c121SKalle Valo 1478f5b1cb2eSGil Adam iwl_mvm_lari_cfg(mvm); 1479e705c121SKalle Valo /* 1480e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1481e705c121SKalle Valo * anyway, so don't init MCC. 1482e705c121SKalle Valo */ 1483e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1484e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1485e705c121SKalle Valo if (ret) 1486e705c121SKalle Valo goto error; 1487e705c121SKalle Valo } 1488e705c121SKalle Valo 1489e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 14904ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1491b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1492e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1493e705c121SKalle Valo if (ret) 1494e705c121SKalle Valo goto error; 1495e705c121SKalle Valo } 1496e705c121SKalle Valo 1497f130bb75SMordechay Goodstein if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1498f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1499f130bb75SMordechay Goodstein 150048e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 150148e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 150248e775e6SHaim Dreyfuss 15036ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 15046ce1e5c0SGil Adam if (ret) 15056ce1e5c0SGil Adam goto error; 15066ce1e5c0SGil Adam 1507da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 15085d041c46SLuca Coelho if (ret == 0) { 1509a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 15101edd56e6SLuca Coelho } else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) { 15115d041c46SLuca Coelho /* 15125d041c46SLuca Coelho * If basic SAR is not available, we check for WGDS, 15135d041c46SLuca Coelho * which should *not* be available either. If it is 15145d041c46SLuca Coelho * available, issue an error, because we can't use SAR 15155d041c46SLuca Coelho * Geo without basic SAR. 15165d041c46SLuca Coelho */ 15175d041c46SLuca Coelho IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 15185d041c46SLuca Coelho } 15195d041c46SLuca Coelho 15205d041c46SLuca Coelho if (ret < 0) 1521a6bff3cbSHaim Dreyfuss goto error; 1522a6bff3cbSHaim Dreyfuss 152328dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm); 15247089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 15257089ae63SJohannes Berg 1526b68bd2e3SIlan Peer iwl_mvm_ftm_initiator_smooth_config(mvm); 1527b68bd2e3SIlan Peer 1528e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1529e705c121SKalle Valo return 0; 1530e705c121SKalle Valo error: 1531f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1532fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1533e705c121SKalle Valo return ret; 1534e705c121SKalle Valo } 1535e705c121SKalle Valo 1536e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1537e705c121SKalle Valo { 1538e705c121SKalle Valo int ret, i; 1539e705c121SKalle Valo 1540e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1541e705c121SKalle Valo 1542e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1543e705c121SKalle Valo if (ret) 1544e705c121SKalle Valo return ret; 1545e705c121SKalle Valo 1546e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1547e705c121SKalle Valo if (ret) { 1548e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1549e705c121SKalle Valo goto error; 1550e705c121SKalle Valo } 1551e705c121SKalle Valo 1552e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1553e705c121SKalle Valo if (ret) 1554e705c121SKalle Valo goto error; 1555e705c121SKalle Valo 1556e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1557e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1558e705c121SKalle Valo if (ret) 1559e705c121SKalle Valo goto error; 1560e705c121SKalle Valo 1561e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1562e705c121SKalle Valo if (ret) 1563e705c121SKalle Valo goto error; 1564e705c121SKalle Valo 1565e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 15660ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1567e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1568e705c121SKalle Valo 1569e705c121SKalle Valo /* Add auxiliary station for scanning */ 1570e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1571e705c121SKalle Valo if (ret) 1572e705c121SKalle Valo goto error; 1573e705c121SKalle Valo 1574e705c121SKalle Valo return 0; 1575e705c121SKalle Valo error: 1576fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1577e705c121SKalle Valo return ret; 1578e705c121SKalle Valo } 1579e705c121SKalle Valo 1580e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1581e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1582e705c121SKalle Valo { 1583e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1584e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1585e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1586e705c121SKalle Valo 1587e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1588e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1589e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1590e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1591e705c121SKalle Valo "Reached" : "Not reached"); 1592e705c121SKalle Valo } 1593e705c121SKalle Valo 1594e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1595e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1596e705c121SKalle Valo { 1597e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1598e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1599e705c121SKalle Valo 1600e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1601e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1602e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1603e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1604e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1605e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 16060c8d0a47SGolan Ben-Ami 16070c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 16080c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 16090c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 16100c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1611e705c121SKalle Valo } 1612