1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
1148e775e6SHaim Dreyfuss  * Copyright(c) 2018 - 2019        Intel Corporation
12e705c121SKalle Valo  *
13e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
14e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
15e705c121SKalle Valo  * published by the Free Software Foundation.
16e705c121SKalle Valo  *
17e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
18e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
19e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
20e705c121SKalle Valo  * General Public License for more details.
21e705c121SKalle Valo  *
22e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
23e705c121SKalle Valo  * in the file called COPYING.
24e705c121SKalle Valo  *
25e705c121SKalle Valo  * Contact Information:
26cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
27e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * BSD LICENSE
30e705c121SKalle Valo  *
31e705c121SKalle Valo  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33bdccdb85SGolan Ben-Ami  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
3448e775e6SHaim Dreyfuss  * Copyright(c) 2018 - 2019       Intel Corporation
35e705c121SKalle Valo  * All rights reserved.
36e705c121SKalle Valo  *
37e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
38e705c121SKalle Valo  * modification, are permitted provided that the following conditions
39e705c121SKalle Valo  * are met:
40e705c121SKalle Valo  *
41e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
42e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
43e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
44e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
45e705c121SKalle Valo  *    the documentation and/or other materials provided with the
46e705c121SKalle Valo  *    distribution.
47e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
48e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
49e705c121SKalle Valo  *    from this software without specific prior written permission.
50e705c121SKalle Valo  *
51e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62e705c121SKalle Valo  *
63e705c121SKalle Valo  *****************************************************************************/
64e705c121SKalle Valo #include <net/mac80211.h>
65854d773eSSara Sharon #include <linux/netdevice.h>
66e705c121SKalle Valo 
67e705c121SKalle Valo #include "iwl-trans.h"
68e705c121SKalle Valo #include "iwl-op-mode.h"
69d962f9b1SJohannes Berg #include "fw/img.h"
70e705c121SKalle Valo #include "iwl-debug.h"
71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
73e705c121SKalle Valo #include "iwl-prph.h"
74813df5ceSLuca Coelho #include "fw/acpi.h"
75e705c121SKalle Valo 
76e705c121SKalle Valo #include "mvm.h"
777174beb6SJohannes Berg #include "fw/dbg.h"
78e705c121SKalle Valo #include "iwl-phy-db.h"
799c4f7d51SShaul Triebitz #include "iwl-modparams.h"
809c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
81e705c121SKalle Valo 
82e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT	HZ
83e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2*HZ)
84e705c121SKalle Valo 
85e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
86e705c121SKalle Valo 
87e705c121SKalle Valo struct iwl_mvm_alive_data {
88e705c121SKalle Valo 	bool valid;
89e705c121SKalle Valo 	u32 scd_base_addr;
90e705c121SKalle Valo };
91e705c121SKalle Valo 
92e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93e705c121SKalle Valo {
94e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
96e705c121SKalle Valo 	};
97e705c121SKalle Valo 
98e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
99e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
100e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
101e705c121SKalle Valo }
102e705c121SKalle Valo 
10343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
10443413a97SSara Sharon {
10543413a97SSara Sharon 	int i;
10643413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
10743413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
108608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
109608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
110608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
111608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
112608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
113608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
11443413a97SSara Sharon 	};
11543413a97SSara Sharon 
116f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
117f43495fdSSara Sharon 		return 0;
118f43495fdSSara Sharon 
119854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
12043413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
121854d773eSSara Sharon 		cmd.indirection_table[i] =
122854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
123854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
12443413a97SSara Sharon 
12543413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
12643413a97SSara Sharon }
12743413a97SSara Sharon 
1288edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
1298edbfaa1SSara Sharon {
130dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
1318edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
132dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
133dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
134dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
135dbf592f3SJohannes Berg 	};
1368edbfaa1SSara Sharon 
1378edbfaa1SSara Sharon 	/* Do not configure default queue, it is configured via context info */
1388edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
1398edbfaa1SSara Sharon 
140dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
1418edbfaa1SSara Sharon 
1428edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
1438edbfaa1SSara Sharon 	if (!cmd)
1448edbfaa1SSara Sharon 		return -ENOMEM;
1458edbfaa1SSara Sharon 
1468edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
1478edbfaa1SSara Sharon 
1488edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1498edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1508edbfaa1SSara Sharon 
1518edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1528edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1538edbfaa1SSara Sharon 
1548edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1558edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1568edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1578edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1588edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1598edbfaa1SSara Sharon 	}
1608edbfaa1SSara Sharon 
161dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
162dbf592f3SJohannes Berg 	hcmd.len[0] = size;
163dbf592f3SJohannes Berg 
164dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
165dbf592f3SJohannes Berg 
166dbf592f3SJohannes Berg 	kfree(cmd);
167dbf592f3SJohannes Berg 
168dbf592f3SJohannes Berg 	return ret;
1698edbfaa1SSara Sharon }
1708edbfaa1SSara Sharon 
17197d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
17297d5be7eSLiad Kaufman {
17397d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
17497d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
17597d5be7eSLiad Kaufman 	};
17697d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
17797d5be7eSLiad Kaufman 	int ret;
17897d5be7eSLiad Kaufman 
17997d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
18097d5be7eSLiad Kaufman 	if (ret)
18197d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
18297d5be7eSLiad Kaufman 	else
18397d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
18497d5be7eSLiad Kaufman 
18597d5be7eSLiad Kaufman 	return ret;
18697d5be7eSLiad Kaufman }
18797d5be7eSLiad Kaufman 
188bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
189bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
190bdccdb85SGolan Ben-Ami {
191bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
192bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
193bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
194bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
195bdccdb85SGolan Ben-Ami 	int i;
196bdccdb85SGolan Ben-Ami 
197bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
198bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
199bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
200bdccdb85SGolan Ben-Ami 
201bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
202bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
203bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
204bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
205bdccdb85SGolan Ben-Ami 			       n_words + i,
206bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
207bdccdb85SGolan Ben-Ami }
208bdccdb85SGolan Ben-Ami 
209e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
210e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
211e705c121SKalle Valo {
212e705c121SKalle Valo 	struct iwl_mvm *mvm =
213e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
214e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
2155c228d63SSara Sharon 	struct mvm_alive_resp_v3 *palive3;
216e705c121SKalle Valo 	struct mvm_alive_resp *palive;
2175c228d63SSara Sharon 	struct iwl_umac_alive *umac;
2185c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
2195c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
2205c228d63SSara Sharon 	u16 status;
22122463857SShahar S Matityahu 	u32 lmac_error_event_table, umac_error_event_table;
222e705c121SKalle Valo 
2235c228d63SSara Sharon 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
224e705c121SKalle Valo 		palive = (void *)pkt->data;
2255c228d63SSara Sharon 		umac = &palive->umac_data;
2265c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2275c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2285c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2295c228d63SSara Sharon 	} else {
2305c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2315c228d63SSara Sharon 		umac = &palive3->umac_data;
2325c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2335c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2345c228d63SSara Sharon 	}
235e705c121SKalle Valo 
23622463857SShahar S Matityahu 	lmac_error_event_table =
23722463857SShahar S Matityahu 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
23822463857SShahar S Matityahu 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
239e705c121SKalle Valo 
24022463857SShahar S Matityahu 	if (lmac2)
24191c28b83SShahar S Matityahu 		mvm->trans->dbg.lmac_error_event_table[1] =
24222463857SShahar S Matityahu 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
24322463857SShahar S Matityahu 
24422463857SShahar S Matityahu 	umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
2455c228d63SSara Sharon 
2463485e76eSLuca Coelho 	if (!umac_error_event_table) {
2473485e76eSLuca Coelho 		mvm->support_umac_log = false;
2483485e76eSLuca Coelho 	} else if (umac_error_event_table >=
2493485e76eSLuca Coelho 		   mvm->trans->cfg->min_umac_error_event_table) {
2503485e76eSLuca Coelho 		mvm->support_umac_log = true;
2513485e76eSLuca Coelho 	} else {
252fb5b2846SLuca Coelho 		IWL_ERR(mvm,
253fb5b2846SLuca Coelho 			"Not valid error log pointer 0x%08X for %s uCode\n",
25422463857SShahar S Matityahu 			umac_error_event_table,
255fb5b2846SLuca Coelho 			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
256fb5b2846SLuca Coelho 			"Init" : "RT");
2573485e76eSLuca Coelho 		mvm->support_umac_log = false;
2583485e76eSLuca Coelho 	}
259fb5b2846SLuca Coelho 
26022463857SShahar S Matityahu 	if (mvm->support_umac_log)
26122463857SShahar S Matityahu 		iwl_fw_umac_set_alive_err_table(mvm->trans,
26222463857SShahar S Matityahu 						umac_error_event_table);
26322463857SShahar S Matityahu 
26422463857SShahar S Matityahu 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2655c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
266e705c121SKalle Valo 
267e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2685c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2695c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2705c228d63SSara Sharon 
2715c228d63SSara Sharon 	if (lmac2)
2725c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
273e705c121SKalle Valo 
274e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
275e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2765c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2775c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
278e705c121SKalle Valo 
2790a3a3e9eSShahar S Matityahu 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
2800a3a3e9eSShahar S Matityahu 
281e705c121SKalle Valo 	return true;
282e705c121SKalle Valo }
283e705c121SKalle Valo 
2841f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2851f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2861f370650SSara Sharon {
2871f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2881f370650SSara Sharon 
2891f370650SSara Sharon 	return true;
2901f370650SSara Sharon }
2911f370650SSara Sharon 
292e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
293e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
294e705c121SKalle Valo {
295e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
296e705c121SKalle Valo 
297e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
298e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
299e705c121SKalle Valo 		return true;
300e705c121SKalle Valo 	}
301e705c121SKalle Valo 
302ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
303e705c121SKalle Valo 
304e705c121SKalle Valo 	return false;
305e705c121SKalle Valo }
306e705c121SKalle Valo 
307e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
308e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
309e705c121SKalle Valo {
310e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
31194a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
312e705c121SKalle Valo 	const struct fw_img *fw;
313cfbc6c4cSSara Sharon 	int ret;
314702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
315e705c121SKalle Valo 	static const u16 alive_cmd[] = { MVM_ALIVE };
316b3500b47SEmmanuel Grumbach 	bool run_in_rfkill =
317b3500b47SEmmanuel Grumbach 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
318e705c121SKalle Valo 
319e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
3203d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3213d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
3223d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
323612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
324e705c121SKalle Valo 	else
325612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
326e705c121SKalle Valo 	if (WARN_ON(!fw))
327e705c121SKalle Valo 		return -EINVAL;
328702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
32965b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
330e705c121SKalle Valo 
331e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
332e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
333e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
334e705c121SKalle Valo 
335b3500b47SEmmanuel Grumbach 	/*
336b3500b47SEmmanuel Grumbach 	 * We want to load the INIT firmware even in RFKILL
337b3500b47SEmmanuel Grumbach 	 * For the unified firmware case, the ucode_type is not
338b3500b47SEmmanuel Grumbach 	 * INIT, but we still need to run it.
339b3500b47SEmmanuel Grumbach 	 */
340b3500b47SEmmanuel Grumbach 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
341e705c121SKalle Valo 	if (ret) {
342702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
343e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
344e705c121SKalle Valo 		return ret;
345e705c121SKalle Valo 	}
346e705c121SKalle Valo 
347e705c121SKalle Valo 	/*
348e705c121SKalle Valo 	 * Some things may run in the background now, but we
349e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
350e705c121SKalle Valo 	 */
351e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
352e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
353e705c121SKalle Valo 	if (ret) {
354d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
355d6be9c1dSSara Sharon 
35667b8261cSShahar S Matityahu 		if (ret == -ETIMEDOUT)
357700b3799SShahar S Matityahu 			iwl_fw_dbg_error_collect(&mvm->fwrt,
358700b3799SShahar S Matityahu 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
35967b8261cSShahar S Matityahu 
360286ca8ebSLuca Coelho 		if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000)
361e705c121SKalle Valo 			IWL_ERR(mvm,
362e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
363ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
364ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans,
365ea695b7cSShaul Triebitz 						   UMAG_SB_CPU_2_STATUS));
366286ca8ebSLuca Coelho 		else if (trans->trans_cfg->device_family >=
36779b6c8feSLuca Coelho 			 IWL_DEVICE_FAMILY_8000)
368d6be9c1dSSara Sharon 			IWL_ERR(mvm,
369d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
370d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
371d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
372702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
373e705c121SKalle Valo 		return ret;
374e705c121SKalle Valo 	}
375e705c121SKalle Valo 
376e705c121SKalle Valo 	if (!alive_data.valid) {
377e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
378702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
379e705c121SKalle Valo 		return -EIO;
380e705c121SKalle Valo 	}
381e705c121SKalle Valo 
382e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
383e705c121SKalle Valo 
384e705c121SKalle Valo 	/*
385e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
386e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
387e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
388e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
389e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
390e705c121SKalle Valo 	 * will be empty.
391e705c121SKalle Valo 	 */
392e705c121SKalle Valo 
393e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
3941c14089eSJohannes Berg 	/*
3951c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
3961c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
3971c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
3981c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
3991c14089eSJohannes Berg 	 */
4001c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
4011c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
402e705c121SKalle Valo 
40365b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
404f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
405f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
406f7805b33SLior Cohen #endif
407e705c121SKalle Valo 
408e705c121SKalle Valo 	return 0;
409e705c121SKalle Valo }
410e705c121SKalle Valo 
4118c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
4128c5f47b1SJohannes Berg {
4138c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
4148c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
4158c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4168c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4178c5f47b1SJohannes Berg 	};
4188c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4198c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4208c5f47b1SJohannes Berg 	};
4218c5f47b1SJohannes Berg 	int ret;
4228c5f47b1SJohannes Berg 
423a4584729SHaim Dreyfuss 	if (mvm->trans->cfg->tx_with_siso_diversity)
424a4584729SHaim Dreyfuss 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
425a4584729SHaim Dreyfuss 
4268c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4278c5f47b1SJohannes Berg 
42894022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
42994022562SEmmanuel Grumbach 
4308c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4318c5f47b1SJohannes Berg 				   &init_wait,
4328c5f47b1SJohannes Berg 				   init_complete,
4338c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4348c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4358c5f47b1SJohannes Berg 				   NULL);
4368c5f47b1SJohannes Berg 
437b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
43886ce5c74SShahar S Matityahu 
4398c5f47b1SJohannes Berg 	/* Will also start the device */
4408c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4418c5f47b1SJohannes Berg 	if (ret) {
4428c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4438c5f47b1SJohannes Berg 		goto error;
4448c5f47b1SJohannes Berg 	}
445b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
446b108d8c7SShahar S Matityahu 			       NULL);
4478c5f47b1SJohannes Berg 
4488c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
4498c5f47b1SJohannes Berg 	 * commands
4508c5f47b1SJohannes Berg 	 */
4518c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
452b3500b47SEmmanuel Grumbach 						INIT_EXTENDED_CFG_CMD),
453b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4548c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
4558c5f47b1SJohannes Berg 	if (ret) {
4568c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
4578c5f47b1SJohannes Berg 			ret);
4588c5f47b1SJohannes Berg 		goto error;
4598c5f47b1SJohannes Berg 	}
4608c5f47b1SJohannes Berg 
461e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
462e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
4639c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
4649c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
4658c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
466e9e1ba3dSSara Sharon 	}
4678c5f47b1SJohannes Berg 
468d4f3695eSSara Sharon 	if (IWL_MVM_PARSE_NVM && read_nvm) {
4695bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
470d4f3695eSSara Sharon 		if (ret) {
471d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
472d4f3695eSSara Sharon 			goto error;
473d4f3695eSSara Sharon 		}
474d4f3695eSSara Sharon 	}
475d4f3695eSSara Sharon 
4768c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
477b3500b47SEmmanuel Grumbach 						NVM_ACCESS_COMPLETE),
478b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4798c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
4808c5f47b1SJohannes Berg 	if (ret) {
4818c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4828c5f47b1SJohannes Berg 			ret);
4838c5f47b1SJohannes Berg 		goto error;
4848c5f47b1SJohannes Berg 	}
4858c5f47b1SJohannes Berg 
4868c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
487e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
4888c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
489e9e1ba3dSSara Sharon 	if (ret)
490e9e1ba3dSSara Sharon 		return ret;
491e9e1ba3dSSara Sharon 
492e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
493d4f3695eSSara Sharon 	if (!IWL_MVM_PARSE_NVM && read_nvm) {
4944c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
495c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
496c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
497c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
498e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
499e9e1ba3dSSara Sharon 			return ret;
500e9e1ba3dSSara Sharon 		}
501e9e1ba3dSSara Sharon 	}
502e9e1ba3dSSara Sharon 
503b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
504b3500b47SEmmanuel Grumbach 
505e9e1ba3dSSara Sharon 	return 0;
5068c5f47b1SJohannes Berg 
5078c5f47b1SJohannes Berg error:
5088c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
5098c5f47b1SJohannes Berg 	return ret;
5108c5f47b1SJohannes Berg }
5118c5f47b1SJohannes Berg 
512e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
513e705c121SKalle Valo {
514e705c121SKalle Valo 	struct iwl_phy_cfg_cmd phy_cfg_cmd;
515702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
516e705c121SKalle Valo 
517e705c121SKalle Valo 	/* Set parameters */
518e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
51986a2b204SLuca Coelho 
52086a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
52186a2b204SLuca Coelho 	phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
52286a2b204SLuca Coelho 
523e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
524e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
525e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
526e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
527e705c121SKalle Valo 
528e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
529e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
530e705c121SKalle Valo 
531e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
532e705c121SKalle Valo 				    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
533e705c121SKalle Valo }
534e705c121SKalle Valo 
535e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
536e705c121SKalle Valo {
537e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
538e705c121SKalle Valo 	static const u16 init_complete[] = {
539e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
540e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
541e705c121SKalle Valo 	};
542e705c121SKalle Valo 	int ret;
543e705c121SKalle Valo 
5447d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
5458c5f47b1SJohannes Berg 		return iwl_run_unified_mvm_ucode(mvm, true);
5468c5f47b1SJohannes Berg 
547e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
548e705c121SKalle Valo 
54994022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
550e705c121SKalle Valo 
551e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
552e705c121SKalle Valo 				   &calib_wait,
553e705c121SKalle Valo 				   init_complete,
554e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
555e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
556e705c121SKalle Valo 				   mvm->phy_db);
557e705c121SKalle Valo 
558e705c121SKalle Valo 	/* Will also start the device */
559e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
560e705c121SKalle Valo 	if (ret) {
561e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
56200e0c6c8SLuca Coelho 		goto remove_notif;
563e705c121SKalle Valo 	}
564e705c121SKalle Valo 
5657d34a7d7SLuca Coelho 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
566b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
567e705c121SKalle Valo 		if (ret)
56800e0c6c8SLuca Coelho 			goto remove_notif;
569b3de3ef4SEmmanuel Grumbach 	}
570e705c121SKalle Valo 
571e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
572e705c121SKalle Valo 	if (read_nvm) {
5735bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
574e705c121SKalle Valo 		if (ret) {
575e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
57600e0c6c8SLuca Coelho 			goto remove_notif;
577e705c121SKalle Valo 		}
578e705c121SKalle Valo 	}
579e705c121SKalle Valo 
580e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
581e705c121SKalle Valo 	if (mvm->nvm_file_name)
582e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
583e705c121SKalle Valo 
58464866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
58564866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
58664866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
587e705c121SKalle Valo 
588e705c121SKalle Valo 	/*
589e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
590e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
591e705c121SKalle Valo 	 */
592e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
593e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
594e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
59500e0c6c8SLuca Coelho 		goto remove_notif;
596e705c121SKalle Valo 	}
597e705c121SKalle Valo 
598b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
599e705c121SKalle Valo 
600e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
601e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
602e705c121SKalle Valo 	if (ret)
60300e0c6c8SLuca Coelho 		goto remove_notif;
604e705c121SKalle Valo 
605e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
606e705c121SKalle Valo 	if (ret) {
607e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
608e705c121SKalle Valo 			ret);
60900e0c6c8SLuca Coelho 		goto remove_notif;
610e705c121SKalle Valo 	}
611e705c121SKalle Valo 
612e705c121SKalle Valo 	/*
613e705c121SKalle Valo 	 * Some things may run in the background now, but we
614e705c121SKalle Valo 	 * just wait for the calibration complete notification.
615e705c121SKalle Valo 	 */
616e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
617e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
61800e0c6c8SLuca Coelho 	if (!ret)
619e705c121SKalle Valo 		goto out;
620e705c121SKalle Valo 
62100e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
62200e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
62300e0c6c8SLuca Coelho 		ret = 0;
62400e0c6c8SLuca Coelho 	} else {
62500e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
62600e0c6c8SLuca Coelho 			ret);
62700e0c6c8SLuca Coelho 	}
62800e0c6c8SLuca Coelho 
62900e0c6c8SLuca Coelho 	goto out;
63000e0c6c8SLuca Coelho 
63100e0c6c8SLuca Coelho remove_notif:
632e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
633e705c121SKalle Valo out:
634b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
635e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
636e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
637e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
638e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
639e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
640e705c121SKalle Valo 					GFP_KERNEL);
641e705c121SKalle Valo 		if (!mvm->nvm_data)
642e705c121SKalle Valo 			return -ENOMEM;
643e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
644e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
645e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
646e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
647e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
648e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
649e705c121SKalle Valo 	}
650e705c121SKalle Valo 
651e705c121SKalle Valo 	return ret;
652e705c121SKalle Valo }
653e705c121SKalle Valo 
654e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
655e705c121SKalle Valo {
656e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
657e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
658e705c121SKalle Valo 	};
659e705c121SKalle Valo 
660e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
661e705c121SKalle Valo 		return 0;
662e705c121SKalle Valo 
663e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
664e705c121SKalle Valo 				    sizeof(cmd), &cmd);
665e705c121SKalle Valo }
666e705c121SKalle Valo 
667c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
668e8698301SArnd Bergmann static inline int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
669c386dacbSHaim Dreyfuss 					  union acpi_object *table,
670c386dacbSHaim Dreyfuss 					  struct iwl_mvm_sar_profile *profile,
671c386dacbSHaim Dreyfuss 					  bool enabled)
672da2830acSLuca Coelho {
673c386dacbSHaim Dreyfuss 	int i;
674da2830acSLuca Coelho 
675c386dacbSHaim Dreyfuss 	profile->enabled = enabled;
676da2830acSLuca Coelho 
677e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
678c386dacbSHaim Dreyfuss 		if ((table[i].type != ACPI_TYPE_INTEGER) ||
679c386dacbSHaim Dreyfuss 		    (table[i].integer.value > U8_MAX))
680da2830acSLuca Coelho 			return -EINVAL;
681da2830acSLuca Coelho 
682c386dacbSHaim Dreyfuss 		profile->table[i] = table[i].integer.value;
683da2830acSLuca Coelho 	}
684da2830acSLuca Coelho 
685da2830acSLuca Coelho 	return 0;
686da2830acSLuca Coelho }
687da2830acSLuca Coelho 
688c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
689c386dacbSHaim Dreyfuss {
690813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *table, *data;
691c386dacbSHaim Dreyfuss 	bool enabled;
6920c3d7282SHaim Dreyfuss 	int ret, tbl_rev;
693da2830acSLuca Coelho 
694813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
695813df5ceSLuca Coelho 	if (IS_ERR(data))
696813df5ceSLuca Coelho 		return PTR_ERR(data);
697da2830acSLuca Coelho 
6982fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
6990c3d7282SHaim Dreyfuss 					 ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev);
7003ed83da3SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
701c386dacbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
702c386dacbSHaim Dreyfuss 		goto out_free;
703c386dacbSHaim Dreyfuss 	}
704da2830acSLuca Coelho 
7053ed83da3SLuca Coelho 	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER ||
7063ed83da3SLuca Coelho 	    tbl_rev != 0) {
707c386dacbSHaim Dreyfuss 		ret = -EINVAL;
708c386dacbSHaim Dreyfuss 		goto out_free;
709c386dacbSHaim Dreyfuss 	}
710c386dacbSHaim Dreyfuss 
711c386dacbSHaim Dreyfuss 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
712c386dacbSHaim Dreyfuss 
713c386dacbSHaim Dreyfuss 	/* position of the actual table */
714c386dacbSHaim Dreyfuss 	table = &wifi_pkg->package.elements[2];
715c386dacbSHaim Dreyfuss 
716c386dacbSHaim Dreyfuss 	/* The profile from WRDS is officially profile 1, but goes
717c386dacbSHaim Dreyfuss 	 * into sar_profiles[0] (because we don't have a profile 0).
718c386dacbSHaim Dreyfuss 	 */
719c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
720c386dacbSHaim Dreyfuss 				      enabled);
721c386dacbSHaim Dreyfuss out_free:
722813df5ceSLuca Coelho 	kfree(data);
723da2830acSLuca Coelho 	return ret;
724da2830acSLuca Coelho }
725da2830acSLuca Coelho 
72669964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
72769964905SLuca Coelho {
728813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
72969964905SLuca Coelho 	bool enabled;
7300c3d7282SHaim Dreyfuss 	int i, n_profiles, ret, tbl_rev;
73169964905SLuca Coelho 
732813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
733813df5ceSLuca Coelho 	if (IS_ERR(data))
734813df5ceSLuca Coelho 		return PTR_ERR(data);
73569964905SLuca Coelho 
7362fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
7370c3d7282SHaim Dreyfuss 					 ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev);
7383ed83da3SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
73969964905SLuca Coelho 		ret = PTR_ERR(wifi_pkg);
74069964905SLuca Coelho 		goto out_free;
74169964905SLuca Coelho 	}
74269964905SLuca Coelho 
74369964905SLuca Coelho 	if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
7443ed83da3SLuca Coelho 	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER) ||
7453ed83da3SLuca Coelho 	    tbl_rev != 0) {
74669964905SLuca Coelho 		ret = -EINVAL;
74769964905SLuca Coelho 		goto out_free;
74869964905SLuca Coelho 	}
74969964905SLuca Coelho 
75069964905SLuca Coelho 	enabled = !!(wifi_pkg->package.elements[1].integer.value);
75169964905SLuca Coelho 	n_profiles = wifi_pkg->package.elements[2].integer.value;
75269964905SLuca Coelho 
7532e1976bbSLuca Coelho 	/*
7542e1976bbSLuca Coelho 	 * Check the validity of n_profiles.  The EWRD profiles start
7552e1976bbSLuca Coelho 	 * from index 1, so the maximum value allowed here is
7562e1976bbSLuca Coelho 	 * ACPI_SAR_PROFILES_NUM - 1.
7572e1976bbSLuca Coelho 	 */
7582e1976bbSLuca Coelho 	if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
759e2ef1476SSharon Dvir 		ret = -EINVAL;
760e2ef1476SSharon Dvir 		goto out_free;
761e2ef1476SSharon Dvir 	}
762e2ef1476SSharon Dvir 
76369964905SLuca Coelho 	for (i = 0; i < n_profiles; i++) {
76469964905SLuca Coelho 		/* the tables start at element 3 */
765ba3224dbSEmmanuel Grumbach 		int pos = 3;
76669964905SLuca Coelho 
76769964905SLuca Coelho 		/* The EWRD profiles officially go from 2 to 4, but we
76869964905SLuca Coelho 		 * save them in sar_profiles[1-3] (because we don't
76969964905SLuca Coelho 		 * have profile 0).  So in the array we start from 1.
77069964905SLuca Coelho 		 */
77169964905SLuca Coelho 		ret = iwl_mvm_sar_set_profile(mvm,
77269964905SLuca Coelho 					      &wifi_pkg->package.elements[pos],
77369964905SLuca Coelho 					      &mvm->sar_profiles[i + 1],
77469964905SLuca Coelho 					      enabled);
77569964905SLuca Coelho 		if (ret < 0)
77669964905SLuca Coelho 			break;
77769964905SLuca Coelho 
77869964905SLuca Coelho 		/* go to the next table */
779e7a3b8d8SLuca Coelho 		pos += ACPI_SAR_TABLE_SIZE;
78069964905SLuca Coelho 	}
78169964905SLuca Coelho 
78269964905SLuca Coelho out_free:
783813df5ceSLuca Coelho 	kfree(data);
78469964905SLuca Coelho 	return ret;
78569964905SLuca Coelho }
78669964905SLuca Coelho 
7877fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
788a6bff3cbSHaim Dreyfuss {
789813df5ceSLuca Coelho 	union acpi_object *wifi_pkg, *data;
7900c3d7282SHaim Dreyfuss 	int i, j, ret, tbl_rev;
7917fe90e0eSHaim Dreyfuss 	int idx = 1;
792a6bff3cbSHaim Dreyfuss 
793813df5ceSLuca Coelho 	data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
794813df5ceSLuca Coelho 	if (IS_ERR(data))
795813df5ceSLuca Coelho 		return PTR_ERR(data);
796a6bff3cbSHaim Dreyfuss 
7972fa388cfSLuca Coelho 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
7980c3d7282SHaim Dreyfuss 					 ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev);
7993ed83da3SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
800a6bff3cbSHaim Dreyfuss 		ret = PTR_ERR(wifi_pkg);
801a6bff3cbSHaim Dreyfuss 		goto out_free;
802a6bff3cbSHaim Dreyfuss 	}
803a6bff3cbSHaim Dreyfuss 
8043ed83da3SLuca Coelho 	if (tbl_rev != 0) {
8053ed83da3SLuca Coelho 		ret = -EINVAL;
8063ed83da3SLuca Coelho 		goto out_free;
8073ed83da3SLuca Coelho 	}
8083ed83da3SLuca Coelho 
8090c3d7282SHaim Dreyfuss 	mvm->geo_rev = tbl_rev;
810e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
811e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
812a6bff3cbSHaim Dreyfuss 			union acpi_object *entry;
813a6bff3cbSHaim Dreyfuss 
8147fe90e0eSHaim Dreyfuss 			entry = &wifi_pkg->package.elements[idx++];
815a6bff3cbSHaim Dreyfuss 			if ((entry->type != ACPI_TYPE_INTEGER) ||
816aae9d563SChristophe Jaillet 			    (entry->integer.value > U8_MAX)) {
817aae9d563SChristophe Jaillet 				ret = -EINVAL;
818aae9d563SChristophe Jaillet 				goto out_free;
819aae9d563SChristophe Jaillet 			}
820a6bff3cbSHaim Dreyfuss 
8217fe90e0eSHaim Dreyfuss 			mvm->geo_profiles[i].values[j] = entry->integer.value;
8227fe90e0eSHaim Dreyfuss 		}
823a6bff3cbSHaim Dreyfuss 	}
824a6bff3cbSHaim Dreyfuss 	ret = 0;
825a6bff3cbSHaim Dreyfuss out_free:
826813df5ceSLuca Coelho 	kfree(data);
827a6bff3cbSHaim Dreyfuss 	return ret;
828a6bff3cbSHaim Dreyfuss }
829a6bff3cbSHaim Dreyfuss 
83042ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
831da2830acSLuca Coelho {
8320791c2fcSHaim Dreyfuss 	union {
8330791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd v5;
8340791c2fcSHaim Dreyfuss 		struct iwl_dev_tx_power_cmd_v4 v4;
8350791c2fcSHaim Dreyfuss 	} cmd;
83642ce76d6SLuca Coelho 	int i, j, idx;
837e7a3b8d8SLuca Coelho 	int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
8380791c2fcSHaim Dreyfuss 	int len;
839da2830acSLuca Coelho 
840e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
841e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
842e7a3b8d8SLuca Coelho 		     ACPI_SAR_TABLE_SIZE);
84342ce76d6SLuca Coelho 
8440791c2fcSHaim Dreyfuss 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
8450791c2fcSHaim Dreyfuss 
8460791c2fcSHaim Dreyfuss 	if (fw_has_api(&mvm->fw->ucode_capa,
8470791c2fcSHaim Dreyfuss 		       IWL_UCODE_TLV_API_REDUCE_TX_POWER))
8480791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
8490791c2fcSHaim Dreyfuss 	else if (fw_has_capa(&mvm->fw->ucode_capa,
8500791c2fcSHaim Dreyfuss 			     IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
8510791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4);
8520791c2fcSHaim Dreyfuss 	else
8530791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v4.v3);
85455bfa4b9SLuca Coelho 
855e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
85642ce76d6SLuca Coelho 		struct iwl_mvm_sar_profile *prof;
85742ce76d6SLuca Coelho 
85842ce76d6SLuca Coelho 		/* don't allow SAR to be disabled (profile 0 means disable) */
85942ce76d6SLuca Coelho 		if (profs[i] == 0)
86042ce76d6SLuca Coelho 			return -EPERM;
86142ce76d6SLuca Coelho 
862e7a3b8d8SLuca Coelho 		/* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
863e7a3b8d8SLuca Coelho 		if (profs[i] > ACPI_SAR_PROFILE_NUM)
86442ce76d6SLuca Coelho 			return -EINVAL;
86542ce76d6SLuca Coelho 
86642ce76d6SLuca Coelho 		/* profiles go from 1 to 4, so decrement to access the array */
86742ce76d6SLuca Coelho 		prof = &mvm->sar_profiles[profs[i] - 1];
86842ce76d6SLuca Coelho 
86942ce76d6SLuca Coelho 		/* if the profile is disabled, do nothing */
87042ce76d6SLuca Coelho 		if (!prof->enabled) {
87142ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
87242ce76d6SLuca Coelho 					profs[i]);
87342ce76d6SLuca Coelho 			/* if one of the profiles is disabled, we fail all */
87442ce76d6SLuca Coelho 			return -ENOENT;
87542ce76d6SLuca Coelho 		}
87642ce76d6SLuca Coelho 
8774fd445a2SHaim Dreyfuss 		IWL_DEBUG_INFO(mvm,
8784fd445a2SHaim Dreyfuss 			       "SAR EWRD: chain %d profile index %d\n",
8794fd445a2SHaim Dreyfuss 			       i, profs[i]);
88042ce76d6SLuca Coelho 		IWL_DEBUG_RADIO(mvm, "  Chain[%d]:\n", i);
881e7a3b8d8SLuca Coelho 		for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
882e7a3b8d8SLuca Coelho 			idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
8830791c2fcSHaim Dreyfuss 			cmd.v5.v3.per_chain_restriction[i][j] =
88442ce76d6SLuca Coelho 				cpu_to_le16(prof->table[idx]);
88542ce76d6SLuca Coelho 			IWL_DEBUG_RADIO(mvm, "    Band[%d] = %d * .125dBm\n",
88642ce76d6SLuca Coelho 					j, prof->table[idx]);
88742ce76d6SLuca Coelho 		}
88842ce76d6SLuca Coelho 	}
88942ce76d6SLuca Coelho 
89042ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
89142ce76d6SLuca Coelho 
89242ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
89342ce76d6SLuca Coelho }
89442ce76d6SLuca Coelho 
89539bd984cSLuca Coelho static bool iwl_mvm_sar_geo_support(struct iwl_mvm *mvm)
89639bd984cSLuca Coelho {
89739bd984cSLuca Coelho 	/*
89839bd984cSLuca Coelho 	 * The GEO_TX_POWER_LIMIT command is not supported on earlier
89939bd984cSLuca Coelho 	 * firmware versions.  Unfortunately, we don't have a TLV API
90039bd984cSLuca Coelho 	 * flag to rely on, so rely on the major version which is in
901f5a47faeSLuca Coelho 	 * the first byte of ucode_ver.  This was implemented
902fddbfeecSLuca Coelho 	 * initially on version 38 and then backported to29 and 17.
903fddbfeecSLuca Coelho 	 * The intention was to have it in 36 as well, but not all
904fddbfeecSLuca Coelho 	 * 8000 family got this feature enabled.  The 8000 family is
905fddbfeecSLuca Coelho 	 * the only one using version 36, so skip this version
906fddbfeecSLuca Coelho 	 * entirely.
90739bd984cSLuca Coelho 	 */
908f5a47faeSLuca Coelho 	return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 ||
909f5a47faeSLuca Coelho 	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 ||
910f5a47faeSLuca Coelho 	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17;
91139bd984cSLuca Coelho }
91239bd984cSLuca Coelho 
9137fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
9147fe90e0eSHaim Dreyfuss {
9157fe90e0eSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_resp *resp;
9167fe90e0eSHaim Dreyfuss 	int ret;
9170c3d7282SHaim Dreyfuss 	u16 len;
9180c3d7282SHaim Dreyfuss 	void *data;
9190c3d7282SHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd geo_cmd;
9200c3d7282SHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd_v1 geo_cmd_v1;
9210c3d7282SHaim Dreyfuss 	struct iwl_host_cmd cmd;
9227fe90e0eSHaim Dreyfuss 
9230c3d7282SHaim Dreyfuss 	if (fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
9240c3d7282SHaim Dreyfuss 		geo_cmd.ops =
9250c3d7282SHaim Dreyfuss 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
9260c3d7282SHaim Dreyfuss 		len = sizeof(geo_cmd);
9270c3d7282SHaim Dreyfuss 		data = &geo_cmd;
9280c3d7282SHaim Dreyfuss 	} else {
9290c3d7282SHaim Dreyfuss 		geo_cmd_v1.ops =
9300c3d7282SHaim Dreyfuss 			cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
9310c3d7282SHaim Dreyfuss 		len = sizeof(geo_cmd_v1);
9320c3d7282SHaim Dreyfuss 		data = &geo_cmd_v1;
9330c3d7282SHaim Dreyfuss 	}
9340c3d7282SHaim Dreyfuss 
9350c3d7282SHaim Dreyfuss 	cmd = (struct iwl_host_cmd){
9367fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
9370c3d7282SHaim Dreyfuss 		.len = { len, },
9387fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
9390c3d7282SHaim Dreyfuss 		.data = { data },
9407fe90e0eSHaim Dreyfuss 	};
9417fe90e0eSHaim Dreyfuss 
94239bd984cSLuca Coelho 	if (!iwl_mvm_sar_geo_support(mvm))
94339bd984cSLuca Coelho 		return -EOPNOTSUPP;
94439bd984cSLuca Coelho 
9457fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
9467fe90e0eSHaim Dreyfuss 	if (ret) {
9477fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
9487fe90e0eSHaim Dreyfuss 		return ret;
9497fe90e0eSHaim Dreyfuss 	}
9507fe90e0eSHaim Dreyfuss 
9517fe90e0eSHaim Dreyfuss 	resp = (void *)cmd.resp_pkt->data;
9527fe90e0eSHaim Dreyfuss 	ret = le32_to_cpu(resp->profile_idx);
953e7a3b8d8SLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
9547fe90e0eSHaim Dreyfuss 		ret = -EIO;
9557fe90e0eSHaim Dreyfuss 		IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
9567fe90e0eSHaim Dreyfuss 	}
9577fe90e0eSHaim Dreyfuss 
9587fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
9597fe90e0eSHaim Dreyfuss 	return ret;
9607fe90e0eSHaim Dreyfuss }
9617fe90e0eSHaim Dreyfuss 
962a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
963a6bff3cbSHaim Dreyfuss {
964a6bff3cbSHaim Dreyfuss 	struct iwl_geo_tx_power_profiles_cmd cmd = {
965a6bff3cbSHaim Dreyfuss 		.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
966a6bff3cbSHaim Dreyfuss 	};
9677fe90e0eSHaim Dreyfuss 	int ret, i, j;
968a6bff3cbSHaim Dreyfuss 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
969a6bff3cbSHaim Dreyfuss 
97039bd984cSLuca Coelho 	if (!iwl_mvm_sar_geo_support(mvm))
971eca1e56cSEmmanuel Grumbach 		return 0;
972eca1e56cSEmmanuel Grumbach 
9737fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wgds_table(mvm);
974a6bff3cbSHaim Dreyfuss 	if (ret < 0) {
975a6bff3cbSHaim Dreyfuss 		IWL_DEBUG_RADIO(mvm,
976a6bff3cbSHaim Dreyfuss 				"Geo SAR BIOS table invalid or unavailable. (%d)\n",
977a6bff3cbSHaim Dreyfuss 				ret);
978a6bff3cbSHaim Dreyfuss 		/* we don't fail if the table is not available */
979a6bff3cbSHaim Dreyfuss 		return 0;
980a6bff3cbSHaim Dreyfuss 	}
981a6bff3cbSHaim Dreyfuss 
982a6bff3cbSHaim Dreyfuss 	IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
983a6bff3cbSHaim Dreyfuss 
984e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
98566e83903SMatt Chen 		     ACPI_WGDS_TABLE_SIZE + 1 !=  ACPI_WGDS_WIFI_DATA_SIZE);
986a6bff3cbSHaim Dreyfuss 
987e7a3b8d8SLuca Coelho 	BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
988e7a3b8d8SLuca Coelho 
989e7a3b8d8SLuca Coelho 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
990a6bff3cbSHaim Dreyfuss 		struct iwl_per_chain_offset *chain =
991a6bff3cbSHaim Dreyfuss 			(struct iwl_per_chain_offset *)&cmd.table[i];
992a6bff3cbSHaim Dreyfuss 
993a6bff3cbSHaim Dreyfuss 		for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
994a6bff3cbSHaim Dreyfuss 			u8 *value;
995a6bff3cbSHaim Dreyfuss 
9967fe90e0eSHaim Dreyfuss 			value = &mvm->geo_profiles[i].values[j *
997e7a3b8d8SLuca Coelho 				ACPI_GEO_PER_CHAIN_SIZE];
998a6bff3cbSHaim Dreyfuss 			chain[j].max_tx_power = cpu_to_le16(value[0]);
999a6bff3cbSHaim Dreyfuss 			chain[j].chain_a = value[1];
1000a6bff3cbSHaim Dreyfuss 			chain[j].chain_b = value[2];
1001a6bff3cbSHaim Dreyfuss 			IWL_DEBUG_RADIO(mvm,
1002a6bff3cbSHaim Dreyfuss 					"SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
1003a6bff3cbSHaim Dreyfuss 					i, j, value[1], value[2], value[0]);
1004a6bff3cbSHaim Dreyfuss 		}
1005a6bff3cbSHaim Dreyfuss 	}
10060c3d7282SHaim Dreyfuss 
10070c3d7282SHaim Dreyfuss 	cmd.table_revision = cpu_to_le32(mvm->geo_rev);
10080c3d7282SHaim Dreyfuss 
10090c3d7282SHaim Dreyfuss 	if (!fw_has_api(&mvm->fw->ucode_capa,
10100c3d7282SHaim Dreyfuss 		       IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
10110c3d7282SHaim Dreyfuss 		return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0,
10120c3d7282SHaim Dreyfuss 				sizeof(struct iwl_geo_tx_power_profiles_cmd_v1),
10130c3d7282SHaim Dreyfuss 				&cmd);
10140c3d7282SHaim Dreyfuss 	}
10150c3d7282SHaim Dreyfuss 
1016a6bff3cbSHaim Dreyfuss 	return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
1017a6bff3cbSHaim Dreyfuss }
1018a6bff3cbSHaim Dreyfuss 
10196ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
10206ce1e5c0SGil Adam {
10216ce1e5c0SGil Adam 	union acpi_object *wifi_pkg, *data, *enabled;
10226ce1e5c0SGil Adam 	int i, j, ret, tbl_rev;
10236ce1e5c0SGil Adam 	int idx = 2;
10246ce1e5c0SGil Adam 
10256ce1e5c0SGil Adam 	mvm->ppag_table.enabled = cpu_to_le32(0);
10266ce1e5c0SGil Adam 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
10276ce1e5c0SGil Adam 	if (IS_ERR(data))
10286ce1e5c0SGil Adam 		return PTR_ERR(data);
10296ce1e5c0SGil Adam 
10306ce1e5c0SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
10316ce1e5c0SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
10326ce1e5c0SGil Adam 
10333ed83da3SLuca Coelho 	if (IS_ERR(wifi_pkg)) {
10346ce1e5c0SGil Adam 		ret = PTR_ERR(wifi_pkg);
10356ce1e5c0SGil Adam 		goto out_free;
10366ce1e5c0SGil Adam 	}
10376ce1e5c0SGil Adam 
10383ed83da3SLuca Coelho 	if (tbl_rev != 0) {
10393ed83da3SLuca Coelho 		ret = -EINVAL;
10403ed83da3SLuca Coelho 		goto out_free;
10413ed83da3SLuca Coelho 	}
10423ed83da3SLuca Coelho 
10436ce1e5c0SGil Adam 	enabled = &wifi_pkg->package.elements[1];
10446ce1e5c0SGil Adam 	if (enabled->type != ACPI_TYPE_INTEGER ||
10456ce1e5c0SGil Adam 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
10466ce1e5c0SGil Adam 		ret = -EINVAL;
10476ce1e5c0SGil Adam 		goto out_free;
10486ce1e5c0SGil Adam 	}
10496ce1e5c0SGil Adam 
10506ce1e5c0SGil Adam 	mvm->ppag_table.enabled = cpu_to_le32(enabled->integer.value);
10516ce1e5c0SGil Adam 	if (!mvm->ppag_table.enabled) {
10526ce1e5c0SGil Adam 		ret = 0;
10536ce1e5c0SGil Adam 		goto out_free;
10546ce1e5c0SGil Adam 	}
10556ce1e5c0SGil Adam 
10566ce1e5c0SGil Adam 	/*
10576ce1e5c0SGil Adam 	 * read, verify gain values and save them into the PPAG table.
10586ce1e5c0SGil Adam 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
10596ce1e5c0SGil Adam 	 * following sub-bands to High-Band (5GHz).
10606ce1e5c0SGil Adam 	 */
10616ce1e5c0SGil Adam 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
10626ce1e5c0SGil Adam 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
10636ce1e5c0SGil Adam 			union acpi_object *ent;
10646ce1e5c0SGil Adam 
10656ce1e5c0SGil Adam 			ent = &wifi_pkg->package.elements[idx++];
10666ce1e5c0SGil Adam 			if (ent->type != ACPI_TYPE_INTEGER ||
10676ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
10686ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
10696ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
10706ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
10716ce1e5c0SGil Adam 				mvm->ppag_table.enabled = cpu_to_le32(0);
10726ce1e5c0SGil Adam 				ret = -EINVAL;
10736ce1e5c0SGil Adam 				goto out_free;
10746ce1e5c0SGil Adam 			}
10756ce1e5c0SGil Adam 			mvm->ppag_table.gain[i][j] = ent->integer.value;
10766ce1e5c0SGil Adam 		}
10776ce1e5c0SGil Adam 	}
10786ce1e5c0SGil Adam 	ret = 0;
10796ce1e5c0SGil Adam out_free:
10806ce1e5c0SGil Adam 	kfree(data);
10816ce1e5c0SGil Adam 	return ret;
10826ce1e5c0SGil Adam }
10836ce1e5c0SGil Adam 
10846ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
10856ce1e5c0SGil Adam {
10866ce1e5c0SGil Adam 	int i, j, ret;
10876ce1e5c0SGil Adam 
10886ce1e5c0SGil Adam 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
10896ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10906ce1e5c0SGil Adam 				"PPAG capability not supported by FW, command not sent.\n");
10916ce1e5c0SGil Adam 		return 0;
10926ce1e5c0SGil Adam 	}
10936ce1e5c0SGil Adam 
10946ce1e5c0SGil Adam 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
10956ce1e5c0SGil Adam 	IWL_DEBUG_RADIO(mvm, "PPAG is %s\n",
10966ce1e5c0SGil Adam 			mvm->ppag_table.enabled ? "enabled" : "disabled");
10976ce1e5c0SGil Adam 
10986ce1e5c0SGil Adam 	for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
10996ce1e5c0SGil Adam 		for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
11006ce1e5c0SGil Adam 			IWL_DEBUG_RADIO(mvm,
11016ce1e5c0SGil Adam 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
11026ce1e5c0SGil Adam 					i, j, mvm->ppag_table.gain[i][j]);
11036ce1e5c0SGil Adam 		}
11046ce1e5c0SGil Adam 	}
11056ce1e5c0SGil Adam 
11066ce1e5c0SGil Adam 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
11076ce1e5c0SGil Adam 						PER_PLATFORM_ANT_GAIN_CMD),
11086ce1e5c0SGil Adam 				   0, sizeof(mvm->ppag_table),
11096ce1e5c0SGil Adam 				   &mvm->ppag_table);
11106ce1e5c0SGil Adam 	if (ret < 0)
11116ce1e5c0SGil Adam 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
11126ce1e5c0SGil Adam 			ret);
11136ce1e5c0SGil Adam 
11146ce1e5c0SGil Adam 	return ret;
11156ce1e5c0SGil Adam }
11166ce1e5c0SGil Adam 
11176ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
11186ce1e5c0SGil Adam {
11196ce1e5c0SGil Adam 	int ret;
11206ce1e5c0SGil Adam 
11216ce1e5c0SGil Adam 	ret = iwl_mvm_get_ppag_table(mvm);
11226ce1e5c0SGil Adam 	if (ret < 0) {
11236ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
11246ce1e5c0SGil Adam 				"PPAG BIOS table invalid or unavailable. (%d)\n",
11256ce1e5c0SGil Adam 				ret);
11266ce1e5c0SGil Adam 		return 0;
11276ce1e5c0SGil Adam 	}
11286ce1e5c0SGil Adam 	return iwl_mvm_ppag_send_cmd(mvm);
11296ce1e5c0SGil Adam }
11306ce1e5c0SGil Adam 
113169964905SLuca Coelho #else /* CONFIG_ACPI */
113269964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
113369964905SLuca Coelho {
113469964905SLuca Coelho 	return -ENOENT;
113569964905SLuca Coelho }
113669964905SLuca Coelho 
113769964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
113869964905SLuca Coelho {
113969964905SLuca Coelho 	return -ENOENT;
114069964905SLuca Coelho }
1141a6bff3cbSHaim Dreyfuss 
11425d041c46SLuca Coelho static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
11435d041c46SLuca Coelho {
11445d041c46SLuca Coelho 	return -ENOENT;
11455d041c46SLuca Coelho }
11465d041c46SLuca Coelho 
1147a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1148a6bff3cbSHaim Dreyfuss {
1149a6bff3cbSHaim Dreyfuss 	return 0;
1150a6bff3cbSHaim Dreyfuss }
115118f1755dSLuca Coelho 
115218f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
115318f1755dSLuca Coelho 			       int prof_b)
115418f1755dSLuca Coelho {
115518f1755dSLuca Coelho 	return -ENOENT;
115618f1755dSLuca Coelho }
115718f1755dSLuca Coelho 
115818f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
115918f1755dSLuca Coelho {
116018f1755dSLuca Coelho 	return -ENOENT;
116118f1755dSLuca Coelho }
11626ce1e5c0SGil Adam 
11636ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
11646ce1e5c0SGil Adam {
11656ce1e5c0SGil Adam 	return -ENOENT;
11666ce1e5c0SGil Adam }
11676ce1e5c0SGil Adam 
11686ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
11696ce1e5c0SGil Adam {
11706ce1e5c0SGil Adam 	return -ENOENT;
11716ce1e5c0SGil Adam }
117269964905SLuca Coelho #endif /* CONFIG_ACPI */
117369964905SLuca Coelho 
1174f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1175f130bb75SMordechay Goodstein {
1176f130bb75SMordechay Goodstein 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1177f130bb75SMordechay Goodstein 	int ret;
1178f130bb75SMordechay Goodstein 	u32 resp;
1179f130bb75SMordechay Goodstein 
1180f130bb75SMordechay Goodstein 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1181f130bb75SMordechay Goodstein 		.flags = cpu_to_le32(flags),
1182f130bb75SMordechay Goodstein 		.buf_size = 0,
1183f130bb75SMordechay Goodstein 	};
1184f130bb75SMordechay Goodstein 	struct iwl_host_cmd host_cmd = {
1185f130bb75SMordechay Goodstein 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1186f130bb75SMordechay Goodstein 		.flags = CMD_WANT_SKB,
1187f130bb75SMordechay Goodstein 		.data = {&recovery_cmd, },
1188f130bb75SMordechay Goodstein 		.len = {sizeof(recovery_cmd), },
1189f130bb75SMordechay Goodstein 	};
1190f130bb75SMordechay Goodstein 
1191f130bb75SMordechay Goodstein 	/* no error log was defined in TLV */
1192f130bb75SMordechay Goodstein 	if (!error_log_size)
1193f130bb75SMordechay Goodstein 		return;
1194f130bb75SMordechay Goodstein 
1195f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1196f130bb75SMordechay Goodstein 		/* no buf was allocated while HW reset */
1197f130bb75SMordechay Goodstein 		if (!mvm->error_recovery_buf)
1198f130bb75SMordechay Goodstein 			return;
1199f130bb75SMordechay Goodstein 
1200f130bb75SMordechay Goodstein 		host_cmd.data[1] = mvm->error_recovery_buf;
1201f130bb75SMordechay Goodstein 		host_cmd.len[1] =  error_log_size;
1202f130bb75SMordechay Goodstein 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1203f130bb75SMordechay Goodstein 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1204f130bb75SMordechay Goodstein 	}
1205f130bb75SMordechay Goodstein 
1206f130bb75SMordechay Goodstein 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1207f130bb75SMordechay Goodstein 	kfree(mvm->error_recovery_buf);
1208f130bb75SMordechay Goodstein 	mvm->error_recovery_buf = NULL;
1209f130bb75SMordechay Goodstein 
1210f130bb75SMordechay Goodstein 	if (ret) {
1211f130bb75SMordechay Goodstein 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1212f130bb75SMordechay Goodstein 		return;
1213f130bb75SMordechay Goodstein 	}
1214f130bb75SMordechay Goodstein 
1215f130bb75SMordechay Goodstein 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1216f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1217f130bb75SMordechay Goodstein 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1218f130bb75SMordechay Goodstein 		if (resp)
1219f130bb75SMordechay Goodstein 			IWL_ERR(mvm,
1220f130bb75SMordechay Goodstein 				"Failed to send recovery cmd blob was invalid %d\n",
1221f130bb75SMordechay Goodstein 				resp);
1222f130bb75SMordechay Goodstein 	}
1223f130bb75SMordechay Goodstein }
1224f130bb75SMordechay Goodstein 
122542ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
122642ce76d6SLuca Coelho {
122742ce76d6SLuca Coelho 	int ret;
122842ce76d6SLuca Coelho 
1229c386dacbSHaim Dreyfuss 	ret = iwl_mvm_sar_get_wrds_table(mvm);
1230da2830acSLuca Coelho 	if (ret < 0) {
1231da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
123269964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1233da2830acSLuca Coelho 				ret);
12345d041c46SLuca Coelho 		/*
12355d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
12365d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
12375d041c46SLuca Coelho 		 */
12385d041c46SLuca Coelho 		return 1;
1239da2830acSLuca Coelho 	}
1240da2830acSLuca Coelho 
124169964905SLuca Coelho 	ret = iwl_mvm_sar_get_ewrd_table(mvm);
124269964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
124369964905SLuca Coelho 	if (ret < 0)
124469964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
124569964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
124669964905SLuca Coelho 				ret);
124769964905SLuca Coelho 
124842ce76d6SLuca Coelho 	/* choose profile 1 (WRDS) as default for both chains */
124942ce76d6SLuca Coelho 	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
125042ce76d6SLuca Coelho 
12515d041c46SLuca Coelho 	/*
12525d041c46SLuca Coelho 	 * If we don't have profile 0 from BIOS, just skip it.  This
12535d041c46SLuca Coelho 	 * means that SAR Geo will not be enabled either, even if we
12545d041c46SLuca Coelho 	 * have other valid profiles.
12555d041c46SLuca Coelho 	 */
125642ce76d6SLuca Coelho 	if (ret == -ENOENT)
12575d041c46SLuca Coelho 		return 1;
1258da2830acSLuca Coelho 
1259da2830acSLuca Coelho 	return ret;
1260da2830acSLuca Coelho }
1261da2830acSLuca Coelho 
12621f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
12631f370650SSara Sharon {
12641f370650SSara Sharon 	int ret;
12651f370650SSara Sharon 
12667d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
12671f370650SSara Sharon 		return iwl_run_unified_mvm_ucode(mvm, false);
12681f370650SSara Sharon 
12691f370650SSara Sharon 	ret = iwl_run_init_mvm_ucode(mvm, false);
12701f370650SSara Sharon 
12711f370650SSara Sharon 	if (ret) {
12721f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1273f4744258SLiad Kaufman 
1274f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1275f4744258SLiad Kaufman 			return 0;
12761f370650SSara Sharon 		return ret;
12771f370650SSara Sharon 	}
12781f370650SSara Sharon 
1279203c83d3SShahar S Matityahu 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1280bab3cb92SEmmanuel Grumbach 	iwl_trans_stop_device(mvm->trans);
1281bab3cb92SEmmanuel Grumbach 	ret = iwl_trans_start_hw(mvm->trans);
12821f370650SSara Sharon 	if (ret)
12831f370650SSara Sharon 		return ret;
12841f370650SSara Sharon 
1285b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
1286da2eb669SSara Sharon 
128794022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
12881f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
12891f370650SSara Sharon 	if (ret)
12901f370650SSara Sharon 		return ret;
12911f370650SSara Sharon 
129294022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
129394022562SEmmanuel Grumbach 
1294b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1295b108d8c7SShahar S Matityahu 			       NULL);
1296da2eb669SSara Sharon 
1297702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
12981f370650SSara Sharon }
12991f370650SSara Sharon 
1300e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1301e705c121SKalle Valo {
1302e705c121SKalle Valo 	int ret, i;
1303e705c121SKalle Valo 	struct ieee80211_channel *chan;
1304e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1305dd36a507STova Mussai 	struct ieee80211_supported_band *sband = NULL;
1306e705c121SKalle Valo 
1307e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1308e705c121SKalle Valo 
1309e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1310e705c121SKalle Valo 	if (ret)
1311e705c121SKalle Valo 		return ret;
1312e705c121SKalle Valo 
13131f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1314e705c121SKalle Valo 	if (ret) {
1315e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
131672d3c7bbSJohannes Berg 		if (ret != -ERFKILL)
131772d3c7bbSJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
131872d3c7bbSJohannes Berg 						 FW_DBG_TRIGGER_DRIVER);
1319e705c121SKalle Valo 		goto error;
1320e705c121SKalle Valo 	}
1321e705c121SKalle Valo 
1322d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1323e705c121SKalle Valo 
1324e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1325e705c121SKalle Valo 	if (ret)
1326e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1327e705c121SKalle Valo 
1328a1af4c48SShahar S Matityahu 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
13297174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1330e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
133117b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
13327174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
13337174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
13347a14c23dSSara Sharon 	}
1335e705c121SKalle Valo 
1336e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1337e705c121SKalle Valo 	if (ret)
1338e705c121SKalle Valo 		goto error;
1339e705c121SKalle Valo 
13407d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1341e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1342e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1343e705c121SKalle Valo 		if (ret)
1344e705c121SKalle Valo 			goto error;
1345e705c121SKalle Valo 
1346e705c121SKalle Valo 		ret = iwl_send_phy_cfg_cmd(mvm);
1347e705c121SKalle Valo 		if (ret)
1348e705c121SKalle Valo 			goto error;
13491f370650SSara Sharon 	}
1350e705c121SKalle Valo 
1351b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1352b3de3ef4SEmmanuel Grumbach 	if (ret)
1353b3de3ef4SEmmanuel Grumbach 		goto error;
1354b3de3ef4SEmmanuel Grumbach 
135543413a97SSara Sharon 	/* Init RSS configuration */
1356286ca8ebSLuca Coelho 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
13578edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
13588edbfaa1SSara Sharon 		if (ret) {
13598edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
13608edbfaa1SSara Sharon 				ret);
13618edbfaa1SSara Sharon 			goto error;
13628edbfaa1SSara Sharon 		}
13638edbfaa1SSara Sharon 	}
13648edbfaa1SSara Sharon 
13658edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
136643413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
136743413a97SSara Sharon 		if (ret) {
136843413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
136943413a97SSara Sharon 				ret);
137043413a97SSara Sharon 			goto error;
137143413a97SSara Sharon 		}
137243413a97SSara Sharon 	}
137343413a97SSara Sharon 
1374e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
13750ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1376e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1377e705c121SKalle Valo 
13780ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1379e705c121SKalle Valo 
1380e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1381e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1382e705c121SKalle Valo 
138379660869SIlia Lin 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
138497d5be7eSLiad Kaufman 		ret = iwl_mvm_send_dqa_cmd(mvm);
138597d5be7eSLiad Kaufman 		if (ret)
138697d5be7eSLiad Kaufman 			goto error;
138779660869SIlia Lin 	}
138897d5be7eSLiad Kaufman 
1389e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1390e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1391e705c121SKalle Valo 	if (ret)
1392e705c121SKalle Valo 		goto error;
1393e705c121SKalle Valo 
1394e705c121SKalle Valo 	/* Add all the PHY contexts */
1395dd36a507STova Mussai 	i = 0;
1396dd36a507STova Mussai 	while (!sband && i < NUM_NL80211_BANDS)
1397dd36a507STova Mussai 		sband = mvm->hw->wiphy->bands[i++];
1398dd36a507STova Mussai 
1399dd36a507STova Mussai 	if (WARN_ON_ONCE(!sband))
1400dd36a507STova Mussai 		goto error;
1401dd36a507STova Mussai 
1402dd36a507STova Mussai 	chan = &sband->channels[0];
1403dd36a507STova Mussai 
1404e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1405e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1406e705c121SKalle Valo 		/*
1407e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1408e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1409e705c121SKalle Valo 		 * For now use the first channel we have.
1410e705c121SKalle Valo 		 */
1411e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1412e705c121SKalle Valo 					   &chandef, 1, 1);
1413e705c121SKalle Valo 		if (ret)
1414e705c121SKalle Valo 			goto error;
1415e705c121SKalle Valo 	}
1416e705c121SKalle Valo 
1417c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1418c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1419c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1420c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1421c221daf2SChaya Rachel Ivgi 		 */
1422c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1423c221daf2SChaya Rachel Ivgi 	} else {
1424e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1425e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1426c221daf2SChaya Rachel Ivgi 	}
14275c89e7bcSChaya Rachel Ivgi 
1428242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL
14295c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1430944eafc2SChaya Rachel Ivgi 
1431944eafc2SChaya Rachel Ivgi 	/*
1432944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1433944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1434944eafc2SChaya Rachel Ivgi 	 */
1435944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
14365c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
14375c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
143875cfe338SLuca Coelho 		if (ret)
143975cfe338SLuca Coelho 			goto error;
144075cfe338SLuca Coelho 	}
1441c221daf2SChaya Rachel Ivgi #endif
1442e705c121SKalle Valo 
1443aa43ae12SAlex Malamud 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1444e705c121SKalle Valo 		WARN_ON(iwl_mvm_config_ltr(mvm));
1445e705c121SKalle Valo 
1446e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1447e705c121SKalle Valo 	if (ret)
1448e705c121SKalle Valo 		goto error;
1449e705c121SKalle Valo 
1450e705c121SKalle Valo 	/*
1451e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1452e705c121SKalle Valo 	 * anyway, so don't init MCC.
1453e705c121SKalle Valo 	 */
1454e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1455e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1456e705c121SKalle Valo 		if (ret)
1457e705c121SKalle Valo 			goto error;
1458e705c121SKalle Valo 	}
1459e705c121SKalle Valo 
1460e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
14614ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1462b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1463e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1464e705c121SKalle Valo 		if (ret)
1465e705c121SKalle Valo 			goto error;
1466e705c121SKalle Valo 	}
1467e705c121SKalle Valo 
1468f130bb75SMordechay Goodstein 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1469f130bb75SMordechay Goodstein 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1470f130bb75SMordechay Goodstein 
147148e775e6SHaim Dreyfuss 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
147248e775e6SHaim Dreyfuss 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
147348e775e6SHaim Dreyfuss 
14746ce1e5c0SGil Adam 	ret = iwl_mvm_ppag_init(mvm);
14756ce1e5c0SGil Adam 	if (ret)
14766ce1e5c0SGil Adam 		goto error;
14776ce1e5c0SGil Adam 
1478da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
14795d041c46SLuca Coelho 	if (ret == 0) {
1480a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
14815d041c46SLuca Coelho 	} else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
14825d041c46SLuca Coelho 		/*
14835d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
14845d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
14855d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
14865d041c46SLuca Coelho 		 * Geo without basic SAR.
14875d041c46SLuca Coelho 		 */
14885d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
14895d041c46SLuca Coelho 	}
14905d041c46SLuca Coelho 
14915d041c46SLuca Coelho 	if (ret < 0)
1492a6bff3cbSHaim Dreyfuss 		goto error;
1493a6bff3cbSHaim Dreyfuss 
14947089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
14957089ae63SJohannes Berg 
1496e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1497e705c121SKalle Valo 	return 0;
1498e705c121SKalle Valo  error:
1499f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1500fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1501e705c121SKalle Valo 	return ret;
1502e705c121SKalle Valo }
1503e705c121SKalle Valo 
1504e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1505e705c121SKalle Valo {
1506e705c121SKalle Valo 	int ret, i;
1507e705c121SKalle Valo 
1508e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1509e705c121SKalle Valo 
1510e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1511e705c121SKalle Valo 	if (ret)
1512e705c121SKalle Valo 		return ret;
1513e705c121SKalle Valo 
1514e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1515e705c121SKalle Valo 	if (ret) {
1516e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1517e705c121SKalle Valo 		goto error;
1518e705c121SKalle Valo 	}
1519e705c121SKalle Valo 
1520e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1521e705c121SKalle Valo 	if (ret)
1522e705c121SKalle Valo 		goto error;
1523e705c121SKalle Valo 
1524e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1525e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1526e705c121SKalle Valo 	if (ret)
1527e705c121SKalle Valo 		goto error;
1528e705c121SKalle Valo 
1529e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1530e705c121SKalle Valo 	if (ret)
1531e705c121SKalle Valo 		goto error;
1532e705c121SKalle Valo 
1533e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
15340ae98812SSara Sharon 	for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
1535e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1536e705c121SKalle Valo 
1537e705c121SKalle Valo 	/* Add auxiliary station for scanning */
1538e705c121SKalle Valo 	ret = iwl_mvm_add_aux_sta(mvm);
1539e705c121SKalle Valo 	if (ret)
1540e705c121SKalle Valo 		goto error;
1541e705c121SKalle Valo 
1542e705c121SKalle Valo 	return 0;
1543e705c121SKalle Valo  error:
1544fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1545e705c121SKalle Valo 	return ret;
1546e705c121SKalle Valo }
1547e705c121SKalle Valo 
1548e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1549e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1550e705c121SKalle Valo {
1551e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1552e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1553e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1554e705c121SKalle Valo 
1555e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1556e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1557e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1558e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1559e705c121SKalle Valo 			  "Reached" : "Not reached");
1560e705c121SKalle Valo }
1561e705c121SKalle Valo 
1562e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1563e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1564e705c121SKalle Valo {
1565e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1566e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1567e705c121SKalle Valo 
1568e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1569e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1570e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1571e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1572e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1573e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
15740c8d0a47SGolan Ben-Ami 
15750c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
15760c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
15770c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
15780c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1579e705c121SKalle Valo }
1580