1*8e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2*8e99ea8dSJohannes Berg /*
3*8e99ea8dSJohannes Berg  * Copyright (C) 2012-2014, 2018-2020 Intel Corporation
4*8e99ea8dSJohannes Berg  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5*8e99ea8dSJohannes Berg  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6*8e99ea8dSJohannes Berg  */
7e705c121SKalle Valo #include <net/mac80211.h>
8854d773eSSara Sharon #include <linux/netdevice.h>
9e705c121SKalle Valo 
10e705c121SKalle Valo #include "iwl-trans.h"
11e705c121SKalle Valo #include "iwl-op-mode.h"
12d962f9b1SJohannes Berg #include "fw/img.h"
13e705c121SKalle Valo #include "iwl-debug.h"
14e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
15e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
16e705c121SKalle Valo #include "iwl-prph.h"
17813df5ceSLuca Coelho #include "fw/acpi.h"
18b3e4c0f3SLuca Coelho #include "fw/pnvm.h"
19e705c121SKalle Valo 
20e705c121SKalle Valo #include "mvm.h"
217174beb6SJohannes Berg #include "fw/dbg.h"
22e705c121SKalle Valo #include "iwl-phy-db.h"
239c4f7d51SShaul Triebitz #include "iwl-modparams.h"
249c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
25e705c121SKalle Valo 
26b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
27e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
28e705c121SKalle Valo 
29e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
30e705c121SKalle Valo 
31e705c121SKalle Valo struct iwl_mvm_alive_data {
32e705c121SKalle Valo 	bool valid;
33e705c121SKalle Valo 	u32 scd_base_addr;
34e705c121SKalle Valo };
35e705c121SKalle Valo 
36e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37e705c121SKalle Valo {
38e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
40e705c121SKalle Valo 	};
41e705c121SKalle Valo 
42e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
45e705c121SKalle Valo }
46e705c121SKalle Valo 
4743413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
4843413a97SSara Sharon {
4943413a97SSara Sharon 	int i;
5043413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
5143413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
52608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
5843413a97SSara Sharon 	};
5943413a97SSara Sharon 
60f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
61f43495fdSSara Sharon 		return 0;
62f43495fdSSara Sharon 
63854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
6443413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65854d773eSSara Sharon 		cmd.indirection_table[i] =
66854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
67854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
6843413a97SSara Sharon 
6943413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
7043413a97SSara Sharon }
7143413a97SSara Sharon 
728edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
738edbfaa1SSara Sharon {
74dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
758edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
76dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
77dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
78dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
79dbf592f3SJohannes Berg 	};
808edbfaa1SSara Sharon 
8164f55156SLuca Coelho 	/*
8264f55156SLuca Coelho 	 * The default queue is configured via context info, so if we
8364f55156SLuca Coelho 	 * have a single queue, there's nothing to do here.
8464f55156SLuca Coelho 	 */
8564f55156SLuca Coelho 	if (mvm->trans->num_rx_queues == 1)
8664f55156SLuca Coelho 		return 0;
8764f55156SLuca Coelho 
8864f55156SLuca Coelho 	/* skip the default queue */
898edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
908edbfaa1SSara Sharon 
91dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
928edbfaa1SSara Sharon 
938edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
948edbfaa1SSara Sharon 	if (!cmd)
958edbfaa1SSara Sharon 		return -ENOMEM;
968edbfaa1SSara Sharon 
978edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
988edbfaa1SSara Sharon 
998edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1008edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1018edbfaa1SSara Sharon 
1028edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1038edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1048edbfaa1SSara Sharon 
1058edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1068edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1078edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1088edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1098edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1108edbfaa1SSara Sharon 	}
1118edbfaa1SSara Sharon 
112dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
113dbf592f3SJohannes Berg 	hcmd.len[0] = size;
114dbf592f3SJohannes Berg 
115dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
116dbf592f3SJohannes Berg 
117dbf592f3SJohannes Berg 	kfree(cmd);
118dbf592f3SJohannes Berg 
119dbf592f3SJohannes Berg 	return ret;
1208edbfaa1SSara Sharon }
1218edbfaa1SSara Sharon 
12297d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
12397d5be7eSLiad Kaufman {
12497d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
12597d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
12697d5be7eSLiad Kaufman 	};
12797d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
12897d5be7eSLiad Kaufman 	int ret;
12997d5be7eSLiad Kaufman 
13097d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
13197d5be7eSLiad Kaufman 	if (ret)
13297d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
13397d5be7eSLiad Kaufman 	else
13497d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
13597d5be7eSLiad Kaufman 
13697d5be7eSLiad Kaufman 	return ret;
13797d5be7eSLiad Kaufman }
13897d5be7eSLiad Kaufman 
139bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
140bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
141bdccdb85SGolan Ben-Ami {
142bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
143bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
144bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
145bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
146bdccdb85SGolan Ben-Ami 	int i;
147bdccdb85SGolan Ben-Ami 
148bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
149bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
150bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
151bdccdb85SGolan Ben-Ami 
152bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
153bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
154bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
155bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
156bdccdb85SGolan Ben-Ami 			       n_words + i,
157bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
158bdccdb85SGolan Ben-Ami }
159bdccdb85SGolan Ben-Ami 
160e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
161e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
162e705c121SKalle Valo {
163e705c121SKalle Valo 	struct iwl_mvm *mvm =
164e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
165e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
1665c228d63SSara Sharon 	struct iwl_umac_alive *umac;
1675c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
1685c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
1695c228d63SSara Sharon 	u16 status;
170cfa5d0caSMordechay Goodstein 	u32 lmac_error_event_table, umac_error_table;
171e705c121SKalle Valo 
17290824f2fSLuca Coelho 	/*
17390824f2fSLuca Coelho 	 * For v5 and above, we can check the version, for older
17490824f2fSLuca Coelho 	 * versions we need to check the size.
17590824f2fSLuca Coelho 	 */
176b4248c08SAndrei Otcheretianski 	if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
17790824f2fSLuca Coelho 				    UCODE_ALIVE_NTFY, 0) == 5) {
17890824f2fSLuca Coelho 		struct iwl_alive_ntf_v5 *palive;
17990824f2fSLuca Coelho 
18090824f2fSLuca Coelho 		palive = (void *)pkt->data;
18190824f2fSLuca Coelho 		umac = &palive->umac_data;
18290824f2fSLuca Coelho 		lmac1 = &palive->lmac_data[0];
18390824f2fSLuca Coelho 		lmac2 = &palive->lmac_data[1];
18490824f2fSLuca Coelho 		status = le16_to_cpu(palive->status);
18590824f2fSLuca Coelho 
18690824f2fSLuca Coelho 		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
18790824f2fSLuca Coelho 		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
18890824f2fSLuca Coelho 		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
18990824f2fSLuca Coelho 
19090824f2fSLuca Coelho 		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
19190824f2fSLuca Coelho 			     mvm->trans->sku_id[0],
19290824f2fSLuca Coelho 			     mvm->trans->sku_id[1],
19390824f2fSLuca Coelho 			     mvm->trans->sku_id[2]);
19490824f2fSLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
1959422b978SLuca Coelho 		struct iwl_alive_ntf_v4 *palive;
1969422b978SLuca Coelho 
197e705c121SKalle Valo 		palive = (void *)pkt->data;
1985c228d63SSara Sharon 		umac = &palive->umac_data;
1995c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2005c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2015c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2029422b978SLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) ==
2039422b978SLuca Coelho 		   sizeof(struct iwl_alive_ntf_v3)) {
2049422b978SLuca Coelho 		struct iwl_alive_ntf_v3 *palive3;
2059422b978SLuca Coelho 
2065c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2075c228d63SSara Sharon 		umac = &palive3->umac_data;
2085c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2095c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2109422b978SLuca Coelho 	} else {
2119422b978SLuca Coelho 		WARN(1, "unsupported alive notification (size %d)\n",
2129422b978SLuca Coelho 		     iwl_rx_packet_payload_len(pkt));
2139422b978SLuca Coelho 		/* get timeout later */
2149422b978SLuca Coelho 		return false;
2155c228d63SSara Sharon 	}
216e705c121SKalle Valo 
21722463857SShahar S Matityahu 	lmac_error_event_table =
21822463857SShahar S Matityahu 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
21922463857SShahar S Matityahu 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
220e705c121SKalle Valo 
22122463857SShahar S Matityahu 	if (lmac2)
22291c28b83SShahar S Matityahu 		mvm->trans->dbg.lmac_error_event_table[1] =
22322463857SShahar S Matityahu 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
22422463857SShahar S Matityahu 
225cfa5d0caSMordechay Goodstein 	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
2265c228d63SSara Sharon 
227cfa5d0caSMordechay Goodstein 	if (umac_error_table) {
228cfa5d0caSMordechay Goodstein 		if (umac_error_table >=
2293485e76eSLuca Coelho 		    mvm->trans->cfg->min_umac_error_event_table) {
230cfa5d0caSMordechay Goodstein 			iwl_fw_umac_set_alive_err_table(mvm->trans,
231cfa5d0caSMordechay Goodstein 							umac_error_table);
2323485e76eSLuca Coelho 		} else {
233fb5b2846SLuca Coelho 			IWL_ERR(mvm,
234fb5b2846SLuca Coelho 				"Not valid error log pointer 0x%08X for %s uCode\n",
235cfa5d0caSMordechay Goodstein 				umac_error_table,
236fb5b2846SLuca Coelho 				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
237fb5b2846SLuca Coelho 				"Init" : "RT");
2383485e76eSLuca Coelho 		}
239cfa5d0caSMordechay Goodstein 	}
24022463857SShahar S Matityahu 
24122463857SShahar S Matityahu 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2425c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
243e705c121SKalle Valo 
244e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2455c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2465c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2475c228d63SSara Sharon 
2485c228d63SSara Sharon 	if (lmac2)
2495c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
250e705c121SKalle Valo 
251e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
252e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2535c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2545c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
255e705c121SKalle Valo 
2560a3a3e9eSShahar S Matityahu 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
2570a3a3e9eSShahar S Matityahu 
258e705c121SKalle Valo 	return true;
259e705c121SKalle Valo }
260e705c121SKalle Valo 
2611f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2621f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2631f370650SSara Sharon {
2641f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2651f370650SSara Sharon 
2661f370650SSara Sharon 	return true;
2671f370650SSara Sharon }
2681f370650SSara Sharon 
269e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
270e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
271e705c121SKalle Valo {
272e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
273e705c121SKalle Valo 
274e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
275e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
276e705c121SKalle Valo 		return true;
277e705c121SKalle Valo 	}
278e705c121SKalle Valo 
279ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
280e705c121SKalle Valo 
281e705c121SKalle Valo 	return false;
282e705c121SKalle Valo }
283e705c121SKalle Valo 
284e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
285e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
286e705c121SKalle Valo {
287e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
28894a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
289e705c121SKalle Valo 	const struct fw_img *fw;
290cfbc6c4cSSara Sharon 	int ret;
291702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
2929422b978SLuca Coelho 	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
293b3500b47SEmmanuel Grumbach 	bool run_in_rfkill =
294b3500b47SEmmanuel Grumbach 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
295e705c121SKalle Valo 
296e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
2973d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
2983d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
2993d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
300612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
301e705c121SKalle Valo 	else
302612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
303e705c121SKalle Valo 	if (WARN_ON(!fw))
304e705c121SKalle Valo 		return -EINVAL;
305702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
30665b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
307e705c121SKalle Valo 
308e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
309e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
310e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
311e705c121SKalle Valo 
312b3500b47SEmmanuel Grumbach 	/*
313b3500b47SEmmanuel Grumbach 	 * We want to load the INIT firmware even in RFKILL
314b3500b47SEmmanuel Grumbach 	 * For the unified firmware case, the ucode_type is not
315b3500b47SEmmanuel Grumbach 	 * INIT, but we still need to run it.
316b3500b47SEmmanuel Grumbach 	 */
317b3500b47SEmmanuel Grumbach 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
318e705c121SKalle Valo 	if (ret) {
319702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
320e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
321e705c121SKalle Valo 		return ret;
322e705c121SKalle Valo 	}
323e705c121SKalle Valo 
324e705c121SKalle Valo 	/*
325e705c121SKalle Valo 	 * Some things may run in the background now, but we
326e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
327e705c121SKalle Valo 	 */
328e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
329e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
330e705c121SKalle Valo 	if (ret) {
331d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
332d6be9c1dSSara Sharon 
33320f5aef5SJohannes Berg 		if (trans->trans_cfg->device_family >=
33420f5aef5SJohannes Berg 					IWL_DEVICE_FAMILY_22000) {
335e705c121SKalle Valo 			IWL_ERR(mvm,
336e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
337ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
338ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans,
339ea695b7cSShaul Triebitz 						   UMAG_SB_CPU_2_STATUS));
34020f5aef5SJohannes Berg 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
34120f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
34220f5aef5SJohannes Berg 						   UREG_UMAC_CURRENT_PC));
34320f5aef5SJohannes Berg 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
34420f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
34520f5aef5SJohannes Berg 						   UREG_LMAC1_CURRENT_PC));
34620f5aef5SJohannes Berg 			if (iwl_mvm_is_cdb_supported(mvm))
34720f5aef5SJohannes Berg 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
34820f5aef5SJohannes Berg 					iwl_read_umac_prph(trans,
34920f5aef5SJohannes Berg 						UREG_LMAC2_CURRENT_PC));
35020f5aef5SJohannes Berg 		} else if (trans->trans_cfg->device_family >=
35120f5aef5SJohannes Berg 			   IWL_DEVICE_FAMILY_8000) {
352d6be9c1dSSara Sharon 			IWL_ERR(mvm,
353d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
354d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
355d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
35620f5aef5SJohannes Berg 		}
35720f5aef5SJohannes Berg 
35820f5aef5SJohannes Berg 		if (ret == -ETIMEDOUT)
35920f5aef5SJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
36020f5aef5SJohannes Berg 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
36120f5aef5SJohannes Berg 
362702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
363e705c121SKalle Valo 		return ret;
364e705c121SKalle Valo 	}
365e705c121SKalle Valo 
366e705c121SKalle Valo 	if (!alive_data.valid) {
367e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
368702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
369e705c121SKalle Valo 		return -EIO;
370e705c121SKalle Valo 	}
371e705c121SKalle Valo 
372b3e4c0f3SLuca Coelho 	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
37370d3ca86SLuca Coelho 	if (ret) {
37470d3ca86SLuca Coelho 		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
37570d3ca86SLuca Coelho 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
37670d3ca86SLuca Coelho 		return ret;
37770d3ca86SLuca Coelho 	}
37870d3ca86SLuca Coelho 
379e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
380e705c121SKalle Valo 
381e705c121SKalle Valo 	/*
382e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
383e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
384e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
385e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
386e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
387e705c121SKalle Valo 	 * will be empty.
388e705c121SKalle Valo 	 */
389e705c121SKalle Valo 
390e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
3911c14089eSJohannes Berg 	/*
3921c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
3931c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
3941c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
3951c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
3961c14089eSJohannes Berg 	 */
3971c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
3981c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
399e705c121SKalle Valo 
40065b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
401f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
402f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
403f7805b33SLior Cohen #endif
404e705c121SKalle Valo 
405e705c121SKalle Valo 	return 0;
406e705c121SKalle Valo }
407e705c121SKalle Valo 
40852b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
4098c5f47b1SJohannes Berg {
4108c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
4118c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
4128c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4138c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4148c5f47b1SJohannes Berg 	};
4158c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4168c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4178c5f47b1SJohannes Berg 	};
4188c5f47b1SJohannes Berg 	int ret;
4198c5f47b1SJohannes Berg 
420a4584729SHaim Dreyfuss 	if (mvm->trans->cfg->tx_with_siso_diversity)
421a4584729SHaim Dreyfuss 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
422a4584729SHaim Dreyfuss 
4238c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4248c5f47b1SJohannes Berg 
42594022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
42694022562SEmmanuel Grumbach 
4278c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4288c5f47b1SJohannes Berg 				   &init_wait,
4298c5f47b1SJohannes Berg 				   init_complete,
4308c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4318c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4328c5f47b1SJohannes Berg 				   NULL);
4338c5f47b1SJohannes Berg 
434b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
43586ce5c74SShahar S Matityahu 
4368c5f47b1SJohannes Berg 	/* Will also start the device */
4378c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4388c5f47b1SJohannes Berg 	if (ret) {
4398c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4408c5f47b1SJohannes Berg 		goto error;
4418c5f47b1SJohannes Berg 	}
442b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
443b108d8c7SShahar S Matityahu 			       NULL);
4448c5f47b1SJohannes Berg 
4458c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
4468c5f47b1SJohannes Berg 	 * commands
4478c5f47b1SJohannes Berg 	 */
4488c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
449b3500b47SEmmanuel Grumbach 						INIT_EXTENDED_CFG_CMD),
450b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4518c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
4528c5f47b1SJohannes Berg 	if (ret) {
4538c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
4548c5f47b1SJohannes Berg 			ret);
4558c5f47b1SJohannes Berg 		goto error;
4568c5f47b1SJohannes Berg 	}
4578c5f47b1SJohannes Berg 
458e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
459e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
4609c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
4619c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
4628c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
463e9e1ba3dSSara Sharon 	}
4648c5f47b1SJohannes Berg 
46552b15521SEmmanuel Grumbach 	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
4665bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
467d4f3695eSSara Sharon 		if (ret) {
468d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
469d4f3695eSSara Sharon 			goto error;
470d4f3695eSSara Sharon 		}
471d4f3695eSSara Sharon 	}
472d4f3695eSSara Sharon 
4738c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
474b3500b47SEmmanuel Grumbach 						NVM_ACCESS_COMPLETE),
475b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4768c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
4778c5f47b1SJohannes Berg 	if (ret) {
4788c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4798c5f47b1SJohannes Berg 			ret);
4808c5f47b1SJohannes Berg 		goto error;
4818c5f47b1SJohannes Berg 	}
4828c5f47b1SJohannes Berg 
4838c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
484e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
4858c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
486e9e1ba3dSSara Sharon 	if (ret)
487e9e1ba3dSSara Sharon 		return ret;
488e9e1ba3dSSara Sharon 
489e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
49052b15521SEmmanuel Grumbach 	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
4914c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
492c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
493c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
494c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
495e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
496e9e1ba3dSSara Sharon 			return ret;
497e9e1ba3dSSara Sharon 		}
498e9e1ba3dSSara Sharon 	}
499e9e1ba3dSSara Sharon 
500b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
501b3500b47SEmmanuel Grumbach 
502e9e1ba3dSSara Sharon 	return 0;
5038c5f47b1SJohannes Berg 
5048c5f47b1SJohannes Berg error:
5058c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
5068c5f47b1SJohannes Berg 	return ret;
5078c5f47b1SJohannes Berg }
5088c5f47b1SJohannes Berg 
509c4ace426SGil Adam #ifdef CONFIG_ACPI
510c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
511c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
512c4ace426SGil Adam {
513c4ace426SGil Adam 	/*
514c4ace426SGil Adam 	 * TODO: read specific phy config from BIOS
515c4ace426SGil Adam 	 * ACPI table for this feature has not been defined yet,
516c4ace426SGil Adam 	 * so for now we use hardcoded values.
517c4ace426SGil Adam 	 */
518c4ace426SGil Adam 
519c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
520c4ace426SGil Adam 		phy_filters->filter_cfg_chain_a =
521c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
522c4ace426SGil Adam 	}
523c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
524c4ace426SGil Adam 		phy_filters->filter_cfg_chain_b =
525c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
526c4ace426SGil Adam 	}
527c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
528c4ace426SGil Adam 		phy_filters->filter_cfg_chain_c =
529c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
530c4ace426SGil Adam 	}
531c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
532c4ace426SGil Adam 		phy_filters->filter_cfg_chain_d =
533c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
534c4ace426SGil Adam 	}
535c4ace426SGil Adam }
536c4ace426SGil Adam 
537c4ace426SGil Adam #else /* CONFIG_ACPI */
538c4ace426SGil Adam 
539c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
540c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
541c4ace426SGil Adam {
542c4ace426SGil Adam }
543c4ace426SGil Adam #endif /* CONFIG_ACPI */
544c4ace426SGil Adam 
545e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
546e705c121SKalle Valo {
547c4ace426SGil Adam 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
548702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
549c4ace426SGil Adam 	struct iwl_phy_specific_cfg phy_filters = {};
550c4ace426SGil Adam 	u8 cmd_ver;
551c4ace426SGil Adam 	size_t cmd_size;
552e705c121SKalle Valo 
553bb99ff9bSLuca Coelho 	if (iwl_mvm_has_unified_ucode(mvm) &&
554d923b020SLuca Coelho 	    !mvm->trans->cfg->tx_with_siso_diversity)
555bb99ff9bSLuca Coelho 		return 0;
556d923b020SLuca Coelho 
557d923b020SLuca Coelho 	if (mvm->trans->cfg->tx_with_siso_diversity) {
558bb99ff9bSLuca Coelho 		/*
559bb99ff9bSLuca Coelho 		 * TODO: currently we don't set the antenna but letting the NIC
560bb99ff9bSLuca Coelho 		 * to decide which antenna to use. This should come from BIOS.
561bb99ff9bSLuca Coelho 		 */
562bb99ff9bSLuca Coelho 		phy_cfg_cmd.phy_cfg =
563bb99ff9bSLuca Coelho 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
564bb99ff9bSLuca Coelho 	}
565bb99ff9bSLuca Coelho 
566e705c121SKalle Valo 	/* Set parameters */
567e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
56886a2b204SLuca Coelho 
56986a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
5707897dfa2SLuca Coelho 	phy_cfg_cmd.phy_cfg |=
5717897dfa2SLuca Coelho 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
57286a2b204SLuca Coelho 
573e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
574e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
575e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
576e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
577e705c121SKalle Valo 
578c4ace426SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
579e80bfd11SMordechay Goodstein 					PHY_CONFIGURATION_CMD,
580e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
581c4ace426SGil Adam 	if (cmd_ver == 3) {
582c4ace426SGil Adam 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
583c4ace426SGil Adam 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
584c4ace426SGil Adam 		       sizeof(struct iwl_phy_specific_cfg));
585c4ace426SGil Adam 	}
586c4ace426SGil Adam 
587e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
588e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
589c4ace426SGil Adam 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
590c4ace426SGil Adam 				    sizeof(struct iwl_phy_cfg_cmd_v1);
591e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
592c4ace426SGil Adam 				    cmd_size, &phy_cfg_cmd);
593e705c121SKalle Valo }
594e705c121SKalle Valo 
5953b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
596e705c121SKalle Valo {
597e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
598e705c121SKalle Valo 	static const u16 init_complete[] = {
599e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
600e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
601e705c121SKalle Valo 	};
602e705c121SKalle Valo 	int ret;
603e705c121SKalle Valo 
6047d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
60552b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
6068c5f47b1SJohannes Berg 
607e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
608e705c121SKalle Valo 
60994022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
610e705c121SKalle Valo 
611e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
612e705c121SKalle Valo 				   &calib_wait,
613e705c121SKalle Valo 				   init_complete,
614e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
615e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
616e705c121SKalle Valo 				   mvm->phy_db);
617e705c121SKalle Valo 
618e705c121SKalle Valo 	/* Will also start the device */
619e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
620e705c121SKalle Valo 	if (ret) {
621e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
62200e0c6c8SLuca Coelho 		goto remove_notif;
623e705c121SKalle Valo 	}
624e705c121SKalle Valo 
6257d34a7d7SLuca Coelho 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
626b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
627e705c121SKalle Valo 		if (ret)
62800e0c6c8SLuca Coelho 			goto remove_notif;
629b3de3ef4SEmmanuel Grumbach 	}
630e705c121SKalle Valo 
631e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
6323b25f1afSEmmanuel Grumbach 	if (!mvm->nvm_data) {
6335bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
634e705c121SKalle Valo 		if (ret) {
635e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
63600e0c6c8SLuca Coelho 			goto remove_notif;
637e705c121SKalle Valo 		}
638e705c121SKalle Valo 	}
639e705c121SKalle Valo 
640e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
641e705c121SKalle Valo 	if (mvm->nvm_file_name)
642e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
643e705c121SKalle Valo 
64464866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
64564866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
64664866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
647e705c121SKalle Valo 
648e705c121SKalle Valo 	/*
649e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
650e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
651e705c121SKalle Valo 	 */
652e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
653e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
654e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
65500e0c6c8SLuca Coelho 		goto remove_notif;
656e705c121SKalle Valo 	}
657e705c121SKalle Valo 
658b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
659e705c121SKalle Valo 
660e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
661e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
662e705c121SKalle Valo 	if (ret)
66300e0c6c8SLuca Coelho 		goto remove_notif;
664e705c121SKalle Valo 
665e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
666e705c121SKalle Valo 	if (ret) {
667e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
668e705c121SKalle Valo 			ret);
66900e0c6c8SLuca Coelho 		goto remove_notif;
670e705c121SKalle Valo 	}
671e705c121SKalle Valo 
672e705c121SKalle Valo 	/*
673e705c121SKalle Valo 	 * Some things may run in the background now, but we
674e705c121SKalle Valo 	 * just wait for the calibration complete notification.
675e705c121SKalle Valo 	 */
676e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
677e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
67800e0c6c8SLuca Coelho 	if (!ret)
679e705c121SKalle Valo 		goto out;
680e705c121SKalle Valo 
68100e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
68200e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
68300e0c6c8SLuca Coelho 		ret = 0;
68400e0c6c8SLuca Coelho 	} else {
68500e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
68600e0c6c8SLuca Coelho 			ret);
68700e0c6c8SLuca Coelho 	}
68800e0c6c8SLuca Coelho 
68900e0c6c8SLuca Coelho 	goto out;
69000e0c6c8SLuca Coelho 
69100e0c6c8SLuca Coelho remove_notif:
692e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
693e705c121SKalle Valo out:
694b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
695e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
696e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
697e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
698e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
699e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
700e705c121SKalle Valo 					GFP_KERNEL);
701e705c121SKalle Valo 		if (!mvm->nvm_data)
702e705c121SKalle Valo 			return -ENOMEM;
703e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
704e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
705e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
706e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
707e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
708e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
709e705c121SKalle Valo 	}
710e705c121SKalle Valo 
711e705c121SKalle Valo 	return ret;
712e705c121SKalle Valo }
713e705c121SKalle Valo 
714e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
715e705c121SKalle Valo {
716e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
717e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
718e705c121SKalle Valo 	};
719e705c121SKalle Valo 
720e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
721e705c121SKalle Valo 		return 0;
722e705c121SKalle Valo 
723e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
724e705c121SKalle Valo 				    sizeof(cmd), &cmd);
725e705c121SKalle Valo }
726e705c121SKalle Valo 
727c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
72842ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
729da2830acSLuca Coelho {
730216cdfb5SLuca Coelho 	struct iwl_dev_tx_power_cmd cmd = {
731216cdfb5SLuca Coelho 		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
73271e9378bSLuca Coelho 	};
7339c08cef8SLuca Coelho 	__le16 *per_chain;
7341edd56e6SLuca Coelho 	int ret;
73539c1a972SIhab Zhaika 	u16 len = 0;
736fbb7957dSLuca Coelho 	u32 n_subbands;
737fbb7957dSLuca Coelho 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
738e80bfd11SMordechay Goodstein 					   REDUCE_TX_POWER_CMD,
739e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
74042ce76d6SLuca Coelho 
741fbb7957dSLuca Coelho 	if (cmd_ver == 6) {
742fbb7957dSLuca Coelho 		len = sizeof(cmd.v6);
743fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS_V2;
744fbb7957dSLuca Coelho 		per_chain = cmd.v6.per_chain[0][0];
745fbb7957dSLuca Coelho 	} else if (fw_has_api(&mvm->fw->ucode_capa,
7469c08cef8SLuca Coelho 			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
7470791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
748fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7499c08cef8SLuca Coelho 		per_chain = cmd.v5.per_chain[0][0];
7509c08cef8SLuca Coelho 	} else if (fw_has_capa(&mvm->fw->ucode_capa,
7519c08cef8SLuca Coelho 			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
752216cdfb5SLuca Coelho 		len = sizeof(cmd.v4);
753fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7549c08cef8SLuca Coelho 		per_chain = cmd.v4.per_chain[0][0];
7559c08cef8SLuca Coelho 	} else {
756216cdfb5SLuca Coelho 		len = sizeof(cmd.v3);
757fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7589c08cef8SLuca Coelho 		per_chain = cmd.v3.per_chain[0][0];
7599c08cef8SLuca Coelho 	}
76055bfa4b9SLuca Coelho 
761216cdfb5SLuca Coelho 	/* all structs have the same common part, add it */
762216cdfb5SLuca Coelho 	len += sizeof(cmd.common);
76342ce76d6SLuca Coelho 
7649c08cef8SLuca Coelho 	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, ACPI_SAR_NUM_TABLES,
765fbb7957dSLuca Coelho 				     n_subbands, prof_a, prof_b);
7661edd56e6SLuca Coelho 
7671edd56e6SLuca Coelho 	/* return on error or if the profile is disabled (positive number) */
7681edd56e6SLuca Coelho 	if (ret)
7691edd56e6SLuca Coelho 		return ret;
7701edd56e6SLuca Coelho 
77142ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
77242ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
77342ce76d6SLuca Coelho }
77442ce76d6SLuca Coelho 
7757fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
7767fe90e0eSHaim Dreyfuss {
777dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
778f604324eSLuca Coelho 	struct iwl_geo_tx_power_profiles_resp *resp;
7790c3d7282SHaim Dreyfuss 	u16 len;
78039c1a972SIhab Zhaika 	int ret;
7810c3d7282SHaim Dreyfuss 	struct iwl_host_cmd cmd;
782e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
783e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
784e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
7857fe90e0eSHaim Dreyfuss 
786dd2a1256SLuca Coelho 	/* the ops field is at the same spot for all versions, so set in v1 */
787dd2a1256SLuca Coelho 	geo_tx_cmd.v1.ops =
788dd2a1256SLuca Coelho 		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
789dd2a1256SLuca Coelho 
7900ea788edSLuca Coelho 	if (cmd_ver == 3)
7910ea788edSLuca Coelho 		len = sizeof(geo_tx_cmd.v3);
7920ea788edSLuca Coelho 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
793dd2a1256SLuca Coelho 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
794dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v2);
795dd2a1256SLuca Coelho 	else
796dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v1);
7970c3d7282SHaim Dreyfuss 
79839c1a972SIhab Zhaika 	if (!iwl_sar_geo_support(&mvm->fwrt))
79939c1a972SIhab Zhaika 		return -EOPNOTSUPP;
80039c1a972SIhab Zhaika 
8010c3d7282SHaim Dreyfuss 	cmd = (struct iwl_host_cmd){
8027fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
8030c3d7282SHaim Dreyfuss 		.len = { len, },
8047fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
80539c1a972SIhab Zhaika 		.data = { &geo_tx_cmd },
8067fe90e0eSHaim Dreyfuss 	};
8077fe90e0eSHaim Dreyfuss 
8087fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8097fe90e0eSHaim Dreyfuss 	if (ret) {
8107fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8117fe90e0eSHaim Dreyfuss 		return ret;
8127fe90e0eSHaim Dreyfuss 	}
813f604324eSLuca Coelho 
814f604324eSLuca Coelho 	resp = (void *)cmd.resp_pkt->data;
815f604324eSLuca Coelho 	ret = le32_to_cpu(resp->profile_idx);
816f604324eSLuca Coelho 
817f604324eSLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES))
818f604324eSLuca Coelho 		ret = -EIO;
819f604324eSLuca Coelho 
8207fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8217fe90e0eSHaim Dreyfuss 	return ret;
8227fe90e0eSHaim Dreyfuss }
8237fe90e0eSHaim Dreyfuss 
824a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
825a6bff3cbSHaim Dreyfuss {
826dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd cmd;
82739c1a972SIhab Zhaika 	u16 len;
82845acebf8SNaftali Goldstein 	u32 n_bands;
8290433ae55SGolan Ben Ami 	int ret;
830e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
831e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
832e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
833a6bff3cbSHaim Dreyfuss 
83445acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
83545acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
83645acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
83745acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops));
83845acebf8SNaftali Goldstein 	/* the ops field is at the same spot for all versions, so set in v1 */
83945acebf8SNaftali Goldstein 	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
84045acebf8SNaftali Goldstein 
84145acebf8SNaftali Goldstein 	if (cmd_ver == 3) {
84245acebf8SNaftali Goldstein 		len = sizeof(cmd.v3);
84345acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
84445acebf8SNaftali Goldstein 		cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
84545acebf8SNaftali Goldstein 	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
84645acebf8SNaftali Goldstein 			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
84745acebf8SNaftali Goldstein 		len = sizeof(cmd.v2);
84845acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
84945acebf8SNaftali Goldstein 		cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
85045acebf8SNaftali Goldstein 	} else {
85145acebf8SNaftali Goldstein 		len = sizeof(cmd.v1);
85245acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
85345acebf8SNaftali Goldstein 	}
85445acebf8SNaftali Goldstein 
85545acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
85645acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
85745acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
85845acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table));
85945acebf8SNaftali Goldstein 	/* the table is at the same position for all versions, so set use v1 */
86045acebf8SNaftali Goldstein 	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], n_bands);
861eca1e56cSEmmanuel Grumbach 
8620433ae55SGolan Ben Ami 	/*
8630433ae55SGolan Ben Ami 	 * It is a valid scenario to not support SAR, or miss wgds table,
8640433ae55SGolan Ben Ami 	 * but in that case there is no need to send the command.
8650433ae55SGolan Ben Ami 	 */
8660433ae55SGolan Ben Ami 	if (ret)
8670433ae55SGolan Ben Ami 		return 0;
868a6bff3cbSHaim Dreyfuss 
869dd2a1256SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm,
870dd2a1256SLuca Coelho 				    WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
871dd2a1256SLuca Coelho 				    0, len, &cmd);
872a6bff3cbSHaim Dreyfuss }
873a6bff3cbSHaim Dreyfuss 
8746ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
8756ce1e5c0SGil Adam {
8766ce1e5c0SGil Adam 	union acpi_object *wifi_pkg, *data, *enabled;
877f2134f66SGil Adam 	union iwl_ppag_table_cmd ppag_table;
878f2134f66SGil Adam 	int i, j, ret, tbl_rev, num_sub_bands;
8796ce1e5c0SGil Adam 	int idx = 2;
880f2134f66SGil Adam 	s8 *gain;
8816ce1e5c0SGil Adam 
882f2134f66SGil Adam 	/*
883f2134f66SGil Adam 	 * The 'enabled' field is the same in v1 and v2 so we can just
884f2134f66SGil Adam 	 * use v1 to access it.
885f2134f66SGil Adam 	 */
886f2134f66SGil Adam 	mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0);
8876ce1e5c0SGil Adam 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
8886ce1e5c0SGil Adam 	if (IS_ERR(data))
8896ce1e5c0SGil Adam 		return PTR_ERR(data);
8906ce1e5c0SGil Adam 
891f2134f66SGil Adam 	/* try to read ppag table revision 1 */
8926ce1e5c0SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
893f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
894f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
895f2134f66SGil Adam 		if (tbl_rev != 1) {
896f2134f66SGil Adam 			ret = -EINVAL;
8976ce1e5c0SGil Adam 			goto out_free;
8986ce1e5c0SGil Adam 		}
899f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
900f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
901f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 2;
902f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v2 (tbl_rev=1)\n");
903f2134f66SGil Adam 		goto read_table;
904f2134f66SGil Adam 	}
9056ce1e5c0SGil Adam 
906f2134f66SGil Adam 	/* try to read ppag table revision 0 */
907f2134f66SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
908f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
909f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
9103ed83da3SLuca Coelho 		if (tbl_rev != 0) {
9113ed83da3SLuca Coelho 			ret = -EINVAL;
9123ed83da3SLuca Coelho 			goto out_free;
9133ed83da3SLuca Coelho 		}
914f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
915f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
916f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 1;
917f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
918f2134f66SGil Adam 		goto read_table;
919f2134f66SGil Adam 	}
920f2134f66SGil Adam 	ret = PTR_ERR(wifi_pkg);
921f2134f66SGil Adam 	goto out_free;
9223ed83da3SLuca Coelho 
923f2134f66SGil Adam read_table:
9246ce1e5c0SGil Adam 	enabled = &wifi_pkg->package.elements[1];
9256ce1e5c0SGil Adam 	if (enabled->type != ACPI_TYPE_INTEGER ||
9266ce1e5c0SGil Adam 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
9276ce1e5c0SGil Adam 		ret = -EINVAL;
9286ce1e5c0SGil Adam 		goto out_free;
9296ce1e5c0SGil Adam 	}
9306ce1e5c0SGil Adam 
931f2134f66SGil Adam 	ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value);
932f2134f66SGil Adam 	if (!ppag_table.v1.enabled) {
9336ce1e5c0SGil Adam 		ret = 0;
9346ce1e5c0SGil Adam 		goto out_free;
9356ce1e5c0SGil Adam 	}
9366ce1e5c0SGil Adam 
9376ce1e5c0SGil Adam 	/*
9386ce1e5c0SGil Adam 	 * read, verify gain values and save them into the PPAG table.
9396ce1e5c0SGil Adam 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
9406ce1e5c0SGil Adam 	 * following sub-bands to High-Band (5GHz).
9416ce1e5c0SGil Adam 	 */
942f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
943f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
9446ce1e5c0SGil Adam 			union acpi_object *ent;
9456ce1e5c0SGil Adam 
9466ce1e5c0SGil Adam 			ent = &wifi_pkg->package.elements[idx++];
9476ce1e5c0SGil Adam 			if (ent->type != ACPI_TYPE_INTEGER ||
9486ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
9496ce1e5c0SGil Adam 			    (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
9506ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
9516ce1e5c0SGil Adam 			    (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
952f2134f66SGil Adam 				ppag_table.v1.enabled = cpu_to_le32(0);
9536ce1e5c0SGil Adam 				ret = -EINVAL;
9546ce1e5c0SGil Adam 				goto out_free;
9556ce1e5c0SGil Adam 			}
956f2134f66SGil Adam 			gain[i * num_sub_bands + j] = ent->integer.value;
9576ce1e5c0SGil Adam 		}
9586ce1e5c0SGil Adam 	}
9596ce1e5c0SGil Adam 	ret = 0;
9606ce1e5c0SGil Adam out_free:
9616ce1e5c0SGil Adam 	kfree(data);
9626ce1e5c0SGil Adam 	return ret;
9636ce1e5c0SGil Adam }
9646ce1e5c0SGil Adam 
9656ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
9666ce1e5c0SGil Adam {
967f2134f66SGil Adam 	u8 cmd_ver;
968f2134f66SGil Adam 	int i, j, ret, num_sub_bands, cmd_size;
969f2134f66SGil Adam 	union iwl_ppag_table_cmd ppag_table;
970f2134f66SGil Adam 	s8 *gain;
9716ce1e5c0SGil Adam 
9726ce1e5c0SGil Adam 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
9736ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
9746ce1e5c0SGil Adam 				"PPAG capability not supported by FW, command not sent.\n");
9756ce1e5c0SGil Adam 		return 0;
9766ce1e5c0SGil Adam 	}
977f2134f66SGil Adam 	if (!mvm->fwrt.ppag_table.v1.enabled) {
978f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
979160bab43SGil Adam 		return 0;
980160bab43SGil Adam 	}
981160bab43SGil Adam 
982f2134f66SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
983e80bfd11SMordechay Goodstein 					PER_PLATFORM_ANT_GAIN_CMD,
984e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
985f2134f66SGil Adam 	if (cmd_ver == 1) {
986f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
987f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
988f2134f66SGil Adam 		cmd_size = sizeof(ppag_table.v1);
989f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 2) {
990f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
991f2134f66SGil Adam 					"PPAG table is v2 but FW supports v1, sending truncated table\n");
992f2134f66SGil Adam 		}
993f2134f66SGil Adam 	} else if (cmd_ver == 2) {
994f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
995f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
996f2134f66SGil Adam 		cmd_size = sizeof(ppag_table.v2);
997f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 1) {
998f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
999f2134f66SGil Adam 					"PPAG table is v1 but FW supports v2, sending padded table\n");
1000f2134f66SGil Adam 		}
1001f2134f66SGil Adam 	} else {
1002f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1003f2134f66SGil Adam 		return 0;
1004f2134f66SGil Adam 	}
10056ce1e5c0SGil Adam 
1006f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1007f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
10086ce1e5c0SGil Adam 			IWL_DEBUG_RADIO(mvm,
10096ce1e5c0SGil Adam 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
1010f2134f66SGil Adam 					i, j, gain[i * num_sub_bands + j]);
10116ce1e5c0SGil Adam 		}
10126ce1e5c0SGil Adam 	}
1013f2134f66SGil Adam 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
10146ce1e5c0SGil Adam 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
10156ce1e5c0SGil Adam 						PER_PLATFORM_ANT_GAIN_CMD),
1016f2134f66SGil Adam 				   0, cmd_size, &ppag_table);
10176ce1e5c0SGil Adam 	if (ret < 0)
10186ce1e5c0SGil Adam 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
10196ce1e5c0SGil Adam 			ret);
10206ce1e5c0SGil Adam 
10216ce1e5c0SGil Adam 	return ret;
10226ce1e5c0SGil Adam }
10236ce1e5c0SGil Adam 
10246ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
10256ce1e5c0SGil Adam {
10266ce1e5c0SGil Adam 	int ret;
10276ce1e5c0SGil Adam 
10286ce1e5c0SGil Adam 	ret = iwl_mvm_get_ppag_table(mvm);
10296ce1e5c0SGil Adam 	if (ret < 0) {
10306ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10316ce1e5c0SGil Adam 				"PPAG BIOS table invalid or unavailable. (%d)\n",
10326ce1e5c0SGil Adam 				ret);
10336ce1e5c0SGil Adam 		return 0;
10346ce1e5c0SGil Adam 	}
10356ce1e5c0SGil Adam 	return iwl_mvm_ppag_send_cmd(mvm);
10366ce1e5c0SGil Adam }
10376ce1e5c0SGil Adam 
103828dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
103928dd7ccdSMordechay Goodstein {
104028dd7ccdSMordechay Goodstein 	int ret;
104128dd7ccdSMordechay Goodstein 	struct iwl_tas_config_cmd cmd = {};
104228dd7ccdSMordechay Goodstein 	int list_size;
104328dd7ccdSMordechay Goodstein 
1044cdaba917SEmmanuel Grumbach 	BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) <
104528dd7ccdSMordechay Goodstein 		     APCI_WTAS_BLACK_LIST_MAX);
104628dd7ccdSMordechay Goodstein 
104728dd7ccdSMordechay Goodstein 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
104828dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
104928dd7ccdSMordechay Goodstein 		return;
105028dd7ccdSMordechay Goodstein 	}
105128dd7ccdSMordechay Goodstein 
1052cdaba917SEmmanuel Grumbach 	ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size);
105328dd7ccdSMordechay Goodstein 	if (ret < 0) {
105428dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm,
105528dd7ccdSMordechay Goodstein 				"TAS table invalid or unavailable. (%d)\n",
105628dd7ccdSMordechay Goodstein 				ret);
105728dd7ccdSMordechay Goodstein 		return;
105828dd7ccdSMordechay Goodstein 	}
105928dd7ccdSMordechay Goodstein 
106028dd7ccdSMordechay Goodstein 	if (list_size < 0)
106128dd7ccdSMordechay Goodstein 		return;
106228dd7ccdSMordechay Goodstein 
106328dd7ccdSMordechay Goodstein 	/* list size if TAS enabled can only be non-negative */
1064cdaba917SEmmanuel Grumbach 	cmd.block_list_size = cpu_to_le32((u32)list_size);
106528dd7ccdSMordechay Goodstein 
106628dd7ccdSMordechay Goodstein 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
106728dd7ccdSMordechay Goodstein 						TAS_CONFIG),
106828dd7ccdSMordechay Goodstein 				   0, sizeof(cmd), &cmd);
106928dd7ccdSMordechay Goodstein 	if (ret < 0)
107028dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
107128dd7ccdSMordechay Goodstein }
1072f5b1cb2eSGil Adam 
107302d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_indonesia_5g2(struct iwl_mvm *mvm)
1074f5b1cb2eSGil Adam {
1075f5b1cb2eSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
1076f5b1cb2eSGil Adam 				      DSM_FUNC_ENABLE_INDONESIA_5G2);
1077f5b1cb2eSGil Adam 
107802d31e9bSGil Adam 	if (ret < 0)
1079f5b1cb2eSGil Adam 		IWL_DEBUG_RADIO(mvm,
108002d31e9bSGil Adam 				"Failed to evaluate DSM function ENABLE_INDONESIA_5G2, ret=%d\n",
1081f5b1cb2eSGil Adam 				ret);
1082f5b1cb2eSGil Adam 
108302d31e9bSGil Adam 	else if (ret >= DSM_VALUE_INDONESIA_MAX)
108402d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
108502d31e9bSGil Adam 				"DSM function ENABLE_INDONESIA_5G2 return invalid value, ret=%d\n",
108602d31e9bSGil Adam 				ret);
108702d31e9bSGil Adam 
108802d31e9bSGil Adam 	else if (ret == DSM_VALUE_INDONESIA_ENABLE) {
108902d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
109002d31e9bSGil Adam 				"Evaluated DSM function ENABLE_INDONESIA_5G2: Enabling 5g2\n");
109102d31e9bSGil Adam 		return DSM_VALUE_INDONESIA_ENABLE;
109202d31e9bSGil Adam 	}
109302d31e9bSGil Adam 	/* default behaviour is disabled */
109402d31e9bSGil Adam 	return DSM_VALUE_INDONESIA_DISABLE;
109502d31e9bSGil Adam }
109602d31e9bSGil Adam 
109702d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_disable_srd(struct iwl_mvm *mvm)
109802d31e9bSGil Adam {
109902d31e9bSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
110002d31e9bSGil Adam 				      DSM_FUNC_DISABLE_SRD);
110102d31e9bSGil Adam 
110202d31e9bSGil Adam 	if (ret < 0)
110302d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
110402d31e9bSGil Adam 				"Failed to evaluate DSM function DISABLE_SRD, ret=%d\n",
110502d31e9bSGil Adam 				ret);
110602d31e9bSGil Adam 
110702d31e9bSGil Adam 	else if (ret >= DSM_VALUE_SRD_MAX)
110802d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
110902d31e9bSGil Adam 				"DSM function DISABLE_SRD return invalid value, ret=%d\n",
111002d31e9bSGil Adam 				ret);
111102d31e9bSGil Adam 
111202d31e9bSGil Adam 	else if (ret == DSM_VALUE_SRD_PASSIVE) {
111302d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
111402d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: setting SRD to passive\n");
111502d31e9bSGil Adam 		return DSM_VALUE_SRD_PASSIVE;
111602d31e9bSGil Adam 
111702d31e9bSGil Adam 	} else if (ret == DSM_VALUE_SRD_DISABLE) {
111802d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
111902d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: disabling SRD\n");
112002d31e9bSGil Adam 		return DSM_VALUE_SRD_DISABLE;
112102d31e9bSGil Adam 	}
112202d31e9bSGil Adam 	/* default behaviour is active */
112302d31e9bSGil Adam 	return DSM_VALUE_SRD_ACTIVE;
1124f5b1cb2eSGil Adam }
1125f5b1cb2eSGil Adam 
1126f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1127f5b1cb2eSGil Adam {
112802d31e9bSGil Adam 	u8 ret;
112902d31e9bSGil Adam 	int cmd_ret;
1130f5b1cb2eSGil Adam 	struct iwl_lari_config_change_cmd cmd = {};
1131f5b1cb2eSGil Adam 
113202d31e9bSGil Adam 	if (iwl_mvm_eval_dsm_indonesia_5g2(mvm) == DSM_VALUE_INDONESIA_ENABLE)
1133f5b1cb2eSGil Adam 		cmd.config_bitmap |=
1134f5b1cb2eSGil Adam 			cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1135f5b1cb2eSGil Adam 
113602d31e9bSGil Adam 	ret = iwl_mvm_eval_dsm_disable_srd(mvm);
113702d31e9bSGil Adam 	if (ret == DSM_VALUE_SRD_PASSIVE)
113802d31e9bSGil Adam 		cmd.config_bitmap |=
113902d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
114002d31e9bSGil Adam 
114102d31e9bSGil Adam 	else if (ret == DSM_VALUE_SRD_DISABLE)
114202d31e9bSGil Adam 		cmd.config_bitmap |=
114302d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
114402d31e9bSGil Adam 
1145f5b1cb2eSGil Adam 	/* apply more config masks here */
1146f5b1cb2eSGil Adam 
1147f5b1cb2eSGil Adam 	if (cmd.config_bitmap) {
114802d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm, "sending LARI_CONFIG_CHANGE\n");
114902d31e9bSGil Adam 		cmd_ret = iwl_mvm_send_cmd_pdu(mvm,
1150f5b1cb2eSGil Adam 					       WIDE_ID(REGULATORY_AND_NVM_GROUP,
1151f5b1cb2eSGil Adam 						       LARI_CONFIG_CHANGE),
1152f5b1cb2eSGil Adam 					       0, sizeof(cmd), &cmd);
115302d31e9bSGil Adam 		if (cmd_ret < 0)
1154f5b1cb2eSGil Adam 			IWL_DEBUG_RADIO(mvm,
1155f5b1cb2eSGil Adam 					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
115602d31e9bSGil Adam 					cmd_ret);
1157f5b1cb2eSGil Adam 	}
1158f5b1cb2eSGil Adam }
115969964905SLuca Coelho #else /* CONFIG_ACPI */
116039c1a972SIhab Zhaika 
116139c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
116239c1a972SIhab Zhaika 				      int prof_a, int prof_b)
116369964905SLuca Coelho {
116469964905SLuca Coelho 	return -ENOENT;
116569964905SLuca Coelho }
116669964905SLuca Coelho 
116739c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
11685d041c46SLuca Coelho {
11695d041c46SLuca Coelho 	return -ENOENT;
11705d041c46SLuca Coelho }
11715d041c46SLuca Coelho 
1172a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1173a6bff3cbSHaim Dreyfuss {
1174a6bff3cbSHaim Dreyfuss 	return 0;
1175a6bff3cbSHaim Dreyfuss }
117618f1755dSLuca Coelho 
11776ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
11786ce1e5c0SGil Adam {
11796ce1e5c0SGil Adam 	return -ENOENT;
11806ce1e5c0SGil Adam }
11816ce1e5c0SGil Adam 
11826ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
11836ce1e5c0SGil Adam {
11847937fd32SJohannes Berg 	return 0;
11856ce1e5c0SGil Adam }
118628dd7ccdSMordechay Goodstein 
118728dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
118828dd7ccdSMordechay Goodstein {
118928dd7ccdSMordechay Goodstein }
1190f5b1cb2eSGil Adam 
1191f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1192f5b1cb2eSGil Adam {
1193f5b1cb2eSGil Adam }
119469964905SLuca Coelho #endif /* CONFIG_ACPI */
119569964905SLuca Coelho 
1196f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1197f130bb75SMordechay Goodstein {
1198f130bb75SMordechay Goodstein 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1199f130bb75SMordechay Goodstein 	int ret;
1200f130bb75SMordechay Goodstein 	u32 resp;
1201f130bb75SMordechay Goodstein 
1202f130bb75SMordechay Goodstein 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1203f130bb75SMordechay Goodstein 		.flags = cpu_to_le32(flags),
1204f130bb75SMordechay Goodstein 		.buf_size = 0,
1205f130bb75SMordechay Goodstein 	};
1206f130bb75SMordechay Goodstein 	struct iwl_host_cmd host_cmd = {
1207f130bb75SMordechay Goodstein 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1208f130bb75SMordechay Goodstein 		.flags = CMD_WANT_SKB,
1209f130bb75SMordechay Goodstein 		.data = {&recovery_cmd, },
1210f130bb75SMordechay Goodstein 		.len = {sizeof(recovery_cmd), },
1211f130bb75SMordechay Goodstein 	};
1212f130bb75SMordechay Goodstein 
1213f130bb75SMordechay Goodstein 	/* no error log was defined in TLV */
1214f130bb75SMordechay Goodstein 	if (!error_log_size)
1215f130bb75SMordechay Goodstein 		return;
1216f130bb75SMordechay Goodstein 
1217f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1218f130bb75SMordechay Goodstein 		/* no buf was allocated while HW reset */
1219f130bb75SMordechay Goodstein 		if (!mvm->error_recovery_buf)
1220f130bb75SMordechay Goodstein 			return;
1221f130bb75SMordechay Goodstein 
1222f130bb75SMordechay Goodstein 		host_cmd.data[1] = mvm->error_recovery_buf;
1223f130bb75SMordechay Goodstein 		host_cmd.len[1] =  error_log_size;
1224f130bb75SMordechay Goodstein 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1225f130bb75SMordechay Goodstein 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1226f130bb75SMordechay Goodstein 	}
1227f130bb75SMordechay Goodstein 
1228f130bb75SMordechay Goodstein 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1229f130bb75SMordechay Goodstein 	kfree(mvm->error_recovery_buf);
1230f130bb75SMordechay Goodstein 	mvm->error_recovery_buf = NULL;
1231f130bb75SMordechay Goodstein 
1232f130bb75SMordechay Goodstein 	if (ret) {
1233f130bb75SMordechay Goodstein 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1234f130bb75SMordechay Goodstein 		return;
1235f130bb75SMordechay Goodstein 	}
1236f130bb75SMordechay Goodstein 
1237f130bb75SMordechay Goodstein 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1238f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1239f130bb75SMordechay Goodstein 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1240f130bb75SMordechay Goodstein 		if (resp)
1241f130bb75SMordechay Goodstein 			IWL_ERR(mvm,
1242f130bb75SMordechay Goodstein 				"Failed to send recovery cmd blob was invalid %d\n",
1243f130bb75SMordechay Goodstein 				resp);
1244f130bb75SMordechay Goodstein 	}
1245f130bb75SMordechay Goodstein }
1246f130bb75SMordechay Goodstein 
124742ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
124842ce76d6SLuca Coelho {
124942ce76d6SLuca Coelho 	int ret;
125042ce76d6SLuca Coelho 
125139c1a972SIhab Zhaika 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1252da2830acSLuca Coelho 	if (ret < 0) {
1253da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
125469964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1255da2830acSLuca Coelho 				ret);
12565d041c46SLuca Coelho 		/*
12575d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
12585d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
12595d041c46SLuca Coelho 		 */
12605d041c46SLuca Coelho 		return 1;
1261da2830acSLuca Coelho 	}
1262da2830acSLuca Coelho 
126339c1a972SIhab Zhaika 	ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
126469964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
126569964905SLuca Coelho 	if (ret < 0)
126669964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
126769964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
126869964905SLuca Coelho 				ret);
126969964905SLuca Coelho 
12701edd56e6SLuca Coelho 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1271da2830acSLuca Coelho }
1272da2830acSLuca Coelho 
12731f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
12741f370650SSara Sharon {
12751f370650SSara Sharon 	int ret;
12761f370650SSara Sharon 
12777d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
127852b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
12791f370650SSara Sharon 
12803b25f1afSEmmanuel Grumbach 	WARN_ON(!mvm->nvm_data);
12813b25f1afSEmmanuel Grumbach 	ret = iwl_run_init_mvm_ucode(mvm);
12821f370650SSara Sharon 
12831f370650SSara Sharon 	if (ret) {
12841f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1285f4744258SLiad Kaufman 
1286f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1287f4744258SLiad Kaufman 			return 0;
12881f370650SSara Sharon 		return ret;
12891f370650SSara Sharon 	}
12901f370650SSara Sharon 
1291203c83d3SShahar S Matityahu 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1292bab3cb92SEmmanuel Grumbach 	iwl_trans_stop_device(mvm->trans);
1293bab3cb92SEmmanuel Grumbach 	ret = iwl_trans_start_hw(mvm->trans);
12941f370650SSara Sharon 	if (ret)
12951f370650SSara Sharon 		return ret;
12961f370650SSara Sharon 
1297b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
1298da2eb669SSara Sharon 
129994022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
13001f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
13011f370650SSara Sharon 	if (ret)
13021f370650SSara Sharon 		return ret;
13031f370650SSara Sharon 
130494022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
130594022562SEmmanuel Grumbach 
1306b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1307b108d8c7SShahar S Matityahu 			       NULL);
1308da2eb669SSara Sharon 
1309702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
13101f370650SSara Sharon }
13111f370650SSara Sharon 
1312e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1313e705c121SKalle Valo {
1314e705c121SKalle Valo 	int ret, i;
1315e705c121SKalle Valo 	struct ieee80211_channel *chan;
1316e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1317dd36a507STova Mussai 	struct ieee80211_supported_band *sband = NULL;
1318e705c121SKalle Valo 
1319e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1320e705c121SKalle Valo 
1321e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1322e705c121SKalle Valo 	if (ret)
1323e705c121SKalle Valo 		return ret;
1324e705c121SKalle Valo 
13251f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1326e705c121SKalle Valo 	if (ret) {
1327e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
132872d3c7bbSJohannes Berg 		if (ret != -ERFKILL)
132972d3c7bbSJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
133072d3c7bbSJohannes Berg 						 FW_DBG_TRIGGER_DRIVER);
1331e705c121SKalle Valo 		goto error;
1332e705c121SKalle Valo 	}
1333e705c121SKalle Valo 
1334d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1335e705c121SKalle Valo 
1336e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1337e705c121SKalle Valo 	if (ret)
1338e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1339e705c121SKalle Valo 
1340a1af4c48SShahar S Matityahu 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
13417174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1342e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
134317b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
13447174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
13457174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
13467a14c23dSSara Sharon 	}
1347e705c121SKalle Valo 
1348e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1349e705c121SKalle Valo 	if (ret)
1350e705c121SKalle Valo 		goto error;
1351e705c121SKalle Valo 
13527d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1353e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1354e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1355e705c121SKalle Valo 		if (ret)
1356e705c121SKalle Valo 			goto error;
1357bb99ff9bSLuca Coelho 	}
1358e705c121SKalle Valo 
1359e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1360e705c121SKalle Valo 	if (ret)
1361e705c121SKalle Valo 		goto error;
1362e705c121SKalle Valo 
1363b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1364b3de3ef4SEmmanuel Grumbach 	if (ret)
1365b3de3ef4SEmmanuel Grumbach 		goto error;
1366b3de3ef4SEmmanuel Grumbach 
1367cceb4507SShahar S Matityahu 	if (fw_has_capa(&mvm->fw->ucode_capa,
1368cceb4507SShahar S Matityahu 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1369a8eb340fSEmmanuel Grumbach 		ret = iwl_set_soc_latency(&mvm->fwrt);
1370cceb4507SShahar S Matityahu 		if (ret)
1371cceb4507SShahar S Matityahu 			goto error;
1372cceb4507SShahar S Matityahu 	}
1373cceb4507SShahar S Matityahu 
137443413a97SSara Sharon 	/* Init RSS configuration */
1375286ca8ebSLuca Coelho 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
13768edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
13778edbfaa1SSara Sharon 		if (ret) {
13788edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
13798edbfaa1SSara Sharon 				ret);
13808edbfaa1SSara Sharon 			goto error;
13818edbfaa1SSara Sharon 		}
13828edbfaa1SSara Sharon 	}
13838edbfaa1SSara Sharon 
13848edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
138543413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
138643413a97SSara Sharon 		if (ret) {
138743413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
138843413a97SSara Sharon 				ret);
138943413a97SSara Sharon 			goto error;
139043413a97SSara Sharon 		}
139143413a97SSara Sharon 	}
139243413a97SSara Sharon 
1393e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1394be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1395e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1396e705c121SKalle Valo 
13970ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1398e705c121SKalle Valo 
1399e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1400e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1401e705c121SKalle Valo 
140279660869SIlia Lin 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
140397d5be7eSLiad Kaufman 		ret = iwl_mvm_send_dqa_cmd(mvm);
140497d5be7eSLiad Kaufman 		if (ret)
140597d5be7eSLiad Kaufman 			goto error;
140679660869SIlia Lin 	}
140797d5be7eSLiad Kaufman 
14082c2c3647SNathan Errera 	/*
14092c2c3647SNathan Errera 	 * Add auxiliary station for scanning.
14102c2c3647SNathan Errera 	 * Newer versions of this command implies that the fw uses
14112c2c3647SNathan Errera 	 * internal aux station for all aux activities that don't
14122c2c3647SNathan Errera 	 * requires a dedicated data queue.
14132c2c3647SNathan Errera 	 */
14142c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
14152c2c3647SNathan Errera 				  ADD_STA,
14162c2c3647SNathan Errera 				  0) < 12) {
14172c2c3647SNathan Errera 		 /*
14182c2c3647SNathan Errera 		  * In old version the aux station uses mac id like other
14192c2c3647SNathan Errera 		  * station and not lmac id
14202c2c3647SNathan Errera 		  */
14212c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1422e705c121SKalle Valo 		if (ret)
1423e705c121SKalle Valo 			goto error;
14242c2c3647SNathan Errera 	}
1425e705c121SKalle Valo 
1426e705c121SKalle Valo 	/* Add all the PHY contexts */
1427dd36a507STova Mussai 	i = 0;
1428dd36a507STova Mussai 	while (!sband && i < NUM_NL80211_BANDS)
1429dd36a507STova Mussai 		sband = mvm->hw->wiphy->bands[i++];
1430dd36a507STova Mussai 
1431dd36a507STova Mussai 	if (WARN_ON_ONCE(!sband))
1432dd36a507STova Mussai 		goto error;
1433dd36a507STova Mussai 
1434dd36a507STova Mussai 	chan = &sband->channels[0];
1435dd36a507STova Mussai 
1436e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1437e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1438e705c121SKalle Valo 		/*
1439e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1440e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1441e705c121SKalle Valo 		 * For now use the first channel we have.
1442e705c121SKalle Valo 		 */
1443e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1444e705c121SKalle Valo 					   &chandef, 1, 1);
1445e705c121SKalle Valo 		if (ret)
1446e705c121SKalle Valo 			goto error;
1447e705c121SKalle Valo 	}
1448e705c121SKalle Valo 
1449c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1450c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1451c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1452c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1453c221daf2SChaya Rachel Ivgi 		 */
1454c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1455c221daf2SChaya Rachel Ivgi 	} else {
1456e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1457e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1458c221daf2SChaya Rachel Ivgi 	}
14595c89e7bcSChaya Rachel Ivgi 
1460242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL
14615c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1462944eafc2SChaya Rachel Ivgi 
1463944eafc2SChaya Rachel Ivgi 	/*
1464944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1465944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1466944eafc2SChaya Rachel Ivgi 	 */
1467944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
14685c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
14695c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
147075cfe338SLuca Coelho 		if (ret)
147175cfe338SLuca Coelho 			goto error;
147275cfe338SLuca Coelho 	}
1473c221daf2SChaya Rachel Ivgi #endif
1474e705c121SKalle Valo 
1475aa43ae12SAlex Malamud 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1476e705c121SKalle Valo 		WARN_ON(iwl_mvm_config_ltr(mvm));
1477e705c121SKalle Valo 
1478e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1479e705c121SKalle Valo 	if (ret)
1480e705c121SKalle Valo 		goto error;
1481e705c121SKalle Valo 
1482f5b1cb2eSGil Adam 	iwl_mvm_lari_cfg(mvm);
1483e705c121SKalle Valo 	/*
1484e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1485e705c121SKalle Valo 	 * anyway, so don't init MCC.
1486e705c121SKalle Valo 	 */
1487e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1488e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1489e705c121SKalle Valo 		if (ret)
1490e705c121SKalle Valo 			goto error;
1491e705c121SKalle Valo 	}
1492e705c121SKalle Valo 
1493e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
14944ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1495b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1496e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1497e705c121SKalle Valo 		if (ret)
1498e705c121SKalle Valo 			goto error;
1499e705c121SKalle Valo 	}
1500e705c121SKalle Valo 
1501f130bb75SMordechay Goodstein 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1502f130bb75SMordechay Goodstein 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1503f130bb75SMordechay Goodstein 
150448e775e6SHaim Dreyfuss 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
150548e775e6SHaim Dreyfuss 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
150648e775e6SHaim Dreyfuss 
15076ce1e5c0SGil Adam 	ret = iwl_mvm_ppag_init(mvm);
15086ce1e5c0SGil Adam 	if (ret)
15096ce1e5c0SGil Adam 		goto error;
15106ce1e5c0SGil Adam 
1511da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
15125d041c46SLuca Coelho 	if (ret == 0) {
1513a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
15141edd56e6SLuca Coelho 	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
15155d041c46SLuca Coelho 		/*
15165d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
15175d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
15185d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
15195d041c46SLuca Coelho 		 * Geo without basic SAR.
15205d041c46SLuca Coelho 		 */
15215d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
15225d041c46SLuca Coelho 	}
15235d041c46SLuca Coelho 
15245d041c46SLuca Coelho 	if (ret < 0)
1525a6bff3cbSHaim Dreyfuss 		goto error;
1526a6bff3cbSHaim Dreyfuss 
152728dd7ccdSMordechay Goodstein 	iwl_mvm_tas_init(mvm);
15287089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
15297089ae63SJohannes Berg 
1530b68bd2e3SIlan Peer 	iwl_mvm_ftm_initiator_smooth_config(mvm);
1531b68bd2e3SIlan Peer 
1532e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1533e705c121SKalle Valo 	return 0;
1534e705c121SKalle Valo  error:
1535f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1536fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1537e705c121SKalle Valo 	return ret;
1538e705c121SKalle Valo }
1539e705c121SKalle Valo 
1540e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1541e705c121SKalle Valo {
1542e705c121SKalle Valo 	int ret, i;
1543e705c121SKalle Valo 
1544e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1545e705c121SKalle Valo 
1546e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1547e705c121SKalle Valo 	if (ret)
1548e705c121SKalle Valo 		return ret;
1549e705c121SKalle Valo 
1550e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1551e705c121SKalle Valo 	if (ret) {
1552e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1553e705c121SKalle Valo 		goto error;
1554e705c121SKalle Valo 	}
1555e705c121SKalle Valo 
1556e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1557e705c121SKalle Valo 	if (ret)
1558e705c121SKalle Valo 		goto error;
1559e705c121SKalle Valo 
1560e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1561e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1562e705c121SKalle Valo 	if (ret)
1563e705c121SKalle Valo 		goto error;
1564e705c121SKalle Valo 
1565e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1566e705c121SKalle Valo 	if (ret)
1567e705c121SKalle Valo 		goto error;
1568e705c121SKalle Valo 
1569e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1570be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1571e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1572e705c121SKalle Valo 
15732c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
15742c2c3647SNathan Errera 				  ADD_STA,
15752c2c3647SNathan Errera 				  0) < 12) {
15762c2c3647SNathan Errera 		/*
15772c2c3647SNathan Errera 		 * Add auxiliary station for scanning.
15782c2c3647SNathan Errera 		 * Newer versions of this command implies that the fw uses
15792c2c3647SNathan Errera 		 * internal aux station for all aux activities that don't
15802c2c3647SNathan Errera 		 * requires a dedicated data queue.
15812c2c3647SNathan Errera 		 * In old version the aux station uses mac id like other
15822c2c3647SNathan Errera 		 * station and not lmac id
15832c2c3647SNathan Errera 		 */
15842c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1585e705c121SKalle Valo 		if (ret)
1586e705c121SKalle Valo 			goto error;
15872c2c3647SNathan Errera 	}
1588e705c121SKalle Valo 
1589e705c121SKalle Valo 	return 0;
1590e705c121SKalle Valo  error:
1591fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1592e705c121SKalle Valo 	return ret;
1593e705c121SKalle Valo }
1594e705c121SKalle Valo 
1595e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1596e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1597e705c121SKalle Valo {
1598e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1599e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1600e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1601e705c121SKalle Valo 
1602e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1603e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1604e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1605e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1606e705c121SKalle Valo 			  "Reached" : "Not reached");
1607e705c121SKalle Valo }
1608e705c121SKalle Valo 
1609e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1610e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1611e705c121SKalle Valo {
1612e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1613e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1614e705c121SKalle Valo 
1615e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1616e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1617e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1618e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1619e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1620e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
16210c8d0a47SGolan Ben-Ami 
16220c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
16230c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
16240c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
16250c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1626e705c121SKalle Valo }
1627