18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 28e99ea8dSJohannes Berg /* 34f7411d6SRoee Goldfiner * Copyright (C) 2012-2014, 2018-2021 Intel Corporation 48e99ea8dSJohannes Berg * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 58e99ea8dSJohannes Berg * Copyright (C) 2016-2017 Intel Deutschland GmbH 68e99ea8dSJohannes Berg */ 7e705c121SKalle Valo #include <net/mac80211.h> 8854d773eSSara Sharon #include <linux/netdevice.h> 9a2ac0f48SLuca Coelho #include <linux/dmi.h> 10e705c121SKalle Valo 11e705c121SKalle Valo #include "iwl-trans.h" 12e705c121SKalle Valo #include "iwl-op-mode.h" 13d962f9b1SJohannes Berg #include "fw/img.h" 14e705c121SKalle Valo #include "iwl-debug.h" 15e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 16e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 17e705c121SKalle Valo #include "iwl-prph.h" 18813df5ceSLuca Coelho #include "fw/acpi.h" 19b3e4c0f3SLuca Coelho #include "fw/pnvm.h" 20e705c121SKalle Valo 21e705c121SKalle Valo #include "mvm.h" 227174beb6SJohannes Berg #include "fw/dbg.h" 23e705c121SKalle Valo #include "iwl-phy-db.h" 249c4f7d51SShaul Triebitz #include "iwl-modparams.h" 259c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 26e705c121SKalle Valo 27b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 28e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 29e705c121SKalle Valo 30e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 31e705c121SKalle Valo 32e12cfc7bSMiri Korenblit #define IWL_PPAG_MASK 3 33e12cfc7bSMiri Korenblit #define IWL_PPAG_ETSI_MASK BIT(0) 34e12cfc7bSMiri Korenblit 35e705c121SKalle Valo struct iwl_mvm_alive_data { 36e705c121SKalle Valo bool valid; 37e705c121SKalle Valo u32 scd_base_addr; 38e705c121SKalle Valo }; 39e705c121SKalle Valo 40e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 41e705c121SKalle Valo { 42e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 43e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 44e705c121SKalle Valo }; 45e705c121SKalle Valo 46e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 47e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 48e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 49e705c121SKalle Valo } 50e705c121SKalle Valo 5143413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 5243413a97SSara Sharon { 5343413a97SSara Sharon int i; 5443413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 5543413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 56608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 57608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 58608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 59608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 60608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 61608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 6243413a97SSara Sharon }; 6343413a97SSara Sharon 64f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 65f43495fdSSara Sharon return 0; 66f43495fdSSara Sharon 67854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 6843413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 69854d773eSSara Sharon cmd.indirection_table[i] = 70854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 71854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 7243413a97SSara Sharon 7343413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 7443413a97SSara Sharon } 7543413a97SSara Sharon 7697d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 7797d5be7eSLiad Kaufman { 7897d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 7997d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 8097d5be7eSLiad Kaufman }; 8197d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 8297d5be7eSLiad Kaufman int ret; 8397d5be7eSLiad Kaufman 8497d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 8597d5be7eSLiad Kaufman if (ret) 8697d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 8797d5be7eSLiad Kaufman else 8897d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 8997d5be7eSLiad Kaufman 9097d5be7eSLiad Kaufman return ret; 9197d5be7eSLiad Kaufman } 9297d5be7eSLiad Kaufman 93bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 94bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 95bdccdb85SGolan Ben-Ami { 96bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 97bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 98bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 99bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 100bdccdb85SGolan Ben-Ami int i; 101bdccdb85SGolan Ben-Ami 102bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 103bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 104bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 105bdccdb85SGolan Ben-Ami 106bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 107bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 108bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 109bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 110bdccdb85SGolan Ben-Ami n_words + i, 111bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 112bdccdb85SGolan Ben-Ami } 113bdccdb85SGolan Ben-Ami 114e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 115e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 116e705c121SKalle Valo { 117fd1c3318SJohannes Berg unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 118e705c121SKalle Valo struct iwl_mvm *mvm = 119e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 120e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 1215c228d63SSara Sharon struct iwl_umac_alive *umac; 1225c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 1235c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 1245c228d63SSara Sharon u16 status; 125cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table; 126708d8c53SJohannes Berg u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 127708d8c53SJohannes Berg UCODE_ALIVE_NTFY, 0); 128e705c121SKalle Valo 12990824f2fSLuca Coelho /* 13090824f2fSLuca Coelho * For v5 and above, we can check the version, for older 13190824f2fSLuca Coelho * versions we need to check the size. 13290824f2fSLuca Coelho */ 133708d8c53SJohannes Berg if (version == 5 || version == 6) { 134708d8c53SJohannes Berg /* v5 and v6 are compatible (only IMR addition) */ 13590824f2fSLuca Coelho struct iwl_alive_ntf_v5 *palive; 13690824f2fSLuca Coelho 137fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 138fd1c3318SJohannes Berg return false; 139fd1c3318SJohannes Berg 14090824f2fSLuca Coelho palive = (void *)pkt->data; 14190824f2fSLuca Coelho umac = &palive->umac_data; 14290824f2fSLuca Coelho lmac1 = &palive->lmac_data[0]; 14390824f2fSLuca Coelho lmac2 = &palive->lmac_data[1]; 14490824f2fSLuca Coelho status = le16_to_cpu(palive->status); 14590824f2fSLuca Coelho 14690824f2fSLuca Coelho mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 14790824f2fSLuca Coelho mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 14890824f2fSLuca Coelho mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 14990824f2fSLuca Coelho 15090824f2fSLuca Coelho IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 15190824f2fSLuca Coelho mvm->trans->sku_id[0], 15290824f2fSLuca Coelho mvm->trans->sku_id[1], 15390824f2fSLuca Coelho mvm->trans->sku_id[2]); 15490824f2fSLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 1559422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive; 1569422b978SLuca Coelho 157fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 158fd1c3318SJohannes Berg return false; 159fd1c3318SJohannes Berg 160e705c121SKalle Valo palive = (void *)pkt->data; 1615c228d63SSara Sharon umac = &palive->umac_data; 1625c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 1635c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 1645c228d63SSara Sharon status = le16_to_cpu(palive->status); 1659422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == 1669422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) { 1679422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3; 1689422b978SLuca Coelho 169fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive3)) 170fd1c3318SJohannes Berg return false; 171fd1c3318SJohannes Berg 1725c228d63SSara Sharon palive3 = (void *)pkt->data; 1735c228d63SSara Sharon umac = &palive3->umac_data; 1745c228d63SSara Sharon lmac1 = &palive3->lmac_data; 1755c228d63SSara Sharon status = le16_to_cpu(palive3->status); 1769422b978SLuca Coelho } else { 1779422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n", 1789422b978SLuca Coelho iwl_rx_packet_payload_len(pkt)); 1799422b978SLuca Coelho /* get timeout later */ 1809422b978SLuca Coelho return false; 1815c228d63SSara Sharon } 182e705c121SKalle Valo 18322463857SShahar S Matityahu lmac_error_event_table = 18422463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 18522463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 186e705c121SKalle Valo 18722463857SShahar S Matityahu if (lmac2) 18891c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 18922463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 19022463857SShahar S Matityahu 1914f7411d6SRoee Goldfiner umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 1924f7411d6SRoee Goldfiner ~FW_ADDR_CACHE_CONTROL; 1935c228d63SSara Sharon 194cfa5d0caSMordechay Goodstein if (umac_error_table) { 195cfa5d0caSMordechay Goodstein if (umac_error_table >= 1963485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 197cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans, 198cfa5d0caSMordechay Goodstein umac_error_table); 1993485e76eSLuca Coelho } else { 200fb5b2846SLuca Coelho IWL_ERR(mvm, 201fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 202cfa5d0caSMordechay Goodstein umac_error_table, 203fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 204fb5b2846SLuca Coelho "Init" : "RT"); 2053485e76eSLuca Coelho } 206cfa5d0caSMordechay Goodstein } 20722463857SShahar S Matityahu 20822463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2095c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 210e705c121SKalle Valo 211e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2125c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2135c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2145c228d63SSara Sharon 2155c228d63SSara Sharon if (lmac2) 2165c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 217e705c121SKalle Valo 218e705c121SKalle Valo IWL_DEBUG_FW(mvm, 219e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2205c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2215c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 222e705c121SKalle Valo 2230a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2240a3a3e9eSShahar S Matityahu 225e705c121SKalle Valo return true; 226e705c121SKalle Valo } 227e705c121SKalle Valo 2281f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2291f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2301f370650SSara Sharon { 2311f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2321f370650SSara Sharon 2331f370650SSara Sharon return true; 2341f370650SSara Sharon } 2351f370650SSara Sharon 236e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 237e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 238e705c121SKalle Valo { 239e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 240e705c121SKalle Valo 241e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 242e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 243e705c121SKalle Valo return true; 244e705c121SKalle Valo } 245e705c121SKalle Valo 246ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 247e705c121SKalle Valo 248e705c121SKalle Valo return false; 249e705c121SKalle Valo } 250e705c121SKalle Valo 251e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 252e705c121SKalle Valo enum iwl_ucode_type ucode_type) 253e705c121SKalle Valo { 254e705c121SKalle Valo struct iwl_notification_wait alive_wait; 25594a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 256e705c121SKalle Valo const struct fw_img *fw; 257cfbc6c4cSSara Sharon int ret; 258702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 2599422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 260b3500b47SEmmanuel Grumbach bool run_in_rfkill = 261b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 262e705c121SKalle Valo 263e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 2643d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 2653d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 2663d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 267612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 268e705c121SKalle Valo else 269612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 270e705c121SKalle Valo if (WARN_ON(!fw)) 271e705c121SKalle Valo return -EINVAL; 272702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 27365b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 274e705c121SKalle Valo 275e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 276e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 277e705c121SKalle Valo iwl_alive_fn, &alive_data); 278e705c121SKalle Valo 279b3500b47SEmmanuel Grumbach /* 280b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 281b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 282b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 283b3500b47SEmmanuel Grumbach */ 284b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 285e705c121SKalle Valo if (ret) { 286702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 287e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 288e705c121SKalle Valo return ret; 289e705c121SKalle Valo } 290e705c121SKalle Valo 291e705c121SKalle Valo /* 292e705c121SKalle Valo * Some things may run in the background now, but we 293e705c121SKalle Valo * just wait for the ALIVE notification here. 294e705c121SKalle Valo */ 295e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 296e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 297e705c121SKalle Valo if (ret) { 298d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 299d6be9c1dSSara Sharon 3005667ccc2SMordechay Goodstein /* SecBoot info */ 30120f5aef5SJohannes Berg if (trans->trans_cfg->device_family >= 30220f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) { 303e705c121SKalle Valo IWL_ERR(mvm, 304e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 305ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 306ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 307ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 3085667ccc2SMordechay Goodstein } else if (trans->trans_cfg->device_family >= 3095667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_8000) { 3105667ccc2SMordechay Goodstein IWL_ERR(mvm, 3115667ccc2SMordechay Goodstein "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 3125667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_1_STATUS), 3135667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_2_STATUS)); 3145667ccc2SMordechay Goodstein } 3155667ccc2SMordechay Goodstein 3165667ccc2SMordechay Goodstein /* LMAC/UMAC PC info */ 3175667ccc2SMordechay Goodstein if (trans->trans_cfg->device_family >= 3185667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_9000) { 31920f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n", 32020f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32120f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC)); 32220f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n", 32320f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32420f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC)); 32520f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm)) 32620f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 32720f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32820f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC)); 32920f5aef5SJohannes Berg } 33020f5aef5SJohannes Berg 33120f5aef5SJohannes Berg if (ret == -ETIMEDOUT) 33220f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 33320f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT); 33420f5aef5SJohannes Berg 335702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 336e705c121SKalle Valo return ret; 337e705c121SKalle Valo } 338e705c121SKalle Valo 339e705c121SKalle Valo if (!alive_data.valid) { 340e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 341702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 342e705c121SKalle Valo return -EIO; 343e705c121SKalle Valo } 344e705c121SKalle Valo 345b3e4c0f3SLuca Coelho ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 34670d3ca86SLuca Coelho if (ret) { 34770d3ca86SLuca Coelho IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 34870d3ca86SLuca Coelho iwl_fw_set_current_image(&mvm->fwrt, old_type); 34970d3ca86SLuca Coelho return ret; 35070d3ca86SLuca Coelho } 35170d3ca86SLuca Coelho 352e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 353e705c121SKalle Valo 354e705c121SKalle Valo /* 355e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 356e705c121SKalle Valo * initialization, but in firmware restart scenarios they 357e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 358e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 359e705c121SKalle Valo * reconfiguration completes. During normal startup, they 360e705c121SKalle Valo * will be empty. 361e705c121SKalle Valo */ 362e705c121SKalle Valo 363e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 3641c14089eSJohannes Berg /* 3651c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 3661c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 3671c14089eSJohannes Berg * we ever even consider the command queue as one we might 3681c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 3691c14089eSJohannes Berg */ 3701c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 3711c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 372e705c121SKalle Valo 37365b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 374f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 375f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 376f7805b33SLior Cohen #endif 377e705c121SKalle Valo 378d3d9b4fcSEmmanuel Grumbach /* 379d3d9b4fcSEmmanuel Grumbach * All the BSSes in the BSS table include the GP2 in the system 380d3d9b4fcSEmmanuel Grumbach * at the beacon Rx time, this is of course no longer relevant 381d3d9b4fcSEmmanuel Grumbach * since we are resetting the firmware. 382d3d9b4fcSEmmanuel Grumbach * Purge all the BSS table. 383d3d9b4fcSEmmanuel Grumbach */ 384d3d9b4fcSEmmanuel Grumbach cfg80211_bss_flush(mvm->hw->wiphy); 385d3d9b4fcSEmmanuel Grumbach 386e705c121SKalle Valo return 0; 387e705c121SKalle Valo } 388e705c121SKalle Valo 38952b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 3908c5f47b1SJohannes Berg { 3918c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 3928c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 3938c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 3948c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 3958c5f47b1SJohannes Berg }; 3968c5f47b1SJohannes Berg static const u16 init_complete[] = { 3978c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 3988c5f47b1SJohannes Berg }; 3998c5f47b1SJohannes Berg int ret; 4008c5f47b1SJohannes Berg 401a4584729SHaim Dreyfuss if (mvm->trans->cfg->tx_with_siso_diversity) 402a4584729SHaim Dreyfuss init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 403a4584729SHaim Dreyfuss 4048c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 4058c5f47b1SJohannes Berg 40694022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 40794022562SEmmanuel Grumbach 4088c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 4098c5f47b1SJohannes Berg &init_wait, 4108c5f47b1SJohannes Berg init_complete, 4118c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 4128c5f47b1SJohannes Berg iwl_wait_init_complete, 4138c5f47b1SJohannes Berg NULL); 4148c5f47b1SJohannes Berg 415b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 41686ce5c74SShahar S Matityahu 4178c5f47b1SJohannes Berg /* Will also start the device */ 4188c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4198c5f47b1SJohannes Berg if (ret) { 4208c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4218c5f47b1SJohannes Berg goto error; 4228c5f47b1SJohannes Berg } 423b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 424b108d8c7SShahar S Matityahu NULL); 4258c5f47b1SJohannes Berg 4268c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4278c5f47b1SJohannes Berg * commands 4288c5f47b1SJohannes Berg */ 4298c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 430b3500b47SEmmanuel Grumbach INIT_EXTENDED_CFG_CMD), 431b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4328c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4338c5f47b1SJohannes Berg if (ret) { 4348c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4358c5f47b1SJohannes Berg ret); 4368c5f47b1SJohannes Berg goto error; 4378c5f47b1SJohannes Berg } 4388c5f47b1SJohannes Berg 439e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 440e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4419ce505feSAbhishek Naik ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4429c4f7d51SShaul Triebitz mvm->nvm_sections); 4439ce505feSAbhishek Naik if (ret) 4449ce505feSAbhishek Naik goto error; 4459ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 4469ce505feSAbhishek Naik if (ret) 4479ce505feSAbhishek Naik goto error; 448e9e1ba3dSSara Sharon } 4498c5f47b1SJohannes Berg 45052b15521SEmmanuel Grumbach if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4515bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 452d4f3695eSSara Sharon if (ret) { 453d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 454d4f3695eSSara Sharon goto error; 455d4f3695eSSara Sharon } 456d4f3695eSSara Sharon } 457d4f3695eSSara Sharon 4588c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 459b3500b47SEmmanuel Grumbach NVM_ACCESS_COMPLETE), 460b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4618c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4628c5f47b1SJohannes Berg if (ret) { 4638c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4648c5f47b1SJohannes Berg ret); 4658c5f47b1SJohannes Berg goto error; 4668c5f47b1SJohannes Berg } 4678c5f47b1SJohannes Berg 4688c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 469e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4708c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 471e9e1ba3dSSara Sharon if (ret) 472e9e1ba3dSSara Sharon return ret; 473e9e1ba3dSSara Sharon 474e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 47552b15521SEmmanuel Grumbach if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4764c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 477c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 478c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 479c135cb56SShaul Triebitz mvm->nvm_data = NULL; 480e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 481e9e1ba3dSSara Sharon return ret; 482e9e1ba3dSSara Sharon } 483e9e1ba3dSSara Sharon } 484e9e1ba3dSSara Sharon 485b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 486b3500b47SEmmanuel Grumbach 487e9e1ba3dSSara Sharon return 0; 4888c5f47b1SJohannes Berg 4898c5f47b1SJohannes Berg error: 4908c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 4918c5f47b1SJohannes Berg return ret; 4928c5f47b1SJohannes Berg } 4938c5f47b1SJohannes Berg 494c4ace426SGil Adam #ifdef CONFIG_ACPI 495c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 496c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 497c4ace426SGil Adam { 498c4ace426SGil Adam /* 499c4ace426SGil Adam * TODO: read specific phy config from BIOS 500c4ace426SGil Adam * ACPI table for this feature has not been defined yet, 501c4ace426SGil Adam * so for now we use hardcoded values. 502c4ace426SGil Adam */ 503c4ace426SGil Adam 504c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_A) { 505c4ace426SGil Adam phy_filters->filter_cfg_chain_a = 506c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 507c4ace426SGil Adam } 508c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_B) { 509c4ace426SGil Adam phy_filters->filter_cfg_chain_b = 510c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 511c4ace426SGil Adam } 512c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_C) { 513c4ace426SGil Adam phy_filters->filter_cfg_chain_c = 514c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 515c4ace426SGil Adam } 516c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_D) { 517c4ace426SGil Adam phy_filters->filter_cfg_chain_d = 518c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 519c4ace426SGil Adam } 520c4ace426SGil Adam } 521c4ace426SGil Adam #else /* CONFIG_ACPI */ 522c4ace426SGil Adam 523c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 524c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 525c4ace426SGil Adam { 526c4ace426SGil Adam } 527c4ace426SGil Adam #endif /* CONFIG_ACPI */ 528c4ace426SGil Adam 529c593d2faSAyala Barazani #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 530c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 531c593d2faSAyala Barazani { 532c593d2faSAyala Barazani u8 cmd_ver; 533c593d2faSAyala Barazani int ret; 534c593d2faSAyala Barazani struct iwl_host_cmd cmd = { 535c593d2faSAyala Barazani .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 536c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD), 537c593d2faSAyala Barazani .flags = 0, 538c593d2faSAyala Barazani .data[0] = &mvm->fwrt.sgom_table, 539c593d2faSAyala Barazani .len[0] = sizeof(mvm->fwrt.sgom_table), 540c593d2faSAyala Barazani .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 541c593d2faSAyala Barazani }; 542c593d2faSAyala Barazani 543c593d2faSAyala Barazani if (!mvm->fwrt.sgom_enabled) { 544c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 545c593d2faSAyala Barazani return 0; 546c593d2faSAyala Barazani } 547c593d2faSAyala Barazani 548c593d2faSAyala Barazani cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, 549c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD, 550c593d2faSAyala Barazani IWL_FW_CMD_VER_UNKNOWN); 551c593d2faSAyala Barazani 552c593d2faSAyala Barazani if (cmd_ver != 2) { 553c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 554c593d2faSAyala Barazani cmd_ver); 555c593d2faSAyala Barazani return 0; 556c593d2faSAyala Barazani } 557c593d2faSAyala Barazani 558c593d2faSAyala Barazani ret = iwl_mvm_send_cmd(mvm, &cmd); 559c593d2faSAyala Barazani if (ret < 0) 560c593d2faSAyala Barazani IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 561c593d2faSAyala Barazani 562c593d2faSAyala Barazani return ret; 563c593d2faSAyala Barazani } 564c593d2faSAyala Barazani #else 565c593d2faSAyala Barazani 566c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 567c593d2faSAyala Barazani { 568c593d2faSAyala Barazani return 0; 569c593d2faSAyala Barazani } 570c593d2faSAyala Barazani #endif 571c593d2faSAyala Barazani 572e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 573e705c121SKalle Valo { 574c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 575702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 576c4ace426SGil Adam struct iwl_phy_specific_cfg phy_filters = {}; 577c4ace426SGil Adam u8 cmd_ver; 578c4ace426SGil Adam size_t cmd_size; 579e705c121SKalle Valo 580bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) && 581d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity) 582bb99ff9bSLuca Coelho return 0; 583d923b020SLuca Coelho 584d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) { 585bb99ff9bSLuca Coelho /* 586bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC 587bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS. 588bb99ff9bSLuca Coelho */ 589bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg = 590bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 591bb99ff9bSLuca Coelho } 592bb99ff9bSLuca Coelho 593e705c121SKalle Valo /* Set parameters */ 594e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 59586a2b204SLuca Coelho 59686a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 5977897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |= 5987897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 59986a2b204SLuca Coelho 600e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 601e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 602e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 603e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 604e705c121SKalle Valo 605c4ace426SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, 606e80bfd11SMordechay Goodstein PHY_CONFIGURATION_CMD, 607e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 608c4ace426SGil Adam if (cmd_ver == 3) { 609c4ace426SGil Adam iwl_mvm_phy_filter_init(mvm, &phy_filters); 610c4ace426SGil Adam memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 611c4ace426SGil Adam sizeof(struct iwl_phy_specific_cfg)); 612c4ace426SGil Adam } 613c4ace426SGil Adam 614e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 615e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 616c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 617c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1); 618e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 619c4ace426SGil Adam cmd_size, &phy_cfg_cmd); 620e705c121SKalle Valo } 621e705c121SKalle Valo 6223b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 623e705c121SKalle Valo { 624e705c121SKalle Valo struct iwl_notification_wait calib_wait; 625e705c121SKalle Valo static const u16 init_complete[] = { 626e705c121SKalle Valo INIT_COMPLETE_NOTIF, 627e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 628e705c121SKalle Valo }; 629e705c121SKalle Valo int ret; 630e705c121SKalle Valo 6317d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 63252b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 6338c5f47b1SJohannes Berg 634e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 635e705c121SKalle Valo 63694022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 637e705c121SKalle Valo 638e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 639e705c121SKalle Valo &calib_wait, 640e705c121SKalle Valo init_complete, 641e705c121SKalle Valo ARRAY_SIZE(init_complete), 642e705c121SKalle Valo iwl_wait_phy_db_entry, 643e705c121SKalle Valo mvm->phy_db); 644e705c121SKalle Valo 64511f8c533SLuca Coelho iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 64611f8c533SLuca Coelho 647e705c121SKalle Valo /* Will also start the device */ 648e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 649e705c121SKalle Valo if (ret) { 650e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 65100e0c6c8SLuca Coelho goto remove_notif; 652e705c121SKalle Valo } 653e705c121SKalle Valo 6547d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 655b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 656e705c121SKalle Valo if (ret) 65700e0c6c8SLuca Coelho goto remove_notif; 658b3de3ef4SEmmanuel Grumbach } 659e705c121SKalle Valo 660e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 6613b25f1afSEmmanuel Grumbach if (!mvm->nvm_data) { 6625bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 663e705c121SKalle Valo if (ret) { 664e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 66500e0c6c8SLuca Coelho goto remove_notif; 666e705c121SKalle Valo } 667e705c121SKalle Valo } 668e705c121SKalle Valo 669e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 6709ce505feSAbhishek Naik if (mvm->nvm_file_name) { 6719ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 6729ce505feSAbhishek Naik if (ret) 6739ce505feSAbhishek Naik goto remove_notif; 6749ce505feSAbhishek Naik } 675e705c121SKalle Valo 67664866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 67764866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 67864866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 679e705c121SKalle Valo 680e705c121SKalle Valo /* 681e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 682e705c121SKalle Valo * the init seq later when RF kill will switch to off 683e705c121SKalle Valo */ 684e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 685e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 686e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 68700e0c6c8SLuca Coelho goto remove_notif; 688e705c121SKalle Valo } 689e705c121SKalle Valo 690b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 691e705c121SKalle Valo 692e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 693e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 694e705c121SKalle Valo if (ret) 69500e0c6c8SLuca Coelho goto remove_notif; 696e705c121SKalle Valo 697e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 698e705c121SKalle Valo if (ret) { 699e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 700e705c121SKalle Valo ret); 70100e0c6c8SLuca Coelho goto remove_notif; 702e705c121SKalle Valo } 703e705c121SKalle Valo 704e705c121SKalle Valo /* 705e705c121SKalle Valo * Some things may run in the background now, but we 706e705c121SKalle Valo * just wait for the calibration complete notification. 707e705c121SKalle Valo */ 708e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 709e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 71000e0c6c8SLuca Coelho if (!ret) 711e705c121SKalle Valo goto out; 712e705c121SKalle Valo 71300e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 71400e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 71500e0c6c8SLuca Coelho ret = 0; 71600e0c6c8SLuca Coelho } else { 71700e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 71800e0c6c8SLuca Coelho ret); 71900e0c6c8SLuca Coelho } 72000e0c6c8SLuca Coelho 72100e0c6c8SLuca Coelho goto out; 72200e0c6c8SLuca Coelho 72300e0c6c8SLuca Coelho remove_notif: 724e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 725e705c121SKalle Valo out: 726b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 727e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 728e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 729e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 730e705c121SKalle Valo sizeof(struct ieee80211_channel) + 731e705c121SKalle Valo sizeof(struct ieee80211_rate), 732e705c121SKalle Valo GFP_KERNEL); 733e705c121SKalle Valo if (!mvm->nvm_data) 734e705c121SKalle Valo return -ENOMEM; 735e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 736e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 737e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 738e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 739e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 740e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 741e705c121SKalle Valo } 742e705c121SKalle Valo 743e705c121SKalle Valo return ret; 744e705c121SKalle Valo } 745e705c121SKalle Valo 746e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 747e705c121SKalle Valo { 748e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 749e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 750e705c121SKalle Valo }; 751e705c121SKalle Valo 752e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 753e705c121SKalle Valo return 0; 754e705c121SKalle Valo 755e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 756e705c121SKalle Valo sizeof(cmd), &cmd); 757e705c121SKalle Valo } 758e705c121SKalle Valo 759c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 76042ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 761da2830acSLuca Coelho { 762216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 763216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 76471e9378bSLuca Coelho }; 7659c08cef8SLuca Coelho __le16 *per_chain; 7661edd56e6SLuca Coelho int ret; 76739c1a972SIhab Zhaika u16 len = 0; 768fbb7957dSLuca Coelho u32 n_subbands; 769fbb7957dSLuca Coelho u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 770e80bfd11SMordechay Goodstein REDUCE_TX_POWER_CMD, 771e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 77242ce76d6SLuca Coelho 773fbb7957dSLuca Coelho if (cmd_ver == 6) { 774fbb7957dSLuca Coelho len = sizeof(cmd.v6); 775fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2; 776fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0]; 777fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa, 7789c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 7790791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 780e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7819c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0]; 7829c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa, 7839c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 784216cdfb5SLuca Coelho len = sizeof(cmd.v4); 785e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7869c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0]; 7879c08cef8SLuca Coelho } else { 788216cdfb5SLuca Coelho len = sizeof(cmd.v3); 789e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7909c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0]; 7919c08cef8SLuca Coelho } 79255bfa4b9SLuca Coelho 793216cdfb5SLuca Coelho /* all structs have the same common part, add it */ 794216cdfb5SLuca Coelho len += sizeof(cmd.common); 79542ce76d6SLuca Coelho 796dac7171cSLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 797dac7171cSLuca Coelho IWL_NUM_CHAIN_TABLES, 798fbb7957dSLuca Coelho n_subbands, prof_a, prof_b); 7991edd56e6SLuca Coelho 8001edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */ 8011edd56e6SLuca Coelho if (ret) 8021edd56e6SLuca Coelho return ret; 8031edd56e6SLuca Coelho 8046d19a5ebSEmmanuel Grumbach iwl_mei_set_power_limit(per_chain); 8056d19a5ebSEmmanuel Grumbach 80642ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 80742ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 80842ce76d6SLuca Coelho } 80942ce76d6SLuca Coelho 8107fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 8117fe90e0eSHaim Dreyfuss { 812dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 813f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp; 8140c3d7282SHaim Dreyfuss u16 len; 81539c1a972SIhab Zhaika int ret; 8160c3d7282SHaim Dreyfuss struct iwl_host_cmd cmd; 817e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 818523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD, 819e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 8207fe90e0eSHaim Dreyfuss 821dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 822dd2a1256SLuca Coelho geo_tx_cmd.v1.ops = 823dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 824dd2a1256SLuca Coelho 82597f8a3d1SAyala Barazani if (cmd_ver == 5) 82697f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v5); 82797f8a3d1SAyala Barazani else if (cmd_ver == 4) 82897f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v4); 82997f8a3d1SAyala Barazani else if (cmd_ver == 3) 8300ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3); 8310ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 832dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 833dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2); 834dd2a1256SLuca Coelho else 835dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1); 8360c3d7282SHaim Dreyfuss 83739c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt)) 83839c1a972SIhab Zhaika return -EOPNOTSUPP; 83939c1a972SIhab Zhaika 8400c3d7282SHaim Dreyfuss cmd = (struct iwl_host_cmd){ 841523de6c8SLuca Coelho .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 8420c3d7282SHaim Dreyfuss .len = { len, }, 8437fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 84439c1a972SIhab Zhaika .data = { &geo_tx_cmd }, 8457fe90e0eSHaim Dreyfuss }; 8467fe90e0eSHaim Dreyfuss 8477fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 8487fe90e0eSHaim Dreyfuss if (ret) { 8497fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8507fe90e0eSHaim Dreyfuss return ret; 8517fe90e0eSHaim Dreyfuss } 852f604324eSLuca Coelho 853f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data; 854f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx); 855f604324eSLuca Coelho 85697f8a3d1SAyala Barazani if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 857f604324eSLuca Coelho ret = -EIO; 858f604324eSLuca Coelho 8597fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8607fe90e0eSHaim Dreyfuss return ret; 8617fe90e0eSHaim Dreyfuss } 8627fe90e0eSHaim Dreyfuss 863a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 864a6bff3cbSHaim Dreyfuss { 865dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd; 86639c1a972SIhab Zhaika u16 len; 86745acebf8SNaftali Goldstein u32 n_bands; 86897f8a3d1SAyala Barazani u32 n_profiles; 8690433ae55SGolan Ben Ami int ret; 870e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 871523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD, 872e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 873a6bff3cbSHaim Dreyfuss 87445acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 87545acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 87645acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 87797f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 87897f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 87997f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 88097f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 88197f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 88297f8a3d1SAyala Barazani 88345acebf8SNaftali Goldstein /* the ops field is at the same spot for all versions, so set in v1 */ 88445acebf8SNaftali Goldstein cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 88545acebf8SNaftali Goldstein 88697f8a3d1SAyala Barazani if (cmd_ver == 5) { 88797f8a3d1SAyala Barazani len = sizeof(cmd.v5); 88897f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v5.table[0]); 88997f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 89097f8a3d1SAyala Barazani } else if (cmd_ver == 4) { 89197f8a3d1SAyala Barazani len = sizeof(cmd.v4); 89297f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v4.table[0]); 89397f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 89497f8a3d1SAyala Barazani } else if (cmd_ver == 3) { 89545acebf8SNaftali Goldstein len = sizeof(cmd.v3); 89645acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v3.table[0]); 89797f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 89845acebf8SNaftali Goldstein } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 89945acebf8SNaftali Goldstein IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 90045acebf8SNaftali Goldstein len = sizeof(cmd.v2); 90145acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v2.table[0]); 90297f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 90345acebf8SNaftali Goldstein } else { 90445acebf8SNaftali Goldstein len = sizeof(cmd.v1); 90545acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v1.table[0]); 90697f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 90745acebf8SNaftali Goldstein } 90845acebf8SNaftali Goldstein 90945acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 91045acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 91145acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 91297f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 91397f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 91497f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 91597f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 91697f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 91745acebf8SNaftali Goldstein /* the table is at the same position for all versions, so set use v1 */ 91897f8a3d1SAyala Barazani ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 91997f8a3d1SAyala Barazani n_bands, n_profiles); 920eca1e56cSEmmanuel Grumbach 9210433ae55SGolan Ben Ami /* 9220433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table, 9230433ae55SGolan Ben Ami * but in that case there is no need to send the command. 9240433ae55SGolan Ben Ami */ 9250433ae55SGolan Ben Ami if (ret) 9260433ae55SGolan Ben Ami return 0; 927a6bff3cbSHaim Dreyfuss 92828db1862SLuca Coelho /* 92928db1862SLuca Coelho * Set the revision on versions that contain it. 93028db1862SLuca Coelho * This must be done after calling iwl_sar_geo_init(). 93128db1862SLuca Coelho */ 93297f8a3d1SAyala Barazani if (cmd_ver == 5) 93397f8a3d1SAyala Barazani cmd.v5.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 93497f8a3d1SAyala Barazani else if (cmd_ver == 4) 93597f8a3d1SAyala Barazani cmd.v4.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 93697f8a3d1SAyala Barazani else if (cmd_ver == 3) 93728db1862SLuca Coelho cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 93828db1862SLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 93928db1862SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 94028db1862SLuca Coelho cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 94128db1862SLuca Coelho 942dd2a1256SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, 943523de6c8SLuca Coelho WIDE_ID(PHY_OPS_GROUP, 944523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD), 945dd2a1256SLuca Coelho 0, len, &cmd); 946a6bff3cbSHaim Dreyfuss } 947a6bff3cbSHaim Dreyfuss 9486ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 9496ce1e5c0SGil Adam { 950e12cfc7bSMiri Korenblit union acpi_object *wifi_pkg, *data, *flags; 951f2134f66SGil Adam int i, j, ret, tbl_rev, num_sub_bands; 9526ce1e5c0SGil Adam int idx = 2; 953f2134f66SGil Adam s8 *gain; 9546ce1e5c0SGil Adam 955f2134f66SGil Adam /* 956e12cfc7bSMiri Korenblit * The 'flags' field is the same in v1 and in v2 so we can just 957f2134f66SGil Adam * use v1 to access it. 958f2134f66SGil Adam */ 959e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 960e12cfc7bSMiri Korenblit 9616ce1e5c0SGil Adam data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 9626ce1e5c0SGil Adam if (IS_ERR(data)) 9636ce1e5c0SGil Adam return PTR_ERR(data); 9646ce1e5c0SGil Adam 965e12cfc7bSMiri Korenblit /* try to read ppag table rev 2 or 1 (both have the same data size) */ 9666ce1e5c0SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 967f2134f66SGil Adam ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); 968f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 969e12cfc7bSMiri Korenblit if (tbl_rev == 1 || tbl_rev == 2) { 970e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V2; 971e12cfc7bSMiri Korenblit gain = mvm->fwrt.ppag_table.v2.gain[0]; 972e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver = tbl_rev; 973e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 974e12cfc7bSMiri Korenblit "Reading PPAG table v2 (tbl_rev=%d)\n", 975e12cfc7bSMiri Korenblit tbl_rev); 976e12cfc7bSMiri Korenblit goto read_table; 977e12cfc7bSMiri Korenblit } else { 978f2134f66SGil Adam ret = -EINVAL; 9796ce1e5c0SGil Adam goto out_free; 9806ce1e5c0SGil Adam } 981f2134f66SGil Adam } 9826ce1e5c0SGil Adam 983f2134f66SGil Adam /* try to read ppag table revision 0 */ 984f2134f66SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 985e12cfc7bSMiri Korenblit ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev); 986f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 9873ed83da3SLuca Coelho if (tbl_rev != 0) { 9883ed83da3SLuca Coelho ret = -EINVAL; 9893ed83da3SLuca Coelho goto out_free; 9903ed83da3SLuca Coelho } 991e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 992f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 993e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver = 0; 994f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n"); 995f2134f66SGil Adam goto read_table; 996f2134f66SGil Adam } 997f2134f66SGil Adam ret = PTR_ERR(wifi_pkg); 998f2134f66SGil Adam goto out_free; 9993ed83da3SLuca Coelho 1000f2134f66SGil Adam read_table: 1001e12cfc7bSMiri Korenblit flags = &wifi_pkg->package.elements[1]; 1002e12cfc7bSMiri Korenblit 1003e12cfc7bSMiri Korenblit if (flags->type != ACPI_TYPE_INTEGER) { 10046ce1e5c0SGil Adam ret = -EINVAL; 10056ce1e5c0SGil Adam goto out_free; 10066ce1e5c0SGil Adam } 10076ce1e5c0SGil Adam 1008e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(flags->integer.value & 1009e12cfc7bSMiri Korenblit IWL_PPAG_MASK); 1010e12cfc7bSMiri Korenblit 1011e12cfc7bSMiri Korenblit if (!mvm->fwrt.ppag_table.v1.flags) { 10126ce1e5c0SGil Adam ret = 0; 10136ce1e5c0SGil Adam goto out_free; 10146ce1e5c0SGil Adam } 10156ce1e5c0SGil Adam 10166ce1e5c0SGil Adam /* 10176ce1e5c0SGil Adam * read, verify gain values and save them into the PPAG table. 10186ce1e5c0SGil Adam * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 10196ce1e5c0SGil Adam * following sub-bands to High-Band (5GHz). 10206ce1e5c0SGil Adam */ 1021f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1022f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 10236ce1e5c0SGil Adam union acpi_object *ent; 10246ce1e5c0SGil Adam 10256ce1e5c0SGil Adam ent = &wifi_pkg->package.elements[idx++]; 10265a684245SLuca Coelho if (ent->type != ACPI_TYPE_INTEGER) { 10275a684245SLuca Coelho ret = -EINVAL; 10285a684245SLuca Coelho goto out_free; 10295a684245SLuca Coelho } 10305a684245SLuca Coelho 10315a684245SLuca Coelho gain[i * num_sub_bands + j] = ent->integer.value; 10325a684245SLuca Coelho 10335a684245SLuca Coelho if ((j == 0 && 10345a684245SLuca Coelho (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB || 10355a684245SLuca Coelho gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) || 10365a684245SLuca Coelho (j != 0 && 10375a684245SLuca Coelho (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB || 10385a684245SLuca Coelho gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) { 1039e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 10406ce1e5c0SGil Adam ret = -EINVAL; 10416ce1e5c0SGil Adam goto out_free; 10426ce1e5c0SGil Adam } 10436ce1e5c0SGil Adam } 10446ce1e5c0SGil Adam } 1045e12cfc7bSMiri Korenblit 10466ce1e5c0SGil Adam ret = 0; 10476ce1e5c0SGil Adam out_free: 10486ce1e5c0SGil Adam kfree(data); 10496ce1e5c0SGil Adam return ret; 10506ce1e5c0SGil Adam } 10516ce1e5c0SGil Adam 10526ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 10536ce1e5c0SGil Adam { 1054f2134f66SGil Adam u8 cmd_ver; 1055f2134f66SGil Adam int i, j, ret, num_sub_bands, cmd_size; 1056f2134f66SGil Adam s8 *gain; 10576ce1e5c0SGil Adam 10586ce1e5c0SGil Adam if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 10596ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10606ce1e5c0SGil Adam "PPAG capability not supported by FW, command not sent.\n"); 10616ce1e5c0SGil Adam return 0; 10626ce1e5c0SGil Adam } 1063e12cfc7bSMiri Korenblit if (!mvm->fwrt.ppag_table.v1.flags) { 1064f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n"); 1065160bab43SGil Adam return 0; 1066160bab43SGil Adam } 1067160bab43SGil Adam 1068f2134f66SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 1069e80bfd11SMordechay Goodstein PER_PLATFORM_ANT_GAIN_CMD, 1070e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 1071f2134f66SGil Adam if (cmd_ver == 1) { 1072e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 1073f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 1074659844d3SLuca Coelho cmd_size = sizeof(mvm->fwrt.ppag_table.v1); 1075e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) { 1076f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1077e12cfc7bSMiri Korenblit "PPAG table rev is %d but FW supports v1, sending truncated table\n", 1078e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver); 1079e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags &= 1080e12cfc7bSMiri Korenblit cpu_to_le32(IWL_PPAG_ETSI_MASK); 1081f2134f66SGil Adam } 1082e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 || cmd_ver == 3) { 1083f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS_V2; 1084f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v2.gain[0]; 1085659844d3SLuca Coelho cmd_size = sizeof(mvm->fwrt.ppag_table.v2); 1086e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 0) { 1087f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1088f2134f66SGil Adam "PPAG table is v1 but FW supports v2, sending padded table\n"); 1089e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) { 1090e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1091e12cfc7bSMiri Korenblit "PPAG table is v3 but FW supports v2, sending partial bitmap.\n"); 1092e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags &= 1093e12cfc7bSMiri Korenblit cpu_to_le32(IWL_PPAG_ETSI_MASK); 1094f2134f66SGil Adam } 1095f2134f66SGil Adam } else { 1096f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n"); 1097f2134f66SGil Adam return 0; 1098f2134f66SGil Adam } 10996ce1e5c0SGil Adam 1100f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1101f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 11026ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 11036ce1e5c0SGil Adam "PPAG table: chain[%d] band[%d]: gain = %d\n", 1104f2134f66SGil Adam i, j, gain[i * num_sub_bands + j]); 11056ce1e5c0SGil Adam } 11066ce1e5c0SGil Adam } 1107f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 11086ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 11096ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 1110659844d3SLuca Coelho 0, cmd_size, &mvm->fwrt.ppag_table); 11116ce1e5c0SGil Adam if (ret < 0) 11126ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 11136ce1e5c0SGil Adam ret); 11146ce1e5c0SGil Adam 11156ce1e5c0SGil Adam return ret; 11166ce1e5c0SGil Adam } 11176ce1e5c0SGil Adam 1118a2ac0f48SLuca Coelho static const struct dmi_system_id dmi_ppag_approved_list[] = { 1119ca176eddSLuca Coelho { .ident = "HP", 1120ca176eddSLuca Coelho .matches = { 1121ca176eddSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1122ca176eddSLuca Coelho }, 1123ca176eddSLuca Coelho }, 1124dd158ed6SLuca Coelho { .ident = "SAMSUNG", 1125dd158ed6SLuca Coelho .matches = { 1126dd158ed6SLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1127dd158ed6SLuca Coelho }, 1128dd158ed6SLuca Coelho }, 11294a76553cSLuca Coelho { .ident = "MSFT", 11304a76553cSLuca Coelho .matches = { 11314a76553cSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 11324a76553cSLuca Coelho }, 11334a76553cSLuca Coelho }, 1134a7abc1eaSLuca Coelho { .ident = "ASUS", 1135a7abc1eaSLuca Coelho .matches = { 1136a7abc1eaSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."), 1137a7abc1eaSLuca Coelho }, 1138a7abc1eaSLuca Coelho }, 1139a22549f1SWei Yongjun {} 1140a2ac0f48SLuca Coelho }; 1141a2ac0f48SLuca Coelho 11426ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 11436ce1e5c0SGil Adam { 114478a19d52SMiri Korenblit /* no need to read the table, done in INIT stage */ 1145a2ac0f48SLuca Coelho if (!dmi_check_system(dmi_ppag_approved_list)) { 1146a2ac0f48SLuca Coelho IWL_DEBUG_RADIO(mvm, 1147a2ac0f48SLuca Coelho "System vendor '%s' is not in the approved list, disabling PPAG.\n", 1148a2ac0f48SLuca Coelho dmi_get_system_info(DMI_SYS_VENDOR)); 1149e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 1150a2ac0f48SLuca Coelho return 0; 1151a2ac0f48SLuca Coelho } 1152a2ac0f48SLuca Coelho 11536ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 11546ce1e5c0SGil Adam } 11556ce1e5c0SGil Adam 115628dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 115728dd7ccdSMordechay Goodstein { 115828dd7ccdSMordechay Goodstein int ret; 1159*7c530588SMiri Korenblit struct iwl_tas_config_cmd_v3 cmd = {}; 1160*7c530588SMiri Korenblit int cmd_size; 116128dd7ccdSMordechay Goodstein 1162cdaba917SEmmanuel Grumbach BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) < 116328dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX); 116428dd7ccdSMordechay Goodstein 116528dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 116628dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 116728dd7ccdSMordechay Goodstein return; 116828dd7ccdSMordechay Goodstein } 116928dd7ccdSMordechay Goodstein 1170*7c530588SMiri Korenblit ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd); 117128dd7ccdSMordechay Goodstein if (ret < 0) { 117228dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, 117328dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n", 117428dd7ccdSMordechay Goodstein ret); 117528dd7ccdSMordechay Goodstein return; 117628dd7ccdSMordechay Goodstein } 117728dd7ccdSMordechay Goodstein 1178*7c530588SMiri Korenblit if (ret == 0) 117928dd7ccdSMordechay Goodstein return; 118028dd7ccdSMordechay Goodstein 1181*7c530588SMiri Korenblit cmd_size = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, 1182*7c530588SMiri Korenblit TAS_CONFIG, 1183*7c530588SMiri Korenblit IWL_FW_CMD_VER_UNKNOWN) < 3 ? 1184*7c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v2) : 1185*7c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v3); 118628dd7ccdSMordechay Goodstein 118728dd7ccdSMordechay Goodstein ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 118828dd7ccdSMordechay Goodstein TAS_CONFIG), 1189*7c530588SMiri Korenblit 0, cmd_size, &cmd); 119028dd7ccdSMordechay Goodstein if (ret < 0) 119128dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 119228dd7ccdSMordechay Goodstein } 1193f5b1cb2eSGil Adam 11944e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 11954e8fe214SGregory Greenman { 11964e8fe214SGregory Greenman u8 value; 119745fe1b6bSLuca Coelho int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 11984e8fe214SGregory Greenman &iwl_rfi_guid, &value); 11994e8fe214SGregory Greenman 12004e8fe214SGregory Greenman if (ret < 0) { 12014e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 12024e8fe214SGregory Greenman 12034e8fe214SGregory Greenman } else if (value >= DSM_VALUE_RFI_MAX) { 12044e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 12054e8fe214SGregory Greenman value); 12064e8fe214SGregory Greenman 12074e8fe214SGregory Greenman } else if (value == DSM_VALUE_RFI_ENABLE) { 12084e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 12094e8fe214SGregory Greenman return DSM_VALUE_RFI_ENABLE; 12104e8fe214SGregory Greenman } 12114e8fe214SGregory Greenman 12124e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 12134e8fe214SGregory Greenman 12144e8fe214SGregory Greenman /* default behaviour is disabled */ 12154e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 12164e8fe214SGregory Greenman } 12174e8fe214SGregory Greenman 1218f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1219f5b1cb2eSGil Adam { 12207119f02bSMiri Korenblit int ret; 12217119f02bSMiri Korenblit u32 value; 12221f578d4fSMiri Korenblit struct iwl_lari_config_change_cmd_v5 cmd = {}; 1223f5b1cb2eSGil Adam 1224f21afabaSHarish Mitty cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1225d2bfda8aSMiri Korenblit 122645fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 12277119f02bSMiri Korenblit &iwl_guid, &value); 12287119f02bSMiri Korenblit if (!ret) 12297119f02bSMiri Korenblit cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1230f5b1cb2eSGil Adam 123145fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 123254b4fda5SAbhishek Naik DSM_FUNC_ENABLE_UNII4_CHAN, 123354b4fda5SAbhishek Naik &iwl_guid, &value); 123454b4fda5SAbhishek Naik if (!ret) 123554b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 123654b4fda5SAbhishek Naik 123745fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 12381f578d4fSMiri Korenblit DSM_FUNC_ACTIVATE_CHANNEL, 12391f578d4fSMiri Korenblit &iwl_guid, &value); 12401f578d4fSMiri Korenblit if (!ret) 12411f578d4fSMiri Korenblit cmd.chan_state_active_bitmap = cpu_to_le32(value); 12421f578d4fSMiri Korenblit 1243698b166eSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1244698b166eSLuca Coelho DSM_FUNC_ENABLE_6E, 1245698b166eSLuca Coelho &iwl_guid, &value); 1246698b166eSLuca Coelho if (!ret) 1247698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1248698b166eSLuca Coelho 124954b4fda5SAbhishek Naik if (cmd.config_bitmap || 1250698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap || 125154b4fda5SAbhishek Naik cmd.oem_11ax_allow_bitmap || 12521f578d4fSMiri Korenblit cmd.oem_unii4_allow_bitmap || 12531f578d4fSMiri Korenblit cmd.chan_state_active_bitmap) { 12543c21990bSMiri Korenblit size_t cmd_size; 12553c21990bSMiri Korenblit u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 12563ce88247SMiri Korenblit REGULATORY_AND_NVM_GROUP, 12573c21990bSMiri Korenblit LARI_CONFIG_CHANGE, 1); 12581f578d4fSMiri Korenblit if (cmd_ver == 5) 12591f578d4fSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 12601f578d4fSMiri Korenblit else if (cmd_ver == 4) 126154b4fda5SAbhishek Naik cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 126254b4fda5SAbhishek Naik else if (cmd_ver == 3) 12633c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 12643c21990bSMiri Korenblit else if (cmd_ver == 2) 12653c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 12663c21990bSMiri Korenblit else 12673c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 12683c21990bSMiri Korenblit 12693ce88247SMiri Korenblit IWL_DEBUG_RADIO(mvm, 12707119f02bSMiri Korenblit "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 12717119f02bSMiri Korenblit le32_to_cpu(cmd.config_bitmap), 12727119f02bSMiri Korenblit le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 127354b4fda5SAbhishek Naik IWL_DEBUG_RADIO(mvm, 12741f578d4fSMiri Korenblit "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 127554b4fda5SAbhishek Naik le32_to_cpu(cmd.oem_unii4_allow_bitmap), 12761f578d4fSMiri Korenblit le32_to_cpu(cmd.chan_state_active_bitmap), 127754b4fda5SAbhishek Naik cmd_ver); 1278698b166eSLuca Coelho IWL_DEBUG_RADIO(mvm, 1279698b166eSLuca Coelho "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x\n", 1280698b166eSLuca Coelho le32_to_cpu(cmd.oem_uhb_allow_bitmap)); 12817119f02bSMiri Korenblit ret = iwl_mvm_send_cmd_pdu(mvm, 1282f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP, 1283f5b1cb2eSGil Adam LARI_CONFIG_CHANGE), 12843ce88247SMiri Korenblit 0, cmd_size, &cmd); 12857119f02bSMiri Korenblit if (ret < 0) 1286f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 1287f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n", 12887119f02bSMiri Korenblit ret); 1289f5b1cb2eSGil Adam } 1290f5b1cb2eSGil Adam } 129178a19d52SMiri Korenblit 129278a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 129378a19d52SMiri Korenblit { 129478a19d52SMiri Korenblit int ret; 129578a19d52SMiri Korenblit 129678a19d52SMiri Korenblit /* read PPAG table */ 129778a19d52SMiri Korenblit ret = iwl_mvm_get_ppag_table(mvm); 129878a19d52SMiri Korenblit if (ret < 0) { 129978a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 130078a19d52SMiri Korenblit "PPAG BIOS table invalid or unavailable. (%d)\n", 130178a19d52SMiri Korenblit ret); 130278a19d52SMiri Korenblit } 130378a19d52SMiri Korenblit 130478a19d52SMiri Korenblit /* read SAR tables */ 130578a19d52SMiri Korenblit ret = iwl_sar_get_wrds_table(&mvm->fwrt); 130678a19d52SMiri Korenblit if (ret < 0) { 130778a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 130878a19d52SMiri Korenblit "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 130978a19d52SMiri Korenblit ret); 131078a19d52SMiri Korenblit /* 131178a19d52SMiri Korenblit * If not available, don't fail and don't bother with EWRD and 131278a19d52SMiri Korenblit * WGDS */ 131378a19d52SMiri Korenblit 131478a19d52SMiri Korenblit if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 131578a19d52SMiri Korenblit /* 131678a19d52SMiri Korenblit * If basic SAR is not available, we check for WGDS, 131778a19d52SMiri Korenblit * which should *not* be available either. If it is 131878a19d52SMiri Korenblit * available, issue an error, because we can't use SAR 131978a19d52SMiri Korenblit * Geo without basic SAR. 132078a19d52SMiri Korenblit */ 132178a19d52SMiri Korenblit IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 132278a19d52SMiri Korenblit } 132378a19d52SMiri Korenblit 132478a19d52SMiri Korenblit } else { 132578a19d52SMiri Korenblit ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 132678a19d52SMiri Korenblit /* if EWRD is not available, we can still use 132778a19d52SMiri Korenblit * WRDS, so don't fail */ 132878a19d52SMiri Korenblit if (ret < 0) 132978a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 133078a19d52SMiri Korenblit "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 133178a19d52SMiri Korenblit ret); 133278a19d52SMiri Korenblit 133378a19d52SMiri Korenblit /* read geo SAR table */ 133478a19d52SMiri Korenblit if (iwl_sar_geo_support(&mvm->fwrt)) { 133578a19d52SMiri Korenblit ret = iwl_sar_get_wgds_table(&mvm->fwrt); 133678a19d52SMiri Korenblit if (ret < 0) 133778a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 133878a19d52SMiri Korenblit "Geo SAR BIOS table invalid or unavailable. (%d)\n", 133978a19d52SMiri Korenblit ret); 134078a19d52SMiri Korenblit /* we don't fail if the table is not available */ 134178a19d52SMiri Korenblit } 134278a19d52SMiri Korenblit } 134378a19d52SMiri Korenblit } 134469964905SLuca Coelho #else /* CONFIG_ACPI */ 134539c1a972SIhab Zhaika 134639c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 134739c1a972SIhab Zhaika int prof_a, int prof_b) 134869964905SLuca Coelho { 134978a19d52SMiri Korenblit return 1; 135069964905SLuca Coelho } 135169964905SLuca Coelho 135239c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 13535d041c46SLuca Coelho { 13545d041c46SLuca Coelho return -ENOENT; 13555d041c46SLuca Coelho } 13565d041c46SLuca Coelho 1357a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1358a6bff3cbSHaim Dreyfuss { 1359a6bff3cbSHaim Dreyfuss return 0; 1360a6bff3cbSHaim Dreyfuss } 136118f1755dSLuca Coelho 13626ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 13636ce1e5c0SGil Adam { 13646ce1e5c0SGil Adam return -ENOENT; 13656ce1e5c0SGil Adam } 13666ce1e5c0SGil Adam 13676ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 13686ce1e5c0SGil Adam { 13697937fd32SJohannes Berg return 0; 13706ce1e5c0SGil Adam } 137128dd7ccdSMordechay Goodstein 137228dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 137328dd7ccdSMordechay Goodstein { 137428dd7ccdSMordechay Goodstein } 1375f5b1cb2eSGil Adam 1376f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1377f5b1cb2eSGil Adam { 1378f5b1cb2eSGil Adam } 13794e8fe214SGregory Greenman 13804e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 13814e8fe214SGregory Greenman { 13824e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 13834e8fe214SGregory Greenman } 138478a19d52SMiri Korenblit 138578a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 138678a19d52SMiri Korenblit { 138778a19d52SMiri Korenblit } 1388c593d2faSAyala Barazani 138969964905SLuca Coelho #endif /* CONFIG_ACPI */ 139069964905SLuca Coelho 1391f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1392f130bb75SMordechay Goodstein { 1393f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1394f130bb75SMordechay Goodstein int ret; 1395f130bb75SMordechay Goodstein u32 resp; 1396f130bb75SMordechay Goodstein 1397f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1398f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1399f130bb75SMordechay Goodstein .buf_size = 0, 1400f130bb75SMordechay Goodstein }; 1401f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1402f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1403f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1404f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1405f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1406f130bb75SMordechay Goodstein }; 1407f130bb75SMordechay Goodstein 1408f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1409f130bb75SMordechay Goodstein if (!error_log_size) 1410f130bb75SMordechay Goodstein return; 1411f130bb75SMordechay Goodstein 1412f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1413f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1414f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1415f130bb75SMordechay Goodstein return; 1416f130bb75SMordechay Goodstein 1417f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1418f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1419f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1420f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1421f130bb75SMordechay Goodstein } 1422f130bb75SMordechay Goodstein 1423f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1424f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1425f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1426f130bb75SMordechay Goodstein 1427f130bb75SMordechay Goodstein if (ret) { 1428f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1429f130bb75SMordechay Goodstein return; 1430f130bb75SMordechay Goodstein } 1431f130bb75SMordechay Goodstein 1432f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1433f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1434f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1435f130bb75SMordechay Goodstein if (resp) 1436f130bb75SMordechay Goodstein IWL_ERR(mvm, 1437f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1438f130bb75SMordechay Goodstein resp); 1439f130bb75SMordechay Goodstein } 1440f130bb75SMordechay Goodstein } 1441f130bb75SMordechay Goodstein 144242ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 144342ce76d6SLuca Coelho { 14441edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1); 1445da2830acSLuca Coelho } 1446da2830acSLuca Coelho 14471f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 14481f370650SSara Sharon { 14491f370650SSara Sharon int ret; 14501f370650SSara Sharon 14517d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 145252b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 14531f370650SSara Sharon 14543b25f1afSEmmanuel Grumbach ret = iwl_run_init_mvm_ucode(mvm); 14551f370650SSara Sharon 14561f370650SSara Sharon if (ret) { 14571f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1458f4744258SLiad Kaufman 1459f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1460f4744258SLiad Kaufman return 0; 14611f370650SSara Sharon return ret; 14621f370650SSara Sharon } 14631f370650SSara Sharon 1464203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1465bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1466bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 14671f370650SSara Sharon if (ret) 14681f370650SSara Sharon return ret; 14691f370650SSara Sharon 147094022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 14711f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 14721f370650SSara Sharon if (ret) 14731f370650SSara Sharon return ret; 14741f370650SSara Sharon 147594022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 147694022562SEmmanuel Grumbach 1477b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1478b108d8c7SShahar S Matityahu NULL); 1479da2eb669SSara Sharon 1480702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 14811f370650SSara Sharon } 14821f370650SSara Sharon 1483e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1484e705c121SKalle Valo { 1485e705c121SKalle Valo int ret, i; 1486e705c121SKalle Valo struct ieee80211_channel *chan; 1487e705c121SKalle Valo struct cfg80211_chan_def chandef; 1488dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1489e705c121SKalle Valo 1490e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1491e705c121SKalle Valo 1492e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1493e705c121SKalle Valo if (ret) 1494e705c121SKalle Valo return ret; 1495e705c121SKalle Valo 14961f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1497e705c121SKalle Valo if (ret) { 1498e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 149972d3c7bbSJohannes Berg if (ret != -ERFKILL) 150072d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 150172d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1502e705c121SKalle Valo goto error; 1503e705c121SKalle Valo } 1504e705c121SKalle Valo 1505d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1506e705c121SKalle Valo 1507e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1508e705c121SKalle Valo if (ret) 1509e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1510e705c121SKalle Valo 1511a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 15127174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1513e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 151417b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 15157174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 15167174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 15177a14c23dSSara Sharon } 1518e705c121SKalle Valo 1519e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1520e705c121SKalle Valo if (ret) 1521e705c121SKalle Valo goto error; 1522e705c121SKalle Valo 15237d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1524e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1525e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1526e705c121SKalle Valo if (ret) 1527e705c121SKalle Valo goto error; 1528bb99ff9bSLuca Coelho } 1529e705c121SKalle Valo 1530e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1531e705c121SKalle Valo if (ret) 1532e705c121SKalle Valo goto error; 1533e705c121SKalle Valo 1534b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1535b3de3ef4SEmmanuel Grumbach if (ret) 1536b3de3ef4SEmmanuel Grumbach goto error; 1537b3de3ef4SEmmanuel Grumbach 1538cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa, 1539cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1540a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt); 1541cceb4507SShahar S Matityahu if (ret) 1542cceb4507SShahar S Matityahu goto error; 1543cceb4507SShahar S Matityahu } 1544cceb4507SShahar S Matityahu 154543413a97SSara Sharon /* Init RSS configuration */ 15469cd243f2SMordechay Goodstein ret = iwl_configure_rxq(&mvm->fwrt); 15479cd243f2SMordechay Goodstein if (ret) 15488edbfaa1SSara Sharon goto error; 15498edbfaa1SSara Sharon 15508edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 155143413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 155243413a97SSara Sharon if (ret) { 155343413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 155443413a97SSara Sharon ret); 155543413a97SSara Sharon goto error; 155643413a97SSara Sharon } 155743413a97SSara Sharon } 155843413a97SSara Sharon 1559e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1560be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1561e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1562e705c121SKalle Valo 15630ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1564e705c121SKalle Valo 1565e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1566e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1567e705c121SKalle Valo 156879660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 156997d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 157097d5be7eSLiad Kaufman if (ret) 157197d5be7eSLiad Kaufman goto error; 157279660869SIlia Lin } 157397d5be7eSLiad Kaufman 15742c2c3647SNathan Errera /* 15752c2c3647SNathan Errera * Add auxiliary station for scanning. 15762c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 15772c2c3647SNathan Errera * internal aux station for all aux activities that don't 15782c2c3647SNathan Errera * requires a dedicated data queue. 15792c2c3647SNathan Errera */ 15802c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 15812c2c3647SNathan Errera ADD_STA, 15822c2c3647SNathan Errera 0) < 12) { 15832c2c3647SNathan Errera /* 15842c2c3647SNathan Errera * In old version the aux station uses mac id like other 15852c2c3647SNathan Errera * station and not lmac id 15862c2c3647SNathan Errera */ 15872c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1588e705c121SKalle Valo if (ret) 1589e705c121SKalle Valo goto error; 15902c2c3647SNathan Errera } 1591e705c121SKalle Valo 1592e705c121SKalle Valo /* Add all the PHY contexts */ 1593dd36a507STova Mussai i = 0; 1594dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1595dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1596dd36a507STova Mussai 1597dd36a507STova Mussai if (WARN_ON_ONCE(!sband)) 1598dd36a507STova Mussai goto error; 1599dd36a507STova Mussai 1600dd36a507STova Mussai chan = &sband->channels[0]; 1601dd36a507STova Mussai 1602e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1603e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1604e705c121SKalle Valo /* 1605e705c121SKalle Valo * The channel used here isn't relevant as it's 1606e705c121SKalle Valo * going to be overwritten in the other flows. 1607e705c121SKalle Valo * For now use the first channel we have. 1608e705c121SKalle Valo */ 1609e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1610e705c121SKalle Valo &chandef, 1, 1); 1611e705c121SKalle Valo if (ret) 1612e705c121SKalle Valo goto error; 1613e705c121SKalle Valo } 1614e705c121SKalle Valo 1615c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1616c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1617c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1618c221daf2SChaya Rachel Ivgi * cmd during init time 1619c221daf2SChaya Rachel Ivgi */ 1620c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1621c221daf2SChaya Rachel Ivgi } else { 1622e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1623e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1624c221daf2SChaya Rachel Ivgi } 16255c89e7bcSChaya Rachel Ivgi 1626242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 16275c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1628944eafc2SChaya Rachel Ivgi 1629944eafc2SChaya Rachel Ivgi /* 1630944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1631944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1632944eafc2SChaya Rachel Ivgi */ 1633944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 16345c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 16355c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 163675cfe338SLuca Coelho if (ret) 163775cfe338SLuca Coelho goto error; 163875cfe338SLuca Coelho } 1639c221daf2SChaya Rachel Ivgi #endif 1640e705c121SKalle Valo 1641aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1642e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1643e705c121SKalle Valo 1644e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1645e705c121SKalle Valo if (ret) 1646e705c121SKalle Valo goto error; 1647e705c121SKalle Valo 1648f5b1cb2eSGil Adam iwl_mvm_lari_cfg(mvm); 1649e705c121SKalle Valo /* 1650e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1651e705c121SKalle Valo * anyway, so don't init MCC. 1652e705c121SKalle Valo */ 1653e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1654e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1655e705c121SKalle Valo if (ret) 1656e705c121SKalle Valo goto error; 1657e705c121SKalle Valo } 1658e705c121SKalle Valo 1659e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 16604ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1661b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1662e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1663e705c121SKalle Valo if (ret) 1664e705c121SKalle Valo goto error; 1665e705c121SKalle Valo } 1666e705c121SKalle Valo 1667f130bb75SMordechay Goodstein if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1668f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1669f130bb75SMordechay Goodstein 167048e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 167148e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 167248e775e6SHaim Dreyfuss 16736ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 16746ce1e5c0SGil Adam if (ret) 16756ce1e5c0SGil Adam goto error; 16766ce1e5c0SGil Adam 1677da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 167878a19d52SMiri Korenblit if (ret == 0) 1679a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 168078a19d52SMiri Korenblit else if (ret < 0) 1681a6bff3cbSHaim Dreyfuss goto error; 1682a6bff3cbSHaim Dreyfuss 1683c593d2faSAyala Barazani ret = iwl_mvm_sgom_init(mvm); 1684c593d2faSAyala Barazani if (ret) 1685c593d2faSAyala Barazani goto error; 1686c593d2faSAyala Barazani 168728dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm); 16887089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 16897089ae63SJohannes Berg 1690b68bd2e3SIlan Peer iwl_mvm_ftm_initiator_smooth_config(mvm); 1691b68bd2e3SIlan Peer 16924e8fe214SGregory Greenman if (fw_has_capa(&mvm->fw->ucode_capa, 16934e8fe214SGregory Greenman IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 16944e8fe214SGregory Greenman if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 16954e8fe214SGregory Greenman iwl_rfi_send_config_cmd(mvm, NULL); 16964e8fe214SGregory Greenman } 16974e8fe214SGregory Greenman 1698e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1699e705c121SKalle Valo return 0; 1700e705c121SKalle Valo error: 1701f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1702fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1703e705c121SKalle Valo return ret; 1704e705c121SKalle Valo } 1705e705c121SKalle Valo 1706e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1707e705c121SKalle Valo { 1708e705c121SKalle Valo int ret, i; 1709e705c121SKalle Valo 1710e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1711e705c121SKalle Valo 1712e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1713e705c121SKalle Valo if (ret) 1714e705c121SKalle Valo return ret; 1715e705c121SKalle Valo 1716e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1717e705c121SKalle Valo if (ret) { 1718e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1719e705c121SKalle Valo goto error; 1720e705c121SKalle Valo } 1721e705c121SKalle Valo 1722e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1723e705c121SKalle Valo if (ret) 1724e705c121SKalle Valo goto error; 1725e705c121SKalle Valo 1726e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1727e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1728e705c121SKalle Valo if (ret) 1729e705c121SKalle Valo goto error; 1730e705c121SKalle Valo 1731e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1732e705c121SKalle Valo if (ret) 1733e705c121SKalle Valo goto error; 1734e705c121SKalle Valo 1735e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1736be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1737e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1738e705c121SKalle Valo 17392c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 17402c2c3647SNathan Errera ADD_STA, 17412c2c3647SNathan Errera 0) < 12) { 17422c2c3647SNathan Errera /* 17432c2c3647SNathan Errera * Add auxiliary station for scanning. 17442c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 17452c2c3647SNathan Errera * internal aux station for all aux activities that don't 17462c2c3647SNathan Errera * requires a dedicated data queue. 17472c2c3647SNathan Errera * In old version the aux station uses mac id like other 17482c2c3647SNathan Errera * station and not lmac id 17492c2c3647SNathan Errera */ 17502c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1751e705c121SKalle Valo if (ret) 1752e705c121SKalle Valo goto error; 17532c2c3647SNathan Errera } 1754e705c121SKalle Valo 1755e705c121SKalle Valo return 0; 1756e705c121SKalle Valo error: 1757fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1758e705c121SKalle Valo return ret; 1759e705c121SKalle Valo } 1760e705c121SKalle Valo 1761e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1762e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1763e705c121SKalle Valo { 1764e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1765e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1766e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1767e705c121SKalle Valo 1768e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1769e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1770e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1771e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1772e705c121SKalle Valo "Reached" : "Not reached"); 1773e705c121SKalle Valo } 1774e705c121SKalle Valo 1775e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1776e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1777e705c121SKalle Valo { 1778e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1779e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1780e705c121SKalle Valo 1781e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1782e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1783e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1784e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1785e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1786e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 17870c8d0a47SGolan Ben-Ami 17880c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 17890c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 17900c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 17910c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1792e705c121SKalle Valo } 1793