18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 28e99ea8dSJohannes Berg /* 34f7411d6SRoee Goldfiner * Copyright (C) 2012-2014, 2018-2021 Intel Corporation 48e99ea8dSJohannes Berg * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 58e99ea8dSJohannes Berg * Copyright (C) 2016-2017 Intel Deutschland GmbH 68e99ea8dSJohannes Berg */ 7e705c121SKalle Valo #include <net/mac80211.h> 8854d773eSSara Sharon #include <linux/netdevice.h> 9a2ac0f48SLuca Coelho #include <linux/dmi.h> 10e705c121SKalle Valo 11e705c121SKalle Valo #include "iwl-trans.h" 12e705c121SKalle Valo #include "iwl-op-mode.h" 13d962f9b1SJohannes Berg #include "fw/img.h" 14e705c121SKalle Valo #include "iwl-debug.h" 15e705c121SKalle Valo #include "iwl-prph.h" 16813df5ceSLuca Coelho #include "fw/acpi.h" 17b3e4c0f3SLuca Coelho #include "fw/pnvm.h" 18e705c121SKalle Valo 19e705c121SKalle Valo #include "mvm.h" 207174beb6SJohannes Berg #include "fw/dbg.h" 21e705c121SKalle Valo #include "iwl-phy-db.h" 229c4f7d51SShaul Triebitz #include "iwl-modparams.h" 239c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 24e705c121SKalle Valo 25b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 26e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 27e705c121SKalle Valo 28e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 29e705c121SKalle Valo 30e12cfc7bSMiri Korenblit #define IWL_PPAG_MASK 3 31e12cfc7bSMiri Korenblit #define IWL_PPAG_ETSI_MASK BIT(0) 32e12cfc7bSMiri Korenblit 33c3f40c3eSMiri Korenblit #define IWL_TAS_US_MCC 0x5553 34c3f40c3eSMiri Korenblit #define IWL_TAS_CANADA_MCC 0x4341 35c3f40c3eSMiri Korenblit 36e705c121SKalle Valo struct iwl_mvm_alive_data { 37e705c121SKalle Valo bool valid; 38e705c121SKalle Valo u32 scd_base_addr; 39e705c121SKalle Valo }; 40e705c121SKalle Valo 41e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 42e705c121SKalle Valo { 43e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 44e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 45e705c121SKalle Valo }; 46e705c121SKalle Valo 47e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 48e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 49e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 50e705c121SKalle Valo } 51e705c121SKalle Valo 5243413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 5343413a97SSara Sharon { 5443413a97SSara Sharon int i; 5543413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 5643413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 57608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 58608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 59608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 60608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 61608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 62608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 6343413a97SSara Sharon }; 6443413a97SSara Sharon 65f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 66f43495fdSSara Sharon return 0; 67f43495fdSSara Sharon 68854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 6943413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 70854d773eSSara Sharon cmd.indirection_table[i] = 71854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 72854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 7343413a97SSara Sharon 7443413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 7543413a97SSara Sharon } 7643413a97SSara Sharon 7797d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 7897d5be7eSLiad Kaufman { 7997d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 8097d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 8197d5be7eSLiad Kaufman }; 8297d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 8397d5be7eSLiad Kaufman int ret; 8497d5be7eSLiad Kaufman 8597d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 8697d5be7eSLiad Kaufman if (ret) 8797d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 8897d5be7eSLiad Kaufman else 8997d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 9097d5be7eSLiad Kaufman 9197d5be7eSLiad Kaufman return ret; 9297d5be7eSLiad Kaufman } 9397d5be7eSLiad Kaufman 94bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 95bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 96bdccdb85SGolan Ben-Ami { 97bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 98bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 99bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 100bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 101bdccdb85SGolan Ben-Ami int i; 102bdccdb85SGolan Ben-Ami 103bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 104bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 105bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 106bdccdb85SGolan Ben-Ami 107bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 108bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 109bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 110bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 111bdccdb85SGolan Ben-Ami n_words + i, 112bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 113bdccdb85SGolan Ben-Ami } 114bdccdb85SGolan Ben-Ami 115e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 116e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 117e705c121SKalle Valo { 118fd1c3318SJohannes Berg unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 119e705c121SKalle Valo struct iwl_mvm *mvm = 120e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 121e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 1225c228d63SSara Sharon struct iwl_umac_alive *umac; 1235c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 1245c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 1255c228d63SSara Sharon u16 status; 126cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table; 127708d8c53SJohannes Berg u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 128708d8c53SJohannes Berg UCODE_ALIVE_NTFY, 0); 129e705c121SKalle Valo 13090824f2fSLuca Coelho /* 13190824f2fSLuca Coelho * For v5 and above, we can check the version, for older 13290824f2fSLuca Coelho * versions we need to check the size. 13390824f2fSLuca Coelho */ 134708d8c53SJohannes Berg if (version == 5 || version == 6) { 135708d8c53SJohannes Berg /* v5 and v6 are compatible (only IMR addition) */ 13690824f2fSLuca Coelho struct iwl_alive_ntf_v5 *palive; 13790824f2fSLuca Coelho 138fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 139fd1c3318SJohannes Berg return false; 140fd1c3318SJohannes Berg 14190824f2fSLuca Coelho palive = (void *)pkt->data; 14290824f2fSLuca Coelho umac = &palive->umac_data; 14390824f2fSLuca Coelho lmac1 = &palive->lmac_data[0]; 14490824f2fSLuca Coelho lmac2 = &palive->lmac_data[1]; 14590824f2fSLuca Coelho status = le16_to_cpu(palive->status); 14690824f2fSLuca Coelho 14790824f2fSLuca Coelho mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 14890824f2fSLuca Coelho mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 14990824f2fSLuca Coelho mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 15090824f2fSLuca Coelho 15190824f2fSLuca Coelho IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 15290824f2fSLuca Coelho mvm->trans->sku_id[0], 15390824f2fSLuca Coelho mvm->trans->sku_id[1], 15490824f2fSLuca Coelho mvm->trans->sku_id[2]); 15590824f2fSLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 1569422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive; 1579422b978SLuca Coelho 158fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 159fd1c3318SJohannes Berg return false; 160fd1c3318SJohannes Berg 161e705c121SKalle Valo palive = (void *)pkt->data; 1625c228d63SSara Sharon umac = &palive->umac_data; 1635c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 1645c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 1655c228d63SSara Sharon status = le16_to_cpu(palive->status); 1669422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == 1679422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) { 1689422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3; 1699422b978SLuca Coelho 170fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive3)) 171fd1c3318SJohannes Berg return false; 172fd1c3318SJohannes Berg 1735c228d63SSara Sharon palive3 = (void *)pkt->data; 1745c228d63SSara Sharon umac = &palive3->umac_data; 1755c228d63SSara Sharon lmac1 = &palive3->lmac_data; 1765c228d63SSara Sharon status = le16_to_cpu(palive3->status); 1779422b978SLuca Coelho } else { 1789422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n", 1799422b978SLuca Coelho iwl_rx_packet_payload_len(pkt)); 1809422b978SLuca Coelho /* get timeout later */ 1819422b978SLuca Coelho return false; 1825c228d63SSara Sharon } 183e705c121SKalle Valo 18422463857SShahar S Matityahu lmac_error_event_table = 18522463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 18622463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 187e705c121SKalle Valo 18822463857SShahar S Matityahu if (lmac2) 18991c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 19022463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 19122463857SShahar S Matityahu 1924f7411d6SRoee Goldfiner umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 1934f7411d6SRoee Goldfiner ~FW_ADDR_CACHE_CONTROL; 1945c228d63SSara Sharon 195cfa5d0caSMordechay Goodstein if (umac_error_table) { 196cfa5d0caSMordechay Goodstein if (umac_error_table >= 1973485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 198cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans, 199cfa5d0caSMordechay Goodstein umac_error_table); 2003485e76eSLuca Coelho } else { 201fb5b2846SLuca Coelho IWL_ERR(mvm, 202fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 203cfa5d0caSMordechay Goodstein umac_error_table, 204fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 205fb5b2846SLuca Coelho "Init" : "RT"); 2063485e76eSLuca Coelho } 207cfa5d0caSMordechay Goodstein } 20822463857SShahar S Matityahu 20922463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2105c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 211e705c121SKalle Valo 212e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2135c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2145c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2155c228d63SSara Sharon 2165c228d63SSara Sharon if (lmac2) 2175c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 218e705c121SKalle Valo 219e705c121SKalle Valo IWL_DEBUG_FW(mvm, 220e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2215c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2225c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 223e705c121SKalle Valo 2240a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2250a3a3e9eSShahar S Matityahu 226e705c121SKalle Valo return true; 227e705c121SKalle Valo } 228e705c121SKalle Valo 2291f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2301f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2311f370650SSara Sharon { 2321f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2331f370650SSara Sharon 2341f370650SSara Sharon return true; 2351f370650SSara Sharon } 2361f370650SSara Sharon 237e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 238e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 239e705c121SKalle Valo { 240e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 241e705c121SKalle Valo 242e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 243e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 244e705c121SKalle Valo return true; 245e705c121SKalle Valo } 246e705c121SKalle Valo 247ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 248e705c121SKalle Valo 249e705c121SKalle Valo return false; 250e705c121SKalle Valo } 251e705c121SKalle Valo 252e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 253e705c121SKalle Valo enum iwl_ucode_type ucode_type) 254e705c121SKalle Valo { 255e705c121SKalle Valo struct iwl_notification_wait alive_wait; 25694a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 257e705c121SKalle Valo const struct fw_img *fw; 258cfbc6c4cSSara Sharon int ret; 259702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 2609422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 261b3500b47SEmmanuel Grumbach bool run_in_rfkill = 262b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 263e705c121SKalle Valo 264e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 2653d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 2663d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 2673d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 268612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 269e705c121SKalle Valo else 270612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 271e705c121SKalle Valo if (WARN_ON(!fw)) 272e705c121SKalle Valo return -EINVAL; 273702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 27465b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 275e705c121SKalle Valo 276e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 277e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 278e705c121SKalle Valo iwl_alive_fn, &alive_data); 279e705c121SKalle Valo 280b3500b47SEmmanuel Grumbach /* 281b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 282b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 283b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 284b3500b47SEmmanuel Grumbach */ 285b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 286e705c121SKalle Valo if (ret) { 287702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 288e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 289e705c121SKalle Valo return ret; 290e705c121SKalle Valo } 291e705c121SKalle Valo 292e705c121SKalle Valo /* 293e705c121SKalle Valo * Some things may run in the background now, but we 294e705c121SKalle Valo * just wait for the ALIVE notification here. 295e705c121SKalle Valo */ 296e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 297e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 298e705c121SKalle Valo if (ret) { 299d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 300d6be9c1dSSara Sharon 3015667ccc2SMordechay Goodstein /* SecBoot info */ 30220f5aef5SJohannes Berg if (trans->trans_cfg->device_family >= 30320f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) { 304e705c121SKalle Valo IWL_ERR(mvm, 305e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 306ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 307ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 308ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 3095667ccc2SMordechay Goodstein } else if (trans->trans_cfg->device_family >= 3105667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_8000) { 3115667ccc2SMordechay Goodstein IWL_ERR(mvm, 3125667ccc2SMordechay Goodstein "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 3135667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_1_STATUS), 3145667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_2_STATUS)); 3155667ccc2SMordechay Goodstein } 3165667ccc2SMordechay Goodstein 3175667ccc2SMordechay Goodstein /* LMAC/UMAC PC info */ 3185667ccc2SMordechay Goodstein if (trans->trans_cfg->device_family >= 3195667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_9000) { 32020f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n", 32120f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32220f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC)); 32320f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n", 32420f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32520f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC)); 32620f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm)) 32720f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 32820f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32920f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC)); 33020f5aef5SJohannes Berg } 33120f5aef5SJohannes Berg 33220f5aef5SJohannes Berg if (ret == -ETIMEDOUT) 33320f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 33420f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT); 33520f5aef5SJohannes Berg 336702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 337e705c121SKalle Valo return ret; 338e705c121SKalle Valo } 339e705c121SKalle Valo 340e705c121SKalle Valo if (!alive_data.valid) { 341e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 342702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 343e705c121SKalle Valo return -EIO; 344e705c121SKalle Valo } 345e705c121SKalle Valo 346b3e4c0f3SLuca Coelho ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 34770d3ca86SLuca Coelho if (ret) { 34870d3ca86SLuca Coelho IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 34970d3ca86SLuca Coelho iwl_fw_set_current_image(&mvm->fwrt, old_type); 35070d3ca86SLuca Coelho return ret; 35170d3ca86SLuca Coelho } 35270d3ca86SLuca Coelho 353e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 354e705c121SKalle Valo 355e705c121SKalle Valo /* 356e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 357e705c121SKalle Valo * initialization, but in firmware restart scenarios they 358e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 359e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 360e705c121SKalle Valo * reconfiguration completes. During normal startup, they 361e705c121SKalle Valo * will be empty. 362e705c121SKalle Valo */ 363e705c121SKalle Valo 364e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 3651c14089eSJohannes Berg /* 3661c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 3671c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 3681c14089eSJohannes Berg * we ever even consider the command queue as one we might 3691c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 3701c14089eSJohannes Berg */ 3711c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 3721c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 373e705c121SKalle Valo 37465b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 375f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 376f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 377f7805b33SLior Cohen #endif 378e705c121SKalle Valo 379d3d9b4fcSEmmanuel Grumbach /* 380d3d9b4fcSEmmanuel Grumbach * All the BSSes in the BSS table include the GP2 in the system 381d3d9b4fcSEmmanuel Grumbach * at the beacon Rx time, this is of course no longer relevant 382d3d9b4fcSEmmanuel Grumbach * since we are resetting the firmware. 383d3d9b4fcSEmmanuel Grumbach * Purge all the BSS table. 384d3d9b4fcSEmmanuel Grumbach */ 385d3d9b4fcSEmmanuel Grumbach cfg80211_bss_flush(mvm->hw->wiphy); 386d3d9b4fcSEmmanuel Grumbach 387e705c121SKalle Valo return 0; 388e705c121SKalle Valo } 389e705c121SKalle Valo 39052b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 3918c5f47b1SJohannes Berg { 3928c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 3938c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 3948c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 3958c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 3968c5f47b1SJohannes Berg }; 3978c5f47b1SJohannes Berg static const u16 init_complete[] = { 3988c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 3998c5f47b1SJohannes Berg }; 4008c5f47b1SJohannes Berg int ret; 4018c5f47b1SJohannes Berg 402a4584729SHaim Dreyfuss if (mvm->trans->cfg->tx_with_siso_diversity) 403a4584729SHaim Dreyfuss init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 404a4584729SHaim Dreyfuss 4058c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 4068c5f47b1SJohannes Berg 40794022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 40894022562SEmmanuel Grumbach 4098c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 4108c5f47b1SJohannes Berg &init_wait, 4118c5f47b1SJohannes Berg init_complete, 4128c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 4138c5f47b1SJohannes Berg iwl_wait_init_complete, 4148c5f47b1SJohannes Berg NULL); 4158c5f47b1SJohannes Berg 416b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 41786ce5c74SShahar S Matityahu 4188c5f47b1SJohannes Berg /* Will also start the device */ 4198c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4208c5f47b1SJohannes Berg if (ret) { 4218c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4228c5f47b1SJohannes Berg goto error; 4238c5f47b1SJohannes Berg } 424b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 425b108d8c7SShahar S Matityahu NULL); 4268c5f47b1SJohannes Berg 4278c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4288c5f47b1SJohannes Berg * commands 4298c5f47b1SJohannes Berg */ 4308c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 431b3500b47SEmmanuel Grumbach INIT_EXTENDED_CFG_CMD), 432b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4338c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4348c5f47b1SJohannes Berg if (ret) { 4358c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4368c5f47b1SJohannes Berg ret); 4378c5f47b1SJohannes Berg goto error; 4388c5f47b1SJohannes Berg } 4398c5f47b1SJohannes Berg 440e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 441e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4429ce505feSAbhishek Naik ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4439c4f7d51SShaul Triebitz mvm->nvm_sections); 4449ce505feSAbhishek Naik if (ret) 4459ce505feSAbhishek Naik goto error; 4469ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 4479ce505feSAbhishek Naik if (ret) 4489ce505feSAbhishek Naik goto error; 449e9e1ba3dSSara Sharon } 4508c5f47b1SJohannes Berg 45152b15521SEmmanuel Grumbach if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4525bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 453d4f3695eSSara Sharon if (ret) { 454d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 455d4f3695eSSara Sharon goto error; 456d4f3695eSSara Sharon } 457d4f3695eSSara Sharon } 458d4f3695eSSara Sharon 4598c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 460b3500b47SEmmanuel Grumbach NVM_ACCESS_COMPLETE), 461b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4628c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4638c5f47b1SJohannes Berg if (ret) { 4648c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4658c5f47b1SJohannes Berg ret); 4668c5f47b1SJohannes Berg goto error; 4678c5f47b1SJohannes Berg } 4688c5f47b1SJohannes Berg 4698c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 470e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4718c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 472e9e1ba3dSSara Sharon if (ret) 473e9e1ba3dSSara Sharon return ret; 474e9e1ba3dSSara Sharon 475e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 47652b15521SEmmanuel Grumbach if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4774c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 478c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 479c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 480c135cb56SShaul Triebitz mvm->nvm_data = NULL; 481e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 482e9e1ba3dSSara Sharon return ret; 483e9e1ba3dSSara Sharon } 484e9e1ba3dSSara Sharon } 485e9e1ba3dSSara Sharon 486b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 487b3500b47SEmmanuel Grumbach 488e9e1ba3dSSara Sharon return 0; 4898c5f47b1SJohannes Berg 4908c5f47b1SJohannes Berg error: 4918c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 4928c5f47b1SJohannes Berg return ret; 4938c5f47b1SJohannes Berg } 4948c5f47b1SJohannes Berg 495c4ace426SGil Adam #ifdef CONFIG_ACPI 496c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 497c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 498c4ace426SGil Adam { 499c4ace426SGil Adam /* 500c4ace426SGil Adam * TODO: read specific phy config from BIOS 501c4ace426SGil Adam * ACPI table for this feature has not been defined yet, 502c4ace426SGil Adam * so for now we use hardcoded values. 503c4ace426SGil Adam */ 504c4ace426SGil Adam 505c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_A) { 506c4ace426SGil Adam phy_filters->filter_cfg_chain_a = 507c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 508c4ace426SGil Adam } 509c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_B) { 510c4ace426SGil Adam phy_filters->filter_cfg_chain_b = 511c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 512c4ace426SGil Adam } 513c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_C) { 514c4ace426SGil Adam phy_filters->filter_cfg_chain_c = 515c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 516c4ace426SGil Adam } 517c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_D) { 518c4ace426SGil Adam phy_filters->filter_cfg_chain_d = 519c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 520c4ace426SGil Adam } 521c4ace426SGil Adam } 522c4ace426SGil Adam #else /* CONFIG_ACPI */ 523c4ace426SGil Adam 524c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 525c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 526c4ace426SGil Adam { 527c4ace426SGil Adam } 528c4ace426SGil Adam #endif /* CONFIG_ACPI */ 529c4ace426SGil Adam 530c593d2faSAyala Barazani #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 531c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 532c593d2faSAyala Barazani { 533c593d2faSAyala Barazani u8 cmd_ver; 534c593d2faSAyala Barazani int ret; 535c593d2faSAyala Barazani struct iwl_host_cmd cmd = { 536c593d2faSAyala Barazani .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 537c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD), 538c593d2faSAyala Barazani .flags = 0, 539c593d2faSAyala Barazani .data[0] = &mvm->fwrt.sgom_table, 540c593d2faSAyala Barazani .len[0] = sizeof(mvm->fwrt.sgom_table), 541c593d2faSAyala Barazani .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 542c593d2faSAyala Barazani }; 543c593d2faSAyala Barazani 544c593d2faSAyala Barazani if (!mvm->fwrt.sgom_enabled) { 545c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 546c593d2faSAyala Barazani return 0; 547c593d2faSAyala Barazani } 548c593d2faSAyala Barazani 549c593d2faSAyala Barazani cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, 550c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD, 551c593d2faSAyala Barazani IWL_FW_CMD_VER_UNKNOWN); 552c593d2faSAyala Barazani 553c593d2faSAyala Barazani if (cmd_ver != 2) { 554c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 555c593d2faSAyala Barazani cmd_ver); 556c593d2faSAyala Barazani return 0; 557c593d2faSAyala Barazani } 558c593d2faSAyala Barazani 559c593d2faSAyala Barazani ret = iwl_mvm_send_cmd(mvm, &cmd); 560c593d2faSAyala Barazani if (ret < 0) 561c593d2faSAyala Barazani IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 562c593d2faSAyala Barazani 563c593d2faSAyala Barazani return ret; 564c593d2faSAyala Barazani } 565c593d2faSAyala Barazani #else 566c593d2faSAyala Barazani 567c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 568c593d2faSAyala Barazani { 569c593d2faSAyala Barazani return 0; 570c593d2faSAyala Barazani } 571c593d2faSAyala Barazani #endif 572c593d2faSAyala Barazani 573e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 574e705c121SKalle Valo { 575c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 576702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 577c4ace426SGil Adam struct iwl_phy_specific_cfg phy_filters = {}; 578c4ace426SGil Adam u8 cmd_ver; 579c4ace426SGil Adam size_t cmd_size; 580e705c121SKalle Valo 581bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) && 582d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity) 583bb99ff9bSLuca Coelho return 0; 584d923b020SLuca Coelho 585d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) { 586bb99ff9bSLuca Coelho /* 587bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC 588bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS. 589bb99ff9bSLuca Coelho */ 590bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg = 591bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 592bb99ff9bSLuca Coelho } 593bb99ff9bSLuca Coelho 594e705c121SKalle Valo /* Set parameters */ 595e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 59686a2b204SLuca Coelho 59786a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 5987897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |= 5997897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 60086a2b204SLuca Coelho 601e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 602e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 603e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 604e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 605e705c121SKalle Valo 606c4ace426SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, 607e80bfd11SMordechay Goodstein PHY_CONFIGURATION_CMD, 608e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 609c4ace426SGil Adam if (cmd_ver == 3) { 610c4ace426SGil Adam iwl_mvm_phy_filter_init(mvm, &phy_filters); 611c4ace426SGil Adam memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 612c4ace426SGil Adam sizeof(struct iwl_phy_specific_cfg)); 613c4ace426SGil Adam } 614c4ace426SGil Adam 615e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 616e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 617c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 618c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1); 619e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 620c4ace426SGil Adam cmd_size, &phy_cfg_cmd); 621e705c121SKalle Valo } 622e705c121SKalle Valo 6233b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 624e705c121SKalle Valo { 625e705c121SKalle Valo struct iwl_notification_wait calib_wait; 626e705c121SKalle Valo static const u16 init_complete[] = { 627e705c121SKalle Valo INIT_COMPLETE_NOTIF, 628e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 629e705c121SKalle Valo }; 630e705c121SKalle Valo int ret; 631e705c121SKalle Valo 6327d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 63352b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 6348c5f47b1SJohannes Berg 635e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 636e705c121SKalle Valo 63794022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 638e705c121SKalle Valo 639e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 640e705c121SKalle Valo &calib_wait, 641e705c121SKalle Valo init_complete, 642e705c121SKalle Valo ARRAY_SIZE(init_complete), 643e705c121SKalle Valo iwl_wait_phy_db_entry, 644e705c121SKalle Valo mvm->phy_db); 645e705c121SKalle Valo 64611f8c533SLuca Coelho iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 64711f8c533SLuca Coelho 648e705c121SKalle Valo /* Will also start the device */ 649e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 650e705c121SKalle Valo if (ret) { 651e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 65200e0c6c8SLuca Coelho goto remove_notif; 653e705c121SKalle Valo } 654e705c121SKalle Valo 6557d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 656b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 657e705c121SKalle Valo if (ret) 65800e0c6c8SLuca Coelho goto remove_notif; 659b3de3ef4SEmmanuel Grumbach } 660e705c121SKalle Valo 661e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 6623b25f1afSEmmanuel Grumbach if (!mvm->nvm_data) { 6635bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 664e705c121SKalle Valo if (ret) { 665e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 66600e0c6c8SLuca Coelho goto remove_notif; 667e705c121SKalle Valo } 668e705c121SKalle Valo } 669e705c121SKalle Valo 670e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 6719ce505feSAbhishek Naik if (mvm->nvm_file_name) { 6729ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 6739ce505feSAbhishek Naik if (ret) 6749ce505feSAbhishek Naik goto remove_notif; 6759ce505feSAbhishek Naik } 676e705c121SKalle Valo 67764866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 67864866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 67964866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 680e705c121SKalle Valo 681e705c121SKalle Valo /* 682e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 683e705c121SKalle Valo * the init seq later when RF kill will switch to off 684e705c121SKalle Valo */ 685e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 686e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 687e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 68800e0c6c8SLuca Coelho goto remove_notif; 689e705c121SKalle Valo } 690e705c121SKalle Valo 691b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 692e705c121SKalle Valo 693e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 694e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 695e705c121SKalle Valo if (ret) 69600e0c6c8SLuca Coelho goto remove_notif; 697e705c121SKalle Valo 698e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 699e705c121SKalle Valo if (ret) { 700e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 701e705c121SKalle Valo ret); 70200e0c6c8SLuca Coelho goto remove_notif; 703e705c121SKalle Valo } 704e705c121SKalle Valo 705e705c121SKalle Valo /* 706e705c121SKalle Valo * Some things may run in the background now, but we 707e705c121SKalle Valo * just wait for the calibration complete notification. 708e705c121SKalle Valo */ 709e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 710e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 71100e0c6c8SLuca Coelho if (!ret) 712e705c121SKalle Valo goto out; 713e705c121SKalle Valo 71400e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 71500e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 71600e0c6c8SLuca Coelho ret = 0; 71700e0c6c8SLuca Coelho } else { 71800e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 71900e0c6c8SLuca Coelho ret); 72000e0c6c8SLuca Coelho } 72100e0c6c8SLuca Coelho 72200e0c6c8SLuca Coelho goto out; 72300e0c6c8SLuca Coelho 72400e0c6c8SLuca Coelho remove_notif: 725e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 726e705c121SKalle Valo out: 727b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 728e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 729e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 730e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 731e705c121SKalle Valo sizeof(struct ieee80211_channel) + 732e705c121SKalle Valo sizeof(struct ieee80211_rate), 733e705c121SKalle Valo GFP_KERNEL); 734e705c121SKalle Valo if (!mvm->nvm_data) 735e705c121SKalle Valo return -ENOMEM; 736e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 737e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 738e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 739e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 740e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 741e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 742e705c121SKalle Valo } 743e705c121SKalle Valo 744e705c121SKalle Valo return ret; 745e705c121SKalle Valo } 746e705c121SKalle Valo 747e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 748e705c121SKalle Valo { 749e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 750e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 751e705c121SKalle Valo }; 752e705c121SKalle Valo 753e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 754e705c121SKalle Valo return 0; 755e705c121SKalle Valo 756e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 757e705c121SKalle Valo sizeof(cmd), &cmd); 758e705c121SKalle Valo } 759e705c121SKalle Valo 760c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 76142ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 762da2830acSLuca Coelho { 763216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 764216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 76571e9378bSLuca Coelho }; 7669c08cef8SLuca Coelho __le16 *per_chain; 7671edd56e6SLuca Coelho int ret; 76839c1a972SIhab Zhaika u16 len = 0; 769fbb7957dSLuca Coelho u32 n_subbands; 770fbb7957dSLuca Coelho u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 771e80bfd11SMordechay Goodstein REDUCE_TX_POWER_CMD, 772e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 77342ce76d6SLuca Coelho 774fbb7957dSLuca Coelho if (cmd_ver == 6) { 775fbb7957dSLuca Coelho len = sizeof(cmd.v6); 776fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2; 777fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0]; 778fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa, 7799c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 7800791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 781e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7829c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0]; 7839c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa, 7849c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 785216cdfb5SLuca Coelho len = sizeof(cmd.v4); 786e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7879c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0]; 7889c08cef8SLuca Coelho } else { 789216cdfb5SLuca Coelho len = sizeof(cmd.v3); 790e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7919c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0]; 7929c08cef8SLuca Coelho } 79355bfa4b9SLuca Coelho 794216cdfb5SLuca Coelho /* all structs have the same common part, add it */ 795216cdfb5SLuca Coelho len += sizeof(cmd.common); 79642ce76d6SLuca Coelho 797dac7171cSLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 798dac7171cSLuca Coelho IWL_NUM_CHAIN_TABLES, 799fbb7957dSLuca Coelho n_subbands, prof_a, prof_b); 8001edd56e6SLuca Coelho 8011edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */ 8021edd56e6SLuca Coelho if (ret) 8031edd56e6SLuca Coelho return ret; 8041edd56e6SLuca Coelho 8056d19a5ebSEmmanuel Grumbach iwl_mei_set_power_limit(per_chain); 8066d19a5ebSEmmanuel Grumbach 80742ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 80842ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 80942ce76d6SLuca Coelho } 81042ce76d6SLuca Coelho 8117fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 8127fe90e0eSHaim Dreyfuss { 813dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 814f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp; 8150c3d7282SHaim Dreyfuss u16 len; 81639c1a972SIhab Zhaika int ret; 8170c3d7282SHaim Dreyfuss struct iwl_host_cmd cmd; 818e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 819523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD, 820e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 8217fe90e0eSHaim Dreyfuss 822dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 823dd2a1256SLuca Coelho geo_tx_cmd.v1.ops = 824dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 825dd2a1256SLuca Coelho 82697f8a3d1SAyala Barazani if (cmd_ver == 5) 82797f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v5); 82897f8a3d1SAyala Barazani else if (cmd_ver == 4) 82997f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v4); 83097f8a3d1SAyala Barazani else if (cmd_ver == 3) 8310ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3); 8320ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 833dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 834dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2); 835dd2a1256SLuca Coelho else 836dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1); 8370c3d7282SHaim Dreyfuss 83839c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt)) 83939c1a972SIhab Zhaika return -EOPNOTSUPP; 84039c1a972SIhab Zhaika 8410c3d7282SHaim Dreyfuss cmd = (struct iwl_host_cmd){ 842523de6c8SLuca Coelho .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 8430c3d7282SHaim Dreyfuss .len = { len, }, 8447fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 84539c1a972SIhab Zhaika .data = { &geo_tx_cmd }, 8467fe90e0eSHaim Dreyfuss }; 8477fe90e0eSHaim Dreyfuss 8487fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 8497fe90e0eSHaim Dreyfuss if (ret) { 8507fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8517fe90e0eSHaim Dreyfuss return ret; 8527fe90e0eSHaim Dreyfuss } 853f604324eSLuca Coelho 854f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data; 855f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx); 856f604324eSLuca Coelho 85797f8a3d1SAyala Barazani if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 858f604324eSLuca Coelho ret = -EIO; 859f604324eSLuca Coelho 8607fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8617fe90e0eSHaim Dreyfuss return ret; 8627fe90e0eSHaim Dreyfuss } 8637fe90e0eSHaim Dreyfuss 864a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 865a6bff3cbSHaim Dreyfuss { 866dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd; 86739c1a972SIhab Zhaika u16 len; 86845acebf8SNaftali Goldstein u32 n_bands; 86997f8a3d1SAyala Barazani u32 n_profiles; 870ac9952f6SLuca Coelho u32 sk = 0; 8710433ae55SGolan Ben Ami int ret; 872e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 873523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD, 874e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 875a6bff3cbSHaim Dreyfuss 87645acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 87745acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 87845acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 87997f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 88097f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 88197f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 88297f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 88397f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 88497f8a3d1SAyala Barazani 88545acebf8SNaftali Goldstein /* the ops field is at the same spot for all versions, so set in v1 */ 88645acebf8SNaftali Goldstein cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 88745acebf8SNaftali Goldstein 88897f8a3d1SAyala Barazani if (cmd_ver == 5) { 88997f8a3d1SAyala Barazani len = sizeof(cmd.v5); 89097f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v5.table[0]); 89197f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 89297f8a3d1SAyala Barazani } else if (cmd_ver == 4) { 89397f8a3d1SAyala Barazani len = sizeof(cmd.v4); 89497f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v4.table[0]); 89597f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 89697f8a3d1SAyala Barazani } else if (cmd_ver == 3) { 89745acebf8SNaftali Goldstein len = sizeof(cmd.v3); 89845acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v3.table[0]); 89997f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 90045acebf8SNaftali Goldstein } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 90145acebf8SNaftali Goldstein IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 90245acebf8SNaftali Goldstein len = sizeof(cmd.v2); 90345acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v2.table[0]); 90497f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 90545acebf8SNaftali Goldstein } else { 90645acebf8SNaftali Goldstein len = sizeof(cmd.v1); 90745acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v1.table[0]); 90897f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 90945acebf8SNaftali Goldstein } 91045acebf8SNaftali Goldstein 91145acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 91245acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 91345acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 91497f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 91597f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 91697f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 91797f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 91897f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 91945acebf8SNaftali Goldstein /* the table is at the same position for all versions, so set use v1 */ 92097f8a3d1SAyala Barazani ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 92197f8a3d1SAyala Barazani n_bands, n_profiles); 922eca1e56cSEmmanuel Grumbach 9230433ae55SGolan Ben Ami /* 9240433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table, 9250433ae55SGolan Ben Ami * but in that case there is no need to send the command. 9260433ae55SGolan Ben Ami */ 9270433ae55SGolan Ben Ami if (ret) 9280433ae55SGolan Ben Ami return 0; 929a6bff3cbSHaim Dreyfuss 930ac9952f6SLuca Coelho /* Only set to South Korea if the table revision is 1 */ 931ac9952f6SLuca Coelho if (mvm->fwrt.geo_rev == 1) 932ac9952f6SLuca Coelho sk = 1; 933ac9952f6SLuca Coelho 93428db1862SLuca Coelho /* 935ac9952f6SLuca Coelho * Set the table_revision to South Korea (1) or not (0). The 936ac9952f6SLuca Coelho * element name is misleading, as it doesn't contain the table 937ac9952f6SLuca Coelho * revision number, but whether the South Korea variation 938ac9952f6SLuca Coelho * should be used. 93928db1862SLuca Coelho * This must be done after calling iwl_sar_geo_init(). 94028db1862SLuca Coelho */ 94197f8a3d1SAyala Barazani if (cmd_ver == 5) 942ac9952f6SLuca Coelho cmd.v5.table_revision = cpu_to_le32(sk); 94397f8a3d1SAyala Barazani else if (cmd_ver == 4) 944ac9952f6SLuca Coelho cmd.v4.table_revision = cpu_to_le32(sk); 94597f8a3d1SAyala Barazani else if (cmd_ver == 3) 946ac9952f6SLuca Coelho cmd.v3.table_revision = cpu_to_le32(sk); 94728db1862SLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 94828db1862SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 949ac9952f6SLuca Coelho cmd.v2.table_revision = cpu_to_le32(sk); 95028db1862SLuca Coelho 951dd2a1256SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, 952523de6c8SLuca Coelho WIDE_ID(PHY_OPS_GROUP, 953523de6c8SLuca Coelho PER_CHAIN_LIMIT_OFFSET_CMD), 954dd2a1256SLuca Coelho 0, len, &cmd); 955a6bff3cbSHaim Dreyfuss } 956a6bff3cbSHaim Dreyfuss 9576ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 9586ce1e5c0SGil Adam { 959e12cfc7bSMiri Korenblit union acpi_object *wifi_pkg, *data, *flags; 960f2134f66SGil Adam int i, j, ret, tbl_rev, num_sub_bands; 9616ce1e5c0SGil Adam int idx = 2; 9626ce1e5c0SGil Adam 9638bdc52b9SMiri Korenblit mvm->fwrt.ppag_flags = 0; 964e12cfc7bSMiri Korenblit 9656ce1e5c0SGil Adam data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 9666ce1e5c0SGil Adam if (IS_ERR(data)) 9676ce1e5c0SGil Adam return PTR_ERR(data); 9686ce1e5c0SGil Adam 969e12cfc7bSMiri Korenblit /* try to read ppag table rev 2 or 1 (both have the same data size) */ 9706ce1e5c0SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 971f2134f66SGil Adam ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); 972f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 973e12cfc7bSMiri Korenblit if (tbl_rev == 1 || tbl_rev == 2) { 974e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V2; 975e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 976e12cfc7bSMiri Korenblit "Reading PPAG table v2 (tbl_rev=%d)\n", 977e12cfc7bSMiri Korenblit tbl_rev); 978e12cfc7bSMiri Korenblit goto read_table; 979e12cfc7bSMiri Korenblit } else { 980f2134f66SGil Adam ret = -EINVAL; 9816ce1e5c0SGil Adam goto out_free; 9826ce1e5c0SGil Adam } 983f2134f66SGil Adam } 9846ce1e5c0SGil Adam 985f2134f66SGil Adam /* try to read ppag table revision 0 */ 986f2134f66SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 987e12cfc7bSMiri Korenblit ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev); 988f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 9893ed83da3SLuca Coelho if (tbl_rev != 0) { 9903ed83da3SLuca Coelho ret = -EINVAL; 9913ed83da3SLuca Coelho goto out_free; 9923ed83da3SLuca Coelho } 993e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 994f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n"); 995f2134f66SGil Adam goto read_table; 996f2134f66SGil Adam } 997f2134f66SGil Adam ret = PTR_ERR(wifi_pkg); 998f2134f66SGil Adam goto out_free; 9993ed83da3SLuca Coelho 1000f2134f66SGil Adam read_table: 10018bdc52b9SMiri Korenblit mvm->fwrt.ppag_ver = tbl_rev; 1002e12cfc7bSMiri Korenblit flags = &wifi_pkg->package.elements[1]; 1003e12cfc7bSMiri Korenblit 1004e12cfc7bSMiri Korenblit if (flags->type != ACPI_TYPE_INTEGER) { 10056ce1e5c0SGil Adam ret = -EINVAL; 10066ce1e5c0SGil Adam goto out_free; 10076ce1e5c0SGil Adam } 10086ce1e5c0SGil Adam 10098bdc52b9SMiri Korenblit mvm->fwrt.ppag_flags = flags->integer.value & IWL_PPAG_MASK; 1010e12cfc7bSMiri Korenblit 10118bdc52b9SMiri Korenblit if (!mvm->fwrt.ppag_flags) { 10126ce1e5c0SGil Adam ret = 0; 10136ce1e5c0SGil Adam goto out_free; 10146ce1e5c0SGil Adam } 10156ce1e5c0SGil Adam 10166ce1e5c0SGil Adam /* 10176ce1e5c0SGil Adam * read, verify gain values and save them into the PPAG table. 10186ce1e5c0SGil Adam * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 10196ce1e5c0SGil Adam * following sub-bands to High-Band (5GHz). 10206ce1e5c0SGil Adam */ 1021f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1022f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 10236ce1e5c0SGil Adam union acpi_object *ent; 10246ce1e5c0SGil Adam 10256ce1e5c0SGil Adam ent = &wifi_pkg->package.elements[idx++]; 10265a684245SLuca Coelho if (ent->type != ACPI_TYPE_INTEGER) { 10275a684245SLuca Coelho ret = -EINVAL; 10285a684245SLuca Coelho goto out_free; 10295a684245SLuca Coelho } 10305a684245SLuca Coelho 10318bdc52b9SMiri Korenblit mvm->fwrt.ppag_chains[i].subbands[j] = ent->integer.value; 10325a684245SLuca Coelho 10335a684245SLuca Coelho if ((j == 0 && 10348bdc52b9SMiri Korenblit (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB || 10358bdc52b9SMiri Korenblit mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) || 10365a684245SLuca Coelho (j != 0 && 10378bdc52b9SMiri Korenblit (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB || 10388bdc52b9SMiri Korenblit mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) { 10398bdc52b9SMiri Korenblit mvm->fwrt.ppag_flags = 0; 10406ce1e5c0SGil Adam ret = -EINVAL; 10416ce1e5c0SGil Adam goto out_free; 10426ce1e5c0SGil Adam } 10436ce1e5c0SGil Adam } 10446ce1e5c0SGil Adam } 1045e12cfc7bSMiri Korenblit 10466ce1e5c0SGil Adam ret = 0; 10476ce1e5c0SGil Adam out_free: 10486ce1e5c0SGil Adam kfree(data); 10496ce1e5c0SGil Adam return ret; 10506ce1e5c0SGil Adam } 10516ce1e5c0SGil Adam 10526ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 10536ce1e5c0SGil Adam { 10548bdc52b9SMiri Korenblit union iwl_ppag_table_cmd cmd; 1055f2134f66SGil Adam u8 cmd_ver; 1056f2134f66SGil Adam int i, j, ret, num_sub_bands, cmd_size; 1057f2134f66SGil Adam s8 *gain; 10586ce1e5c0SGil Adam 10596ce1e5c0SGil Adam if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 10606ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10616ce1e5c0SGil Adam "PPAG capability not supported by FW, command not sent.\n"); 10626ce1e5c0SGil Adam return 0; 10636ce1e5c0SGil Adam } 10648bdc52b9SMiri Korenblit if (!mvm->fwrt.ppag_flags) { 1065f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n"); 1066160bab43SGil Adam return 0; 1067160bab43SGil Adam } 1068160bab43SGil Adam 10698bdc52b9SMiri Korenblit /* The 'flags' field is the same in v1 and in v2 so we can just 10708bdc52b9SMiri Korenblit * use v1 to access it. 10718bdc52b9SMiri Korenblit */ 10728bdc52b9SMiri Korenblit cmd.v1.flags = cpu_to_le32(mvm->fwrt.ppag_flags); 1073f2134f66SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 1074e80bfd11SMordechay Goodstein PER_PLATFORM_ANT_GAIN_CMD, 1075e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 1076f2134f66SGil Adam if (cmd_ver == 1) { 1077e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 10788bdc52b9SMiri Korenblit gain = cmd.v1.gain[0]; 10798bdc52b9SMiri Korenblit cmd_size = sizeof(cmd.v1); 1080e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) { 1081f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1082e12cfc7bSMiri Korenblit "PPAG table rev is %d but FW supports v1, sending truncated table\n", 1083e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver); 10848bdc52b9SMiri Korenblit cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); 1085f2134f66SGil Adam } 1086e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 || cmd_ver == 3) { 1087f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS_V2; 10888bdc52b9SMiri Korenblit gain = cmd.v2.gain[0]; 10898bdc52b9SMiri Korenblit cmd_size = sizeof(cmd.v2); 1090e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 0) { 1091f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1092f2134f66SGil Adam "PPAG table is v1 but FW supports v2, sending padded table\n"); 1093e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) { 1094e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1095e12cfc7bSMiri Korenblit "PPAG table is v3 but FW supports v2, sending partial bitmap.\n"); 10968bdc52b9SMiri Korenblit cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); 1097f2134f66SGil Adam } 1098f2134f66SGil Adam } else { 1099f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n"); 1100f2134f66SGil Adam return 0; 1101f2134f66SGil Adam } 11026ce1e5c0SGil Adam 1103f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1104f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 11058bdc52b9SMiri Korenblit gain[i * num_sub_bands + j] = 11068bdc52b9SMiri Korenblit mvm->fwrt.ppag_chains[i].subbands[j]; 11076ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 11086ce1e5c0SGil Adam "PPAG table: chain[%d] band[%d]: gain = %d\n", 1109f2134f66SGil Adam i, j, gain[i * num_sub_bands + j]); 11106ce1e5c0SGil Adam } 11116ce1e5c0SGil Adam } 1112f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 11136ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 11146ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 11158bdc52b9SMiri Korenblit 0, cmd_size, &cmd); 11166ce1e5c0SGil Adam if (ret < 0) 11176ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 11186ce1e5c0SGil Adam ret); 11196ce1e5c0SGil Adam 11206ce1e5c0SGil Adam return ret; 11216ce1e5c0SGil Adam } 11226ce1e5c0SGil Adam 1123a2ac0f48SLuca Coelho static const struct dmi_system_id dmi_ppag_approved_list[] = { 1124ca176eddSLuca Coelho { .ident = "HP", 1125ca176eddSLuca Coelho .matches = { 1126ca176eddSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1127ca176eddSLuca Coelho }, 1128ca176eddSLuca Coelho }, 1129dd158ed6SLuca Coelho { .ident = "SAMSUNG", 1130dd158ed6SLuca Coelho .matches = { 1131dd158ed6SLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1132dd158ed6SLuca Coelho }, 1133dd158ed6SLuca Coelho }, 11344a76553cSLuca Coelho { .ident = "MSFT", 11354a76553cSLuca Coelho .matches = { 11364a76553cSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 11374a76553cSLuca Coelho }, 11384a76553cSLuca Coelho }, 1139a7abc1eaSLuca Coelho { .ident = "ASUS", 1140a7abc1eaSLuca Coelho .matches = { 1141a7abc1eaSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."), 1142a7abc1eaSLuca Coelho }, 1143a7abc1eaSLuca Coelho }, 1144a22549f1SWei Yongjun {} 1145a2ac0f48SLuca Coelho }; 1146a2ac0f48SLuca Coelho 11476ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 11486ce1e5c0SGil Adam { 114978a19d52SMiri Korenblit /* no need to read the table, done in INIT stage */ 1150a2ac0f48SLuca Coelho if (!dmi_check_system(dmi_ppag_approved_list)) { 1151a2ac0f48SLuca Coelho IWL_DEBUG_RADIO(mvm, 1152a2ac0f48SLuca Coelho "System vendor '%s' is not in the approved list, disabling PPAG.\n", 1153a2ac0f48SLuca Coelho dmi_get_system_info(DMI_SYS_VENDOR)); 11548bdc52b9SMiri Korenblit mvm->fwrt.ppag_flags = 0; 1155a2ac0f48SLuca Coelho return 0; 1156a2ac0f48SLuca Coelho } 1157a2ac0f48SLuca Coelho 11586ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 11596ce1e5c0SGil Adam } 11606ce1e5c0SGil Adam 11612856f623SAyala Barazani static const struct dmi_system_id dmi_tas_approved_list[] = { 11622856f623SAyala Barazani { .ident = "HP", 11632856f623SAyala Barazani .matches = { 11642856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "HP"), 11652856f623SAyala Barazani }, 11662856f623SAyala Barazani }, 11672856f623SAyala Barazani { .ident = "SAMSUNG", 11682856f623SAyala Barazani .matches = { 11692856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 11702856f623SAyala Barazani }, 11712856f623SAyala Barazani }, 11722856f623SAyala Barazani { .ident = "LENOVO", 11732856f623SAyala Barazani .matches = { 11742856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"), 11752856f623SAyala Barazani }, 11762856f623SAyala Barazani }, 11772856f623SAyala Barazani { .ident = "DELL", 11782856f623SAyala Barazani .matches = { 11792856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 11802856f623SAyala Barazani }, 11812856f623SAyala Barazani }, 11822856f623SAyala Barazani 11832856f623SAyala Barazani /* keep last */ 11842856f623SAyala Barazani {} 11852856f623SAyala Barazani }; 11862856f623SAyala Barazani 1187c3f40c3eSMiri Korenblit static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1188c3f40c3eSMiri Korenblit { 1189c3f40c3eSMiri Korenblit int i; 1190c3f40c3eSMiri Korenblit u32 size = le32_to_cpu(*le_size); 1191c3f40c3eSMiri Korenblit 1192c3f40c3eSMiri Korenblit /* Verify that there is room for another country */ 1193c3f40c3eSMiri Korenblit if (size >= IWL_TAS_BLOCK_LIST_MAX) 1194c3f40c3eSMiri Korenblit return false; 1195c3f40c3eSMiri Korenblit 1196c3f40c3eSMiri Korenblit for (i = 0; i < size; i++) { 1197c3f40c3eSMiri Korenblit if (list[i] == cpu_to_le32(mcc)) 1198c3f40c3eSMiri Korenblit return true; 1199c3f40c3eSMiri Korenblit } 1200c3f40c3eSMiri Korenblit 1201c3f40c3eSMiri Korenblit list[size++] = cpu_to_le32(mcc); 1202c3f40c3eSMiri Korenblit *le_size = cpu_to_le32(size); 1203c3f40c3eSMiri Korenblit return true; 1204c3f40c3eSMiri Korenblit } 1205c3f40c3eSMiri Korenblit 120628dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 120728dd7ccdSMordechay Goodstein { 120828dd7ccdSMordechay Goodstein int ret; 12097c530588SMiri Korenblit struct iwl_tas_config_cmd_v3 cmd = {}; 12107c530588SMiri Korenblit int cmd_size; 121128dd7ccdSMordechay Goodstein 1212cdaba917SEmmanuel Grumbach BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) < 121328dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX); 121428dd7ccdSMordechay Goodstein 121528dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 121628dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 121728dd7ccdSMordechay Goodstein return; 121828dd7ccdSMordechay Goodstein } 121928dd7ccdSMordechay Goodstein 12207c530588SMiri Korenblit ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd); 122128dd7ccdSMordechay Goodstein if (ret < 0) { 122228dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, 122328dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n", 122428dd7ccdSMordechay Goodstein ret); 122528dd7ccdSMordechay Goodstein return; 122628dd7ccdSMordechay Goodstein } 122728dd7ccdSMordechay Goodstein 12287c530588SMiri Korenblit if (ret == 0) 122928dd7ccdSMordechay Goodstein return; 123028dd7ccdSMordechay Goodstein 1231c3f40c3eSMiri Korenblit if (!dmi_check_system(dmi_tas_approved_list)) { 1232c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1233c3f40c3eSMiri Korenblit "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1234c3f40c3eSMiri Korenblit dmi_get_system_info(DMI_SYS_VENDOR)); 1235c3f40c3eSMiri Korenblit if ((!iwl_mvm_add_to_tas_block_list(cmd.block_list_array, 1236c3f40c3eSMiri Korenblit &cmd.block_list_size, IWL_TAS_US_MCC)) || 1237c3f40c3eSMiri Korenblit (!iwl_mvm_add_to_tas_block_list(cmd.block_list_array, 1238c3f40c3eSMiri Korenblit &cmd.block_list_size, IWL_TAS_CANADA_MCC))) { 1239c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1240c3f40c3eSMiri Korenblit "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1241c3f40c3eSMiri Korenblit return; 1242c3f40c3eSMiri Korenblit } 1243c3f40c3eSMiri Korenblit } 1244c3f40c3eSMiri Korenblit 12457c530588SMiri Korenblit cmd_size = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, 12467c530588SMiri Korenblit TAS_CONFIG, 12477c530588SMiri Korenblit IWL_FW_CMD_VER_UNKNOWN) < 3 ? 12487c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v2) : 12497c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v3); 125028dd7ccdSMordechay Goodstein 125128dd7ccdSMordechay Goodstein ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 125228dd7ccdSMordechay Goodstein TAS_CONFIG), 12537c530588SMiri Korenblit 0, cmd_size, &cmd); 125428dd7ccdSMordechay Goodstein if (ret < 0) 125528dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 125628dd7ccdSMordechay Goodstein } 1257f5b1cb2eSGil Adam 12584e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 12594e8fe214SGregory Greenman { 12604e8fe214SGregory Greenman u8 value; 126145fe1b6bSLuca Coelho int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 12624e8fe214SGregory Greenman &iwl_rfi_guid, &value); 12634e8fe214SGregory Greenman 12644e8fe214SGregory Greenman if (ret < 0) { 12654e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 12664e8fe214SGregory Greenman 12674e8fe214SGregory Greenman } else if (value >= DSM_VALUE_RFI_MAX) { 12684e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 12694e8fe214SGregory Greenman value); 12704e8fe214SGregory Greenman 12714e8fe214SGregory Greenman } else if (value == DSM_VALUE_RFI_ENABLE) { 12724e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 12734e8fe214SGregory Greenman return DSM_VALUE_RFI_ENABLE; 12744e8fe214SGregory Greenman } 12754e8fe214SGregory Greenman 12764e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 12774e8fe214SGregory Greenman 12784e8fe214SGregory Greenman /* default behaviour is disabled */ 12794e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 12804e8fe214SGregory Greenman } 12814e8fe214SGregory Greenman 1282f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1283f5b1cb2eSGil Adam { 12847119f02bSMiri Korenblit int ret; 12857119f02bSMiri Korenblit u32 value; 12861f578d4fSMiri Korenblit struct iwl_lari_config_change_cmd_v5 cmd = {}; 1287f5b1cb2eSGil Adam 1288f21afabaSHarish Mitty cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1289d2bfda8aSMiri Korenblit 129045fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 12917119f02bSMiri Korenblit &iwl_guid, &value); 12927119f02bSMiri Korenblit if (!ret) 12937119f02bSMiri Korenblit cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1294f5b1cb2eSGil Adam 129545fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 129654b4fda5SAbhishek Naik DSM_FUNC_ENABLE_UNII4_CHAN, 129754b4fda5SAbhishek Naik &iwl_guid, &value); 129854b4fda5SAbhishek Naik if (!ret) 129954b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 130054b4fda5SAbhishek Naik 130145fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 13021f578d4fSMiri Korenblit DSM_FUNC_ACTIVATE_CHANNEL, 13031f578d4fSMiri Korenblit &iwl_guid, &value); 13041f578d4fSMiri Korenblit if (!ret) 13051f578d4fSMiri Korenblit cmd.chan_state_active_bitmap = cpu_to_le32(value); 13061f578d4fSMiri Korenblit 1307698b166eSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1308698b166eSLuca Coelho DSM_FUNC_ENABLE_6E, 1309698b166eSLuca Coelho &iwl_guid, &value); 1310698b166eSLuca Coelho if (!ret) 1311698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1312698b166eSLuca Coelho 131354b4fda5SAbhishek Naik if (cmd.config_bitmap || 1314698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap || 131554b4fda5SAbhishek Naik cmd.oem_11ax_allow_bitmap || 13161f578d4fSMiri Korenblit cmd.oem_unii4_allow_bitmap || 13171f578d4fSMiri Korenblit cmd.chan_state_active_bitmap) { 13183c21990bSMiri Korenblit size_t cmd_size; 13193c21990bSMiri Korenblit u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 13203ce88247SMiri Korenblit REGULATORY_AND_NVM_GROUP, 13213c21990bSMiri Korenblit LARI_CONFIG_CHANGE, 1); 13221f578d4fSMiri Korenblit if (cmd_ver == 5) 13231f578d4fSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 13241f578d4fSMiri Korenblit else if (cmd_ver == 4) 132554b4fda5SAbhishek Naik cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 132654b4fda5SAbhishek Naik else if (cmd_ver == 3) 13273c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 13283c21990bSMiri Korenblit else if (cmd_ver == 2) 13293c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 13303c21990bSMiri Korenblit else 13313c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 13323c21990bSMiri Korenblit 13333ce88247SMiri Korenblit IWL_DEBUG_RADIO(mvm, 13347119f02bSMiri Korenblit "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 13357119f02bSMiri Korenblit le32_to_cpu(cmd.config_bitmap), 13367119f02bSMiri Korenblit le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 133754b4fda5SAbhishek Naik IWL_DEBUG_RADIO(mvm, 13381f578d4fSMiri Korenblit "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 133954b4fda5SAbhishek Naik le32_to_cpu(cmd.oem_unii4_allow_bitmap), 13401f578d4fSMiri Korenblit le32_to_cpu(cmd.chan_state_active_bitmap), 134154b4fda5SAbhishek Naik cmd_ver); 1342698b166eSLuca Coelho IWL_DEBUG_RADIO(mvm, 1343698b166eSLuca Coelho "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x\n", 1344698b166eSLuca Coelho le32_to_cpu(cmd.oem_uhb_allow_bitmap)); 13457119f02bSMiri Korenblit ret = iwl_mvm_send_cmd_pdu(mvm, 1346f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP, 1347f5b1cb2eSGil Adam LARI_CONFIG_CHANGE), 13483ce88247SMiri Korenblit 0, cmd_size, &cmd); 13497119f02bSMiri Korenblit if (ret < 0) 1350f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 1351f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n", 13527119f02bSMiri Korenblit ret); 1353f5b1cb2eSGil Adam } 1354f5b1cb2eSGil Adam } 135578a19d52SMiri Korenblit 135678a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 135778a19d52SMiri Korenblit { 135878a19d52SMiri Korenblit int ret; 135978a19d52SMiri Korenblit 136078a19d52SMiri Korenblit /* read PPAG table */ 136178a19d52SMiri Korenblit ret = iwl_mvm_get_ppag_table(mvm); 136278a19d52SMiri Korenblit if (ret < 0) { 136378a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 136478a19d52SMiri Korenblit "PPAG BIOS table invalid or unavailable. (%d)\n", 136578a19d52SMiri Korenblit ret); 136678a19d52SMiri Korenblit } 136778a19d52SMiri Korenblit 136878a19d52SMiri Korenblit /* read SAR tables */ 136978a19d52SMiri Korenblit ret = iwl_sar_get_wrds_table(&mvm->fwrt); 137078a19d52SMiri Korenblit if (ret < 0) { 137178a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 137278a19d52SMiri Korenblit "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 137378a19d52SMiri Korenblit ret); 137478a19d52SMiri Korenblit /* 137578a19d52SMiri Korenblit * If not available, don't fail and don't bother with EWRD and 137678a19d52SMiri Korenblit * WGDS */ 137778a19d52SMiri Korenblit 137878a19d52SMiri Korenblit if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 137978a19d52SMiri Korenblit /* 138078a19d52SMiri Korenblit * If basic SAR is not available, we check for WGDS, 138178a19d52SMiri Korenblit * which should *not* be available either. If it is 138278a19d52SMiri Korenblit * available, issue an error, because we can't use SAR 138378a19d52SMiri Korenblit * Geo without basic SAR. 138478a19d52SMiri Korenblit */ 138578a19d52SMiri Korenblit IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 138678a19d52SMiri Korenblit } 138778a19d52SMiri Korenblit 138878a19d52SMiri Korenblit } else { 138978a19d52SMiri Korenblit ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 139078a19d52SMiri Korenblit /* if EWRD is not available, we can still use 139178a19d52SMiri Korenblit * WRDS, so don't fail */ 139278a19d52SMiri Korenblit if (ret < 0) 139378a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 139478a19d52SMiri Korenblit "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 139578a19d52SMiri Korenblit ret); 139678a19d52SMiri Korenblit 139778a19d52SMiri Korenblit /* read geo SAR table */ 139878a19d52SMiri Korenblit if (iwl_sar_geo_support(&mvm->fwrt)) { 139978a19d52SMiri Korenblit ret = iwl_sar_get_wgds_table(&mvm->fwrt); 140078a19d52SMiri Korenblit if (ret < 0) 140178a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 140278a19d52SMiri Korenblit "Geo SAR BIOS table invalid or unavailable. (%d)\n", 140378a19d52SMiri Korenblit ret); 140478a19d52SMiri Korenblit /* we don't fail if the table is not available */ 140578a19d52SMiri Korenblit } 140678a19d52SMiri Korenblit } 140778a19d52SMiri Korenblit } 140869964905SLuca Coelho #else /* CONFIG_ACPI */ 140939c1a972SIhab Zhaika 141039c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 141139c1a972SIhab Zhaika int prof_a, int prof_b) 141269964905SLuca Coelho { 141378a19d52SMiri Korenblit return 1; 141469964905SLuca Coelho } 141569964905SLuca Coelho 141639c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 14175d041c46SLuca Coelho { 14185d041c46SLuca Coelho return -ENOENT; 14195d041c46SLuca Coelho } 14205d041c46SLuca Coelho 1421a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1422a6bff3cbSHaim Dreyfuss { 1423a6bff3cbSHaim Dreyfuss return 0; 1424a6bff3cbSHaim Dreyfuss } 142518f1755dSLuca Coelho 14266ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 14276ce1e5c0SGil Adam { 14286ce1e5c0SGil Adam return -ENOENT; 14296ce1e5c0SGil Adam } 14306ce1e5c0SGil Adam 14316ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 14326ce1e5c0SGil Adam { 14337937fd32SJohannes Berg return 0; 14346ce1e5c0SGil Adam } 143528dd7ccdSMordechay Goodstein 143628dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 143728dd7ccdSMordechay Goodstein { 143828dd7ccdSMordechay Goodstein } 1439f5b1cb2eSGil Adam 1440f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1441f5b1cb2eSGil Adam { 1442f5b1cb2eSGil Adam } 14434e8fe214SGregory Greenman 14444e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 14454e8fe214SGregory Greenman { 14464e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 14474e8fe214SGregory Greenman } 144878a19d52SMiri Korenblit 144978a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 145078a19d52SMiri Korenblit { 145178a19d52SMiri Korenblit } 1452c593d2faSAyala Barazani 145369964905SLuca Coelho #endif /* CONFIG_ACPI */ 145469964905SLuca Coelho 1455f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1456f130bb75SMordechay Goodstein { 1457f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1458f130bb75SMordechay Goodstein int ret; 1459f130bb75SMordechay Goodstein u32 resp; 1460f130bb75SMordechay Goodstein 1461f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1462f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1463f130bb75SMordechay Goodstein .buf_size = 0, 1464f130bb75SMordechay Goodstein }; 1465f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1466f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1467f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1468f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1469f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1470f130bb75SMordechay Goodstein }; 1471f130bb75SMordechay Goodstein 1472f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1473f130bb75SMordechay Goodstein if (!error_log_size) 1474f130bb75SMordechay Goodstein return; 1475f130bb75SMordechay Goodstein 1476f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1477f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1478f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1479f130bb75SMordechay Goodstein return; 1480f130bb75SMordechay Goodstein 1481f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1482f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1483f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1484f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1485f130bb75SMordechay Goodstein } 1486f130bb75SMordechay Goodstein 1487f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1488f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1489f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1490f130bb75SMordechay Goodstein 1491f130bb75SMordechay Goodstein if (ret) { 1492f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1493f130bb75SMordechay Goodstein return; 1494f130bb75SMordechay Goodstein } 1495f130bb75SMordechay Goodstein 1496f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1497f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1498f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1499f130bb75SMordechay Goodstein if (resp) 1500f130bb75SMordechay Goodstein IWL_ERR(mvm, 1501f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1502f130bb75SMordechay Goodstein resp); 1503f130bb75SMordechay Goodstein } 1504f130bb75SMordechay Goodstein } 1505f130bb75SMordechay Goodstein 150642ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 150742ce76d6SLuca Coelho { 15081edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1); 1509da2830acSLuca Coelho } 1510da2830acSLuca Coelho 15111f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 15121f370650SSara Sharon { 15131f370650SSara Sharon int ret; 15141f370650SSara Sharon 15157d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 151652b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 15171f370650SSara Sharon 15183b25f1afSEmmanuel Grumbach ret = iwl_run_init_mvm_ucode(mvm); 15191f370650SSara Sharon 15201f370650SSara Sharon if (ret) { 15211f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1522f4744258SLiad Kaufman 1523f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1524f4744258SLiad Kaufman return 0; 15251f370650SSara Sharon return ret; 15261f370650SSara Sharon } 15271f370650SSara Sharon 1528203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1529bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1530bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 15311f370650SSara Sharon if (ret) 15321f370650SSara Sharon return ret; 15331f370650SSara Sharon 153494022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 15351f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 15361f370650SSara Sharon if (ret) 15371f370650SSara Sharon return ret; 15381f370650SSara Sharon 153994022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 154094022562SEmmanuel Grumbach 1541b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1542b108d8c7SShahar S Matityahu NULL); 1543da2eb669SSara Sharon 1544702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 15451f370650SSara Sharon } 15461f370650SSara Sharon 1547e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1548e705c121SKalle Valo { 1549e705c121SKalle Valo int ret, i; 1550e705c121SKalle Valo struct ieee80211_channel *chan; 1551e705c121SKalle Valo struct cfg80211_chan_def chandef; 1552dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1553e705c121SKalle Valo 1554e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1555e705c121SKalle Valo 1556e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1557e705c121SKalle Valo if (ret) 1558e705c121SKalle Valo return ret; 1559e705c121SKalle Valo 15601f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1561e705c121SKalle Valo if (ret) { 1562e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 156372d3c7bbSJohannes Berg if (ret != -ERFKILL) 156472d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 156572d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1566e705c121SKalle Valo goto error; 1567e705c121SKalle Valo } 1568e705c121SKalle Valo 1569d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1570e705c121SKalle Valo 1571e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1572e705c121SKalle Valo if (ret) 1573e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1574e705c121SKalle Valo 1575a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 15767174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1577e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 157817b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 15797174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 15807174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 15817a14c23dSSara Sharon } 1582e705c121SKalle Valo 1583e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1584e705c121SKalle Valo if (ret) 1585e705c121SKalle Valo goto error; 1586e705c121SKalle Valo 15877d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1588e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1589e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1590e705c121SKalle Valo if (ret) 1591e705c121SKalle Valo goto error; 1592bb99ff9bSLuca Coelho } 1593e705c121SKalle Valo 1594e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1595e705c121SKalle Valo if (ret) 1596e705c121SKalle Valo goto error; 1597e705c121SKalle Valo 1598b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1599b3de3ef4SEmmanuel Grumbach if (ret) 1600b3de3ef4SEmmanuel Grumbach goto error; 1601b3de3ef4SEmmanuel Grumbach 1602cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa, 1603cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1604a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt); 1605cceb4507SShahar S Matityahu if (ret) 1606cceb4507SShahar S Matityahu goto error; 1607cceb4507SShahar S Matityahu } 1608cceb4507SShahar S Matityahu 160943413a97SSara Sharon /* Init RSS configuration */ 16109cd243f2SMordechay Goodstein ret = iwl_configure_rxq(&mvm->fwrt); 16119cd243f2SMordechay Goodstein if (ret) 16128edbfaa1SSara Sharon goto error; 16138edbfaa1SSara Sharon 16148edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 161543413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 161643413a97SSara Sharon if (ret) { 161743413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 161843413a97SSara Sharon ret); 161943413a97SSara Sharon goto error; 162043413a97SSara Sharon } 162143413a97SSara Sharon } 162243413a97SSara Sharon 1623e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1624be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1625e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1626e705c121SKalle Valo 16270ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1628e705c121SKalle Valo 1629e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1630e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1631e705c121SKalle Valo 163279660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 163397d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 163497d5be7eSLiad Kaufman if (ret) 163597d5be7eSLiad Kaufman goto error; 163679660869SIlia Lin } 163797d5be7eSLiad Kaufman 16382c2c3647SNathan Errera /* 16392c2c3647SNathan Errera * Add auxiliary station for scanning. 16402c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 16412c2c3647SNathan Errera * internal aux station for all aux activities that don't 16422c2c3647SNathan Errera * requires a dedicated data queue. 16432c2c3647SNathan Errera */ 16442c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 16452c2c3647SNathan Errera ADD_STA, 16462c2c3647SNathan Errera 0) < 12) { 16472c2c3647SNathan Errera /* 16482c2c3647SNathan Errera * In old version the aux station uses mac id like other 16492c2c3647SNathan Errera * station and not lmac id 16502c2c3647SNathan Errera */ 16512c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1652e705c121SKalle Valo if (ret) 1653e705c121SKalle Valo goto error; 16542c2c3647SNathan Errera } 1655e705c121SKalle Valo 1656e705c121SKalle Valo /* Add all the PHY contexts */ 1657dd36a507STova Mussai i = 0; 1658dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1659dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1660dd36a507STova Mussai 1661dd36a507STova Mussai if (WARN_ON_ONCE(!sband)) 1662dd36a507STova Mussai goto error; 1663dd36a507STova Mussai 1664dd36a507STova Mussai chan = &sband->channels[0]; 1665dd36a507STova Mussai 1666e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1667e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1668e705c121SKalle Valo /* 1669e705c121SKalle Valo * The channel used here isn't relevant as it's 1670e705c121SKalle Valo * going to be overwritten in the other flows. 1671e705c121SKalle Valo * For now use the first channel we have. 1672e705c121SKalle Valo */ 1673e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1674e705c121SKalle Valo &chandef, 1, 1); 1675e705c121SKalle Valo if (ret) 1676e705c121SKalle Valo goto error; 1677e705c121SKalle Valo } 1678e705c121SKalle Valo 1679c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1680c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1681c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1682c221daf2SChaya Rachel Ivgi * cmd during init time 1683c221daf2SChaya Rachel Ivgi */ 1684c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1685c221daf2SChaya Rachel Ivgi } else { 1686e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1687e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1688c221daf2SChaya Rachel Ivgi } 16895c89e7bcSChaya Rachel Ivgi 1690242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 16915c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1692944eafc2SChaya Rachel Ivgi 1693944eafc2SChaya Rachel Ivgi /* 1694944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1695944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1696944eafc2SChaya Rachel Ivgi */ 1697944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 16985c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 16995c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 170075cfe338SLuca Coelho if (ret) 170175cfe338SLuca Coelho goto error; 170275cfe338SLuca Coelho } 1703c221daf2SChaya Rachel Ivgi #endif 1704e705c121SKalle Valo 1705aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1706e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1707e705c121SKalle Valo 1708e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1709e705c121SKalle Valo if (ret) 1710e705c121SKalle Valo goto error; 1711e705c121SKalle Valo 1712f5b1cb2eSGil Adam iwl_mvm_lari_cfg(mvm); 1713e705c121SKalle Valo /* 1714e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1715e705c121SKalle Valo * anyway, so don't init MCC. 1716e705c121SKalle Valo */ 1717e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1718e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1719e705c121SKalle Valo if (ret) 1720e705c121SKalle Valo goto error; 1721e705c121SKalle Valo } 1722e705c121SKalle Valo 1723e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 17244ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1725b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1726e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1727e705c121SKalle Valo if (ret) 1728e705c121SKalle Valo goto error; 1729e705c121SKalle Valo } 1730e705c121SKalle Valo 1731f130bb75SMordechay Goodstein if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1732f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1733f130bb75SMordechay Goodstein 173448e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 173548e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 173648e775e6SHaim Dreyfuss 17376ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 17386ce1e5c0SGil Adam if (ret) 17396ce1e5c0SGil Adam goto error; 17406ce1e5c0SGil Adam 1741da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 174278a19d52SMiri Korenblit if (ret == 0) 1743a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 1744*5f06f6bfSLuca Coelho if (ret < 0) 1745a6bff3cbSHaim Dreyfuss goto error; 1746a6bff3cbSHaim Dreyfuss 1747c593d2faSAyala Barazani ret = iwl_mvm_sgom_init(mvm); 1748c593d2faSAyala Barazani if (ret) 1749c593d2faSAyala Barazani goto error; 1750c593d2faSAyala Barazani 175128dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm); 17527089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 17537089ae63SJohannes Berg 1754b68bd2e3SIlan Peer iwl_mvm_ftm_initiator_smooth_config(mvm); 1755b68bd2e3SIlan Peer 17564e8fe214SGregory Greenman if (fw_has_capa(&mvm->fw->ucode_capa, 17574e8fe214SGregory Greenman IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 17584e8fe214SGregory Greenman if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 17594e8fe214SGregory Greenman iwl_rfi_send_config_cmd(mvm, NULL); 17604e8fe214SGregory Greenman } 17614e8fe214SGregory Greenman 1762e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1763e705c121SKalle Valo return 0; 1764e705c121SKalle Valo error: 1765f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1766fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1767e705c121SKalle Valo return ret; 1768e705c121SKalle Valo } 1769e705c121SKalle Valo 1770e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1771e705c121SKalle Valo { 1772e705c121SKalle Valo int ret, i; 1773e705c121SKalle Valo 1774e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1775e705c121SKalle Valo 1776e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1777e705c121SKalle Valo if (ret) 1778e705c121SKalle Valo return ret; 1779e705c121SKalle Valo 1780e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1781e705c121SKalle Valo if (ret) { 1782e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1783e705c121SKalle Valo goto error; 1784e705c121SKalle Valo } 1785e705c121SKalle Valo 1786e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1787e705c121SKalle Valo if (ret) 1788e705c121SKalle Valo goto error; 1789e705c121SKalle Valo 1790e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1791e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1792e705c121SKalle Valo if (ret) 1793e705c121SKalle Valo goto error; 1794e705c121SKalle Valo 1795e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1796e705c121SKalle Valo if (ret) 1797e705c121SKalle Valo goto error; 1798e705c121SKalle Valo 1799e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1800be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1801e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1802e705c121SKalle Valo 18032c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 18042c2c3647SNathan Errera ADD_STA, 18052c2c3647SNathan Errera 0) < 12) { 18062c2c3647SNathan Errera /* 18072c2c3647SNathan Errera * Add auxiliary station for scanning. 18082c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 18092c2c3647SNathan Errera * internal aux station for all aux activities that don't 18102c2c3647SNathan Errera * requires a dedicated data queue. 18112c2c3647SNathan Errera * In old version the aux station uses mac id like other 18122c2c3647SNathan Errera * station and not lmac id 18132c2c3647SNathan Errera */ 18142c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1815e705c121SKalle Valo if (ret) 1816e705c121SKalle Valo goto error; 18172c2c3647SNathan Errera } 1818e705c121SKalle Valo 1819e705c121SKalle Valo return 0; 1820e705c121SKalle Valo error: 1821fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1822e705c121SKalle Valo return ret; 1823e705c121SKalle Valo } 1824e705c121SKalle Valo 1825e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1826e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1827e705c121SKalle Valo { 1828e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1829e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1830e705c121SKalle Valo 1831e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1832e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1833e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1834e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1835e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1836e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 18370c8d0a47SGolan Ben-Ami 18380c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 18390c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 18400c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 18410c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1842e705c121SKalle Valo } 1843