18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 28e99ea8dSJohannes Berg /* 34f7411d6SRoee Goldfiner * Copyright (C) 2012-2014, 2018-2021 Intel Corporation 48e99ea8dSJohannes Berg * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 58e99ea8dSJohannes Berg * Copyright (C) 2016-2017 Intel Deutschland GmbH 68e99ea8dSJohannes Berg */ 7e705c121SKalle Valo #include <net/mac80211.h> 8854d773eSSara Sharon #include <linux/netdevice.h> 9a2ac0f48SLuca Coelho #include <linux/dmi.h> 10e705c121SKalle Valo 11e705c121SKalle Valo #include "iwl-trans.h" 12e705c121SKalle Valo #include "iwl-op-mode.h" 13d962f9b1SJohannes Berg #include "fw/img.h" 14e705c121SKalle Valo #include "iwl-debug.h" 15e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 16e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 17e705c121SKalle Valo #include "iwl-prph.h" 18813df5ceSLuca Coelho #include "fw/acpi.h" 19b3e4c0f3SLuca Coelho #include "fw/pnvm.h" 20e705c121SKalle Valo 21e705c121SKalle Valo #include "mvm.h" 227174beb6SJohannes Berg #include "fw/dbg.h" 23e705c121SKalle Valo #include "iwl-phy-db.h" 249c4f7d51SShaul Triebitz #include "iwl-modparams.h" 259c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 26e705c121SKalle Valo 27b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 28e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 29e705c121SKalle Valo 30e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 31e705c121SKalle Valo 32e12cfc7bSMiri Korenblit #define IWL_PPAG_MASK 3 33e12cfc7bSMiri Korenblit #define IWL_PPAG_ETSI_MASK BIT(0) 34e12cfc7bSMiri Korenblit 35e705c121SKalle Valo struct iwl_mvm_alive_data { 36e705c121SKalle Valo bool valid; 37e705c121SKalle Valo u32 scd_base_addr; 38e705c121SKalle Valo }; 39e705c121SKalle Valo 40e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 41e705c121SKalle Valo { 42e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 43e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 44e705c121SKalle Valo }; 45e705c121SKalle Valo 46e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 47e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 48e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 49e705c121SKalle Valo } 50e705c121SKalle Valo 5143413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 5243413a97SSara Sharon { 5343413a97SSara Sharon int i; 5443413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 5543413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 56608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 57608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 58608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 59608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 60608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 61608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 6243413a97SSara Sharon }; 6343413a97SSara Sharon 64f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 65f43495fdSSara Sharon return 0; 66f43495fdSSara Sharon 67854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 6843413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 69854d773eSSara Sharon cmd.indirection_table[i] = 70854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 71854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 7243413a97SSara Sharon 7343413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 7443413a97SSara Sharon } 7543413a97SSara Sharon 7697d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 7797d5be7eSLiad Kaufman { 7897d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 7997d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 8097d5be7eSLiad Kaufman }; 8197d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 8297d5be7eSLiad Kaufman int ret; 8397d5be7eSLiad Kaufman 8497d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 8597d5be7eSLiad Kaufman if (ret) 8697d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 8797d5be7eSLiad Kaufman else 8897d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 8997d5be7eSLiad Kaufman 9097d5be7eSLiad Kaufman return ret; 9197d5be7eSLiad Kaufman } 9297d5be7eSLiad Kaufman 93bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 94bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 95bdccdb85SGolan Ben-Ami { 96bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 97bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 98bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 99bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 100bdccdb85SGolan Ben-Ami int i; 101bdccdb85SGolan Ben-Ami 102bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 103bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 104bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 105bdccdb85SGolan Ben-Ami 106bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 107bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 108bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 109bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 110bdccdb85SGolan Ben-Ami n_words + i, 111bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 112bdccdb85SGolan Ben-Ami } 113bdccdb85SGolan Ben-Ami 114e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 115e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 116e705c121SKalle Valo { 117fd1c3318SJohannes Berg unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 118e705c121SKalle Valo struct iwl_mvm *mvm = 119e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 120e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 1215c228d63SSara Sharon struct iwl_umac_alive *umac; 1225c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 1235c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 1245c228d63SSara Sharon u16 status; 125cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table; 126e705c121SKalle Valo 12790824f2fSLuca Coelho /* 12890824f2fSLuca Coelho * For v5 and above, we can check the version, for older 12990824f2fSLuca Coelho * versions we need to check the size. 13090824f2fSLuca Coelho */ 131b4248c08SAndrei Otcheretianski if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 13290824f2fSLuca Coelho UCODE_ALIVE_NTFY, 0) == 5) { 13390824f2fSLuca Coelho struct iwl_alive_ntf_v5 *palive; 13490824f2fSLuca Coelho 135fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 136fd1c3318SJohannes Berg return false; 137fd1c3318SJohannes Berg 13890824f2fSLuca Coelho palive = (void *)pkt->data; 13990824f2fSLuca Coelho umac = &palive->umac_data; 14090824f2fSLuca Coelho lmac1 = &palive->lmac_data[0]; 14190824f2fSLuca Coelho lmac2 = &palive->lmac_data[1]; 14290824f2fSLuca Coelho status = le16_to_cpu(palive->status); 14390824f2fSLuca Coelho 14490824f2fSLuca Coelho mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 14590824f2fSLuca Coelho mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 14690824f2fSLuca Coelho mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 14790824f2fSLuca Coelho 14890824f2fSLuca Coelho IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 14990824f2fSLuca Coelho mvm->trans->sku_id[0], 15090824f2fSLuca Coelho mvm->trans->sku_id[1], 15190824f2fSLuca Coelho mvm->trans->sku_id[2]); 15290824f2fSLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 1539422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive; 1549422b978SLuca Coelho 155fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 156fd1c3318SJohannes Berg return false; 157fd1c3318SJohannes Berg 158e705c121SKalle Valo palive = (void *)pkt->data; 1595c228d63SSara Sharon umac = &palive->umac_data; 1605c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 1615c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 1625c228d63SSara Sharon status = le16_to_cpu(palive->status); 1639422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == 1649422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) { 1659422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3; 1669422b978SLuca Coelho 167fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive3)) 168fd1c3318SJohannes Berg return false; 169fd1c3318SJohannes Berg 1705c228d63SSara Sharon palive3 = (void *)pkt->data; 1715c228d63SSara Sharon umac = &palive3->umac_data; 1725c228d63SSara Sharon lmac1 = &palive3->lmac_data; 1735c228d63SSara Sharon status = le16_to_cpu(palive3->status); 1749422b978SLuca Coelho } else { 1759422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n", 1769422b978SLuca Coelho iwl_rx_packet_payload_len(pkt)); 1779422b978SLuca Coelho /* get timeout later */ 1789422b978SLuca Coelho return false; 1795c228d63SSara Sharon } 180e705c121SKalle Valo 18122463857SShahar S Matityahu lmac_error_event_table = 18222463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 18322463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 184e705c121SKalle Valo 18522463857SShahar S Matityahu if (lmac2) 18691c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 18722463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 18822463857SShahar S Matityahu 1894f7411d6SRoee Goldfiner umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 1904f7411d6SRoee Goldfiner ~FW_ADDR_CACHE_CONTROL; 1915c228d63SSara Sharon 192cfa5d0caSMordechay Goodstein if (umac_error_table) { 193cfa5d0caSMordechay Goodstein if (umac_error_table >= 1943485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 195cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans, 196cfa5d0caSMordechay Goodstein umac_error_table); 1973485e76eSLuca Coelho } else { 198fb5b2846SLuca Coelho IWL_ERR(mvm, 199fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 200cfa5d0caSMordechay Goodstein umac_error_table, 201fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 202fb5b2846SLuca Coelho "Init" : "RT"); 2033485e76eSLuca Coelho } 204cfa5d0caSMordechay Goodstein } 20522463857SShahar S Matityahu 20622463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2075c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 208e705c121SKalle Valo 209e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2105c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2115c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2125c228d63SSara Sharon 2135c228d63SSara Sharon if (lmac2) 2145c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 215e705c121SKalle Valo 216e705c121SKalle Valo IWL_DEBUG_FW(mvm, 217e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2185c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2195c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 220e705c121SKalle Valo 2210a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2220a3a3e9eSShahar S Matityahu 223e705c121SKalle Valo return true; 224e705c121SKalle Valo } 225e705c121SKalle Valo 2261f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2271f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2281f370650SSara Sharon { 2291f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2301f370650SSara Sharon 2311f370650SSara Sharon return true; 2321f370650SSara Sharon } 2331f370650SSara Sharon 234e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 235e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 236e705c121SKalle Valo { 237e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 238e705c121SKalle Valo 239e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 240e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 241e705c121SKalle Valo return true; 242e705c121SKalle Valo } 243e705c121SKalle Valo 244ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 245e705c121SKalle Valo 246e705c121SKalle Valo return false; 247e705c121SKalle Valo } 248e705c121SKalle Valo 249e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 250e705c121SKalle Valo enum iwl_ucode_type ucode_type) 251e705c121SKalle Valo { 252e705c121SKalle Valo struct iwl_notification_wait alive_wait; 25394a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 254e705c121SKalle Valo const struct fw_img *fw; 255cfbc6c4cSSara Sharon int ret; 256702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 2579422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 258b3500b47SEmmanuel Grumbach bool run_in_rfkill = 259b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 260e705c121SKalle Valo 261e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 2623d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 2633d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 2643d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 265612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 266e705c121SKalle Valo else 267612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 268e705c121SKalle Valo if (WARN_ON(!fw)) 269e705c121SKalle Valo return -EINVAL; 270702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 27165b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 272e705c121SKalle Valo 273e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 274e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 275e705c121SKalle Valo iwl_alive_fn, &alive_data); 276e705c121SKalle Valo 277b3500b47SEmmanuel Grumbach /* 278b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 279b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 280b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 281b3500b47SEmmanuel Grumbach */ 282b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 283e705c121SKalle Valo if (ret) { 284702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 285e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 286e705c121SKalle Valo return ret; 287e705c121SKalle Valo } 288e705c121SKalle Valo 289e705c121SKalle Valo /* 290e705c121SKalle Valo * Some things may run in the background now, but we 291e705c121SKalle Valo * just wait for the ALIVE notification here. 292e705c121SKalle Valo */ 293e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 294e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 295e705c121SKalle Valo if (ret) { 296d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 297d6be9c1dSSara Sharon 298*5667ccc2SMordechay Goodstein /* SecBoot info */ 29920f5aef5SJohannes Berg if (trans->trans_cfg->device_family >= 30020f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) { 301e705c121SKalle Valo IWL_ERR(mvm, 302e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 303ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 304ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 305ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 306*5667ccc2SMordechay Goodstein } else if (trans->trans_cfg->device_family >= 307*5667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_8000) { 308*5667ccc2SMordechay Goodstein IWL_ERR(mvm, 309*5667ccc2SMordechay Goodstein "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 310*5667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_1_STATUS), 311*5667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_2_STATUS)); 312*5667ccc2SMordechay Goodstein } 313*5667ccc2SMordechay Goodstein 314*5667ccc2SMordechay Goodstein /* LMAC/UMAC PC info */ 315*5667ccc2SMordechay Goodstein if (trans->trans_cfg->device_family >= 316*5667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_9000) { 31720f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n", 31820f5aef5SJohannes Berg iwl_read_umac_prph(trans, 31920f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC)); 32020f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n", 32120f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32220f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC)); 32320f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm)) 32420f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 32520f5aef5SJohannes Berg iwl_read_umac_prph(trans, 32620f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC)); 32720f5aef5SJohannes Berg } 32820f5aef5SJohannes Berg 32920f5aef5SJohannes Berg if (ret == -ETIMEDOUT) 33020f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 33120f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT); 33220f5aef5SJohannes Berg 333702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 334e705c121SKalle Valo return ret; 335e705c121SKalle Valo } 336e705c121SKalle Valo 337e705c121SKalle Valo if (!alive_data.valid) { 338e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 339702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 340e705c121SKalle Valo return -EIO; 341e705c121SKalle Valo } 342e705c121SKalle Valo 343b3e4c0f3SLuca Coelho ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait); 34470d3ca86SLuca Coelho if (ret) { 34570d3ca86SLuca Coelho IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 34670d3ca86SLuca Coelho iwl_fw_set_current_image(&mvm->fwrt, old_type); 34770d3ca86SLuca Coelho return ret; 34870d3ca86SLuca Coelho } 34970d3ca86SLuca Coelho 350e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 351e705c121SKalle Valo 352e705c121SKalle Valo /* 353e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 354e705c121SKalle Valo * initialization, but in firmware restart scenarios they 355e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 356e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 357e705c121SKalle Valo * reconfiguration completes. During normal startup, they 358e705c121SKalle Valo * will be empty. 359e705c121SKalle Valo */ 360e705c121SKalle Valo 361e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 3621c14089eSJohannes Berg /* 3631c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 3641c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 3651c14089eSJohannes Berg * we ever even consider the command queue as one we might 3661c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 3671c14089eSJohannes Berg */ 3681c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 3691c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 370e705c121SKalle Valo 37165b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 372f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 373f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 374f7805b33SLior Cohen #endif 375e705c121SKalle Valo 376d3d9b4fcSEmmanuel Grumbach /* 377d3d9b4fcSEmmanuel Grumbach * All the BSSes in the BSS table include the GP2 in the system 378d3d9b4fcSEmmanuel Grumbach * at the beacon Rx time, this is of course no longer relevant 379d3d9b4fcSEmmanuel Grumbach * since we are resetting the firmware. 380d3d9b4fcSEmmanuel Grumbach * Purge all the BSS table. 381d3d9b4fcSEmmanuel Grumbach */ 382d3d9b4fcSEmmanuel Grumbach cfg80211_bss_flush(mvm->hw->wiphy); 383d3d9b4fcSEmmanuel Grumbach 384e705c121SKalle Valo return 0; 385e705c121SKalle Valo } 386e705c121SKalle Valo 38752b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 3888c5f47b1SJohannes Berg { 3898c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 3908c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 3918c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 3928c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 3938c5f47b1SJohannes Berg }; 3948c5f47b1SJohannes Berg static const u16 init_complete[] = { 3958c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 3968c5f47b1SJohannes Berg }; 3978c5f47b1SJohannes Berg int ret; 3988c5f47b1SJohannes Berg 399a4584729SHaim Dreyfuss if (mvm->trans->cfg->tx_with_siso_diversity) 400a4584729SHaim Dreyfuss init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 401a4584729SHaim Dreyfuss 4028c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 4038c5f47b1SJohannes Berg 40494022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 40594022562SEmmanuel Grumbach 4068c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 4078c5f47b1SJohannes Berg &init_wait, 4088c5f47b1SJohannes Berg init_complete, 4098c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 4108c5f47b1SJohannes Berg iwl_wait_init_complete, 4118c5f47b1SJohannes Berg NULL); 4128c5f47b1SJohannes Berg 413b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 41486ce5c74SShahar S Matityahu 4158c5f47b1SJohannes Berg /* Will also start the device */ 4168c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4178c5f47b1SJohannes Berg if (ret) { 4188c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4198c5f47b1SJohannes Berg goto error; 4208c5f47b1SJohannes Berg } 421b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 422b108d8c7SShahar S Matityahu NULL); 4238c5f47b1SJohannes Berg 4248c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4258c5f47b1SJohannes Berg * commands 4268c5f47b1SJohannes Berg */ 4278c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 428b3500b47SEmmanuel Grumbach INIT_EXTENDED_CFG_CMD), 429b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4308c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4318c5f47b1SJohannes Berg if (ret) { 4328c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4338c5f47b1SJohannes Berg ret); 4348c5f47b1SJohannes Berg goto error; 4358c5f47b1SJohannes Berg } 4368c5f47b1SJohannes Berg 437e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 438e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4399ce505feSAbhishek Naik ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4409c4f7d51SShaul Triebitz mvm->nvm_sections); 4419ce505feSAbhishek Naik if (ret) 4429ce505feSAbhishek Naik goto error; 4439ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 4449ce505feSAbhishek Naik if (ret) 4459ce505feSAbhishek Naik goto error; 446e9e1ba3dSSara Sharon } 4478c5f47b1SJohannes Berg 44852b15521SEmmanuel Grumbach if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4495bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 450d4f3695eSSara Sharon if (ret) { 451d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 452d4f3695eSSara Sharon goto error; 453d4f3695eSSara Sharon } 454d4f3695eSSara Sharon } 455d4f3695eSSara Sharon 4568c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 457b3500b47SEmmanuel Grumbach NVM_ACCESS_COMPLETE), 458b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4598c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4608c5f47b1SJohannes Berg if (ret) { 4618c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4628c5f47b1SJohannes Berg ret); 4638c5f47b1SJohannes Berg goto error; 4648c5f47b1SJohannes Berg } 4658c5f47b1SJohannes Berg 4668c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 467e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4688c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 469e9e1ba3dSSara Sharon if (ret) 470e9e1ba3dSSara Sharon return ret; 471e9e1ba3dSSara Sharon 472e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 47352b15521SEmmanuel Grumbach if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 4744c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 475c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 476c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 477c135cb56SShaul Triebitz mvm->nvm_data = NULL; 478e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 479e9e1ba3dSSara Sharon return ret; 480e9e1ba3dSSara Sharon } 481e9e1ba3dSSara Sharon } 482e9e1ba3dSSara Sharon 483b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 484b3500b47SEmmanuel Grumbach 485e9e1ba3dSSara Sharon return 0; 4868c5f47b1SJohannes Berg 4878c5f47b1SJohannes Berg error: 4888c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 4898c5f47b1SJohannes Berg return ret; 4908c5f47b1SJohannes Berg } 4918c5f47b1SJohannes Berg 492c4ace426SGil Adam #ifdef CONFIG_ACPI 493c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 494c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 495c4ace426SGil Adam { 496c4ace426SGil Adam /* 497c4ace426SGil Adam * TODO: read specific phy config from BIOS 498c4ace426SGil Adam * ACPI table for this feature has not been defined yet, 499c4ace426SGil Adam * so for now we use hardcoded values. 500c4ace426SGil Adam */ 501c4ace426SGil Adam 502c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_A) { 503c4ace426SGil Adam phy_filters->filter_cfg_chain_a = 504c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 505c4ace426SGil Adam } 506c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_B) { 507c4ace426SGil Adam phy_filters->filter_cfg_chain_b = 508c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 509c4ace426SGil Adam } 510c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_C) { 511c4ace426SGil Adam phy_filters->filter_cfg_chain_c = 512c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 513c4ace426SGil Adam } 514c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_D) { 515c4ace426SGil Adam phy_filters->filter_cfg_chain_d = 516c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 517c4ace426SGil Adam } 518c4ace426SGil Adam } 519c4ace426SGil Adam 520c4ace426SGil Adam #else /* CONFIG_ACPI */ 521c4ace426SGil Adam 522c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 523c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 524c4ace426SGil Adam { 525c4ace426SGil Adam } 526c4ace426SGil Adam #endif /* CONFIG_ACPI */ 527c4ace426SGil Adam 528e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 529e705c121SKalle Valo { 530c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 531702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 532c4ace426SGil Adam struct iwl_phy_specific_cfg phy_filters = {}; 533c4ace426SGil Adam u8 cmd_ver; 534c4ace426SGil Adam size_t cmd_size; 535e705c121SKalle Valo 536bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) && 537d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity) 538bb99ff9bSLuca Coelho return 0; 539d923b020SLuca Coelho 540d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) { 541bb99ff9bSLuca Coelho /* 542bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC 543bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS. 544bb99ff9bSLuca Coelho */ 545bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg = 546bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 547bb99ff9bSLuca Coelho } 548bb99ff9bSLuca Coelho 549e705c121SKalle Valo /* Set parameters */ 550e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 55186a2b204SLuca Coelho 55286a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 5537897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |= 5547897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 55586a2b204SLuca Coelho 556e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 557e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 558e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 559e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 560e705c121SKalle Valo 561c4ace426SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, 562e80bfd11SMordechay Goodstein PHY_CONFIGURATION_CMD, 563e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 564c4ace426SGil Adam if (cmd_ver == 3) { 565c4ace426SGil Adam iwl_mvm_phy_filter_init(mvm, &phy_filters); 566c4ace426SGil Adam memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 567c4ace426SGil Adam sizeof(struct iwl_phy_specific_cfg)); 568c4ace426SGil Adam } 569c4ace426SGil Adam 570e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 571e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 572c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 573c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1); 574e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 575c4ace426SGil Adam cmd_size, &phy_cfg_cmd); 576e705c121SKalle Valo } 577e705c121SKalle Valo 5783b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 579e705c121SKalle Valo { 580e705c121SKalle Valo struct iwl_notification_wait calib_wait; 581e705c121SKalle Valo static const u16 init_complete[] = { 582e705c121SKalle Valo INIT_COMPLETE_NOTIF, 583e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 584e705c121SKalle Valo }; 585e705c121SKalle Valo int ret; 586e705c121SKalle Valo 5877d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 58852b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 5898c5f47b1SJohannes Berg 590e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 591e705c121SKalle Valo 59294022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 593e705c121SKalle Valo 594e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 595e705c121SKalle Valo &calib_wait, 596e705c121SKalle Valo init_complete, 597e705c121SKalle Valo ARRAY_SIZE(init_complete), 598e705c121SKalle Valo iwl_wait_phy_db_entry, 599e705c121SKalle Valo mvm->phy_db); 600e705c121SKalle Valo 60111f8c533SLuca Coelho iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 60211f8c533SLuca Coelho 603e705c121SKalle Valo /* Will also start the device */ 604e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 605e705c121SKalle Valo if (ret) { 606e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 60700e0c6c8SLuca Coelho goto remove_notif; 608e705c121SKalle Valo } 609e705c121SKalle Valo 6107d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 611b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 612e705c121SKalle Valo if (ret) 61300e0c6c8SLuca Coelho goto remove_notif; 614b3de3ef4SEmmanuel Grumbach } 615e705c121SKalle Valo 616e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 6173b25f1afSEmmanuel Grumbach if (!mvm->nvm_data) { 6185bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 619e705c121SKalle Valo if (ret) { 620e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 62100e0c6c8SLuca Coelho goto remove_notif; 622e705c121SKalle Valo } 623e705c121SKalle Valo } 624e705c121SKalle Valo 625e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 6269ce505feSAbhishek Naik if (mvm->nvm_file_name) { 6279ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 6289ce505feSAbhishek Naik if (ret) 6299ce505feSAbhishek Naik goto remove_notif; 6309ce505feSAbhishek Naik } 631e705c121SKalle Valo 63264866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 63364866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 63464866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 635e705c121SKalle Valo 636e705c121SKalle Valo /* 637e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 638e705c121SKalle Valo * the init seq later when RF kill will switch to off 639e705c121SKalle Valo */ 640e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 641e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 642e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 64300e0c6c8SLuca Coelho goto remove_notif; 644e705c121SKalle Valo } 645e705c121SKalle Valo 646b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 647e705c121SKalle Valo 648e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 649e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 650e705c121SKalle Valo if (ret) 65100e0c6c8SLuca Coelho goto remove_notif; 652e705c121SKalle Valo 653e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 654e705c121SKalle Valo if (ret) { 655e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 656e705c121SKalle Valo ret); 65700e0c6c8SLuca Coelho goto remove_notif; 658e705c121SKalle Valo } 659e705c121SKalle Valo 660e705c121SKalle Valo /* 661e705c121SKalle Valo * Some things may run in the background now, but we 662e705c121SKalle Valo * just wait for the calibration complete notification. 663e705c121SKalle Valo */ 664e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 665e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 66600e0c6c8SLuca Coelho if (!ret) 667e705c121SKalle Valo goto out; 668e705c121SKalle Valo 66900e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 67000e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 67100e0c6c8SLuca Coelho ret = 0; 67200e0c6c8SLuca Coelho } else { 67300e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 67400e0c6c8SLuca Coelho ret); 67500e0c6c8SLuca Coelho } 67600e0c6c8SLuca Coelho 67700e0c6c8SLuca Coelho goto out; 67800e0c6c8SLuca Coelho 67900e0c6c8SLuca Coelho remove_notif: 680e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 681e705c121SKalle Valo out: 682b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 683e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 684e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 685e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 686e705c121SKalle Valo sizeof(struct ieee80211_channel) + 687e705c121SKalle Valo sizeof(struct ieee80211_rate), 688e705c121SKalle Valo GFP_KERNEL); 689e705c121SKalle Valo if (!mvm->nvm_data) 690e705c121SKalle Valo return -ENOMEM; 691e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 692e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 693e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 694e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 695e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 696e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 697e705c121SKalle Valo } 698e705c121SKalle Valo 699e705c121SKalle Valo return ret; 700e705c121SKalle Valo } 701e705c121SKalle Valo 702e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 703e705c121SKalle Valo { 704e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 705e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 706e705c121SKalle Valo }; 707e705c121SKalle Valo 708e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 709e705c121SKalle Valo return 0; 710e705c121SKalle Valo 711e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 712e705c121SKalle Valo sizeof(cmd), &cmd); 713e705c121SKalle Valo } 714e705c121SKalle Valo 715c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 71642ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 717da2830acSLuca Coelho { 718216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 719216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 72071e9378bSLuca Coelho }; 7219c08cef8SLuca Coelho __le16 *per_chain; 7221edd56e6SLuca Coelho int ret; 72339c1a972SIhab Zhaika u16 len = 0; 724fbb7957dSLuca Coelho u32 n_subbands; 725fbb7957dSLuca Coelho u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 726e80bfd11SMordechay Goodstein REDUCE_TX_POWER_CMD, 727e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 72842ce76d6SLuca Coelho 729fbb7957dSLuca Coelho if (cmd_ver == 6) { 730fbb7957dSLuca Coelho len = sizeof(cmd.v6); 731fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2; 732fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0]; 733fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa, 7349c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 7350791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 736e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7379c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0]; 7389c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa, 7399c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 740216cdfb5SLuca Coelho len = sizeof(cmd.v4); 741e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7429c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0]; 7439c08cef8SLuca Coelho } else { 744216cdfb5SLuca Coelho len = sizeof(cmd.v3); 745e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 7469c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0]; 7479c08cef8SLuca Coelho } 74855bfa4b9SLuca Coelho 749216cdfb5SLuca Coelho /* all structs have the same common part, add it */ 750216cdfb5SLuca Coelho len += sizeof(cmd.common); 75142ce76d6SLuca Coelho 752dac7171cSLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 753dac7171cSLuca Coelho IWL_NUM_CHAIN_TABLES, 754fbb7957dSLuca Coelho n_subbands, prof_a, prof_b); 7551edd56e6SLuca Coelho 7561edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */ 7571edd56e6SLuca Coelho if (ret) 7581edd56e6SLuca Coelho return ret; 7591edd56e6SLuca Coelho 76042ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 76142ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 76242ce76d6SLuca Coelho } 76342ce76d6SLuca Coelho 7647fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 7657fe90e0eSHaim Dreyfuss { 766dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 767f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp; 7680c3d7282SHaim Dreyfuss u16 len; 76939c1a972SIhab Zhaika int ret; 7700c3d7282SHaim Dreyfuss struct iwl_host_cmd cmd; 771e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 772e80bfd11SMordechay Goodstein GEO_TX_POWER_LIMIT, 773e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 7747fe90e0eSHaim Dreyfuss 775dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 776dd2a1256SLuca Coelho geo_tx_cmd.v1.ops = 777dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 778dd2a1256SLuca Coelho 7790ea788edSLuca Coelho if (cmd_ver == 3) 7800ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3); 7810ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 782dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 783dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2); 784dd2a1256SLuca Coelho else 785dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1); 7860c3d7282SHaim Dreyfuss 78739c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt)) 78839c1a972SIhab Zhaika return -EOPNOTSUPP; 78939c1a972SIhab Zhaika 7900c3d7282SHaim Dreyfuss cmd = (struct iwl_host_cmd){ 7917fe90e0eSHaim Dreyfuss .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 7920c3d7282SHaim Dreyfuss .len = { len, }, 7937fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 79439c1a972SIhab Zhaika .data = { &geo_tx_cmd }, 7957fe90e0eSHaim Dreyfuss }; 7967fe90e0eSHaim Dreyfuss 7977fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 7987fe90e0eSHaim Dreyfuss if (ret) { 7997fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8007fe90e0eSHaim Dreyfuss return ret; 8017fe90e0eSHaim Dreyfuss } 802f604324eSLuca Coelho 803f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data; 804f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx); 805f604324eSLuca Coelho 806f604324eSLuca Coelho if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) 807f604324eSLuca Coelho ret = -EIO; 808f604324eSLuca Coelho 8097fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8107fe90e0eSHaim Dreyfuss return ret; 8117fe90e0eSHaim Dreyfuss } 8127fe90e0eSHaim Dreyfuss 813a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 814a6bff3cbSHaim Dreyfuss { 815dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd; 81639c1a972SIhab Zhaika u16 len; 81745acebf8SNaftali Goldstein u32 n_bands; 8180433ae55SGolan Ben Ami int ret; 819e80bfd11SMordechay Goodstein u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 820e80bfd11SMordechay Goodstein GEO_TX_POWER_LIMIT, 821e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 822a6bff3cbSHaim Dreyfuss 82345acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 82445acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 82545acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 82645acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops)); 82745acebf8SNaftali Goldstein /* the ops field is at the same spot for all versions, so set in v1 */ 82845acebf8SNaftali Goldstein cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 82945acebf8SNaftali Goldstein 83045acebf8SNaftali Goldstein if (cmd_ver == 3) { 83145acebf8SNaftali Goldstein len = sizeof(cmd.v3); 83245acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v3.table[0]); 83345acebf8SNaftali Goldstein } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 83445acebf8SNaftali Goldstein IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 83545acebf8SNaftali Goldstein len = sizeof(cmd.v2); 83645acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v2.table[0]); 83745acebf8SNaftali Goldstein } else { 83845acebf8SNaftali Goldstein len = sizeof(cmd.v1); 83945acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v1.table[0]); 84045acebf8SNaftali Goldstein } 84145acebf8SNaftali Goldstein 84245acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 84345acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 84445acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 84545acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table)); 84645acebf8SNaftali Goldstein /* the table is at the same position for all versions, so set use v1 */ 84745acebf8SNaftali Goldstein ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], n_bands); 848eca1e56cSEmmanuel Grumbach 8490433ae55SGolan Ben Ami /* 8500433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table, 8510433ae55SGolan Ben Ami * but in that case there is no need to send the command. 8520433ae55SGolan Ben Ami */ 8530433ae55SGolan Ben Ami if (ret) 8540433ae55SGolan Ben Ami return 0; 855a6bff3cbSHaim Dreyfuss 85628db1862SLuca Coelho /* 85728db1862SLuca Coelho * Set the revision on versions that contain it. 85828db1862SLuca Coelho * This must be done after calling iwl_sar_geo_init(). 85928db1862SLuca Coelho */ 86028db1862SLuca Coelho if (cmd_ver == 3) 86128db1862SLuca Coelho cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 86228db1862SLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 86328db1862SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 86428db1862SLuca Coelho cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); 86528db1862SLuca Coelho 866dd2a1256SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, 867dd2a1256SLuca Coelho WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 868dd2a1256SLuca Coelho 0, len, &cmd); 869a6bff3cbSHaim Dreyfuss } 870a6bff3cbSHaim Dreyfuss 8716ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 8726ce1e5c0SGil Adam { 873e12cfc7bSMiri Korenblit union acpi_object *wifi_pkg, *data, *flags; 874f2134f66SGil Adam int i, j, ret, tbl_rev, num_sub_bands; 8756ce1e5c0SGil Adam int idx = 2; 876f2134f66SGil Adam s8 *gain; 8776ce1e5c0SGil Adam 878f2134f66SGil Adam /* 879e12cfc7bSMiri Korenblit * The 'flags' field is the same in v1 and in v2 so we can just 880f2134f66SGil Adam * use v1 to access it. 881f2134f66SGil Adam */ 882e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 883e12cfc7bSMiri Korenblit 8846ce1e5c0SGil Adam data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 8856ce1e5c0SGil Adam if (IS_ERR(data)) 8866ce1e5c0SGil Adam return PTR_ERR(data); 8876ce1e5c0SGil Adam 888e12cfc7bSMiri Korenblit /* try to read ppag table rev 2 or 1 (both have the same data size) */ 8896ce1e5c0SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 890f2134f66SGil Adam ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); 891f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 892e12cfc7bSMiri Korenblit if (tbl_rev == 1 || tbl_rev == 2) { 893e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V2; 894e12cfc7bSMiri Korenblit gain = mvm->fwrt.ppag_table.v2.gain[0]; 895e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver = tbl_rev; 896e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 897e12cfc7bSMiri Korenblit "Reading PPAG table v2 (tbl_rev=%d)\n", 898e12cfc7bSMiri Korenblit tbl_rev); 899e12cfc7bSMiri Korenblit goto read_table; 900e12cfc7bSMiri Korenblit } else { 901f2134f66SGil Adam ret = -EINVAL; 9026ce1e5c0SGil Adam goto out_free; 9036ce1e5c0SGil Adam } 904f2134f66SGil Adam } 9056ce1e5c0SGil Adam 906f2134f66SGil Adam /* try to read ppag table revision 0 */ 907f2134f66SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 908e12cfc7bSMiri Korenblit ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev); 909f2134f66SGil Adam if (!IS_ERR(wifi_pkg)) { 9103ed83da3SLuca Coelho if (tbl_rev != 0) { 9113ed83da3SLuca Coelho ret = -EINVAL; 9123ed83da3SLuca Coelho goto out_free; 9133ed83da3SLuca Coelho } 914e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 915f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 916e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver = 0; 917f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n"); 918f2134f66SGil Adam goto read_table; 919f2134f66SGil Adam } 920f2134f66SGil Adam ret = PTR_ERR(wifi_pkg); 921f2134f66SGil Adam goto out_free; 9223ed83da3SLuca Coelho 923f2134f66SGil Adam read_table: 924e12cfc7bSMiri Korenblit flags = &wifi_pkg->package.elements[1]; 925e12cfc7bSMiri Korenblit 926e12cfc7bSMiri Korenblit if (flags->type != ACPI_TYPE_INTEGER) { 9276ce1e5c0SGil Adam ret = -EINVAL; 9286ce1e5c0SGil Adam goto out_free; 9296ce1e5c0SGil Adam } 9306ce1e5c0SGil Adam 931e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(flags->integer.value & 932e12cfc7bSMiri Korenblit IWL_PPAG_MASK); 933e12cfc7bSMiri Korenblit 934e12cfc7bSMiri Korenblit if (!mvm->fwrt.ppag_table.v1.flags) { 9356ce1e5c0SGil Adam ret = 0; 9366ce1e5c0SGil Adam goto out_free; 9376ce1e5c0SGil Adam } 9386ce1e5c0SGil Adam 9396ce1e5c0SGil Adam /* 9406ce1e5c0SGil Adam * read, verify gain values and save them into the PPAG table. 9416ce1e5c0SGil Adam * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 9426ce1e5c0SGil Adam * following sub-bands to High-Band (5GHz). 9436ce1e5c0SGil Adam */ 944f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 945f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 9466ce1e5c0SGil Adam union acpi_object *ent; 9476ce1e5c0SGil Adam 9486ce1e5c0SGil Adam ent = &wifi_pkg->package.elements[idx++]; 9495a684245SLuca Coelho if (ent->type != ACPI_TYPE_INTEGER) { 9505a684245SLuca Coelho ret = -EINVAL; 9515a684245SLuca Coelho goto out_free; 9525a684245SLuca Coelho } 9535a684245SLuca Coelho 9545a684245SLuca Coelho gain[i * num_sub_bands + j] = ent->integer.value; 9555a684245SLuca Coelho 9565a684245SLuca Coelho if ((j == 0 && 9575a684245SLuca Coelho (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB || 9585a684245SLuca Coelho gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) || 9595a684245SLuca Coelho (j != 0 && 9605a684245SLuca Coelho (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB || 9615a684245SLuca Coelho gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) { 962e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 9636ce1e5c0SGil Adam ret = -EINVAL; 9646ce1e5c0SGil Adam goto out_free; 9656ce1e5c0SGil Adam } 9666ce1e5c0SGil Adam } 9676ce1e5c0SGil Adam } 968e12cfc7bSMiri Korenblit 9696ce1e5c0SGil Adam ret = 0; 9706ce1e5c0SGil Adam out_free: 9716ce1e5c0SGil Adam kfree(data); 9726ce1e5c0SGil Adam return ret; 9736ce1e5c0SGil Adam } 9746ce1e5c0SGil Adam 9756ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 9766ce1e5c0SGil Adam { 977f2134f66SGil Adam u8 cmd_ver; 978f2134f66SGil Adam int i, j, ret, num_sub_bands, cmd_size; 979f2134f66SGil Adam s8 *gain; 9806ce1e5c0SGil Adam 9816ce1e5c0SGil Adam if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 9826ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 9836ce1e5c0SGil Adam "PPAG capability not supported by FW, command not sent.\n"); 9846ce1e5c0SGil Adam return 0; 9856ce1e5c0SGil Adam } 986e12cfc7bSMiri Korenblit if (!mvm->fwrt.ppag_table.v1.flags) { 987f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n"); 988160bab43SGil Adam return 0; 989160bab43SGil Adam } 990160bab43SGil Adam 991f2134f66SGil Adam cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, 992e80bfd11SMordechay Goodstein PER_PLATFORM_ANT_GAIN_CMD, 993e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 994f2134f66SGil Adam if (cmd_ver == 1) { 995e12cfc7bSMiri Korenblit num_sub_bands = IWL_NUM_SUB_BANDS_V1; 996f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v1.gain[0]; 997659844d3SLuca Coelho cmd_size = sizeof(mvm->fwrt.ppag_table.v1); 998e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) { 999f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1000e12cfc7bSMiri Korenblit "PPAG table rev is %d but FW supports v1, sending truncated table\n", 1001e12cfc7bSMiri Korenblit mvm->fwrt.ppag_ver); 1002e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags &= 1003e12cfc7bSMiri Korenblit cpu_to_le32(IWL_PPAG_ETSI_MASK); 1004f2134f66SGil Adam } 1005e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 || cmd_ver == 3) { 1006f2134f66SGil Adam num_sub_bands = IWL_NUM_SUB_BANDS_V2; 1007f2134f66SGil Adam gain = mvm->fwrt.ppag_table.v2.gain[0]; 1008659844d3SLuca Coelho cmd_size = sizeof(mvm->fwrt.ppag_table.v2); 1009e12cfc7bSMiri Korenblit if (mvm->fwrt.ppag_ver == 0) { 1010f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, 1011f2134f66SGil Adam "PPAG table is v1 but FW supports v2, sending padded table\n"); 1012e12cfc7bSMiri Korenblit } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) { 1013e12cfc7bSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1014e12cfc7bSMiri Korenblit "PPAG table is v3 but FW supports v2, sending partial bitmap.\n"); 1015e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags &= 1016e12cfc7bSMiri Korenblit cpu_to_le32(IWL_PPAG_ETSI_MASK); 1017f2134f66SGil Adam } 1018f2134f66SGil Adam } else { 1019f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n"); 1020f2134f66SGil Adam return 0; 1021f2134f66SGil Adam } 10226ce1e5c0SGil Adam 1023f2134f66SGil Adam for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1024f2134f66SGil Adam for (j = 0; j < num_sub_bands; j++) { 10256ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10266ce1e5c0SGil Adam "PPAG table: chain[%d] band[%d]: gain = %d\n", 1027f2134f66SGil Adam i, j, gain[i * num_sub_bands + j]); 10286ce1e5c0SGil Adam } 10296ce1e5c0SGil Adam } 1030f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 10316ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 10326ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 1033659844d3SLuca Coelho 0, cmd_size, &mvm->fwrt.ppag_table); 10346ce1e5c0SGil Adam if (ret < 0) 10356ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 10366ce1e5c0SGil Adam ret); 10376ce1e5c0SGil Adam 10386ce1e5c0SGil Adam return ret; 10396ce1e5c0SGil Adam } 10406ce1e5c0SGil Adam 1041a2ac0f48SLuca Coelho static const struct dmi_system_id dmi_ppag_approved_list[] = { 1042ca176eddSLuca Coelho { .ident = "HP", 1043ca176eddSLuca Coelho .matches = { 1044ca176eddSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "HP"), 1045ca176eddSLuca Coelho }, 1046ca176eddSLuca Coelho }, 1047dd158ed6SLuca Coelho { .ident = "SAMSUNG", 1048dd158ed6SLuca Coelho .matches = { 1049dd158ed6SLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 1050dd158ed6SLuca Coelho }, 1051dd158ed6SLuca Coelho }, 10524a76553cSLuca Coelho { .ident = "MSFT", 10534a76553cSLuca Coelho .matches = { 10544a76553cSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 10554a76553cSLuca Coelho }, 10564a76553cSLuca Coelho }, 1057a7abc1eaSLuca Coelho { .ident = "ASUS", 1058a7abc1eaSLuca Coelho .matches = { 1059a7abc1eaSLuca Coelho DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."), 1060a7abc1eaSLuca Coelho }, 1061a7abc1eaSLuca Coelho }, 1062a22549f1SWei Yongjun {} 1063a2ac0f48SLuca Coelho }; 1064a2ac0f48SLuca Coelho 10656ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 10666ce1e5c0SGil Adam { 106778a19d52SMiri Korenblit /* no need to read the table, done in INIT stage */ 1068a2ac0f48SLuca Coelho if (!dmi_check_system(dmi_ppag_approved_list)) { 1069a2ac0f48SLuca Coelho IWL_DEBUG_RADIO(mvm, 1070a2ac0f48SLuca Coelho "System vendor '%s' is not in the approved list, disabling PPAG.\n", 1071a2ac0f48SLuca Coelho dmi_get_system_info(DMI_SYS_VENDOR)); 1072e12cfc7bSMiri Korenblit mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0); 1073a2ac0f48SLuca Coelho return 0; 1074a2ac0f48SLuca Coelho } 1075a2ac0f48SLuca Coelho 10766ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 10776ce1e5c0SGil Adam } 10786ce1e5c0SGil Adam 107928dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 108028dd7ccdSMordechay Goodstein { 108128dd7ccdSMordechay Goodstein int ret; 108228dd7ccdSMordechay Goodstein struct iwl_tas_config_cmd cmd = {}; 108328dd7ccdSMordechay Goodstein int list_size; 108428dd7ccdSMordechay Goodstein 1085cdaba917SEmmanuel Grumbach BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) < 108628dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX); 108728dd7ccdSMordechay Goodstein 108828dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 108928dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 109028dd7ccdSMordechay Goodstein return; 109128dd7ccdSMordechay Goodstein } 109228dd7ccdSMordechay Goodstein 1093cdaba917SEmmanuel Grumbach ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size); 109428dd7ccdSMordechay Goodstein if (ret < 0) { 109528dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, 109628dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n", 109728dd7ccdSMordechay Goodstein ret); 109828dd7ccdSMordechay Goodstein return; 109928dd7ccdSMordechay Goodstein } 110028dd7ccdSMordechay Goodstein 110128dd7ccdSMordechay Goodstein if (list_size < 0) 110228dd7ccdSMordechay Goodstein return; 110328dd7ccdSMordechay Goodstein 110428dd7ccdSMordechay Goodstein /* list size if TAS enabled can only be non-negative */ 1105cdaba917SEmmanuel Grumbach cmd.block_list_size = cpu_to_le32((u32)list_size); 110628dd7ccdSMordechay Goodstein 110728dd7ccdSMordechay Goodstein ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 110828dd7ccdSMordechay Goodstein TAS_CONFIG), 110928dd7ccdSMordechay Goodstein 0, sizeof(cmd), &cmd); 111028dd7ccdSMordechay Goodstein if (ret < 0) 111128dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 111228dd7ccdSMordechay Goodstein } 1113f5b1cb2eSGil Adam 11144e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 11154e8fe214SGregory Greenman { 11164e8fe214SGregory Greenman u8 value; 11174e8fe214SGregory Greenman int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0, DSM_RFI_FUNC_ENABLE, 11184e8fe214SGregory Greenman &iwl_rfi_guid, &value); 11194e8fe214SGregory Greenman 11204e8fe214SGregory Greenman if (ret < 0) { 11214e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 11224e8fe214SGregory Greenman 11234e8fe214SGregory Greenman } else if (value >= DSM_VALUE_RFI_MAX) { 11244e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 11254e8fe214SGregory Greenman value); 11264e8fe214SGregory Greenman 11274e8fe214SGregory Greenman } else if (value == DSM_VALUE_RFI_ENABLE) { 11284e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 11294e8fe214SGregory Greenman return DSM_VALUE_RFI_ENABLE; 11304e8fe214SGregory Greenman } 11314e8fe214SGregory Greenman 11324e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 11334e8fe214SGregory Greenman 11344e8fe214SGregory Greenman /* default behaviour is disabled */ 11354e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 11364e8fe214SGregory Greenman } 11374e8fe214SGregory Greenman 1138f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1139f5b1cb2eSGil Adam { 11407119f02bSMiri Korenblit int ret; 11417119f02bSMiri Korenblit u32 value; 114254b4fda5SAbhishek Naik struct iwl_lari_config_change_cmd_v4 cmd = {}; 1143f5b1cb2eSGil Adam 1144f21afabaSHarish Mitty cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1145d2bfda8aSMiri Korenblit 11467119f02bSMiri Korenblit ret = iwl_acpi_get_dsm_u32((&mvm->fwrt)->dev, 0, DSM_FUNC_11AX_ENABLEMENT, 11477119f02bSMiri Korenblit &iwl_guid, &value); 11487119f02bSMiri Korenblit if (!ret) 11497119f02bSMiri Korenblit cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1150f5b1cb2eSGil Adam /* apply more config masks here */ 1151f5b1cb2eSGil Adam 115254b4fda5SAbhishek Naik ret = iwl_acpi_get_dsm_u32((&mvm->fwrt)->dev, 0, 115354b4fda5SAbhishek Naik DSM_FUNC_ENABLE_UNII4_CHAN, 115454b4fda5SAbhishek Naik &iwl_guid, &value); 115554b4fda5SAbhishek Naik if (!ret) 115654b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 115754b4fda5SAbhishek Naik 115854b4fda5SAbhishek Naik if (cmd.config_bitmap || 115954b4fda5SAbhishek Naik cmd.oem_11ax_allow_bitmap || 116054b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap) { 11613c21990bSMiri Korenblit size_t cmd_size; 11623c21990bSMiri Korenblit u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 11633ce88247SMiri Korenblit REGULATORY_AND_NVM_GROUP, 11643c21990bSMiri Korenblit LARI_CONFIG_CHANGE, 1); 116554b4fda5SAbhishek Naik if (cmd_ver == 4) 116654b4fda5SAbhishek Naik cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 116754b4fda5SAbhishek Naik else if (cmd_ver == 3) 11683c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 11693c21990bSMiri Korenblit else if (cmd_ver == 2) 11703c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 11713c21990bSMiri Korenblit else 11723c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 11733c21990bSMiri Korenblit 11743ce88247SMiri Korenblit IWL_DEBUG_RADIO(mvm, 11757119f02bSMiri Korenblit "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 11767119f02bSMiri Korenblit le32_to_cpu(cmd.config_bitmap), 11777119f02bSMiri Korenblit le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 117854b4fda5SAbhishek Naik IWL_DEBUG_RADIO(mvm, 117954b4fda5SAbhishek Naik "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, cmd_ver=%d\n", 118054b4fda5SAbhishek Naik le32_to_cpu(cmd.oem_unii4_allow_bitmap), 118154b4fda5SAbhishek Naik cmd_ver); 11827119f02bSMiri Korenblit ret = iwl_mvm_send_cmd_pdu(mvm, 1183f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP, 1184f5b1cb2eSGil Adam LARI_CONFIG_CHANGE), 11853ce88247SMiri Korenblit 0, cmd_size, &cmd); 11867119f02bSMiri Korenblit if (ret < 0) 1187f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 1188f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n", 11897119f02bSMiri Korenblit ret); 1190f5b1cb2eSGil Adam } 1191f5b1cb2eSGil Adam } 119278a19d52SMiri Korenblit 119378a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 119478a19d52SMiri Korenblit { 119578a19d52SMiri Korenblit int ret; 119678a19d52SMiri Korenblit 119778a19d52SMiri Korenblit /* read PPAG table */ 119878a19d52SMiri Korenblit ret = iwl_mvm_get_ppag_table(mvm); 119978a19d52SMiri Korenblit if (ret < 0) { 120078a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 120178a19d52SMiri Korenblit "PPAG BIOS table invalid or unavailable. (%d)\n", 120278a19d52SMiri Korenblit ret); 120378a19d52SMiri Korenblit } 120478a19d52SMiri Korenblit 120578a19d52SMiri Korenblit /* read SAR tables */ 120678a19d52SMiri Korenblit ret = iwl_sar_get_wrds_table(&mvm->fwrt); 120778a19d52SMiri Korenblit if (ret < 0) { 120878a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 120978a19d52SMiri Korenblit "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 121078a19d52SMiri Korenblit ret); 121178a19d52SMiri Korenblit /* 121278a19d52SMiri Korenblit * If not available, don't fail and don't bother with EWRD and 121378a19d52SMiri Korenblit * WGDS */ 121478a19d52SMiri Korenblit 121578a19d52SMiri Korenblit if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 121678a19d52SMiri Korenblit /* 121778a19d52SMiri Korenblit * If basic SAR is not available, we check for WGDS, 121878a19d52SMiri Korenblit * which should *not* be available either. If it is 121978a19d52SMiri Korenblit * available, issue an error, because we can't use SAR 122078a19d52SMiri Korenblit * Geo without basic SAR. 122178a19d52SMiri Korenblit */ 122278a19d52SMiri Korenblit IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 122378a19d52SMiri Korenblit } 122478a19d52SMiri Korenblit 122578a19d52SMiri Korenblit } else { 122678a19d52SMiri Korenblit ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 122778a19d52SMiri Korenblit /* if EWRD is not available, we can still use 122878a19d52SMiri Korenblit * WRDS, so don't fail */ 122978a19d52SMiri Korenblit if (ret < 0) 123078a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 123178a19d52SMiri Korenblit "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 123278a19d52SMiri Korenblit ret); 123378a19d52SMiri Korenblit 123478a19d52SMiri Korenblit /* read geo SAR table */ 123578a19d52SMiri Korenblit if (iwl_sar_geo_support(&mvm->fwrt)) { 123678a19d52SMiri Korenblit ret = iwl_sar_get_wgds_table(&mvm->fwrt); 123778a19d52SMiri Korenblit if (ret < 0) 123878a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 123978a19d52SMiri Korenblit "Geo SAR BIOS table invalid or unavailable. (%d)\n", 124078a19d52SMiri Korenblit ret); 124178a19d52SMiri Korenblit /* we don't fail if the table is not available */ 124278a19d52SMiri Korenblit } 124378a19d52SMiri Korenblit } 124478a19d52SMiri Korenblit } 124569964905SLuca Coelho #else /* CONFIG_ACPI */ 124639c1a972SIhab Zhaika 124739c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 124839c1a972SIhab Zhaika int prof_a, int prof_b) 124969964905SLuca Coelho { 125078a19d52SMiri Korenblit return 1; 125169964905SLuca Coelho } 125269964905SLuca Coelho 125339c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 12545d041c46SLuca Coelho { 12555d041c46SLuca Coelho return -ENOENT; 12565d041c46SLuca Coelho } 12575d041c46SLuca Coelho 1258a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1259a6bff3cbSHaim Dreyfuss { 1260a6bff3cbSHaim Dreyfuss return 0; 1261a6bff3cbSHaim Dreyfuss } 126218f1755dSLuca Coelho 12636ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 12646ce1e5c0SGil Adam { 12656ce1e5c0SGil Adam return -ENOENT; 12666ce1e5c0SGil Adam } 12676ce1e5c0SGil Adam 12686ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 12696ce1e5c0SGil Adam { 12707937fd32SJohannes Berg return 0; 12716ce1e5c0SGil Adam } 127228dd7ccdSMordechay Goodstein 127328dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 127428dd7ccdSMordechay Goodstein { 127528dd7ccdSMordechay Goodstein } 1276f5b1cb2eSGil Adam 1277f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1278f5b1cb2eSGil Adam { 1279f5b1cb2eSGil Adam } 12804e8fe214SGregory Greenman 12814e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 12824e8fe214SGregory Greenman { 12834e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 12844e8fe214SGregory Greenman } 128578a19d52SMiri Korenblit 128678a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 128778a19d52SMiri Korenblit { 128878a19d52SMiri Korenblit } 128969964905SLuca Coelho #endif /* CONFIG_ACPI */ 129069964905SLuca Coelho 1291f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1292f130bb75SMordechay Goodstein { 1293f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1294f130bb75SMordechay Goodstein int ret; 1295f130bb75SMordechay Goodstein u32 resp; 1296f130bb75SMordechay Goodstein 1297f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1298f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1299f130bb75SMordechay Goodstein .buf_size = 0, 1300f130bb75SMordechay Goodstein }; 1301f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1302f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1303f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1304f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1305f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1306f130bb75SMordechay Goodstein }; 1307f130bb75SMordechay Goodstein 1308f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1309f130bb75SMordechay Goodstein if (!error_log_size) 1310f130bb75SMordechay Goodstein return; 1311f130bb75SMordechay Goodstein 1312f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1313f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1314f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1315f130bb75SMordechay Goodstein return; 1316f130bb75SMordechay Goodstein 1317f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1318f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1319f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1320f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1321f130bb75SMordechay Goodstein } 1322f130bb75SMordechay Goodstein 1323f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1324f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1325f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1326f130bb75SMordechay Goodstein 1327f130bb75SMordechay Goodstein if (ret) { 1328f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1329f130bb75SMordechay Goodstein return; 1330f130bb75SMordechay Goodstein } 1331f130bb75SMordechay Goodstein 1332f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1333f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1334f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1335f130bb75SMordechay Goodstein if (resp) 1336f130bb75SMordechay Goodstein IWL_ERR(mvm, 1337f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1338f130bb75SMordechay Goodstein resp); 1339f130bb75SMordechay Goodstein } 1340f130bb75SMordechay Goodstein } 1341f130bb75SMordechay Goodstein 134242ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 134342ce76d6SLuca Coelho { 13441edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1); 1345da2830acSLuca Coelho } 1346da2830acSLuca Coelho 13471f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 13481f370650SSara Sharon { 13491f370650SSara Sharon int ret; 13501f370650SSara Sharon 13517d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 135252b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 13531f370650SSara Sharon 13543b25f1afSEmmanuel Grumbach WARN_ON(!mvm->nvm_data); 13553b25f1afSEmmanuel Grumbach ret = iwl_run_init_mvm_ucode(mvm); 13561f370650SSara Sharon 13571f370650SSara Sharon if (ret) { 13581f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1359f4744258SLiad Kaufman 1360f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1361f4744258SLiad Kaufman return 0; 13621f370650SSara Sharon return ret; 13631f370650SSara Sharon } 13641f370650SSara Sharon 1365203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1366bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1367bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 13681f370650SSara Sharon if (ret) 13691f370650SSara Sharon return ret; 13701f370650SSara Sharon 137194022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 13721f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 13731f370650SSara Sharon if (ret) 13741f370650SSara Sharon return ret; 13751f370650SSara Sharon 137694022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 137794022562SEmmanuel Grumbach 1378b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1379b108d8c7SShahar S Matityahu NULL); 1380da2eb669SSara Sharon 1381702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 13821f370650SSara Sharon } 13831f370650SSara Sharon 1384e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1385e705c121SKalle Valo { 1386e705c121SKalle Valo int ret, i; 1387e705c121SKalle Valo struct ieee80211_channel *chan; 1388e705c121SKalle Valo struct cfg80211_chan_def chandef; 1389dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1390e705c121SKalle Valo 1391e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1392e705c121SKalle Valo 1393e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1394e705c121SKalle Valo if (ret) 1395e705c121SKalle Valo return ret; 1396e705c121SKalle Valo 13971f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1398e705c121SKalle Valo if (ret) { 1399e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 140072d3c7bbSJohannes Berg if (ret != -ERFKILL) 140172d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 140272d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1403e705c121SKalle Valo goto error; 1404e705c121SKalle Valo } 1405e705c121SKalle Valo 1406d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1407e705c121SKalle Valo 1408e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1409e705c121SKalle Valo if (ret) 1410e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1411e705c121SKalle Valo 1412a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 14137174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1414e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 141517b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 14167174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 14177174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 14187a14c23dSSara Sharon } 1419e705c121SKalle Valo 1420e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1421e705c121SKalle Valo if (ret) 1422e705c121SKalle Valo goto error; 1423e705c121SKalle Valo 14247d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1425e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1426e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1427e705c121SKalle Valo if (ret) 1428e705c121SKalle Valo goto error; 1429bb99ff9bSLuca Coelho } 1430e705c121SKalle Valo 1431e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1432e705c121SKalle Valo if (ret) 1433e705c121SKalle Valo goto error; 1434e705c121SKalle Valo 1435b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1436b3de3ef4SEmmanuel Grumbach if (ret) 1437b3de3ef4SEmmanuel Grumbach goto error; 1438b3de3ef4SEmmanuel Grumbach 1439cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa, 1440cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1441a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt); 1442cceb4507SShahar S Matityahu if (ret) 1443cceb4507SShahar S Matityahu goto error; 1444cceb4507SShahar S Matityahu } 1445cceb4507SShahar S Matityahu 144643413a97SSara Sharon /* Init RSS configuration */ 14479cd243f2SMordechay Goodstein ret = iwl_configure_rxq(&mvm->fwrt); 14489cd243f2SMordechay Goodstein if (ret) 14498edbfaa1SSara Sharon goto error; 14508edbfaa1SSara Sharon 14518edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 145243413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 145343413a97SSara Sharon if (ret) { 145443413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 145543413a97SSara Sharon ret); 145643413a97SSara Sharon goto error; 145743413a97SSara Sharon } 145843413a97SSara Sharon } 145943413a97SSara Sharon 1460e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1461be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1462e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1463e705c121SKalle Valo 14640ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1465e705c121SKalle Valo 1466e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1467e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1468e705c121SKalle Valo 146979660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 147097d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 147197d5be7eSLiad Kaufman if (ret) 147297d5be7eSLiad Kaufman goto error; 147379660869SIlia Lin } 147497d5be7eSLiad Kaufman 14752c2c3647SNathan Errera /* 14762c2c3647SNathan Errera * Add auxiliary station for scanning. 14772c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 14782c2c3647SNathan Errera * internal aux station for all aux activities that don't 14792c2c3647SNathan Errera * requires a dedicated data queue. 14802c2c3647SNathan Errera */ 14812c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 14822c2c3647SNathan Errera ADD_STA, 14832c2c3647SNathan Errera 0) < 12) { 14842c2c3647SNathan Errera /* 14852c2c3647SNathan Errera * In old version the aux station uses mac id like other 14862c2c3647SNathan Errera * station and not lmac id 14872c2c3647SNathan Errera */ 14882c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1489e705c121SKalle Valo if (ret) 1490e705c121SKalle Valo goto error; 14912c2c3647SNathan Errera } 1492e705c121SKalle Valo 1493e705c121SKalle Valo /* Add all the PHY contexts */ 1494dd36a507STova Mussai i = 0; 1495dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1496dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1497dd36a507STova Mussai 1498dd36a507STova Mussai if (WARN_ON_ONCE(!sband)) 1499dd36a507STova Mussai goto error; 1500dd36a507STova Mussai 1501dd36a507STova Mussai chan = &sband->channels[0]; 1502dd36a507STova Mussai 1503e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1504e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1505e705c121SKalle Valo /* 1506e705c121SKalle Valo * The channel used here isn't relevant as it's 1507e705c121SKalle Valo * going to be overwritten in the other flows. 1508e705c121SKalle Valo * For now use the first channel we have. 1509e705c121SKalle Valo */ 1510e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1511e705c121SKalle Valo &chandef, 1, 1); 1512e705c121SKalle Valo if (ret) 1513e705c121SKalle Valo goto error; 1514e705c121SKalle Valo } 1515e705c121SKalle Valo 1516c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1517c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1518c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1519c221daf2SChaya Rachel Ivgi * cmd during init time 1520c221daf2SChaya Rachel Ivgi */ 1521c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1522c221daf2SChaya Rachel Ivgi } else { 1523e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1524e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1525c221daf2SChaya Rachel Ivgi } 15265c89e7bcSChaya Rachel Ivgi 1527242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 15285c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1529944eafc2SChaya Rachel Ivgi 1530944eafc2SChaya Rachel Ivgi /* 1531944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1532944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1533944eafc2SChaya Rachel Ivgi */ 1534944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 15355c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 15365c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 153775cfe338SLuca Coelho if (ret) 153875cfe338SLuca Coelho goto error; 153975cfe338SLuca Coelho } 1540c221daf2SChaya Rachel Ivgi #endif 1541e705c121SKalle Valo 1542aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1543e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1544e705c121SKalle Valo 1545e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1546e705c121SKalle Valo if (ret) 1547e705c121SKalle Valo goto error; 1548e705c121SKalle Valo 1549f5b1cb2eSGil Adam iwl_mvm_lari_cfg(mvm); 1550e705c121SKalle Valo /* 1551e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1552e705c121SKalle Valo * anyway, so don't init MCC. 1553e705c121SKalle Valo */ 1554e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1555e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1556e705c121SKalle Valo if (ret) 1557e705c121SKalle Valo goto error; 1558e705c121SKalle Valo } 1559e705c121SKalle Valo 1560e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 15614ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1562b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1563e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1564e705c121SKalle Valo if (ret) 1565e705c121SKalle Valo goto error; 1566e705c121SKalle Valo } 1567e705c121SKalle Valo 1568f130bb75SMordechay Goodstein if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1569f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1570f130bb75SMordechay Goodstein 157148e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 157248e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 157348e775e6SHaim Dreyfuss 15746ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 15756ce1e5c0SGil Adam if (ret) 15766ce1e5c0SGil Adam goto error; 15776ce1e5c0SGil Adam 1578da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 157978a19d52SMiri Korenblit if (ret == 0) 1580a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 158178a19d52SMiri Korenblit else if (ret < 0) 1582a6bff3cbSHaim Dreyfuss goto error; 1583a6bff3cbSHaim Dreyfuss 158428dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm); 15857089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 15867089ae63SJohannes Berg 1587b68bd2e3SIlan Peer iwl_mvm_ftm_initiator_smooth_config(mvm); 1588b68bd2e3SIlan Peer 15894e8fe214SGregory Greenman if (fw_has_capa(&mvm->fw->ucode_capa, 15904e8fe214SGregory Greenman IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) { 15914e8fe214SGregory Greenman if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 15924e8fe214SGregory Greenman iwl_rfi_send_config_cmd(mvm, NULL); 15934e8fe214SGregory Greenman } 15944e8fe214SGregory Greenman 1595e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1596e705c121SKalle Valo return 0; 1597e705c121SKalle Valo error: 1598f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1599fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1600e705c121SKalle Valo return ret; 1601e705c121SKalle Valo } 1602e705c121SKalle Valo 1603e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1604e705c121SKalle Valo { 1605e705c121SKalle Valo int ret, i; 1606e705c121SKalle Valo 1607e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1608e705c121SKalle Valo 1609e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1610e705c121SKalle Valo if (ret) 1611e705c121SKalle Valo return ret; 1612e705c121SKalle Valo 1613e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1614e705c121SKalle Valo if (ret) { 1615e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1616e705c121SKalle Valo goto error; 1617e705c121SKalle Valo } 1618e705c121SKalle Valo 1619e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1620e705c121SKalle Valo if (ret) 1621e705c121SKalle Valo goto error; 1622e705c121SKalle Valo 1623e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1624e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1625e705c121SKalle Valo if (ret) 1626e705c121SKalle Valo goto error; 1627e705c121SKalle Valo 1628e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1629e705c121SKalle Valo if (ret) 1630e705c121SKalle Valo goto error; 1631e705c121SKalle Valo 1632e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1633be9ae34eSNathan Errera for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) 1634e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1635e705c121SKalle Valo 16362c2c3647SNathan Errera if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, 16372c2c3647SNathan Errera ADD_STA, 16382c2c3647SNathan Errera 0) < 12) { 16392c2c3647SNathan Errera /* 16402c2c3647SNathan Errera * Add auxiliary station for scanning. 16412c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 16422c2c3647SNathan Errera * internal aux station for all aux activities that don't 16432c2c3647SNathan Errera * requires a dedicated data queue. 16442c2c3647SNathan Errera * In old version the aux station uses mac id like other 16452c2c3647SNathan Errera * station and not lmac id 16462c2c3647SNathan Errera */ 16472c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1648e705c121SKalle Valo if (ret) 1649e705c121SKalle Valo goto error; 16502c2c3647SNathan Errera } 1651e705c121SKalle Valo 1652e705c121SKalle Valo return 0; 1653e705c121SKalle Valo error: 1654fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1655e705c121SKalle Valo return ret; 1656e705c121SKalle Valo } 1657e705c121SKalle Valo 1658e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1659e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1660e705c121SKalle Valo { 1661e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1662e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1663e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1664e705c121SKalle Valo 1665e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1666e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1667e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1668e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1669e705c121SKalle Valo "Reached" : "Not reached"); 1670e705c121SKalle Valo } 1671e705c121SKalle Valo 1672e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1673e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1674e705c121SKalle Valo { 1675e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1676e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1677e705c121SKalle Valo 1678e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1679e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1680e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1681e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1682e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1683e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 16840c8d0a47SGolan Ben-Ami 16850c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 16860c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 16870c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 16880c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1689e705c121SKalle Valo } 1690