18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
28e99ea8dSJohannes Berg /*
38e99ea8dSJohannes Berg  * Copyright (C) 2012-2014, 2018-2020 Intel Corporation
48e99ea8dSJohannes Berg  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
58e99ea8dSJohannes Berg  * Copyright (C) 2016-2017 Intel Deutschland GmbH
68e99ea8dSJohannes Berg  */
7e705c121SKalle Valo #include <net/mac80211.h>
8854d773eSSara Sharon #include <linux/netdevice.h>
9a2ac0f48SLuca Coelho #include <linux/dmi.h>
10e705c121SKalle Valo 
11e705c121SKalle Valo #include "iwl-trans.h"
12e705c121SKalle Valo #include "iwl-op-mode.h"
13d962f9b1SJohannes Berg #include "fw/img.h"
14e705c121SKalle Valo #include "iwl-debug.h"
15e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
16e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
17e705c121SKalle Valo #include "iwl-prph.h"
18813df5ceSLuca Coelho #include "fw/acpi.h"
19b3e4c0f3SLuca Coelho #include "fw/pnvm.h"
20e705c121SKalle Valo 
21e705c121SKalle Valo #include "mvm.h"
227174beb6SJohannes Berg #include "fw/dbg.h"
23e705c121SKalle Valo #include "iwl-phy-db.h"
249c4f7d51SShaul Triebitz #include "iwl-modparams.h"
259c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
26e705c121SKalle Valo 
27b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
28e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
29e705c121SKalle Valo 
30e705c121SKalle Valo #define UCODE_VALID_OK	cpu_to_le32(0x1)
31e705c121SKalle Valo 
32e705c121SKalle Valo struct iwl_mvm_alive_data {
33e705c121SKalle Valo 	bool valid;
34e705c121SKalle Valo 	u32 scd_base_addr;
35e705c121SKalle Valo };
36e705c121SKalle Valo 
37e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
38e705c121SKalle Valo {
39e705c121SKalle Valo 	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
40e705c121SKalle Valo 		.valid = cpu_to_le32(valid_tx_ant),
41e705c121SKalle Valo 	};
42e705c121SKalle Valo 
43e705c121SKalle Valo 	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
44e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
45e705c121SKalle Valo 				    sizeof(tx_ant_cmd), &tx_ant_cmd);
46e705c121SKalle Valo }
47e705c121SKalle Valo 
4843413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
4943413a97SSara Sharon {
5043413a97SSara Sharon 	int i;
5143413a97SSara Sharon 	struct iwl_rss_config_cmd cmd = {
5243413a97SSara Sharon 		.flags = cpu_to_le32(IWL_RSS_ENABLE),
53608dce95SSara Sharon 		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
54608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
55608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
56608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
57608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
58608dce95SSara Sharon 			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
5943413a97SSara Sharon 	};
6043413a97SSara Sharon 
61f43495fdSSara Sharon 	if (mvm->trans->num_rx_queues == 1)
62f43495fdSSara Sharon 		return 0;
63f43495fdSSara Sharon 
64854d773eSSara Sharon 	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
6543413a97SSara Sharon 	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
66854d773eSSara Sharon 		cmd.indirection_table[i] =
67854d773eSSara Sharon 			1 + (i % (mvm->trans->num_rx_queues - 1));
68854d773eSSara Sharon 	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
6943413a97SSara Sharon 
7043413a97SSara Sharon 	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
7143413a97SSara Sharon }
7243413a97SSara Sharon 
738edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm)
748edbfaa1SSara Sharon {
75dbf592f3SJohannes Berg 	int i, num_queues, size, ret;
768edbfaa1SSara Sharon 	struct iwl_rfh_queue_config *cmd;
77dbf592f3SJohannes Berg 	struct iwl_host_cmd hcmd = {
78dbf592f3SJohannes Berg 		.id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
79dbf592f3SJohannes Berg 		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
80dbf592f3SJohannes Berg 	};
818edbfaa1SSara Sharon 
8264f55156SLuca Coelho 	/*
8364f55156SLuca Coelho 	 * The default queue is configured via context info, so if we
8464f55156SLuca Coelho 	 * have a single queue, there's nothing to do here.
8564f55156SLuca Coelho 	 */
8664f55156SLuca Coelho 	if (mvm->trans->num_rx_queues == 1)
8764f55156SLuca Coelho 		return 0;
8864f55156SLuca Coelho 
8964f55156SLuca Coelho 	/* skip the default queue */
908edbfaa1SSara Sharon 	num_queues = mvm->trans->num_rx_queues - 1;
918edbfaa1SSara Sharon 
92dbf592f3SJohannes Berg 	size = struct_size(cmd, data, num_queues);
938edbfaa1SSara Sharon 
948edbfaa1SSara Sharon 	cmd = kzalloc(size, GFP_KERNEL);
958edbfaa1SSara Sharon 	if (!cmd)
968edbfaa1SSara Sharon 		return -ENOMEM;
978edbfaa1SSara Sharon 
988edbfaa1SSara Sharon 	cmd->num_queues = num_queues;
998edbfaa1SSara Sharon 
1008edbfaa1SSara Sharon 	for (i = 0; i < num_queues; i++) {
1018edbfaa1SSara Sharon 		struct iwl_trans_rxq_dma_data data;
1028edbfaa1SSara Sharon 
1038edbfaa1SSara Sharon 		cmd->data[i].q_num = i + 1;
1048edbfaa1SSara Sharon 		iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
1058edbfaa1SSara Sharon 
1068edbfaa1SSara Sharon 		cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
1078edbfaa1SSara Sharon 		cmd->data[i].urbd_stts_wrptr =
1088edbfaa1SSara Sharon 			cpu_to_le64(data.urbd_stts_wrptr);
1098edbfaa1SSara Sharon 		cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
1108edbfaa1SSara Sharon 		cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
1118edbfaa1SSara Sharon 	}
1128edbfaa1SSara Sharon 
113dbf592f3SJohannes Berg 	hcmd.data[0] = cmd;
114dbf592f3SJohannes Berg 	hcmd.len[0] = size;
115dbf592f3SJohannes Berg 
116dbf592f3SJohannes Berg 	ret = iwl_mvm_send_cmd(mvm, &hcmd);
117dbf592f3SJohannes Berg 
118dbf592f3SJohannes Berg 	kfree(cmd);
119dbf592f3SJohannes Berg 
120dbf592f3SJohannes Berg 	return ret;
1218edbfaa1SSara Sharon }
1228edbfaa1SSara Sharon 
12397d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
12497d5be7eSLiad Kaufman {
12597d5be7eSLiad Kaufman 	struct iwl_dqa_enable_cmd dqa_cmd = {
12697d5be7eSLiad Kaufman 		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
12797d5be7eSLiad Kaufman 	};
12897d5be7eSLiad Kaufman 	u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
12997d5be7eSLiad Kaufman 	int ret;
13097d5be7eSLiad Kaufman 
13197d5be7eSLiad Kaufman 	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
13297d5be7eSLiad Kaufman 	if (ret)
13397d5be7eSLiad Kaufman 		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
13497d5be7eSLiad Kaufman 	else
13597d5be7eSLiad Kaufman 		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
13697d5be7eSLiad Kaufman 
13797d5be7eSLiad Kaufman 	return ret;
13897d5be7eSLiad Kaufman }
13997d5be7eSLiad Kaufman 
140bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
141bdccdb85SGolan Ben-Ami 				   struct iwl_rx_cmd_buffer *rxb)
142bdccdb85SGolan Ben-Ami {
143bdccdb85SGolan Ben-Ami 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
144bdccdb85SGolan Ben-Ami 	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
145bdccdb85SGolan Ben-Ami 	__le32 *dump_data = mfu_dump_notif->data;
146bdccdb85SGolan Ben-Ami 	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
147bdccdb85SGolan Ben-Ami 	int i;
148bdccdb85SGolan Ben-Ami 
149bdccdb85SGolan Ben-Ami 	if (mfu_dump_notif->index_num == 0)
150bdccdb85SGolan Ben-Ami 		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
151bdccdb85SGolan Ben-Ami 			 le32_to_cpu(mfu_dump_notif->assert_id));
152bdccdb85SGolan Ben-Ami 
153bdccdb85SGolan Ben-Ami 	for (i = 0; i < n_words; i++)
154bdccdb85SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
155bdccdb85SGolan Ben-Ami 			       "MFUART assert dump, dword %u: 0x%08x\n",
156bdccdb85SGolan Ben-Ami 			       le16_to_cpu(mfu_dump_notif->index_num) *
157bdccdb85SGolan Ben-Ami 			       n_words + i,
158bdccdb85SGolan Ben-Ami 			       le32_to_cpu(dump_data[i]));
159bdccdb85SGolan Ben-Ami }
160bdccdb85SGolan Ben-Ami 
161e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
162e705c121SKalle Valo 			 struct iwl_rx_packet *pkt, void *data)
163e705c121SKalle Valo {
164fd1c3318SJohannes Berg 	unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
165e705c121SKalle Valo 	struct iwl_mvm *mvm =
166e705c121SKalle Valo 		container_of(notif_wait, struct iwl_mvm, notif_wait);
167e705c121SKalle Valo 	struct iwl_mvm_alive_data *alive_data = data;
1685c228d63SSara Sharon 	struct iwl_umac_alive *umac;
1695c228d63SSara Sharon 	struct iwl_lmac_alive *lmac1;
1705c228d63SSara Sharon 	struct iwl_lmac_alive *lmac2 = NULL;
1715c228d63SSara Sharon 	u16 status;
172cfa5d0caSMordechay Goodstein 	u32 lmac_error_event_table, umac_error_table;
173e705c121SKalle Valo 
17490824f2fSLuca Coelho 	/*
17590824f2fSLuca Coelho 	 * For v5 and above, we can check the version, for older
17690824f2fSLuca Coelho 	 * versions we need to check the size.
17790824f2fSLuca Coelho 	 */
178b4248c08SAndrei Otcheretianski 	if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
17990824f2fSLuca Coelho 				    UCODE_ALIVE_NTFY, 0) == 5) {
18090824f2fSLuca Coelho 		struct iwl_alive_ntf_v5 *palive;
18190824f2fSLuca Coelho 
182fd1c3318SJohannes Berg 		if (pkt_len < sizeof(*palive))
183fd1c3318SJohannes Berg 			return false;
184fd1c3318SJohannes Berg 
18590824f2fSLuca Coelho 		palive = (void *)pkt->data;
18690824f2fSLuca Coelho 		umac = &palive->umac_data;
18790824f2fSLuca Coelho 		lmac1 = &palive->lmac_data[0];
18890824f2fSLuca Coelho 		lmac2 = &palive->lmac_data[1];
18990824f2fSLuca Coelho 		status = le16_to_cpu(palive->status);
19090824f2fSLuca Coelho 
19190824f2fSLuca Coelho 		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
19290824f2fSLuca Coelho 		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
19390824f2fSLuca Coelho 		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
19490824f2fSLuca Coelho 
19590824f2fSLuca Coelho 		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
19690824f2fSLuca Coelho 			     mvm->trans->sku_id[0],
19790824f2fSLuca Coelho 			     mvm->trans->sku_id[1],
19890824f2fSLuca Coelho 			     mvm->trans->sku_id[2]);
19990824f2fSLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
2009422b978SLuca Coelho 		struct iwl_alive_ntf_v4 *palive;
2019422b978SLuca Coelho 
202fd1c3318SJohannes Berg 		if (pkt_len < sizeof(*palive))
203fd1c3318SJohannes Berg 			return false;
204fd1c3318SJohannes Berg 
205e705c121SKalle Valo 		palive = (void *)pkt->data;
2065c228d63SSara Sharon 		umac = &palive->umac_data;
2075c228d63SSara Sharon 		lmac1 = &palive->lmac_data[0];
2085c228d63SSara Sharon 		lmac2 = &palive->lmac_data[1];
2095c228d63SSara Sharon 		status = le16_to_cpu(palive->status);
2109422b978SLuca Coelho 	} else if (iwl_rx_packet_payload_len(pkt) ==
2119422b978SLuca Coelho 		   sizeof(struct iwl_alive_ntf_v3)) {
2129422b978SLuca Coelho 		struct iwl_alive_ntf_v3 *palive3;
2139422b978SLuca Coelho 
214fd1c3318SJohannes Berg 		if (pkt_len < sizeof(*palive3))
215fd1c3318SJohannes Berg 			return false;
216fd1c3318SJohannes Berg 
2175c228d63SSara Sharon 		palive3 = (void *)pkt->data;
2185c228d63SSara Sharon 		umac = &palive3->umac_data;
2195c228d63SSara Sharon 		lmac1 = &palive3->lmac_data;
2205c228d63SSara Sharon 		status = le16_to_cpu(palive3->status);
2219422b978SLuca Coelho 	} else {
2229422b978SLuca Coelho 		WARN(1, "unsupported alive notification (size %d)\n",
2239422b978SLuca Coelho 		     iwl_rx_packet_payload_len(pkt));
2249422b978SLuca Coelho 		/* get timeout later */
2259422b978SLuca Coelho 		return false;
2265c228d63SSara Sharon 	}
227e705c121SKalle Valo 
22822463857SShahar S Matityahu 	lmac_error_event_table =
22922463857SShahar S Matityahu 		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
23022463857SShahar S Matityahu 	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
231e705c121SKalle Valo 
23222463857SShahar S Matityahu 	if (lmac2)
23391c28b83SShahar S Matityahu 		mvm->trans->dbg.lmac_error_event_table[1] =
23422463857SShahar S Matityahu 			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
23522463857SShahar S Matityahu 
236cfa5d0caSMordechay Goodstein 	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
2375c228d63SSara Sharon 
238cfa5d0caSMordechay Goodstein 	if (umac_error_table) {
239cfa5d0caSMordechay Goodstein 		if (umac_error_table >=
2403485e76eSLuca Coelho 		    mvm->trans->cfg->min_umac_error_event_table) {
241cfa5d0caSMordechay Goodstein 			iwl_fw_umac_set_alive_err_table(mvm->trans,
242cfa5d0caSMordechay Goodstein 							umac_error_table);
2433485e76eSLuca Coelho 		} else {
244fb5b2846SLuca Coelho 			IWL_ERR(mvm,
245fb5b2846SLuca Coelho 				"Not valid error log pointer 0x%08X for %s uCode\n",
246cfa5d0caSMordechay Goodstein 				umac_error_table,
247fb5b2846SLuca Coelho 				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
248fb5b2846SLuca Coelho 				"Init" : "RT");
2493485e76eSLuca Coelho 		}
250cfa5d0caSMordechay Goodstein 	}
25122463857SShahar S Matityahu 
25222463857SShahar S Matityahu 	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2535c228d63SSara Sharon 	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
254e705c121SKalle Valo 
255e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
2565c228d63SSara Sharon 		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2575c228d63SSara Sharon 		     status, lmac1->ver_type, lmac1->ver_subtype);
2585c228d63SSara Sharon 
2595c228d63SSara Sharon 	if (lmac2)
2605c228d63SSara Sharon 		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
261e705c121SKalle Valo 
262e705c121SKalle Valo 	IWL_DEBUG_FW(mvm,
263e705c121SKalle Valo 		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2645c228d63SSara Sharon 		     le32_to_cpu(umac->umac_major),
2655c228d63SSara Sharon 		     le32_to_cpu(umac->umac_minor));
266e705c121SKalle Valo 
2670a3a3e9eSShahar S Matityahu 	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
2680a3a3e9eSShahar S Matityahu 
269e705c121SKalle Valo 	return true;
270e705c121SKalle Valo }
271e705c121SKalle Valo 
2721f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2731f370650SSara Sharon 				   struct iwl_rx_packet *pkt, void *data)
2741f370650SSara Sharon {
2751f370650SSara Sharon 	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2761f370650SSara Sharon 
2771f370650SSara Sharon 	return true;
2781f370650SSara Sharon }
2791f370650SSara Sharon 
280e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
281e705c121SKalle Valo 				  struct iwl_rx_packet *pkt, void *data)
282e705c121SKalle Valo {
283e705c121SKalle Valo 	struct iwl_phy_db *phy_db = data;
284e705c121SKalle Valo 
285e705c121SKalle Valo 	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
286e705c121SKalle Valo 		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
287e705c121SKalle Valo 		return true;
288e705c121SKalle Valo 	}
289e705c121SKalle Valo 
290ce1f2778SSara Sharon 	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
291e705c121SKalle Valo 
292e705c121SKalle Valo 	return false;
293e705c121SKalle Valo }
294e705c121SKalle Valo 
295e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
296e705c121SKalle Valo 					 enum iwl_ucode_type ucode_type)
297e705c121SKalle Valo {
298e705c121SKalle Valo 	struct iwl_notification_wait alive_wait;
29994a8d87cSLuca Coelho 	struct iwl_mvm_alive_data alive_data = {};
300e705c121SKalle Valo 	const struct fw_img *fw;
301cfbc6c4cSSara Sharon 	int ret;
302702e975dSJohannes Berg 	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
3039422b978SLuca Coelho 	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
304b3500b47SEmmanuel Grumbach 	bool run_in_rfkill =
305b3500b47SEmmanuel Grumbach 		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
306e705c121SKalle Valo 
307e705c121SKalle Valo 	if (ucode_type == IWL_UCODE_REGULAR &&
3083d2d4422SGolan Ben-Ami 	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3093d2d4422SGolan Ben-Ami 	    !(fw_has_capa(&mvm->fw->ucode_capa,
3103d2d4422SGolan Ben-Ami 			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
311612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
312e705c121SKalle Valo 	else
313612da1efSSharon Dvir 		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
314e705c121SKalle Valo 	if (WARN_ON(!fw))
315e705c121SKalle Valo 		return -EINVAL;
316702e975dSJohannes Berg 	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
31765b280feSJohannes Berg 	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
318e705c121SKalle Valo 
319e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
320e705c121SKalle Valo 				   alive_cmd, ARRAY_SIZE(alive_cmd),
321e705c121SKalle Valo 				   iwl_alive_fn, &alive_data);
322e705c121SKalle Valo 
323b3500b47SEmmanuel Grumbach 	/*
324b3500b47SEmmanuel Grumbach 	 * We want to load the INIT firmware even in RFKILL
325b3500b47SEmmanuel Grumbach 	 * For the unified firmware case, the ucode_type is not
326b3500b47SEmmanuel Grumbach 	 * INIT, but we still need to run it.
327b3500b47SEmmanuel Grumbach 	 */
328b3500b47SEmmanuel Grumbach 	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
329e705c121SKalle Valo 	if (ret) {
330702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
331e705c121SKalle Valo 		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
332e705c121SKalle Valo 		return ret;
333e705c121SKalle Valo 	}
334e705c121SKalle Valo 
335e705c121SKalle Valo 	/*
336e705c121SKalle Valo 	 * Some things may run in the background now, but we
337e705c121SKalle Valo 	 * just wait for the ALIVE notification here.
338e705c121SKalle Valo 	 */
339e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
340e705c121SKalle Valo 				    MVM_UCODE_ALIVE_TIMEOUT);
341e705c121SKalle Valo 	if (ret) {
342d6be9c1dSSara Sharon 		struct iwl_trans *trans = mvm->trans;
343d6be9c1dSSara Sharon 
34420f5aef5SJohannes Berg 		if (trans->trans_cfg->device_family >=
34520f5aef5SJohannes Berg 					IWL_DEVICE_FAMILY_22000) {
346e705c121SKalle Valo 			IWL_ERR(mvm,
347e705c121SKalle Valo 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
348ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
349ea695b7cSShaul Triebitz 				iwl_read_umac_prph(trans,
350ea695b7cSShaul Triebitz 						   UMAG_SB_CPU_2_STATUS));
35120f5aef5SJohannes Berg 			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
35220f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
35320f5aef5SJohannes Berg 						   UREG_UMAC_CURRENT_PC));
35420f5aef5SJohannes Berg 			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
35520f5aef5SJohannes Berg 				iwl_read_umac_prph(trans,
35620f5aef5SJohannes Berg 						   UREG_LMAC1_CURRENT_PC));
35720f5aef5SJohannes Berg 			if (iwl_mvm_is_cdb_supported(mvm))
35820f5aef5SJohannes Berg 				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
35920f5aef5SJohannes Berg 					iwl_read_umac_prph(trans,
36020f5aef5SJohannes Berg 						UREG_LMAC2_CURRENT_PC));
36120f5aef5SJohannes Berg 		} else if (trans->trans_cfg->device_family >=
36220f5aef5SJohannes Berg 			   IWL_DEVICE_FAMILY_8000) {
363d6be9c1dSSara Sharon 			IWL_ERR(mvm,
364d6be9c1dSSara Sharon 				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
365d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_1_STATUS),
366d6be9c1dSSara Sharon 				iwl_read_prph(trans, SB_CPU_2_STATUS));
36720f5aef5SJohannes Berg 		}
36820f5aef5SJohannes Berg 
36920f5aef5SJohannes Berg 		if (ret == -ETIMEDOUT)
37020f5aef5SJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
37120f5aef5SJohannes Berg 						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
37220f5aef5SJohannes Berg 
373702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
374e705c121SKalle Valo 		return ret;
375e705c121SKalle Valo 	}
376e705c121SKalle Valo 
377e705c121SKalle Valo 	if (!alive_data.valid) {
378e705c121SKalle Valo 		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
379702e975dSJohannes Berg 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
380e705c121SKalle Valo 		return -EIO;
381e705c121SKalle Valo 	}
382e705c121SKalle Valo 
383b3e4c0f3SLuca Coelho 	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
38470d3ca86SLuca Coelho 	if (ret) {
38570d3ca86SLuca Coelho 		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
38670d3ca86SLuca Coelho 		iwl_fw_set_current_image(&mvm->fwrt, old_type);
38770d3ca86SLuca Coelho 		return ret;
38870d3ca86SLuca Coelho 	}
38970d3ca86SLuca Coelho 
390e705c121SKalle Valo 	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
391e705c121SKalle Valo 
392e705c121SKalle Valo 	/*
393e705c121SKalle Valo 	 * Note: all the queues are enabled as part of the interface
394e705c121SKalle Valo 	 * initialization, but in firmware restart scenarios they
395e705c121SKalle Valo 	 * could be stopped, so wake them up. In firmware restart,
396e705c121SKalle Valo 	 * mac80211 will have the queues stopped as well until the
397e705c121SKalle Valo 	 * reconfiguration completes. During normal startup, they
398e705c121SKalle Valo 	 * will be empty.
399e705c121SKalle Valo 	 */
400e705c121SKalle Valo 
401e705c121SKalle Valo 	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
4021c14089eSJohannes Berg 	/*
4031c14089eSJohannes Berg 	 * Set a 'fake' TID for the command queue, since we use the
4041c14089eSJohannes Berg 	 * hweight() of the tid_bitmap as a refcount now. Not that
4051c14089eSJohannes Berg 	 * we ever even consider the command queue as one we might
4061c14089eSJohannes Berg 	 * want to reuse, but be safe nevertheless.
4071c14089eSJohannes Berg 	 */
4081c14089eSJohannes Berg 	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
4091c14089eSJohannes Berg 		BIT(IWL_MAX_TID_COUNT + 2);
410e705c121SKalle Valo 
41165b280feSJohannes Berg 	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
412f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
413f7805b33SLior Cohen 	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
414f7805b33SLior Cohen #endif
415e705c121SKalle Valo 
416d3d9b4fcSEmmanuel Grumbach 	/*
417d3d9b4fcSEmmanuel Grumbach 	 * All the BSSes in the BSS table include the GP2 in the system
418d3d9b4fcSEmmanuel Grumbach 	 * at the beacon Rx time, this is of course no longer relevant
419d3d9b4fcSEmmanuel Grumbach 	 * since we are resetting the firmware.
420d3d9b4fcSEmmanuel Grumbach 	 * Purge all the BSS table.
421d3d9b4fcSEmmanuel Grumbach 	 */
422d3d9b4fcSEmmanuel Grumbach 	cfg80211_bss_flush(mvm->hw->wiphy);
423d3d9b4fcSEmmanuel Grumbach 
424e705c121SKalle Valo 	return 0;
425e705c121SKalle Valo }
426e705c121SKalle Valo 
42752b15521SEmmanuel Grumbach static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
4288c5f47b1SJohannes Berg {
4298c5f47b1SJohannes Berg 	struct iwl_notification_wait init_wait;
4308c5f47b1SJohannes Berg 	struct iwl_nvm_access_complete_cmd nvm_complete = {};
4318c5f47b1SJohannes Berg 	struct iwl_init_extended_cfg_cmd init_cfg = {
4328c5f47b1SJohannes Berg 		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
4338c5f47b1SJohannes Berg 	};
4348c5f47b1SJohannes Berg 	static const u16 init_complete[] = {
4358c5f47b1SJohannes Berg 		INIT_COMPLETE_NOTIF,
4368c5f47b1SJohannes Berg 	};
4378c5f47b1SJohannes Berg 	int ret;
4388c5f47b1SJohannes Berg 
439a4584729SHaim Dreyfuss 	if (mvm->trans->cfg->tx_with_siso_diversity)
440a4584729SHaim Dreyfuss 		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
441a4584729SHaim Dreyfuss 
4428c5f47b1SJohannes Berg 	lockdep_assert_held(&mvm->mutex);
4438c5f47b1SJohannes Berg 
44494022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
44594022562SEmmanuel Grumbach 
4468c5f47b1SJohannes Berg 	iwl_init_notification_wait(&mvm->notif_wait,
4478c5f47b1SJohannes Berg 				   &init_wait,
4488c5f47b1SJohannes Berg 				   init_complete,
4498c5f47b1SJohannes Berg 				   ARRAY_SIZE(init_complete),
4508c5f47b1SJohannes Berg 				   iwl_wait_init_complete,
4518c5f47b1SJohannes Berg 				   NULL);
4528c5f47b1SJohannes Berg 
453b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
45486ce5c74SShahar S Matityahu 
4558c5f47b1SJohannes Berg 	/* Will also start the device */
4568c5f47b1SJohannes Berg 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
4578c5f47b1SJohannes Berg 	if (ret) {
4588c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
4598c5f47b1SJohannes Berg 		goto error;
4608c5f47b1SJohannes Berg 	}
461b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
462b108d8c7SShahar S Matityahu 			       NULL);
4638c5f47b1SJohannes Berg 
4648c5f47b1SJohannes Berg 	/* Send init config command to mark that we are sending NVM access
4658c5f47b1SJohannes Berg 	 * commands
4668c5f47b1SJohannes Berg 	 */
4678c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
468b3500b47SEmmanuel Grumbach 						INIT_EXTENDED_CFG_CMD),
469b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4708c5f47b1SJohannes Berg 				   sizeof(init_cfg), &init_cfg);
4718c5f47b1SJohannes Berg 	if (ret) {
4728c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run init config command: %d\n",
4738c5f47b1SJohannes Berg 			ret);
4748c5f47b1SJohannes Berg 		goto error;
4758c5f47b1SJohannes Berg 	}
4768c5f47b1SJohannes Berg 
477e9e1ba3dSSara Sharon 	/* Load NVM to NIC if needed */
478e9e1ba3dSSara Sharon 	if (mvm->nvm_file_name) {
4799c4f7d51SShaul Triebitz 		iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
4809c4f7d51SShaul Triebitz 				      mvm->nvm_sections);
4818c5f47b1SJohannes Berg 		iwl_mvm_load_nvm_to_nic(mvm);
482e9e1ba3dSSara Sharon 	}
4838c5f47b1SJohannes Berg 
48452b15521SEmmanuel Grumbach 	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
4855bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
486d4f3695eSSara Sharon 		if (ret) {
487d4f3695eSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
488d4f3695eSSara Sharon 			goto error;
489d4f3695eSSara Sharon 		}
490d4f3695eSSara Sharon 	}
491d4f3695eSSara Sharon 
4928c5f47b1SJohannes Berg 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
493b3500b47SEmmanuel Grumbach 						NVM_ACCESS_COMPLETE),
494b3500b47SEmmanuel Grumbach 				   CMD_SEND_IN_RFKILL,
4958c5f47b1SJohannes Berg 				   sizeof(nvm_complete), &nvm_complete);
4968c5f47b1SJohannes Berg 	if (ret) {
4978c5f47b1SJohannes Berg 		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
4988c5f47b1SJohannes Berg 			ret);
4998c5f47b1SJohannes Berg 		goto error;
5008c5f47b1SJohannes Berg 	}
5018c5f47b1SJohannes Berg 
5028c5f47b1SJohannes Berg 	/* We wait for the INIT complete notification */
503e9e1ba3dSSara Sharon 	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
5048c5f47b1SJohannes Berg 				    MVM_UCODE_ALIVE_TIMEOUT);
505e9e1ba3dSSara Sharon 	if (ret)
506e9e1ba3dSSara Sharon 		return ret;
507e9e1ba3dSSara Sharon 
508e9e1ba3dSSara Sharon 	/* Read the NVM only at driver load time, no need to do this twice */
50952b15521SEmmanuel Grumbach 	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
5104c625c56SShaul Triebitz 		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
511c135cb56SShaul Triebitz 		if (IS_ERR(mvm->nvm_data)) {
512c135cb56SShaul Triebitz 			ret = PTR_ERR(mvm->nvm_data);
513c135cb56SShaul Triebitz 			mvm->nvm_data = NULL;
514e9e1ba3dSSara Sharon 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
515e9e1ba3dSSara Sharon 			return ret;
516e9e1ba3dSSara Sharon 		}
517e9e1ba3dSSara Sharon 	}
518e9e1ba3dSSara Sharon 
519b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
520b3500b47SEmmanuel Grumbach 
521e9e1ba3dSSara Sharon 	return 0;
5228c5f47b1SJohannes Berg 
5238c5f47b1SJohannes Berg error:
5248c5f47b1SJohannes Berg 	iwl_remove_notification(&mvm->notif_wait, &init_wait);
5258c5f47b1SJohannes Berg 	return ret;
5268c5f47b1SJohannes Berg }
5278c5f47b1SJohannes Berg 
528c4ace426SGil Adam #ifdef CONFIG_ACPI
529c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
530c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
531c4ace426SGil Adam {
532c4ace426SGil Adam 	/*
533c4ace426SGil Adam 	 * TODO: read specific phy config from BIOS
534c4ace426SGil Adam 	 * ACPI table for this feature has not been defined yet,
535c4ace426SGil Adam 	 * so for now we use hardcoded values.
536c4ace426SGil Adam 	 */
537c4ace426SGil Adam 
538c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_A) {
539c4ace426SGil Adam 		phy_filters->filter_cfg_chain_a =
540c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
541c4ace426SGil Adam 	}
542c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_B) {
543c4ace426SGil Adam 		phy_filters->filter_cfg_chain_b =
544c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
545c4ace426SGil Adam 	}
546c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_C) {
547c4ace426SGil Adam 		phy_filters->filter_cfg_chain_c =
548c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
549c4ace426SGil Adam 	}
550c4ace426SGil Adam 	if (IWL_MVM_PHY_FILTER_CHAIN_D) {
551c4ace426SGil Adam 		phy_filters->filter_cfg_chain_d =
552c4ace426SGil Adam 			cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
553c4ace426SGil Adam 	}
554c4ace426SGil Adam }
555c4ace426SGil Adam 
556c4ace426SGil Adam #else /* CONFIG_ACPI */
557c4ace426SGil Adam 
558c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
559c4ace426SGil Adam 				    struct iwl_phy_specific_cfg *phy_filters)
560c4ace426SGil Adam {
561c4ace426SGil Adam }
562c4ace426SGil Adam #endif /* CONFIG_ACPI */
563c4ace426SGil Adam 
564e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
565e705c121SKalle Valo {
566c4ace426SGil Adam 	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
567702e975dSJohannes Berg 	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
568c4ace426SGil Adam 	struct iwl_phy_specific_cfg phy_filters = {};
569c4ace426SGil Adam 	u8 cmd_ver;
570c4ace426SGil Adam 	size_t cmd_size;
571e705c121SKalle Valo 
572bb99ff9bSLuca Coelho 	if (iwl_mvm_has_unified_ucode(mvm) &&
573d923b020SLuca Coelho 	    !mvm->trans->cfg->tx_with_siso_diversity)
574bb99ff9bSLuca Coelho 		return 0;
575d923b020SLuca Coelho 
576d923b020SLuca Coelho 	if (mvm->trans->cfg->tx_with_siso_diversity) {
577bb99ff9bSLuca Coelho 		/*
578bb99ff9bSLuca Coelho 		 * TODO: currently we don't set the antenna but letting the NIC
579bb99ff9bSLuca Coelho 		 * to decide which antenna to use. This should come from BIOS.
580bb99ff9bSLuca Coelho 		 */
581bb99ff9bSLuca Coelho 		phy_cfg_cmd.phy_cfg =
582bb99ff9bSLuca Coelho 			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
583bb99ff9bSLuca Coelho 	}
584bb99ff9bSLuca Coelho 
585e705c121SKalle Valo 	/* Set parameters */
586e705c121SKalle Valo 	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
58786a2b204SLuca Coelho 
58886a2b204SLuca Coelho 	/* set flags extra PHY configuration flags from the device's cfg */
5897897dfa2SLuca Coelho 	phy_cfg_cmd.phy_cfg |=
5907897dfa2SLuca Coelho 		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
59186a2b204SLuca Coelho 
592e705c121SKalle Valo 	phy_cfg_cmd.calib_control.event_trigger =
593e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].event_trigger;
594e705c121SKalle Valo 	phy_cfg_cmd.calib_control.flow_trigger =
595e705c121SKalle Valo 		mvm->fw->default_calib[ucode_type].flow_trigger;
596e705c121SKalle Valo 
597c4ace426SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
598e80bfd11SMordechay Goodstein 					PHY_CONFIGURATION_CMD,
599e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
600c4ace426SGil Adam 	if (cmd_ver == 3) {
601c4ace426SGil Adam 		iwl_mvm_phy_filter_init(mvm, &phy_filters);
602c4ace426SGil Adam 		memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
603c4ace426SGil Adam 		       sizeof(struct iwl_phy_specific_cfg));
604c4ace426SGil Adam 	}
605c4ace426SGil Adam 
606e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
607e705c121SKalle Valo 		       phy_cfg_cmd.phy_cfg);
608c4ace426SGil Adam 	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
609c4ace426SGil Adam 				    sizeof(struct iwl_phy_cfg_cmd_v1);
610e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
611c4ace426SGil Adam 				    cmd_size, &phy_cfg_cmd);
612e705c121SKalle Valo }
613e705c121SKalle Valo 
6143b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
615e705c121SKalle Valo {
616e705c121SKalle Valo 	struct iwl_notification_wait calib_wait;
617e705c121SKalle Valo 	static const u16 init_complete[] = {
618e705c121SKalle Valo 		INIT_COMPLETE_NOTIF,
619e705c121SKalle Valo 		CALIB_RES_NOTIF_PHY_DB
620e705c121SKalle Valo 	};
621e705c121SKalle Valo 	int ret;
622e705c121SKalle Valo 
6237d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
62452b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
6258c5f47b1SJohannes Berg 
626e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
627e705c121SKalle Valo 
62894022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
629e705c121SKalle Valo 
630e705c121SKalle Valo 	iwl_init_notification_wait(&mvm->notif_wait,
631e705c121SKalle Valo 				   &calib_wait,
632e705c121SKalle Valo 				   init_complete,
633e705c121SKalle Valo 				   ARRAY_SIZE(init_complete),
634e705c121SKalle Valo 				   iwl_wait_phy_db_entry,
635e705c121SKalle Valo 				   mvm->phy_db);
636e705c121SKalle Valo 
63711f8c533SLuca Coelho 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
63811f8c533SLuca Coelho 
639e705c121SKalle Valo 	/* Will also start the device */
640e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
641e705c121SKalle Valo 	if (ret) {
642e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
64300e0c6c8SLuca Coelho 		goto remove_notif;
644e705c121SKalle Valo 	}
645e705c121SKalle Valo 
6467d34a7d7SLuca Coelho 	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
647b3de3ef4SEmmanuel Grumbach 		ret = iwl_mvm_send_bt_init_conf(mvm);
648e705c121SKalle Valo 		if (ret)
64900e0c6c8SLuca Coelho 			goto remove_notif;
650b3de3ef4SEmmanuel Grumbach 	}
651e705c121SKalle Valo 
652e705c121SKalle Valo 	/* Read the NVM only at driver load time, no need to do this twice */
6533b25f1afSEmmanuel Grumbach 	if (!mvm->nvm_data) {
6545bd1d2c1SLuca Coelho 		ret = iwl_nvm_init(mvm);
655e705c121SKalle Valo 		if (ret) {
656e705c121SKalle Valo 			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
65700e0c6c8SLuca Coelho 			goto remove_notif;
658e705c121SKalle Valo 		}
659e705c121SKalle Valo 	}
660e705c121SKalle Valo 
661e705c121SKalle Valo 	/* In case we read the NVM from external file, load it to the NIC */
662e705c121SKalle Valo 	if (mvm->nvm_file_name)
663e705c121SKalle Valo 		iwl_mvm_load_nvm_to_nic(mvm);
664e705c121SKalle Valo 
66564866e5dSLuca Coelho 	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
66664866e5dSLuca Coelho 		  "Too old NVM version (0x%0x, required = 0x%0x)",
66764866e5dSLuca Coelho 		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
668e705c121SKalle Valo 
669e705c121SKalle Valo 	/*
670e705c121SKalle Valo 	 * abort after reading the nvm in case RF Kill is on, we will complete
671e705c121SKalle Valo 	 * the init seq later when RF kill will switch to off
672e705c121SKalle Valo 	 */
673e705c121SKalle Valo 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
674e705c121SKalle Valo 		IWL_DEBUG_RF_KILL(mvm,
675e705c121SKalle Valo 				  "jump over all phy activities due to RF kill\n");
67600e0c6c8SLuca Coelho 		goto remove_notif;
677e705c121SKalle Valo 	}
678e705c121SKalle Valo 
679b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
680e705c121SKalle Valo 
681e705c121SKalle Valo 	/* Send TX valid antennas before triggering calibrations */
682e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
683e705c121SKalle Valo 	if (ret)
68400e0c6c8SLuca Coelho 		goto remove_notif;
685e705c121SKalle Valo 
686e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
687e705c121SKalle Valo 	if (ret) {
688e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
689e705c121SKalle Valo 			ret);
69000e0c6c8SLuca Coelho 		goto remove_notif;
691e705c121SKalle Valo 	}
692e705c121SKalle Valo 
693e705c121SKalle Valo 	/*
694e705c121SKalle Valo 	 * Some things may run in the background now, but we
695e705c121SKalle Valo 	 * just wait for the calibration complete notification.
696e705c121SKalle Valo 	 */
697e705c121SKalle Valo 	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
698e705c121SKalle Valo 				    MVM_UCODE_CALIB_TIMEOUT);
69900e0c6c8SLuca Coelho 	if (!ret)
700e705c121SKalle Valo 		goto out;
701e705c121SKalle Valo 
70200e0c6c8SLuca Coelho 	if (iwl_mvm_is_radio_hw_killed(mvm)) {
70300e0c6c8SLuca Coelho 		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
70400e0c6c8SLuca Coelho 		ret = 0;
70500e0c6c8SLuca Coelho 	} else {
70600e0c6c8SLuca Coelho 		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
70700e0c6c8SLuca Coelho 			ret);
70800e0c6c8SLuca Coelho 	}
70900e0c6c8SLuca Coelho 
71000e0c6c8SLuca Coelho 	goto out;
71100e0c6c8SLuca Coelho 
71200e0c6c8SLuca Coelho remove_notif:
713e705c121SKalle Valo 	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
714e705c121SKalle Valo out:
715b3500b47SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
716e705c121SKalle Valo 	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
717e705c121SKalle Valo 		/* we want to debug INIT and we have no NVM - fake */
718e705c121SKalle Valo 		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
719e705c121SKalle Valo 					sizeof(struct ieee80211_channel) +
720e705c121SKalle Valo 					sizeof(struct ieee80211_rate),
721e705c121SKalle Valo 					GFP_KERNEL);
722e705c121SKalle Valo 		if (!mvm->nvm_data)
723e705c121SKalle Valo 			return -ENOMEM;
724e705c121SKalle Valo 		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
725e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_channels = 1;
726e705c121SKalle Valo 		mvm->nvm_data->bands[0].n_bitrates = 1;
727e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates =
728e705c121SKalle Valo 			(void *)mvm->nvm_data->channels + 1;
729e705c121SKalle Valo 		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
730e705c121SKalle Valo 	}
731e705c121SKalle Valo 
732e705c121SKalle Valo 	return ret;
733e705c121SKalle Valo }
734e705c121SKalle Valo 
735e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
736e705c121SKalle Valo {
737e705c121SKalle Valo 	struct iwl_ltr_config_cmd cmd = {
738e705c121SKalle Valo 		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
739e705c121SKalle Valo 	};
740e705c121SKalle Valo 
741e705c121SKalle Valo 	if (!mvm->trans->ltr_enabled)
742e705c121SKalle Valo 		return 0;
743e705c121SKalle Valo 
744e705c121SKalle Valo 	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
745e705c121SKalle Valo 				    sizeof(cmd), &cmd);
746e705c121SKalle Valo }
747e705c121SKalle Valo 
748c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
74942ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
750da2830acSLuca Coelho {
751216cdfb5SLuca Coelho 	struct iwl_dev_tx_power_cmd cmd = {
752216cdfb5SLuca Coelho 		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
75371e9378bSLuca Coelho 	};
7549c08cef8SLuca Coelho 	__le16 *per_chain;
7551edd56e6SLuca Coelho 	int ret;
75639c1a972SIhab Zhaika 	u16 len = 0;
757fbb7957dSLuca Coelho 	u32 n_subbands;
758fbb7957dSLuca Coelho 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
759e80bfd11SMordechay Goodstein 					   REDUCE_TX_POWER_CMD,
760e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
76142ce76d6SLuca Coelho 
762fbb7957dSLuca Coelho 	if (cmd_ver == 6) {
763fbb7957dSLuca Coelho 		len = sizeof(cmd.v6);
764fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS_V2;
765fbb7957dSLuca Coelho 		per_chain = cmd.v6.per_chain[0][0];
766fbb7957dSLuca Coelho 	} else if (fw_has_api(&mvm->fw->ucode_capa,
7679c08cef8SLuca Coelho 			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
7680791c2fcSHaim Dreyfuss 		len = sizeof(cmd.v5);
769fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7709c08cef8SLuca Coelho 		per_chain = cmd.v5.per_chain[0][0];
7719c08cef8SLuca Coelho 	} else if (fw_has_capa(&mvm->fw->ucode_capa,
7729c08cef8SLuca Coelho 			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
773216cdfb5SLuca Coelho 		len = sizeof(cmd.v4);
774fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7759c08cef8SLuca Coelho 		per_chain = cmd.v4.per_chain[0][0];
7769c08cef8SLuca Coelho 	} else {
777216cdfb5SLuca Coelho 		len = sizeof(cmd.v3);
778fbb7957dSLuca Coelho 		n_subbands = IWL_NUM_SUB_BANDS;
7799c08cef8SLuca Coelho 		per_chain = cmd.v3.per_chain[0][0];
7809c08cef8SLuca Coelho 	}
78155bfa4b9SLuca Coelho 
782216cdfb5SLuca Coelho 	/* all structs have the same common part, add it */
783216cdfb5SLuca Coelho 	len += sizeof(cmd.common);
78442ce76d6SLuca Coelho 
7859c08cef8SLuca Coelho 	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, ACPI_SAR_NUM_TABLES,
786fbb7957dSLuca Coelho 				     n_subbands, prof_a, prof_b);
7871edd56e6SLuca Coelho 
7881edd56e6SLuca Coelho 	/* return on error or if the profile is disabled (positive number) */
7891edd56e6SLuca Coelho 	if (ret)
7901edd56e6SLuca Coelho 		return ret;
7911edd56e6SLuca Coelho 
79242ce76d6SLuca Coelho 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
79342ce76d6SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
79442ce76d6SLuca Coelho }
79542ce76d6SLuca Coelho 
7967fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
7977fe90e0eSHaim Dreyfuss {
798dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
799f604324eSLuca Coelho 	struct iwl_geo_tx_power_profiles_resp *resp;
8000c3d7282SHaim Dreyfuss 	u16 len;
80139c1a972SIhab Zhaika 	int ret;
8020c3d7282SHaim Dreyfuss 	struct iwl_host_cmd cmd;
803e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
804e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
805e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
8067fe90e0eSHaim Dreyfuss 
807dd2a1256SLuca Coelho 	/* the ops field is at the same spot for all versions, so set in v1 */
808dd2a1256SLuca Coelho 	geo_tx_cmd.v1.ops =
809dd2a1256SLuca Coelho 		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
810dd2a1256SLuca Coelho 
8110ea788edSLuca Coelho 	if (cmd_ver == 3)
8120ea788edSLuca Coelho 		len = sizeof(geo_tx_cmd.v3);
8130ea788edSLuca Coelho 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
814dd2a1256SLuca Coelho 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
815dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v2);
816dd2a1256SLuca Coelho 	else
817dd2a1256SLuca Coelho 		len = sizeof(geo_tx_cmd.v1);
8180c3d7282SHaim Dreyfuss 
81939c1a972SIhab Zhaika 	if (!iwl_sar_geo_support(&mvm->fwrt))
82039c1a972SIhab Zhaika 		return -EOPNOTSUPP;
82139c1a972SIhab Zhaika 
8220c3d7282SHaim Dreyfuss 	cmd = (struct iwl_host_cmd){
8237fe90e0eSHaim Dreyfuss 		.id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
8240c3d7282SHaim Dreyfuss 		.len = { len, },
8257fe90e0eSHaim Dreyfuss 		.flags = CMD_WANT_SKB,
82639c1a972SIhab Zhaika 		.data = { &geo_tx_cmd },
8277fe90e0eSHaim Dreyfuss 	};
8287fe90e0eSHaim Dreyfuss 
8297fe90e0eSHaim Dreyfuss 	ret = iwl_mvm_send_cmd(mvm, &cmd);
8307fe90e0eSHaim Dreyfuss 	if (ret) {
8317fe90e0eSHaim Dreyfuss 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
8327fe90e0eSHaim Dreyfuss 		return ret;
8337fe90e0eSHaim Dreyfuss 	}
834f604324eSLuca Coelho 
835f604324eSLuca Coelho 	resp = (void *)cmd.resp_pkt->data;
836f604324eSLuca Coelho 	ret = le32_to_cpu(resp->profile_idx);
837f604324eSLuca Coelho 
838f604324eSLuca Coelho 	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES))
839f604324eSLuca Coelho 		ret = -EIO;
840f604324eSLuca Coelho 
8417fe90e0eSHaim Dreyfuss 	iwl_free_resp(&cmd);
8427fe90e0eSHaim Dreyfuss 	return ret;
8437fe90e0eSHaim Dreyfuss }
8447fe90e0eSHaim Dreyfuss 
845a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
846a6bff3cbSHaim Dreyfuss {
847dd2a1256SLuca Coelho 	union iwl_geo_tx_power_profiles_cmd cmd;
84839c1a972SIhab Zhaika 	u16 len;
84945acebf8SNaftali Goldstein 	u32 n_bands;
8500433ae55SGolan Ben Ami 	int ret;
851e80bfd11SMordechay Goodstein 	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
852e80bfd11SMordechay Goodstein 					   GEO_TX_POWER_LIMIT,
853e80bfd11SMordechay Goodstein 					   IWL_FW_CMD_VER_UNKNOWN);
854a6bff3cbSHaim Dreyfuss 
85545acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
85645acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
85745acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
85845acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops));
85945acebf8SNaftali Goldstein 	/* the ops field is at the same spot for all versions, so set in v1 */
86045acebf8SNaftali Goldstein 	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
86145acebf8SNaftali Goldstein 
86245acebf8SNaftali Goldstein 	if (cmd_ver == 3) {
86345acebf8SNaftali Goldstein 		len = sizeof(cmd.v3);
86445acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
86545acebf8SNaftali Goldstein 	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
86645acebf8SNaftali Goldstein 			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
86745acebf8SNaftali Goldstein 		len = sizeof(cmd.v2);
86845acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
86945acebf8SNaftali Goldstein 	} else {
87045acebf8SNaftali Goldstein 		len = sizeof(cmd.v1);
87145acebf8SNaftali Goldstein 		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
87245acebf8SNaftali Goldstein 	}
87345acebf8SNaftali Goldstein 
87445acebf8SNaftali Goldstein 	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
87545acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
87645acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
87745acebf8SNaftali Goldstein 		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table));
87845acebf8SNaftali Goldstein 	/* the table is at the same position for all versions, so set use v1 */
87945acebf8SNaftali Goldstein 	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], n_bands);
880eca1e56cSEmmanuel Grumbach 
8810433ae55SGolan Ben Ami 	/*
8820433ae55SGolan Ben Ami 	 * It is a valid scenario to not support SAR, or miss wgds table,
8830433ae55SGolan Ben Ami 	 * but in that case there is no need to send the command.
8840433ae55SGolan Ben Ami 	 */
8850433ae55SGolan Ben Ami 	if (ret)
8860433ae55SGolan Ben Ami 		return 0;
887a6bff3cbSHaim Dreyfuss 
88828db1862SLuca Coelho 	/*
88928db1862SLuca Coelho 	 * Set the revision on versions that contain it.
89028db1862SLuca Coelho 	 * This must be done after calling iwl_sar_geo_init().
89128db1862SLuca Coelho 	 */
89228db1862SLuca Coelho 	if (cmd_ver == 3)
89328db1862SLuca Coelho 		cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
89428db1862SLuca Coelho 	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
89528db1862SLuca Coelho 			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
89628db1862SLuca Coelho 		cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
89728db1862SLuca Coelho 
898dd2a1256SLuca Coelho 	return iwl_mvm_send_cmd_pdu(mvm,
899dd2a1256SLuca Coelho 				    WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
900dd2a1256SLuca Coelho 				    0, len, &cmd);
901a6bff3cbSHaim Dreyfuss }
902a6bff3cbSHaim Dreyfuss 
9036ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
9046ce1e5c0SGil Adam {
9056ce1e5c0SGil Adam 	union acpi_object *wifi_pkg, *data, *enabled;
906f2134f66SGil Adam 	int i, j, ret, tbl_rev, num_sub_bands;
9076ce1e5c0SGil Adam 	int idx = 2;
908f2134f66SGil Adam 	s8 *gain;
9096ce1e5c0SGil Adam 
910f2134f66SGil Adam 	/*
911f2134f66SGil Adam 	 * The 'enabled' field is the same in v1 and v2 so we can just
912f2134f66SGil Adam 	 * use v1 to access it.
913f2134f66SGil Adam 	 */
914f2134f66SGil Adam 	mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0);
9156ce1e5c0SGil Adam 	data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
9166ce1e5c0SGil Adam 	if (IS_ERR(data))
9176ce1e5c0SGil Adam 		return PTR_ERR(data);
9186ce1e5c0SGil Adam 
919f2134f66SGil Adam 	/* try to read ppag table revision 1 */
9206ce1e5c0SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
921f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
922f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
923f2134f66SGil Adam 		if (tbl_rev != 1) {
924f2134f66SGil Adam 			ret = -EINVAL;
9256ce1e5c0SGil Adam 			goto out_free;
9266ce1e5c0SGil Adam 		}
927f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
928f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
929f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 2;
930f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v2 (tbl_rev=1)\n");
931f2134f66SGil Adam 		goto read_table;
932f2134f66SGil Adam 	}
9336ce1e5c0SGil Adam 
934f2134f66SGil Adam 	/* try to read ppag table revision 0 */
935f2134f66SGil Adam 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
936f2134f66SGil Adam 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
937f2134f66SGil Adam 	if (!IS_ERR(wifi_pkg)) {
9383ed83da3SLuca Coelho 		if (tbl_rev != 0) {
9393ed83da3SLuca Coelho 			ret = -EINVAL;
9403ed83da3SLuca Coelho 			goto out_free;
9413ed83da3SLuca Coelho 		}
942f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
943f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
944f2134f66SGil Adam 		mvm->fwrt.ppag_ver = 1;
945f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
946f2134f66SGil Adam 		goto read_table;
947f2134f66SGil Adam 	}
948f2134f66SGil Adam 	ret = PTR_ERR(wifi_pkg);
949f2134f66SGil Adam 	goto out_free;
9503ed83da3SLuca Coelho 
951f2134f66SGil Adam read_table:
9526ce1e5c0SGil Adam 	enabled = &wifi_pkg->package.elements[1];
9536ce1e5c0SGil Adam 	if (enabled->type != ACPI_TYPE_INTEGER ||
9546ce1e5c0SGil Adam 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {
9556ce1e5c0SGil Adam 		ret = -EINVAL;
9566ce1e5c0SGil Adam 		goto out_free;
9576ce1e5c0SGil Adam 	}
9586ce1e5c0SGil Adam 
959551d793fSLuca Coelho 	mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value);
960551d793fSLuca Coelho 	if (!mvm->fwrt.ppag_table.v1.enabled) {
9616ce1e5c0SGil Adam 		ret = 0;
9626ce1e5c0SGil Adam 		goto out_free;
9636ce1e5c0SGil Adam 	}
9646ce1e5c0SGil Adam 
9656ce1e5c0SGil Adam 	/*
9666ce1e5c0SGil Adam 	 * read, verify gain values and save them into the PPAG table.
9676ce1e5c0SGil Adam 	 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
9686ce1e5c0SGil Adam 	 * following sub-bands to High-Band (5GHz).
9696ce1e5c0SGil Adam 	 */
970f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
971f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
9726ce1e5c0SGil Adam 			union acpi_object *ent;
9736ce1e5c0SGil Adam 
9746ce1e5c0SGil Adam 			ent = &wifi_pkg->package.elements[idx++];
9755a684245SLuca Coelho 			if (ent->type != ACPI_TYPE_INTEGER) {
9765a684245SLuca Coelho 				ret = -EINVAL;
9775a684245SLuca Coelho 				goto out_free;
9785a684245SLuca Coelho 			}
9795a684245SLuca Coelho 
9805a684245SLuca Coelho 			gain[i * num_sub_bands + j] = ent->integer.value;
9815a684245SLuca Coelho 
9825a684245SLuca Coelho 			if ((j == 0 &&
9835a684245SLuca Coelho 			     (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB ||
9845a684245SLuca Coelho 			      gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) ||
9855a684245SLuca Coelho 			    (j != 0 &&
9865a684245SLuca Coelho 			     (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB ||
9875a684245SLuca Coelho 			      gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) {
988551d793fSLuca Coelho 				mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0);
9896ce1e5c0SGil Adam 				ret = -EINVAL;
9906ce1e5c0SGil Adam 				goto out_free;
9916ce1e5c0SGil Adam 			}
9926ce1e5c0SGil Adam 		}
9936ce1e5c0SGil Adam 	}
9946ce1e5c0SGil Adam 	ret = 0;
9956ce1e5c0SGil Adam out_free:
9966ce1e5c0SGil Adam 	kfree(data);
9976ce1e5c0SGil Adam 	return ret;
9986ce1e5c0SGil Adam }
9996ce1e5c0SGil Adam 
10006ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
10016ce1e5c0SGil Adam {
1002f2134f66SGil Adam 	u8 cmd_ver;
1003f2134f66SGil Adam 	int i, j, ret, num_sub_bands, cmd_size;
1004f2134f66SGil Adam 	s8 *gain;
10056ce1e5c0SGil Adam 
10066ce1e5c0SGil Adam 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
10076ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10086ce1e5c0SGil Adam 				"PPAG capability not supported by FW, command not sent.\n");
10096ce1e5c0SGil Adam 		return 0;
10106ce1e5c0SGil Adam 	}
1011f2134f66SGil Adam 	if (!mvm->fwrt.ppag_table.v1.enabled) {
1012f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
1013160bab43SGil Adam 		return 0;
1014160bab43SGil Adam 	}
1015160bab43SGil Adam 
1016f2134f66SGil Adam 	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
1017e80bfd11SMordechay Goodstein 					PER_PLATFORM_ANT_GAIN_CMD,
1018e80bfd11SMordechay Goodstein 					IWL_FW_CMD_VER_UNKNOWN);
1019f2134f66SGil Adam 	if (cmd_ver == 1) {
1020f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS;
1021f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v1.gain[0];
1022659844d3SLuca Coelho 		cmd_size = sizeof(mvm->fwrt.ppag_table.v1);
1023f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 2) {
1024f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
1025f2134f66SGil Adam 					"PPAG table is v2 but FW supports v1, sending truncated table\n");
1026f2134f66SGil Adam 		}
1027f2134f66SGil Adam 	} else if (cmd_ver == 2) {
1028f2134f66SGil Adam 		num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1029f2134f66SGil Adam 		gain = mvm->fwrt.ppag_table.v2.gain[0];
1030659844d3SLuca Coelho 		cmd_size = sizeof(mvm->fwrt.ppag_table.v2);
1031f2134f66SGil Adam 		if (mvm->fwrt.ppag_ver == 1) {
1032f2134f66SGil Adam 			IWL_DEBUG_RADIO(mvm,
1033f2134f66SGil Adam 					"PPAG table is v1 but FW supports v2, sending padded table\n");
1034f2134f66SGil Adam 		}
1035f2134f66SGil Adam 	} else {
1036f2134f66SGil Adam 		IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1037f2134f66SGil Adam 		return 0;
1038f2134f66SGil Adam 	}
10396ce1e5c0SGil Adam 
1040f2134f66SGil Adam 	for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1041f2134f66SGil Adam 		for (j = 0; j < num_sub_bands; j++) {
10426ce1e5c0SGil Adam 			IWL_DEBUG_RADIO(mvm,
10436ce1e5c0SGil Adam 					"PPAG table: chain[%d] band[%d]: gain = %d\n",
1044f2134f66SGil Adam 					i, j, gain[i * num_sub_bands + j]);
10456ce1e5c0SGil Adam 		}
10466ce1e5c0SGil Adam 	}
1047f2134f66SGil Adam 	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
10486ce1e5c0SGil Adam 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
10496ce1e5c0SGil Adam 						PER_PLATFORM_ANT_GAIN_CMD),
1050659844d3SLuca Coelho 				   0, cmd_size, &mvm->fwrt.ppag_table);
10516ce1e5c0SGil Adam 	if (ret < 0)
10526ce1e5c0SGil Adam 		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
10536ce1e5c0SGil Adam 			ret);
10546ce1e5c0SGil Adam 
10556ce1e5c0SGil Adam 	return ret;
10566ce1e5c0SGil Adam }
10576ce1e5c0SGil Adam 
1058a2ac0f48SLuca Coelho static const struct dmi_system_id dmi_ppag_approved_list[] = {
1059ca176eddSLuca Coelho 	{ .ident = "HP",
1060ca176eddSLuca Coelho 	  .matches = {
1061ca176eddSLuca Coelho 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1062ca176eddSLuca Coelho 		},
1063ca176eddSLuca Coelho 	},
1064dd158ed6SLuca Coelho 	{ .ident = "SAMSUNG",
1065dd158ed6SLuca Coelho 	  .matches = {
1066dd158ed6SLuca Coelho 			DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1067dd158ed6SLuca Coelho 		},
1068dd158ed6SLuca Coelho 	},
10694a76553cSLuca Coelho 	{ .ident = "MSFT",
10704a76553cSLuca Coelho 	  .matches = {
10714a76553cSLuca Coelho 			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
10724a76553cSLuca Coelho 		},
10734a76553cSLuca Coelho 	},
1074a7abc1eaSLuca Coelho 	{ .ident = "ASUS",
1075a7abc1eaSLuca Coelho 	  .matches = {
1076a7abc1eaSLuca Coelho 			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
1077a7abc1eaSLuca Coelho 		},
1078a7abc1eaSLuca Coelho 	},
1079a2ac0f48SLuca Coelho };
1080a2ac0f48SLuca Coelho 
10816ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
10826ce1e5c0SGil Adam {
10836ce1e5c0SGil Adam 	int ret;
10846ce1e5c0SGil Adam 
10856ce1e5c0SGil Adam 	ret = iwl_mvm_get_ppag_table(mvm);
10866ce1e5c0SGil Adam 	if (ret < 0) {
10876ce1e5c0SGil Adam 		IWL_DEBUG_RADIO(mvm,
10886ce1e5c0SGil Adam 				"PPAG BIOS table invalid or unavailable. (%d)\n",
10896ce1e5c0SGil Adam 				ret);
10906ce1e5c0SGil Adam 		return 0;
10916ce1e5c0SGil Adam 	}
1092a2ac0f48SLuca Coelho 
1093a2ac0f48SLuca Coelho 	if (!dmi_check_system(dmi_ppag_approved_list)) {
1094a2ac0f48SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
1095a2ac0f48SLuca Coelho 				"System vendor '%s' is not in the approved list, disabling PPAG.\n",
1096a2ac0f48SLuca Coelho 				dmi_get_system_info(DMI_SYS_VENDOR));
1097a2ac0f48SLuca Coelho 		mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0);
1098a2ac0f48SLuca Coelho 		return 0;
1099a2ac0f48SLuca Coelho 	}
1100a2ac0f48SLuca Coelho 
11016ce1e5c0SGil Adam 	return iwl_mvm_ppag_send_cmd(mvm);
11026ce1e5c0SGil Adam }
11036ce1e5c0SGil Adam 
110428dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
110528dd7ccdSMordechay Goodstein {
110628dd7ccdSMordechay Goodstein 	int ret;
110728dd7ccdSMordechay Goodstein 	struct iwl_tas_config_cmd cmd = {};
110828dd7ccdSMordechay Goodstein 	int list_size;
110928dd7ccdSMordechay Goodstein 
1110cdaba917SEmmanuel Grumbach 	BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) <
111128dd7ccdSMordechay Goodstein 		     APCI_WTAS_BLACK_LIST_MAX);
111228dd7ccdSMordechay Goodstein 
111328dd7ccdSMordechay Goodstein 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
111428dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
111528dd7ccdSMordechay Goodstein 		return;
111628dd7ccdSMordechay Goodstein 	}
111728dd7ccdSMordechay Goodstein 
1118cdaba917SEmmanuel Grumbach 	ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size);
111928dd7ccdSMordechay Goodstein 	if (ret < 0) {
112028dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm,
112128dd7ccdSMordechay Goodstein 				"TAS table invalid or unavailable. (%d)\n",
112228dd7ccdSMordechay Goodstein 				ret);
112328dd7ccdSMordechay Goodstein 		return;
112428dd7ccdSMordechay Goodstein 	}
112528dd7ccdSMordechay Goodstein 
112628dd7ccdSMordechay Goodstein 	if (list_size < 0)
112728dd7ccdSMordechay Goodstein 		return;
112828dd7ccdSMordechay Goodstein 
112928dd7ccdSMordechay Goodstein 	/* list size if TAS enabled can only be non-negative */
1130cdaba917SEmmanuel Grumbach 	cmd.block_list_size = cpu_to_le32((u32)list_size);
113128dd7ccdSMordechay Goodstein 
113228dd7ccdSMordechay Goodstein 	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
113328dd7ccdSMordechay Goodstein 						TAS_CONFIG),
113428dd7ccdSMordechay Goodstein 				   0, sizeof(cmd), &cmd);
113528dd7ccdSMordechay Goodstein 	if (ret < 0)
113628dd7ccdSMordechay Goodstein 		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
113728dd7ccdSMordechay Goodstein }
1138f5b1cb2eSGil Adam 
113902d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_indonesia_5g2(struct iwl_mvm *mvm)
1140f5b1cb2eSGil Adam {
1141aefbe5c4SMatt Chen 	u8 value;
1142aefbe5c4SMatt Chen 
1143f5b1cb2eSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
1144aefbe5c4SMatt Chen 				      DSM_FUNC_ENABLE_INDONESIA_5G2, &value);
1145f5b1cb2eSGil Adam 
114602d31e9bSGil Adam 	if (ret < 0)
1147f5b1cb2eSGil Adam 		IWL_DEBUG_RADIO(mvm,
114802d31e9bSGil Adam 				"Failed to evaluate DSM function ENABLE_INDONESIA_5G2, ret=%d\n",
1149f5b1cb2eSGil Adam 				ret);
1150f5b1cb2eSGil Adam 
1151aefbe5c4SMatt Chen 	else if (value >= DSM_VALUE_INDONESIA_MAX)
115202d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
1153aefbe5c4SMatt Chen 				"DSM function ENABLE_INDONESIA_5G2 return invalid value, value=%d\n",
1154aefbe5c4SMatt Chen 				value);
115502d31e9bSGil Adam 
1156aefbe5c4SMatt Chen 	else if (value == DSM_VALUE_INDONESIA_ENABLE) {
115702d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
115802d31e9bSGil Adam 				"Evaluated DSM function ENABLE_INDONESIA_5G2: Enabling 5g2\n");
115902d31e9bSGil Adam 		return DSM_VALUE_INDONESIA_ENABLE;
116002d31e9bSGil Adam 	}
116102d31e9bSGil Adam 	/* default behaviour is disabled */
116202d31e9bSGil Adam 	return DSM_VALUE_INDONESIA_DISABLE;
116302d31e9bSGil Adam }
116402d31e9bSGil Adam 
116502d31e9bSGil Adam static u8 iwl_mvm_eval_dsm_disable_srd(struct iwl_mvm *mvm)
116602d31e9bSGil Adam {
1167aefbe5c4SMatt Chen 	u8 value;
116802d31e9bSGil Adam 	int ret = iwl_acpi_get_dsm_u8((&mvm->fwrt)->dev, 0,
1169aefbe5c4SMatt Chen 				      DSM_FUNC_DISABLE_SRD, &value);
117002d31e9bSGil Adam 
117102d31e9bSGil Adam 	if (ret < 0)
117202d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
117302d31e9bSGil Adam 				"Failed to evaluate DSM function DISABLE_SRD, ret=%d\n",
117402d31e9bSGil Adam 				ret);
117502d31e9bSGil Adam 
1176aefbe5c4SMatt Chen 	else if (value >= DSM_VALUE_SRD_MAX)
117702d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
1178aefbe5c4SMatt Chen 				"DSM function DISABLE_SRD return invalid value, value=%d\n",
1179aefbe5c4SMatt Chen 				value);
118002d31e9bSGil Adam 
1181aefbe5c4SMatt Chen 	else if (value == DSM_VALUE_SRD_PASSIVE) {
118202d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
118302d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: setting SRD to passive\n");
118402d31e9bSGil Adam 		return DSM_VALUE_SRD_PASSIVE;
118502d31e9bSGil Adam 
1186aefbe5c4SMatt Chen 	} else if (value == DSM_VALUE_SRD_DISABLE) {
118702d31e9bSGil Adam 		IWL_DEBUG_RADIO(mvm,
118802d31e9bSGil Adam 				"Evaluated DSM function DISABLE_SRD: disabling SRD\n");
118902d31e9bSGil Adam 		return DSM_VALUE_SRD_DISABLE;
119002d31e9bSGil Adam 	}
119102d31e9bSGil Adam 	/* default behaviour is active */
119202d31e9bSGil Adam 	return DSM_VALUE_SRD_ACTIVE;
1193f5b1cb2eSGil Adam }
1194f5b1cb2eSGil Adam 
1195f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1196f5b1cb2eSGil Adam {
119702d31e9bSGil Adam 	u8 ret;
119802d31e9bSGil Adam 	int cmd_ret;
1199*3ce88247SMiri Korenblit 	struct iwl_lari_config_change_cmd_v2 cmd = {};
1200f5b1cb2eSGil Adam 
120102d31e9bSGil Adam 	if (iwl_mvm_eval_dsm_indonesia_5g2(mvm) == DSM_VALUE_INDONESIA_ENABLE)
1202f5b1cb2eSGil Adam 		cmd.config_bitmap |=
1203f5b1cb2eSGil Adam 			cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1204f5b1cb2eSGil Adam 
120502d31e9bSGil Adam 	ret = iwl_mvm_eval_dsm_disable_srd(mvm);
120602d31e9bSGil Adam 	if (ret == DSM_VALUE_SRD_PASSIVE)
120702d31e9bSGil Adam 		cmd.config_bitmap |=
120802d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
120902d31e9bSGil Adam 
121002d31e9bSGil Adam 	else if (ret == DSM_VALUE_SRD_DISABLE)
121102d31e9bSGil Adam 		cmd.config_bitmap |=
121202d31e9bSGil Adam 			cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
121302d31e9bSGil Adam 
1214f5b1cb2eSGil Adam 	/* apply more config masks here */
1215f5b1cb2eSGil Adam 
1216f5b1cb2eSGil Adam 	if (cmd.config_bitmap) {
1217*3ce88247SMiri Korenblit 		size_t cmd_size = iwl_fw_lookup_cmd_ver(mvm->fw,
1218*3ce88247SMiri Korenblit 							REGULATORY_AND_NVM_GROUP,
1219*3ce88247SMiri Korenblit 							LARI_CONFIG_CHANGE, 1) == 2 ?
1220*3ce88247SMiri Korenblit 			sizeof(struct iwl_lari_config_change_cmd_v2) :
1221*3ce88247SMiri Korenblit 			sizeof(struct iwl_lari_config_change_cmd_v1);
1222*3ce88247SMiri Korenblit 		IWL_DEBUG_RADIO(mvm,
1223*3ce88247SMiri Korenblit 				"sending LARI_CONFIG_CHANGE, config_bitmap=0x%x\n",
1224*3ce88247SMiri Korenblit 				le32_to_cpu(cmd.config_bitmap));
122502d31e9bSGil Adam 		cmd_ret = iwl_mvm_send_cmd_pdu(mvm,
1226f5b1cb2eSGil Adam 					       WIDE_ID(REGULATORY_AND_NVM_GROUP,
1227f5b1cb2eSGil Adam 						       LARI_CONFIG_CHANGE),
1228*3ce88247SMiri Korenblit 					       0, cmd_size, &cmd);
122902d31e9bSGil Adam 		if (cmd_ret < 0)
1230f5b1cb2eSGil Adam 			IWL_DEBUG_RADIO(mvm,
1231f5b1cb2eSGil Adam 					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
123202d31e9bSGil Adam 					cmd_ret);
1233f5b1cb2eSGil Adam 	}
1234f5b1cb2eSGil Adam }
123569964905SLuca Coelho #else /* CONFIG_ACPI */
123639c1a972SIhab Zhaika 
123739c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
123839c1a972SIhab Zhaika 				      int prof_a, int prof_b)
123969964905SLuca Coelho {
124069964905SLuca Coelho 	return -ENOENT;
124169964905SLuca Coelho }
124269964905SLuca Coelho 
124339c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
12445d041c46SLuca Coelho {
12455d041c46SLuca Coelho 	return -ENOENT;
12465d041c46SLuca Coelho }
12475d041c46SLuca Coelho 
1248a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1249a6bff3cbSHaim Dreyfuss {
1250a6bff3cbSHaim Dreyfuss 	return 0;
1251a6bff3cbSHaim Dreyfuss }
125218f1755dSLuca Coelho 
12536ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
12546ce1e5c0SGil Adam {
12556ce1e5c0SGil Adam 	return -ENOENT;
12566ce1e5c0SGil Adam }
12576ce1e5c0SGil Adam 
12586ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
12596ce1e5c0SGil Adam {
12607937fd32SJohannes Berg 	return 0;
12616ce1e5c0SGil Adam }
126228dd7ccdSMordechay Goodstein 
126328dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
126428dd7ccdSMordechay Goodstein {
126528dd7ccdSMordechay Goodstein }
1266f5b1cb2eSGil Adam 
1267f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1268f5b1cb2eSGil Adam {
1269f5b1cb2eSGil Adam }
127069964905SLuca Coelho #endif /* CONFIG_ACPI */
127169964905SLuca Coelho 
1272f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1273f130bb75SMordechay Goodstein {
1274f130bb75SMordechay Goodstein 	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1275f130bb75SMordechay Goodstein 	int ret;
1276f130bb75SMordechay Goodstein 	u32 resp;
1277f130bb75SMordechay Goodstein 
1278f130bb75SMordechay Goodstein 	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1279f130bb75SMordechay Goodstein 		.flags = cpu_to_le32(flags),
1280f130bb75SMordechay Goodstein 		.buf_size = 0,
1281f130bb75SMordechay Goodstein 	};
1282f130bb75SMordechay Goodstein 	struct iwl_host_cmd host_cmd = {
1283f130bb75SMordechay Goodstein 		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1284f130bb75SMordechay Goodstein 		.flags = CMD_WANT_SKB,
1285f130bb75SMordechay Goodstein 		.data = {&recovery_cmd, },
1286f130bb75SMordechay Goodstein 		.len = {sizeof(recovery_cmd), },
1287f130bb75SMordechay Goodstein 	};
1288f130bb75SMordechay Goodstein 
1289f130bb75SMordechay Goodstein 	/* no error log was defined in TLV */
1290f130bb75SMordechay Goodstein 	if (!error_log_size)
1291f130bb75SMordechay Goodstein 		return;
1292f130bb75SMordechay Goodstein 
1293f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1294f130bb75SMordechay Goodstein 		/* no buf was allocated while HW reset */
1295f130bb75SMordechay Goodstein 		if (!mvm->error_recovery_buf)
1296f130bb75SMordechay Goodstein 			return;
1297f130bb75SMordechay Goodstein 
1298f130bb75SMordechay Goodstein 		host_cmd.data[1] = mvm->error_recovery_buf;
1299f130bb75SMordechay Goodstein 		host_cmd.len[1] =  error_log_size;
1300f130bb75SMordechay Goodstein 		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1301f130bb75SMordechay Goodstein 		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1302f130bb75SMordechay Goodstein 	}
1303f130bb75SMordechay Goodstein 
1304f130bb75SMordechay Goodstein 	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1305f130bb75SMordechay Goodstein 	kfree(mvm->error_recovery_buf);
1306f130bb75SMordechay Goodstein 	mvm->error_recovery_buf = NULL;
1307f130bb75SMordechay Goodstein 
1308f130bb75SMordechay Goodstein 	if (ret) {
1309f130bb75SMordechay Goodstein 		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1310f130bb75SMordechay Goodstein 		return;
1311f130bb75SMordechay Goodstein 	}
1312f130bb75SMordechay Goodstein 
1313f130bb75SMordechay Goodstein 	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1314f130bb75SMordechay Goodstein 	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1315f130bb75SMordechay Goodstein 		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1316f130bb75SMordechay Goodstein 		if (resp)
1317f130bb75SMordechay Goodstein 			IWL_ERR(mvm,
1318f130bb75SMordechay Goodstein 				"Failed to send recovery cmd blob was invalid %d\n",
1319f130bb75SMordechay Goodstein 				resp);
1320f130bb75SMordechay Goodstein 	}
1321f130bb75SMordechay Goodstein }
1322f130bb75SMordechay Goodstein 
132342ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
132442ce76d6SLuca Coelho {
132542ce76d6SLuca Coelho 	int ret;
132642ce76d6SLuca Coelho 
132739c1a972SIhab Zhaika 	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1328da2830acSLuca Coelho 	if (ret < 0) {
1329da2830acSLuca Coelho 		IWL_DEBUG_RADIO(mvm,
133069964905SLuca Coelho 				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1331da2830acSLuca Coelho 				ret);
13325d041c46SLuca Coelho 		/*
13335d041c46SLuca Coelho 		 * If not available, don't fail and don't bother with EWRD.
13345d041c46SLuca Coelho 		 * Return 1 to tell that we can't use WGDS either.
13355d041c46SLuca Coelho 		 */
13365d041c46SLuca Coelho 		return 1;
1337da2830acSLuca Coelho 	}
1338da2830acSLuca Coelho 
133939c1a972SIhab Zhaika 	ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
134069964905SLuca Coelho 	/* if EWRD is not available, we can still use WRDS, so don't fail */
134169964905SLuca Coelho 	if (ret < 0)
134269964905SLuca Coelho 		IWL_DEBUG_RADIO(mvm,
134369964905SLuca Coelho 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
134469964905SLuca Coelho 				ret);
134569964905SLuca Coelho 
13461edd56e6SLuca Coelho 	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1347da2830acSLuca Coelho }
1348da2830acSLuca Coelho 
13491f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
13501f370650SSara Sharon {
13511f370650SSara Sharon 	int ret;
13521f370650SSara Sharon 
13537d6222e2SJohannes Berg 	if (iwl_mvm_has_unified_ucode(mvm))
135452b15521SEmmanuel Grumbach 		return iwl_run_unified_mvm_ucode(mvm);
13551f370650SSara Sharon 
13563b25f1afSEmmanuel Grumbach 	WARN_ON(!mvm->nvm_data);
13573b25f1afSEmmanuel Grumbach 	ret = iwl_run_init_mvm_ucode(mvm);
13581f370650SSara Sharon 
13591f370650SSara Sharon 	if (ret) {
13601f370650SSara Sharon 		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1361f4744258SLiad Kaufman 
1362f4744258SLiad Kaufman 		if (iwlmvm_mod_params.init_dbg)
1363f4744258SLiad Kaufman 			return 0;
13641f370650SSara Sharon 		return ret;
13651f370650SSara Sharon 	}
13661f370650SSara Sharon 
1367203c83d3SShahar S Matityahu 	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1368bab3cb92SEmmanuel Grumbach 	iwl_trans_stop_device(mvm->trans);
1369bab3cb92SEmmanuel Grumbach 	ret = iwl_trans_start_hw(mvm->trans);
13701f370650SSara Sharon 	if (ret)
13711f370650SSara Sharon 		return ret;
13721f370650SSara Sharon 
137394022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = false;
13741f370650SSara Sharon 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
13751f370650SSara Sharon 	if (ret)
13761f370650SSara Sharon 		return ret;
13771f370650SSara Sharon 
137894022562SEmmanuel Grumbach 	mvm->rfkill_safe_init_done = true;
137994022562SEmmanuel Grumbach 
1380b108d8c7SShahar S Matityahu 	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1381b108d8c7SShahar S Matityahu 			       NULL);
1382da2eb669SSara Sharon 
1383702e975dSJohannes Berg 	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
13841f370650SSara Sharon }
13851f370650SSara Sharon 
1386e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1387e705c121SKalle Valo {
1388e705c121SKalle Valo 	int ret, i;
1389e705c121SKalle Valo 	struct ieee80211_channel *chan;
1390e705c121SKalle Valo 	struct cfg80211_chan_def chandef;
1391dd36a507STova Mussai 	struct ieee80211_supported_band *sband = NULL;
1392e705c121SKalle Valo 
1393e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1394e705c121SKalle Valo 
1395e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1396e705c121SKalle Valo 	if (ret)
1397e705c121SKalle Valo 		return ret;
1398e705c121SKalle Valo 
13991f370650SSara Sharon 	ret = iwl_mvm_load_rt_fw(mvm);
1400e705c121SKalle Valo 	if (ret) {
1401e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
140272d3c7bbSJohannes Berg 		if (ret != -ERFKILL)
140372d3c7bbSJohannes Berg 			iwl_fw_dbg_error_collect(&mvm->fwrt,
140472d3c7bbSJohannes Berg 						 FW_DBG_TRIGGER_DRIVER);
1405e705c121SKalle Valo 		goto error;
1406e705c121SKalle Valo 	}
1407e705c121SKalle Valo 
1408d0b813fcSJohannes Berg 	iwl_get_shared_mem_conf(&mvm->fwrt);
1409e705c121SKalle Valo 
1410e705c121SKalle Valo 	ret = iwl_mvm_sf_update(mvm, NULL, false);
1411e705c121SKalle Valo 	if (ret)
1412e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1413e705c121SKalle Valo 
1414a1af4c48SShahar S Matityahu 	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
14157174beb6SJohannes Berg 		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1416e705c121SKalle Valo 		/* if we have a destination, assume EARLY START */
141717b809c9SSara Sharon 		if (mvm->fw->dbg.dest_tlv)
14187174beb6SJohannes Berg 			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
14197174beb6SJohannes Berg 		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
14207a14c23dSSara Sharon 	}
1421e705c121SKalle Valo 
1422e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1423e705c121SKalle Valo 	if (ret)
1424e705c121SKalle Valo 		goto error;
1425e705c121SKalle Valo 
14267d6222e2SJohannes Berg 	if (!iwl_mvm_has_unified_ucode(mvm)) {
1427e705c121SKalle Valo 		/* Send phy db control command and then phy db calibration */
1428e705c121SKalle Valo 		ret = iwl_send_phy_db_data(mvm->phy_db);
1429e705c121SKalle Valo 		if (ret)
1430e705c121SKalle Valo 			goto error;
1431bb99ff9bSLuca Coelho 	}
1432e705c121SKalle Valo 
1433e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1434e705c121SKalle Valo 	if (ret)
1435e705c121SKalle Valo 		goto error;
1436e705c121SKalle Valo 
1437b3de3ef4SEmmanuel Grumbach 	ret = iwl_mvm_send_bt_init_conf(mvm);
1438b3de3ef4SEmmanuel Grumbach 	if (ret)
1439b3de3ef4SEmmanuel Grumbach 		goto error;
1440b3de3ef4SEmmanuel Grumbach 
1441cceb4507SShahar S Matityahu 	if (fw_has_capa(&mvm->fw->ucode_capa,
1442cceb4507SShahar S Matityahu 			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1443a8eb340fSEmmanuel Grumbach 		ret = iwl_set_soc_latency(&mvm->fwrt);
1444cceb4507SShahar S Matityahu 		if (ret)
1445cceb4507SShahar S Matityahu 			goto error;
1446cceb4507SShahar S Matityahu 	}
1447cceb4507SShahar S Matityahu 
144843413a97SSara Sharon 	/* Init RSS configuration */
1449286ca8ebSLuca Coelho 	if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
14508edbfaa1SSara Sharon 		ret = iwl_configure_rxq(mvm);
14518edbfaa1SSara Sharon 		if (ret) {
14528edbfaa1SSara Sharon 			IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
14538edbfaa1SSara Sharon 				ret);
14548edbfaa1SSara Sharon 			goto error;
14558edbfaa1SSara Sharon 		}
14568edbfaa1SSara Sharon 	}
14578edbfaa1SSara Sharon 
14588edbfaa1SSara Sharon 	if (iwl_mvm_has_new_rx_api(mvm)) {
145943413a97SSara Sharon 		ret = iwl_send_rss_cfg_cmd(mvm);
146043413a97SSara Sharon 		if (ret) {
146143413a97SSara Sharon 			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
146243413a97SSara Sharon 				ret);
146343413a97SSara Sharon 			goto error;
146443413a97SSara Sharon 		}
146543413a97SSara Sharon 	}
146643413a97SSara Sharon 
1467e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1468be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1469e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1470e705c121SKalle Valo 
14710ae98812SSara Sharon 	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1472e705c121SKalle Valo 
1473e705c121SKalle Valo 	/* reset quota debouncing buffer - 0xff will yield invalid data */
1474e705c121SKalle Valo 	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1475e705c121SKalle Valo 
147679660869SIlia Lin 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
147797d5be7eSLiad Kaufman 		ret = iwl_mvm_send_dqa_cmd(mvm);
147897d5be7eSLiad Kaufman 		if (ret)
147997d5be7eSLiad Kaufman 			goto error;
148079660869SIlia Lin 	}
148197d5be7eSLiad Kaufman 
14822c2c3647SNathan Errera 	/*
14832c2c3647SNathan Errera 	 * Add auxiliary station for scanning.
14842c2c3647SNathan Errera 	 * Newer versions of this command implies that the fw uses
14852c2c3647SNathan Errera 	 * internal aux station for all aux activities that don't
14862c2c3647SNathan Errera 	 * requires a dedicated data queue.
14872c2c3647SNathan Errera 	 */
14882c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
14892c2c3647SNathan Errera 				  ADD_STA,
14902c2c3647SNathan Errera 				  0) < 12) {
14912c2c3647SNathan Errera 		 /*
14922c2c3647SNathan Errera 		  * In old version the aux station uses mac id like other
14932c2c3647SNathan Errera 		  * station and not lmac id
14942c2c3647SNathan Errera 		  */
14952c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1496e705c121SKalle Valo 		if (ret)
1497e705c121SKalle Valo 			goto error;
14982c2c3647SNathan Errera 	}
1499e705c121SKalle Valo 
1500e705c121SKalle Valo 	/* Add all the PHY contexts */
1501dd36a507STova Mussai 	i = 0;
1502dd36a507STova Mussai 	while (!sband && i < NUM_NL80211_BANDS)
1503dd36a507STova Mussai 		sband = mvm->hw->wiphy->bands[i++];
1504dd36a507STova Mussai 
1505dd36a507STova Mussai 	if (WARN_ON_ONCE(!sband))
1506dd36a507STova Mussai 		goto error;
1507dd36a507STova Mussai 
1508dd36a507STova Mussai 	chan = &sband->channels[0];
1509dd36a507STova Mussai 
1510e705c121SKalle Valo 	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1511e705c121SKalle Valo 	for (i = 0; i < NUM_PHY_CTX; i++) {
1512e705c121SKalle Valo 		/*
1513e705c121SKalle Valo 		 * The channel used here isn't relevant as it's
1514e705c121SKalle Valo 		 * going to be overwritten in the other flows.
1515e705c121SKalle Valo 		 * For now use the first channel we have.
1516e705c121SKalle Valo 		 */
1517e705c121SKalle Valo 		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1518e705c121SKalle Valo 					   &chandef, 1, 1);
1519e705c121SKalle Valo 		if (ret)
1520e705c121SKalle Valo 			goto error;
1521e705c121SKalle Valo 	}
1522e705c121SKalle Valo 
1523c221daf2SChaya Rachel Ivgi 	if (iwl_mvm_is_tt_in_fw(mvm)) {
1524c221daf2SChaya Rachel Ivgi 		/* in order to give the responsibility of ct-kill and
1525c221daf2SChaya Rachel Ivgi 		 * TX backoff to FW we need to send empty temperature reporting
1526c221daf2SChaya Rachel Ivgi 		 * cmd during init time
1527c221daf2SChaya Rachel Ivgi 		 */
1528c221daf2SChaya Rachel Ivgi 		iwl_mvm_send_temp_report_ths_cmd(mvm);
1529c221daf2SChaya Rachel Ivgi 	} else {
1530e705c121SKalle Valo 		/* Initialize tx backoffs to the minimal possible */
1531e705c121SKalle Valo 		iwl_mvm_tt_tx_backoff(mvm, 0);
1532c221daf2SChaya Rachel Ivgi 	}
15335c89e7bcSChaya Rachel Ivgi 
1534242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL
15355c89e7bcSChaya Rachel Ivgi 	/* TODO: read the budget from BIOS / Platform NVM */
1536944eafc2SChaya Rachel Ivgi 
1537944eafc2SChaya Rachel Ivgi 	/*
1538944eafc2SChaya Rachel Ivgi 	 * In case there is no budget from BIOS / Platform NVM the default
1539944eafc2SChaya Rachel Ivgi 	 * budget should be 2000mW (cooling state 0).
1540944eafc2SChaya Rachel Ivgi 	 */
1541944eafc2SChaya Rachel Ivgi 	if (iwl_mvm_is_ctdp_supported(mvm)) {
15425c89e7bcSChaya Rachel Ivgi 		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
15435c89e7bcSChaya Rachel Ivgi 					   mvm->cooling_dev.cur_state);
154475cfe338SLuca Coelho 		if (ret)
154575cfe338SLuca Coelho 			goto error;
154675cfe338SLuca Coelho 	}
1547c221daf2SChaya Rachel Ivgi #endif
1548e705c121SKalle Valo 
1549aa43ae12SAlex Malamud 	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1550e705c121SKalle Valo 		WARN_ON(iwl_mvm_config_ltr(mvm));
1551e705c121SKalle Valo 
1552e705c121SKalle Valo 	ret = iwl_mvm_power_update_device(mvm);
1553e705c121SKalle Valo 	if (ret)
1554e705c121SKalle Valo 		goto error;
1555e705c121SKalle Valo 
1556f5b1cb2eSGil Adam 	iwl_mvm_lari_cfg(mvm);
1557e705c121SKalle Valo 	/*
1558e705c121SKalle Valo 	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1559e705c121SKalle Valo 	 * anyway, so don't init MCC.
1560e705c121SKalle Valo 	 */
1561e705c121SKalle Valo 	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1562e705c121SKalle Valo 		ret = iwl_mvm_init_mcc(mvm);
1563e705c121SKalle Valo 		if (ret)
1564e705c121SKalle Valo 			goto error;
1565e705c121SKalle Valo 	}
1566e705c121SKalle Valo 
1567e705c121SKalle Valo 	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
15684ca87a5fSEmmanuel Grumbach 		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1569b66b5817SSara Sharon 		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1570e705c121SKalle Valo 		ret = iwl_mvm_config_scan(mvm);
1571e705c121SKalle Valo 		if (ret)
1572e705c121SKalle Valo 			goto error;
1573e705c121SKalle Valo 	}
1574e705c121SKalle Valo 
1575f130bb75SMordechay Goodstein 	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1576f130bb75SMordechay Goodstein 		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1577f130bb75SMordechay Goodstein 
157848e775e6SHaim Dreyfuss 	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
157948e775e6SHaim Dreyfuss 		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
158048e775e6SHaim Dreyfuss 
15816ce1e5c0SGil Adam 	ret = iwl_mvm_ppag_init(mvm);
15826ce1e5c0SGil Adam 	if (ret)
15836ce1e5c0SGil Adam 		goto error;
15846ce1e5c0SGil Adam 
1585da2830acSLuca Coelho 	ret = iwl_mvm_sar_init(mvm);
15865d041c46SLuca Coelho 	if (ret == 0) {
1587a6bff3cbSHaim Dreyfuss 		ret = iwl_mvm_sar_geo_init(mvm);
15881edd56e6SLuca Coelho 	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
15895d041c46SLuca Coelho 		/*
15905d041c46SLuca Coelho 		 * If basic SAR is not available, we check for WGDS,
15915d041c46SLuca Coelho 		 * which should *not* be available either.  If it is
15925d041c46SLuca Coelho 		 * available, issue an error, because we can't use SAR
15935d041c46SLuca Coelho 		 * Geo without basic SAR.
15945d041c46SLuca Coelho 		 */
15955d041c46SLuca Coelho 		IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
15965d041c46SLuca Coelho 	}
15975d041c46SLuca Coelho 
15985d041c46SLuca Coelho 	if (ret < 0)
1599a6bff3cbSHaim Dreyfuss 		goto error;
1600a6bff3cbSHaim Dreyfuss 
160128dd7ccdSMordechay Goodstein 	iwl_mvm_tas_init(mvm);
16027089ae63SJohannes Berg 	iwl_mvm_leds_sync(mvm);
16037089ae63SJohannes Berg 
1604b68bd2e3SIlan Peer 	iwl_mvm_ftm_initiator_smooth_config(mvm);
1605b68bd2e3SIlan Peer 
1606e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1607e705c121SKalle Valo 	return 0;
1608e705c121SKalle Valo  error:
1609f4744258SLiad Kaufman 	if (!iwlmvm_mod_params.init_dbg || !ret)
1610fcb6b92aSChaya Rachel Ivgi 		iwl_mvm_stop_device(mvm);
1611e705c121SKalle Valo 	return ret;
1612e705c121SKalle Valo }
1613e705c121SKalle Valo 
1614e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1615e705c121SKalle Valo {
1616e705c121SKalle Valo 	int ret, i;
1617e705c121SKalle Valo 
1618e705c121SKalle Valo 	lockdep_assert_held(&mvm->mutex);
1619e705c121SKalle Valo 
1620e705c121SKalle Valo 	ret = iwl_trans_start_hw(mvm->trans);
1621e705c121SKalle Valo 	if (ret)
1622e705c121SKalle Valo 		return ret;
1623e705c121SKalle Valo 
1624e705c121SKalle Valo 	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1625e705c121SKalle Valo 	if (ret) {
1626e705c121SKalle Valo 		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1627e705c121SKalle Valo 		goto error;
1628e705c121SKalle Valo 	}
1629e705c121SKalle Valo 
1630e705c121SKalle Valo 	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1631e705c121SKalle Valo 	if (ret)
1632e705c121SKalle Valo 		goto error;
1633e705c121SKalle Valo 
1634e705c121SKalle Valo 	/* Send phy db control command and then phy db calibration*/
1635e705c121SKalle Valo 	ret = iwl_send_phy_db_data(mvm->phy_db);
1636e705c121SKalle Valo 	if (ret)
1637e705c121SKalle Valo 		goto error;
1638e705c121SKalle Valo 
1639e705c121SKalle Valo 	ret = iwl_send_phy_cfg_cmd(mvm);
1640e705c121SKalle Valo 	if (ret)
1641e705c121SKalle Valo 		goto error;
1642e705c121SKalle Valo 
1643e705c121SKalle Valo 	/* init the fw <-> mac80211 STA mapping */
1644be9ae34eSNathan Errera 	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
1645e705c121SKalle Valo 		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1646e705c121SKalle Valo 
16472c2c3647SNathan Errera 	if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
16482c2c3647SNathan Errera 				  ADD_STA,
16492c2c3647SNathan Errera 				  0) < 12) {
16502c2c3647SNathan Errera 		/*
16512c2c3647SNathan Errera 		 * Add auxiliary station for scanning.
16522c2c3647SNathan Errera 		 * Newer versions of this command implies that the fw uses
16532c2c3647SNathan Errera 		 * internal aux station for all aux activities that don't
16542c2c3647SNathan Errera 		 * requires a dedicated data queue.
16552c2c3647SNathan Errera 		 * In old version the aux station uses mac id like other
16562c2c3647SNathan Errera 		 * station and not lmac id
16572c2c3647SNathan Errera 		 */
16582c2c3647SNathan Errera 		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1659e705c121SKalle Valo 		if (ret)
1660e705c121SKalle Valo 			goto error;
16612c2c3647SNathan Errera 	}
1662e705c121SKalle Valo 
1663e705c121SKalle Valo 	return 0;
1664e705c121SKalle Valo  error:
1665fcb6b92aSChaya Rachel Ivgi 	iwl_mvm_stop_device(mvm);
1666e705c121SKalle Valo 	return ret;
1667e705c121SKalle Valo }
1668e705c121SKalle Valo 
1669e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1670e705c121SKalle Valo 				 struct iwl_rx_cmd_buffer *rxb)
1671e705c121SKalle Valo {
1672e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1673e705c121SKalle Valo 	struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1674e705c121SKalle Valo 	u32 flags = le32_to_cpu(card_state_notif->flags);
1675e705c121SKalle Valo 
1676e705c121SKalle Valo 	IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1677e705c121SKalle Valo 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1678e705c121SKalle Valo 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1679e705c121SKalle Valo 			  (flags & CT_KILL_CARD_DISABLED) ?
1680e705c121SKalle Valo 			  "Reached" : "Not reached");
1681e705c121SKalle Valo }
1682e705c121SKalle Valo 
1683e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1684e705c121SKalle Valo 			     struct iwl_rx_cmd_buffer *rxb)
1685e705c121SKalle Valo {
1686e705c121SKalle Valo 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1687e705c121SKalle Valo 	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1688e705c121SKalle Valo 
1689e705c121SKalle Valo 	IWL_DEBUG_INFO(mvm,
1690e705c121SKalle Valo 		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1691e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->installed_ver),
1692e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->external_ver),
1693e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->status),
1694e705c121SKalle Valo 		       le32_to_cpu(mfuart_notif->duration));
16950c8d0a47SGolan Ben-Ami 
16960c8d0a47SGolan Ben-Ami 	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
16970c8d0a47SGolan Ben-Ami 		IWL_DEBUG_INFO(mvm,
16980c8d0a47SGolan Ben-Ami 			       "MFUART: image size: 0x%08x\n",
16990c8d0a47SGolan Ben-Ami 			       le32_to_cpu(mfuart_notif->image_size));
1700e705c121SKalle Valo }
1701