1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 1043413a97SSara Sharon * Copyright(c) 2016 Intel Deutschland GmbH 11e705c121SKalle Valo * 12e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 13e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 14e705c121SKalle Valo * published by the Free Software Foundation. 15e705c121SKalle Valo * 16e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 17e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 18e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19e705c121SKalle Valo * General Public License for more details. 20e705c121SKalle Valo * 21e705c121SKalle Valo * You should have received a copy of the GNU General Public License 22e705c121SKalle Valo * along with this program; if not, write to the Free Software 23e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24e705c121SKalle Valo * USA 25e705c121SKalle Valo * 26e705c121SKalle Valo * The full GNU General Public License is included in this distribution 27e705c121SKalle Valo * in the file called COPYING. 28e705c121SKalle Valo * 29e705c121SKalle Valo * Contact Information: 30cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 31e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32e705c121SKalle Valo * 33e705c121SKalle Valo * BSD LICENSE 34e705c121SKalle Valo * 35e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 36e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 37e705c121SKalle Valo * All rights reserved. 38e705c121SKalle Valo * 39e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 40e705c121SKalle Valo * modification, are permitted provided that the following conditions 41e705c121SKalle Valo * are met: 42e705c121SKalle Valo * 43e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 45e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 46e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 47e705c121SKalle Valo * the documentation and/or other materials provided with the 48e705c121SKalle Valo * distribution. 49e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 50e705c121SKalle Valo * contributors may be used to endorse or promote products derived 51e705c121SKalle Valo * from this software without specific prior written permission. 52e705c121SKalle Valo * 53e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 54e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 55e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 56e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 57e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 58e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 59e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 63e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64e705c121SKalle Valo * 65e705c121SKalle Valo *****************************************************************************/ 66e705c121SKalle Valo #include <net/mac80211.h> 67854d773eSSara Sharon #include <linux/netdevice.h> 68da2830acSLuca Coelho #include <linux/acpi.h> 69e705c121SKalle Valo 70e705c121SKalle Valo #include "iwl-trans.h" 71e705c121SKalle Valo #include "iwl-op-mode.h" 72e705c121SKalle Valo #include "iwl-fw.h" 73e705c121SKalle Valo #include "iwl-debug.h" 74e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 75e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 76e705c121SKalle Valo #include "iwl-prph.h" 77e705c121SKalle Valo #include "iwl-eeprom-parse.h" 78e705c121SKalle Valo 79e705c121SKalle Valo #include "mvm.h" 802f89a5d7SGolan Ben-Ami #include "fw-dbg.h" 81e705c121SKalle Valo #include "iwl-phy-db.h" 82e705c121SKalle Valo 83e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 84e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 85e705c121SKalle Valo 86e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 87e705c121SKalle Valo 88e705c121SKalle Valo struct iwl_mvm_alive_data { 89e705c121SKalle Valo bool valid; 90e705c121SKalle Valo u32 scd_base_addr; 91e705c121SKalle Valo }; 92e705c121SKalle Valo 93e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 94e705c121SKalle Valo { 95e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 96e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 97e705c121SKalle Valo }; 98e705c121SKalle Valo 99e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 100e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 101e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 102e705c121SKalle Valo } 103e705c121SKalle Valo 10443413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 10543413a97SSara Sharon { 10643413a97SSara Sharon int i; 10743413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 10843413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 10943413a97SSara Sharon .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | 110854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV4_UDP | 11143413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | 11243413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_TCP | 113854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV6_UDP | 11443413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, 11543413a97SSara Sharon }; 11643413a97SSara Sharon 117f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 118f43495fdSSara Sharon return 0; 119f43495fdSSara Sharon 120854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 12143413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 122854d773eSSara Sharon cmd.indirection_table[i] = 123854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 124854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 12543413a97SSara Sharon 12643413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 12743413a97SSara Sharon } 12843413a97SSara Sharon 12997d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 13097d5be7eSLiad Kaufman { 13197d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 13297d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 13397d5be7eSLiad Kaufman }; 13497d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 13597d5be7eSLiad Kaufman int ret; 13697d5be7eSLiad Kaufman 13797d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 13897d5be7eSLiad Kaufman if (ret) 13997d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 14097d5be7eSLiad Kaufman else 14197d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 14297d5be7eSLiad Kaufman 14397d5be7eSLiad Kaufman return ret; 14497d5be7eSLiad Kaufman } 14597d5be7eSLiad Kaufman 146905e36aeSMatti Gottlieb void iwl_free_fw_paging(struct iwl_mvm *mvm) 147e705c121SKalle Valo { 148e705c121SKalle Valo int i; 149e705c121SKalle Valo 150e705c121SKalle Valo if (!mvm->fw_paging_db[0].fw_paging_block) 151e705c121SKalle Valo return; 152e705c121SKalle Valo 153e705c121SKalle Valo for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) { 1543edbc7daSEmmanuel Grumbach struct iwl_fw_paging *paging = &mvm->fw_paging_db[i]; 1553edbc7daSEmmanuel Grumbach 1563edbc7daSEmmanuel Grumbach if (!paging->fw_paging_block) { 157e705c121SKalle Valo IWL_DEBUG_FW(mvm, 158e705c121SKalle Valo "Paging: block %d already freed, continue to next page\n", 159e705c121SKalle Valo i); 160e705c121SKalle Valo 161e705c121SKalle Valo continue; 162e705c121SKalle Valo } 1633edbc7daSEmmanuel Grumbach dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys, 1643edbc7daSEmmanuel Grumbach paging->fw_paging_size, DMA_BIDIRECTIONAL); 165e705c121SKalle Valo 1663edbc7daSEmmanuel Grumbach __free_pages(paging->fw_paging_block, 1673edbc7daSEmmanuel Grumbach get_order(paging->fw_paging_size)); 1683edbc7daSEmmanuel Grumbach paging->fw_paging_block = NULL; 169e705c121SKalle Valo } 170e705c121SKalle Valo kfree(mvm->trans->paging_download_buf); 171905e36aeSMatti Gottlieb mvm->trans->paging_download_buf = NULL; 172f742aaf3SMatti Gottlieb mvm->trans->paging_db = NULL; 173905e36aeSMatti Gottlieb 174e705c121SKalle Valo memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db)); 175e705c121SKalle Valo } 176e705c121SKalle Valo 177e705c121SKalle Valo static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image) 178e705c121SKalle Valo { 179e705c121SKalle Valo int sec_idx, idx; 180e705c121SKalle Valo u32 offset = 0; 181e705c121SKalle Valo 182e705c121SKalle Valo /* 183e705c121SKalle Valo * find where is the paging image start point: 184e705c121SKalle Valo * if CPU2 exist and it's in paging format, then the image looks like: 185e705c121SKalle Valo * CPU1 sections (2 or more) 186e705c121SKalle Valo * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2 187e705c121SKalle Valo * CPU2 sections (not paged) 188e705c121SKalle Valo * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2 189e705c121SKalle Valo * non paged to CPU2 paging sec 190e705c121SKalle Valo * CPU2 paging CSS 191e705c121SKalle Valo * CPU2 paging image (including instruction and data) 192e705c121SKalle Valo */ 193eef187a7SSara Sharon for (sec_idx = 0; sec_idx < image->num_sec; sec_idx++) { 194e705c121SKalle Valo if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) { 195e705c121SKalle Valo sec_idx++; 196e705c121SKalle Valo break; 197e705c121SKalle Valo } 198e705c121SKalle Valo } 199e705c121SKalle Valo 200cd47a3d3SMatti Gottlieb /* 201cd47a3d3SMatti Gottlieb * If paging is enabled there should be at least 2 more sections left 202cd47a3d3SMatti Gottlieb * (one for CSS and one for Paging data) 203cd47a3d3SMatti Gottlieb */ 204eef187a7SSara Sharon if (sec_idx >= image->num_sec - 1) { 205cd47a3d3SMatti Gottlieb IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n"); 206e705c121SKalle Valo iwl_free_fw_paging(mvm); 207e705c121SKalle Valo return -EINVAL; 208e705c121SKalle Valo } 209e705c121SKalle Valo 210e705c121SKalle Valo /* copy the CSS block to the dram */ 211e705c121SKalle Valo IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n", 212e705c121SKalle Valo sec_idx); 213e705c121SKalle Valo 214e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block), 215e705c121SKalle Valo image->sec[sec_idx].data, 216e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 217e705c121SKalle Valo 218e705c121SKalle Valo IWL_DEBUG_FW(mvm, 219e705c121SKalle Valo "Paging: copied %d CSS bytes to first block\n", 220e705c121SKalle Valo mvm->fw_paging_db[0].fw_paging_size); 221e705c121SKalle Valo 222e705c121SKalle Valo sec_idx++; 223e705c121SKalle Valo 224e705c121SKalle Valo /* 225e705c121SKalle Valo * copy the paging blocks to the dram 226e705c121SKalle Valo * loop index start from 1 since that CSS block already copied to dram 227e705c121SKalle Valo * and CSS index is 0. 228e705c121SKalle Valo * loop stop at num_of_paging_blk since that last block is not full. 229e705c121SKalle Valo */ 230e705c121SKalle Valo for (idx = 1; idx < mvm->num_of_paging_blk; idx++) { 231e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 232e705c121SKalle Valo image->sec[sec_idx].data + offset, 233e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size); 234e705c121SKalle Valo 235e705c121SKalle Valo IWL_DEBUG_FW(mvm, 236e705c121SKalle Valo "Paging: copied %d paging bytes to block %d\n", 237e705c121SKalle Valo mvm->fw_paging_db[idx].fw_paging_size, 238e705c121SKalle Valo idx); 239e705c121SKalle Valo 240e705c121SKalle Valo offset += mvm->fw_paging_db[idx].fw_paging_size; 241e705c121SKalle Valo } 242e705c121SKalle Valo 243e705c121SKalle Valo /* copy the last paging block */ 244e705c121SKalle Valo if (mvm->num_of_pages_in_last_blk > 0) { 245e705c121SKalle Valo memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block), 246e705c121SKalle Valo image->sec[sec_idx].data + offset, 247e705c121SKalle Valo FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk); 248e705c121SKalle Valo 249e705c121SKalle Valo IWL_DEBUG_FW(mvm, 250e705c121SKalle Valo "Paging: copied %d pages in the last block %d\n", 251e705c121SKalle Valo mvm->num_of_pages_in_last_blk, idx); 252e705c121SKalle Valo } 253e705c121SKalle Valo 254e705c121SKalle Valo return 0; 255e705c121SKalle Valo } 256e705c121SKalle Valo 257e705c121SKalle Valo static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm, 258e705c121SKalle Valo const struct fw_img *image) 259e705c121SKalle Valo { 260e705c121SKalle Valo struct page *block; 261e705c121SKalle Valo dma_addr_t phys = 0; 26208d785fdSSara Sharon int blk_idx, order, num_of_pages, size, dma_enabled; 263e705c121SKalle Valo 264e705c121SKalle Valo if (mvm->fw_paging_db[0].fw_paging_block) 265e705c121SKalle Valo return 0; 266e705c121SKalle Valo 267e705c121SKalle Valo dma_enabled = is_device_dma_capable(mvm->trans->dev); 268e705c121SKalle Valo 269e705c121SKalle Valo /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */ 270e705c121SKalle Valo BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE); 271e705c121SKalle Valo 272e705c121SKalle Valo num_of_pages = image->paging_mem_size / FW_PAGING_SIZE; 273850fe9afSSara Sharon mvm->num_of_paging_blk = 274850fe9afSSara Sharon DIV_ROUND_UP(num_of_pages, NUM_OF_PAGE_PER_GROUP); 275e705c121SKalle Valo mvm->num_of_pages_in_last_blk = 276e705c121SKalle Valo num_of_pages - 277e705c121SKalle Valo NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1); 278e705c121SKalle Valo 279e705c121SKalle Valo IWL_DEBUG_FW(mvm, 280e705c121SKalle Valo "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n", 281e705c121SKalle Valo mvm->num_of_paging_blk, 282e705c121SKalle Valo mvm->num_of_pages_in_last_blk); 283e705c121SKalle Valo 28408d785fdSSara Sharon /* 28508d785fdSSara Sharon * Allocate CSS and paging blocks in dram. 28608d785fdSSara Sharon */ 28708d785fdSSara Sharon for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 28808d785fdSSara Sharon /* For CSS allocate 4KB, for others PAGING_BLOCK_SIZE (32K) */ 28908d785fdSSara Sharon size = blk_idx ? PAGING_BLOCK_SIZE : FW_PAGING_SIZE; 29008d785fdSSara Sharon order = get_order(size); 291e705c121SKalle Valo block = alloc_pages(GFP_KERNEL, order); 292e705c121SKalle Valo if (!block) { 293e705c121SKalle Valo /* free all the previous pages since we failed */ 294e705c121SKalle Valo iwl_free_fw_paging(mvm); 295e705c121SKalle Valo return -ENOMEM; 296e705c121SKalle Valo } 297e705c121SKalle Valo 298e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_block = block; 29908d785fdSSara Sharon mvm->fw_paging_db[blk_idx].fw_paging_size = size; 300e705c121SKalle Valo 301e705c121SKalle Valo if (dma_enabled) { 302e705c121SKalle Valo phys = dma_map_page(mvm->trans->dev, block, 0, 303e705c121SKalle Valo PAGE_SIZE << order, 304e705c121SKalle Valo DMA_BIDIRECTIONAL); 305e705c121SKalle Valo if (dma_mapping_error(mvm->trans->dev, phys)) { 306e705c121SKalle Valo /* 307e705c121SKalle Valo * free the previous pages and the current one 308e705c121SKalle Valo * since we failed to map_page. 309e705c121SKalle Valo */ 310e705c121SKalle Valo iwl_free_fw_paging(mvm); 311e705c121SKalle Valo return -ENOMEM; 312e705c121SKalle Valo } 313e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; 314e705c121SKalle Valo } else { 315e705c121SKalle Valo mvm->fw_paging_db[blk_idx].fw_paging_phys = 316e705c121SKalle Valo PAGING_ADDR_SIG | 317e705c121SKalle Valo blk_idx << BLOCK_2_EXP_SIZE; 318e705c121SKalle Valo } 319e705c121SKalle Valo 32008d785fdSSara Sharon if (!blk_idx) 32108d785fdSSara Sharon IWL_DEBUG_FW(mvm, 32208d785fdSSara Sharon "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n", 32308d785fdSSara Sharon order); 32408d785fdSSara Sharon else 325e705c121SKalle Valo IWL_DEBUG_FW(mvm, 326e705c121SKalle Valo "Paging: allocated 32K bytes (order %d) for firmware paging.\n", 327e705c121SKalle Valo order); 328e705c121SKalle Valo } 329e705c121SKalle Valo 330e705c121SKalle Valo return 0; 331e705c121SKalle Valo } 332e705c121SKalle Valo 333e705c121SKalle Valo static int iwl_save_fw_paging(struct iwl_mvm *mvm, 334e705c121SKalle Valo const struct fw_img *fw) 335e705c121SKalle Valo { 336e705c121SKalle Valo int ret; 337e705c121SKalle Valo 338e705c121SKalle Valo ret = iwl_alloc_fw_paging_mem(mvm, fw); 339e705c121SKalle Valo if (ret) 340e705c121SKalle Valo return ret; 341e705c121SKalle Valo 342e705c121SKalle Valo return iwl_fill_paging_mem(mvm, fw); 343e705c121SKalle Valo } 344e705c121SKalle Valo 345e705c121SKalle Valo /* send paging cmd to FW in case CPU2 has paging image */ 346e705c121SKalle Valo static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw) 347e705c121SKalle Valo { 348d975d720SSara Sharon struct iwl_fw_paging_cmd paging_cmd = { 349e705c121SKalle Valo .flags = 350e705c121SKalle Valo cpu_to_le32(PAGING_CMD_IS_SECURED | 351e705c121SKalle Valo PAGING_CMD_IS_ENABLED | 352e705c121SKalle Valo (mvm->num_of_pages_in_last_blk << 353e705c121SKalle Valo PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)), 354e705c121SKalle Valo .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE), 355e705c121SKalle Valo .block_num = cpu_to_le32(mvm->num_of_paging_blk), 356e705c121SKalle Valo }; 357d975d720SSara Sharon int blk_idx, size = sizeof(paging_cmd); 358d975d720SSara Sharon 359d975d720SSara Sharon /* A bit hard coded - but this is the old API and will be deprecated */ 360d975d720SSara Sharon if (!iwl_mvm_has_new_tx_api(mvm)) 361d975d720SSara Sharon size -= NUM_OF_FW_PAGING_BLOCKS * 4; 362e705c121SKalle Valo 363e705c121SKalle Valo /* loop for for all paging blocks + CSS block */ 364e705c121SKalle Valo for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { 365d975d720SSara Sharon dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys; 366d975d720SSara Sharon 367d975d720SSara Sharon addr = addr >> PAGE_2_EXP_SIZE; 368d975d720SSara Sharon 369d975d720SSara Sharon if (iwl_mvm_has_new_tx_api(mvm)) { 370d975d720SSara Sharon __le64 phy_addr = cpu_to_le64(addr); 371d975d720SSara Sharon 372d975d720SSara Sharon paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr; 373d975d720SSara Sharon } else { 374d975d720SSara Sharon __le32 phy_addr = cpu_to_le32(addr); 375d975d720SSara Sharon 376d975d720SSara Sharon paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr; 377d975d720SSara Sharon } 378e705c121SKalle Valo } 379e705c121SKalle Valo 380e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD, 381e705c121SKalle Valo IWL_ALWAYS_LONG_GROUP, 0), 382d975d720SSara Sharon 0, size, &paging_cmd); 383e705c121SKalle Valo } 384e705c121SKalle Valo 385e705c121SKalle Valo /* 386e705c121SKalle Valo * Send paging item cmd to FW in case CPU2 has paging image 387e705c121SKalle Valo */ 388e705c121SKalle Valo static int iwl_trans_get_paging_item(struct iwl_mvm *mvm) 389e705c121SKalle Valo { 390e705c121SKalle Valo int ret; 391e705c121SKalle Valo struct iwl_fw_get_item_cmd fw_get_item_cmd = { 392e705c121SKalle Valo .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING), 393e705c121SKalle Valo }; 394e705c121SKalle Valo 395e705c121SKalle Valo struct iwl_fw_get_item_resp *item_resp; 396e705c121SKalle Valo struct iwl_host_cmd cmd = { 397e705c121SKalle Valo .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0), 398e705c121SKalle Valo .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, 399e705c121SKalle Valo .data = { &fw_get_item_cmd, }, 400e705c121SKalle Valo }; 401e705c121SKalle Valo 402e705c121SKalle Valo cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd); 403e705c121SKalle Valo 404e705c121SKalle Valo ret = iwl_mvm_send_cmd(mvm, &cmd); 405e705c121SKalle Valo if (ret) { 406e705c121SKalle Valo IWL_ERR(mvm, 407e705c121SKalle Valo "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n", 408e705c121SKalle Valo ret); 409e705c121SKalle Valo return ret; 410e705c121SKalle Valo } 411e705c121SKalle Valo 412e705c121SKalle Valo item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data; 413e705c121SKalle Valo if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) { 414e705c121SKalle Valo IWL_ERR(mvm, 415e705c121SKalle Valo "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n", 416e705c121SKalle Valo le32_to_cpu(item_resp->item_id)); 417e705c121SKalle Valo ret = -EIO; 418e705c121SKalle Valo goto exit; 419e705c121SKalle Valo } 420e705c121SKalle Valo 421c94d7996SMatti Gottlieb /* Add an extra page for headers */ 422c94d7996SMatti Gottlieb mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE + 423c94d7996SMatti Gottlieb FW_PAGING_SIZE, 424e705c121SKalle Valo GFP_KERNEL); 425e705c121SKalle Valo if (!mvm->trans->paging_download_buf) { 426e705c121SKalle Valo ret = -ENOMEM; 427e705c121SKalle Valo goto exit; 428e705c121SKalle Valo } 429e705c121SKalle Valo mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val); 430e705c121SKalle Valo mvm->trans->paging_db = mvm->fw_paging_db; 431e705c121SKalle Valo IWL_DEBUG_FW(mvm, 432e705c121SKalle Valo "Paging: got paging request address (paging_req_addr 0x%08x)\n", 433e705c121SKalle Valo mvm->trans->paging_req_addr); 434e705c121SKalle Valo 435e705c121SKalle Valo exit: 436e705c121SKalle Valo iwl_free_resp(&cmd); 437e705c121SKalle Valo 438e705c121SKalle Valo return ret; 439e705c121SKalle Valo } 440e705c121SKalle Valo 441e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 442e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 443e705c121SKalle Valo { 444e705c121SKalle Valo struct iwl_mvm *mvm = 445e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 446e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 447e705c121SKalle Valo struct mvm_alive_resp_ver1 *palive1; 448e705c121SKalle Valo struct mvm_alive_resp_ver2 *palive2; 449e705c121SKalle Valo struct mvm_alive_resp *palive; 450e705c121SKalle Valo 451e705c121SKalle Valo if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) { 452e705c121SKalle Valo palive1 = (void *)pkt->data; 453e705c121SKalle Valo 454e705c121SKalle Valo mvm->support_umac_log = false; 455e705c121SKalle Valo mvm->error_event_table = 456e705c121SKalle Valo le32_to_cpu(palive1->error_event_table_ptr); 457e705c121SKalle Valo mvm->log_event_table = 458e705c121SKalle Valo le32_to_cpu(palive1->log_event_table_ptr); 459e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr); 460e705c121SKalle Valo 461e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive1->status) == 462e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 463e705c121SKalle Valo IWL_DEBUG_FW(mvm, 464e705c121SKalle Valo "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 465e705c121SKalle Valo le16_to_cpu(palive1->status), palive1->ver_type, 466e705c121SKalle Valo palive1->ver_subtype, palive1->flags); 467e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) { 468e705c121SKalle Valo palive2 = (void *)pkt->data; 469e705c121SKalle Valo 470e705c121SKalle Valo mvm->error_event_table = 471e705c121SKalle Valo le32_to_cpu(palive2->error_event_table_ptr); 472e705c121SKalle Valo mvm->log_event_table = 473e705c121SKalle Valo le32_to_cpu(palive2->log_event_table_ptr); 474e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr); 475e705c121SKalle Valo mvm->umac_error_event_table = 476e705c121SKalle Valo le32_to_cpu(palive2->error_info_addr); 477e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr); 478e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size); 479e705c121SKalle Valo 480e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive2->status) == 481e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 482e705c121SKalle Valo if (mvm->umac_error_event_table) 483e705c121SKalle Valo mvm->support_umac_log = true; 484e705c121SKalle Valo 485e705c121SKalle Valo IWL_DEBUG_FW(mvm, 486e705c121SKalle Valo "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 487e705c121SKalle Valo le16_to_cpu(palive2->status), palive2->ver_type, 488e705c121SKalle Valo palive2->ver_subtype, palive2->flags); 489e705c121SKalle Valo 490e705c121SKalle Valo IWL_DEBUG_FW(mvm, 491e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 492e705c121SKalle Valo palive2->umac_major, palive2->umac_minor); 493e705c121SKalle Valo } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 494e705c121SKalle Valo palive = (void *)pkt->data; 495e705c121SKalle Valo 496e705c121SKalle Valo mvm->error_event_table = 497e705c121SKalle Valo le32_to_cpu(palive->error_event_table_ptr); 498e705c121SKalle Valo mvm->log_event_table = 499e705c121SKalle Valo le32_to_cpu(palive->log_event_table_ptr); 500e705c121SKalle Valo alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr); 501e705c121SKalle Valo mvm->umac_error_event_table = 502e705c121SKalle Valo le32_to_cpu(palive->error_info_addr); 503e705c121SKalle Valo mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr); 504e705c121SKalle Valo mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size); 505e705c121SKalle Valo 506e705c121SKalle Valo alive_data->valid = le16_to_cpu(palive->status) == 507e705c121SKalle Valo IWL_ALIVE_STATUS_OK; 508e705c121SKalle Valo if (mvm->umac_error_event_table) 509e705c121SKalle Valo mvm->support_umac_log = true; 510e705c121SKalle Valo 511e705c121SKalle Valo IWL_DEBUG_FW(mvm, 512e705c121SKalle Valo "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", 513e705c121SKalle Valo le16_to_cpu(palive->status), palive->ver_type, 514e705c121SKalle Valo palive->ver_subtype, palive->flags); 515e705c121SKalle Valo 516e705c121SKalle Valo IWL_DEBUG_FW(mvm, 517e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 518e705c121SKalle Valo le32_to_cpu(palive->umac_major), 519e705c121SKalle Valo le32_to_cpu(palive->umac_minor)); 520e705c121SKalle Valo } 521e705c121SKalle Valo 522e705c121SKalle Valo return true; 523e705c121SKalle Valo } 524e705c121SKalle Valo 5251f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 5261f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 5271f370650SSara Sharon { 5281f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 5291f370650SSara Sharon 5301f370650SSara Sharon return true; 5311f370650SSara Sharon } 5321f370650SSara Sharon 533e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 534e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 535e705c121SKalle Valo { 536e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 537e705c121SKalle Valo 538e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 539e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 540e705c121SKalle Valo return true; 541e705c121SKalle Valo } 542e705c121SKalle Valo 543ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 544e705c121SKalle Valo 545e705c121SKalle Valo return false; 546e705c121SKalle Valo } 547e705c121SKalle Valo 5481f370650SSara Sharon static int iwl_mvm_init_paging(struct iwl_mvm *mvm) 5491f370650SSara Sharon { 5501f370650SSara Sharon const struct fw_img *fw = &mvm->fw->img[mvm->cur_ucode]; 5511f370650SSara Sharon int ret; 5521f370650SSara Sharon 5531f370650SSara Sharon /* 5541f370650SSara Sharon * Configure and operate fw paging mechanism. 5551f370650SSara Sharon * The driver configures the paging flow only once. 5561f370650SSara Sharon * The CPU2 paging image is included in the IWL_UCODE_INIT image. 5571f370650SSara Sharon */ 5581f370650SSara Sharon if (!fw->paging_mem_size) 5591f370650SSara Sharon return 0; 5601f370650SSara Sharon 5611f370650SSara Sharon /* 5621f370650SSara Sharon * When dma is not enabled, the driver needs to copy / write 5631f370650SSara Sharon * the downloaded / uploaded page to / from the smem. 5641f370650SSara Sharon * This gets the location of the place were the pages are 5651f370650SSara Sharon * stored. 5661f370650SSara Sharon */ 5671f370650SSara Sharon if (!is_device_dma_capable(mvm->trans->dev)) { 5681f370650SSara Sharon ret = iwl_trans_get_paging_item(mvm); 5691f370650SSara Sharon if (ret) { 5701f370650SSara Sharon IWL_ERR(mvm, "failed to get FW paging item\n"); 5711f370650SSara Sharon return ret; 5721f370650SSara Sharon } 5731f370650SSara Sharon } 5741f370650SSara Sharon 5751f370650SSara Sharon ret = iwl_save_fw_paging(mvm, fw); 5761f370650SSara Sharon if (ret) { 5771f370650SSara Sharon IWL_ERR(mvm, "failed to save the FW paging image\n"); 5781f370650SSara Sharon return ret; 5791f370650SSara Sharon } 5801f370650SSara Sharon 5811f370650SSara Sharon ret = iwl_send_paging_cmd(mvm, fw); 5821f370650SSara Sharon if (ret) { 5831f370650SSara Sharon IWL_ERR(mvm, "failed to send the paging cmd\n"); 5841f370650SSara Sharon iwl_free_fw_paging(mvm); 5851f370650SSara Sharon return ret; 5861f370650SSara Sharon } 5871f370650SSara Sharon 5881f370650SSara Sharon return 0; 5891f370650SSara Sharon } 590e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 591e705c121SKalle Valo enum iwl_ucode_type ucode_type) 592e705c121SKalle Valo { 593e705c121SKalle Valo struct iwl_notification_wait alive_wait; 594e705c121SKalle Valo struct iwl_mvm_alive_data alive_data; 595e705c121SKalle Valo const struct fw_img *fw; 596e705c121SKalle Valo int ret, i; 597e705c121SKalle Valo enum iwl_ucode_type old_type = mvm->cur_ucode; 598e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 599e705c121SKalle Valo struct iwl_sf_region st_fwrd_space; 600e705c121SKalle Valo 601e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 6023d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 6033d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 6043d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 605612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 606e705c121SKalle Valo else 607612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 608e705c121SKalle Valo if (WARN_ON(!fw)) 609e705c121SKalle Valo return -EINVAL; 610e705c121SKalle Valo mvm->cur_ucode = ucode_type; 611e705c121SKalle Valo mvm->ucode_loaded = false; 612e705c121SKalle Valo 613e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 614e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 615e705c121SKalle Valo iwl_alive_fn, &alive_data); 616e705c121SKalle Valo 617e705c121SKalle Valo ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); 618e705c121SKalle Valo if (ret) { 619e705c121SKalle Valo mvm->cur_ucode = old_type; 620e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 621e705c121SKalle Valo return ret; 622e705c121SKalle Valo } 623e705c121SKalle Valo 624e705c121SKalle Valo /* 625e705c121SKalle Valo * Some things may run in the background now, but we 626e705c121SKalle Valo * just wait for the ALIVE notification here. 627e705c121SKalle Valo */ 628e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 629e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 630e705c121SKalle Valo if (ret) { 631e705c121SKalle Valo if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) 632e705c121SKalle Valo IWL_ERR(mvm, 633e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 634e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_1_STATUS), 635e705c121SKalle Valo iwl_read_prph(mvm->trans, SB_CPU_2_STATUS)); 636e705c121SKalle Valo mvm->cur_ucode = old_type; 637e705c121SKalle Valo return ret; 638e705c121SKalle Valo } 639e705c121SKalle Valo 640e705c121SKalle Valo if (!alive_data.valid) { 641e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 642e705c121SKalle Valo mvm->cur_ucode = old_type; 643e705c121SKalle Valo return -EIO; 644e705c121SKalle Valo } 645e705c121SKalle Valo 646e705c121SKalle Valo /* 647e705c121SKalle Valo * update the sdio allocation according to the pointer we get in the 648e705c121SKalle Valo * alive notification. 649e705c121SKalle Valo */ 650e705c121SKalle Valo st_fwrd_space.addr = mvm->sf_space.addr; 651e705c121SKalle Valo st_fwrd_space.size = mvm->sf_space.size; 652e705c121SKalle Valo ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space); 653e705c121SKalle Valo if (ret) { 654e705c121SKalle Valo IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret); 655e705c121SKalle Valo return ret; 656e705c121SKalle Valo } 657e705c121SKalle Valo 658e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 659e705c121SKalle Valo 660e705c121SKalle Valo /* 661e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 662e705c121SKalle Valo * initialization, but in firmware restart scenarios they 663e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 664e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 665e705c121SKalle Valo * reconfiguration completes. During normal startup, they 666e705c121SKalle Valo * will be empty. 667e705c121SKalle Valo */ 668e705c121SKalle Valo 669e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 670097129c9SLiad Kaufman if (iwl_mvm_is_dqa_supported(mvm)) 671097129c9SLiad Kaufman mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; 672097129c9SLiad Kaufman else 673e705c121SKalle Valo mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1; 674e705c121SKalle Valo 675e705c121SKalle Valo for (i = 0; i < IEEE80211_MAX_QUEUES; i++) 676e705c121SKalle Valo atomic_set(&mvm->mac80211_queue_stop_count[i], 0); 677e705c121SKalle Valo 678e705c121SKalle Valo mvm->ucode_loaded = true; 679e705c121SKalle Valo 680e705c121SKalle Valo return 0; 681e705c121SKalle Valo } 682e705c121SKalle Valo 683e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 684e705c121SKalle Valo { 685e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 686e705c121SKalle Valo enum iwl_ucode_type ucode_type = mvm->cur_ucode; 687e705c121SKalle Valo 688e705c121SKalle Valo /* Set parameters */ 689e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 690e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 691e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 692e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 693e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 694e705c121SKalle Valo 695e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 696e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 697e705c121SKalle Valo 698e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 699e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 700e705c121SKalle Valo } 701e705c121SKalle Valo 702e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 703e705c121SKalle Valo { 704e705c121SKalle Valo struct iwl_notification_wait calib_wait; 705e705c121SKalle Valo static const u16 init_complete[] = { 706e705c121SKalle Valo INIT_COMPLETE_NOTIF, 707e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 708e705c121SKalle Valo }; 709e705c121SKalle Valo int ret; 710e705c121SKalle Valo 711e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 712e705c121SKalle Valo 713e705c121SKalle Valo if (WARN_ON_ONCE(mvm->calibrating)) 714e705c121SKalle Valo return 0; 715e705c121SKalle Valo 716e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 717e705c121SKalle Valo &calib_wait, 718e705c121SKalle Valo init_complete, 719e705c121SKalle Valo ARRAY_SIZE(init_complete), 720e705c121SKalle Valo iwl_wait_phy_db_entry, 721e705c121SKalle Valo mvm->phy_db); 722e705c121SKalle Valo 723e705c121SKalle Valo /* Will also start the device */ 724e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 725e705c121SKalle Valo if (ret) { 726e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 727e705c121SKalle Valo goto error; 728e705c121SKalle Valo } 729e705c121SKalle Valo 730e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 731e705c121SKalle Valo if (ret) 732e705c121SKalle Valo goto error; 733e705c121SKalle Valo 734e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 735e705c121SKalle Valo if (read_nvm) { 736e705c121SKalle Valo /* Read nvm */ 737e705c121SKalle Valo ret = iwl_nvm_init(mvm, true); 738e705c121SKalle Valo if (ret) { 739e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 740e705c121SKalle Valo goto error; 741e705c121SKalle Valo } 742e705c121SKalle Valo } 743e705c121SKalle Valo 744e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 745e705c121SKalle Valo if (mvm->nvm_file_name) 746e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 747e705c121SKalle Valo 748e705c121SKalle Valo ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); 749e705c121SKalle Valo WARN_ON(ret); 750e705c121SKalle Valo 751e705c121SKalle Valo /* 752e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 753e705c121SKalle Valo * the init seq later when RF kill will switch to off 754e705c121SKalle Valo */ 755e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 756e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 757e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 758e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 759e705c121SKalle Valo ret = 1; 760e705c121SKalle Valo goto out; 761e705c121SKalle Valo } 762e705c121SKalle Valo 763e705c121SKalle Valo mvm->calibrating = true; 764e705c121SKalle Valo 765e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 766e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 767e705c121SKalle Valo if (ret) 768e705c121SKalle Valo goto error; 769e705c121SKalle Valo 770e705c121SKalle Valo /* 771e705c121SKalle Valo * Send phy configurations command to init uCode 772e705c121SKalle Valo * to start the 16.0 uCode init image internal calibrations. 773e705c121SKalle Valo */ 774e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 775e705c121SKalle Valo if (ret) { 776e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 777e705c121SKalle Valo ret); 778e705c121SKalle Valo goto error; 779e705c121SKalle Valo } 780e705c121SKalle Valo 781e705c121SKalle Valo /* 782e705c121SKalle Valo * Some things may run in the background now, but we 783e705c121SKalle Valo * just wait for the calibration complete notification. 784e705c121SKalle Valo */ 785e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 786e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 787e705c121SKalle Valo 788e705c121SKalle Valo if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { 789e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 790e705c121SKalle Valo ret = 1; 791e705c121SKalle Valo } 792e705c121SKalle Valo goto out; 793e705c121SKalle Valo 794e705c121SKalle Valo error: 795e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 796e705c121SKalle Valo out: 797e705c121SKalle Valo mvm->calibrating = false; 798e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 799e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 800e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 801e705c121SKalle Valo sizeof(struct ieee80211_channel) + 802e705c121SKalle Valo sizeof(struct ieee80211_rate), 803e705c121SKalle Valo GFP_KERNEL); 804e705c121SKalle Valo if (!mvm->nvm_data) 805e705c121SKalle Valo return -ENOMEM; 806e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 807e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 808e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 809e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 810e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 811e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 812e705c121SKalle Valo } 813e705c121SKalle Valo 814e705c121SKalle Valo return ret; 815e705c121SKalle Valo } 816e705c121SKalle Valo 8171f370650SSara Sharon int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 8181f370650SSara Sharon { 8191f370650SSara Sharon struct iwl_notification_wait init_wait; 8201f370650SSara Sharon struct iwl_nvm_access_complete_cmd nvm_complete = {}; 8211f370650SSara Sharon static const u16 init_complete[] = { 8221f370650SSara Sharon INIT_COMPLETE_NOTIF, 8231f370650SSara Sharon }; 8241f370650SSara Sharon int ret; 8251f370650SSara Sharon 8261f370650SSara Sharon lockdep_assert_held(&mvm->mutex); 8271f370650SSara Sharon 8281f370650SSara Sharon iwl_init_notification_wait(&mvm->notif_wait, 8291f370650SSara Sharon &init_wait, 8301f370650SSara Sharon init_complete, 8311f370650SSara Sharon ARRAY_SIZE(init_complete), 8321f370650SSara Sharon iwl_wait_init_complete, 8331f370650SSara Sharon NULL); 8341f370650SSara Sharon 8351f370650SSara Sharon /* Will also start the device */ 8361f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 8371f370650SSara Sharon if (ret) { 8381f370650SSara Sharon IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 8391f370650SSara Sharon goto error; 8401f370650SSara Sharon } 8411f370650SSara Sharon 8421f370650SSara Sharon /* TODO: remove when integrating context info */ 8431f370650SSara Sharon ret = iwl_mvm_init_paging(mvm); 8441f370650SSara Sharon if (ret) { 8451f370650SSara Sharon IWL_ERR(mvm, "Failed to init paging: %d\n", 8461f370650SSara Sharon ret); 8471f370650SSara Sharon goto error; 8481f370650SSara Sharon } 8491f370650SSara Sharon 8501f370650SSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 8511f370650SSara Sharon if (read_nvm) { 8521f370650SSara Sharon /* Read nvm */ 8531f370650SSara Sharon ret = iwl_nvm_init(mvm, true); 8541f370650SSara Sharon if (ret) { 8551f370650SSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 8561f370650SSara Sharon goto error; 8571f370650SSara Sharon } 8581f370650SSara Sharon } 8591f370650SSara Sharon 8601f370650SSara Sharon /* In case we read the NVM from external file, load it to the NIC */ 8611f370650SSara Sharon if (mvm->nvm_file_name) 8621f370650SSara Sharon iwl_mvm_load_nvm_to_nic(mvm); 8631f370650SSara Sharon 8641f370650SSara Sharon ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); 8651f370650SSara Sharon if (WARN_ON(ret)) 8661f370650SSara Sharon goto error; 8671f370650SSara Sharon 8681f370650SSara Sharon ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 8691f370650SSara Sharon NVM_ACCESS_COMPLETE), 0, 8701f370650SSara Sharon sizeof(nvm_complete), &nvm_complete); 8711f370650SSara Sharon if (ret) { 8721f370650SSara Sharon IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 8731f370650SSara Sharon ret); 8741f370650SSara Sharon goto error; 8751f370650SSara Sharon } 8761f370650SSara Sharon 8771f370650SSara Sharon /* We wait for the INIT complete notification */ 8781f370650SSara Sharon return iwl_wait_notification(&mvm->notif_wait, &init_wait, 8791f370650SSara Sharon MVM_UCODE_ALIVE_TIMEOUT); 8801f370650SSara Sharon 8811f370650SSara Sharon error: 8821f370650SSara Sharon iwl_remove_notification(&mvm->notif_wait, &init_wait); 8831f370650SSara Sharon return ret; 8841f370650SSara Sharon } 8851f370650SSara Sharon 886db06f04dSSara Sharon static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm, 887db06f04dSSara Sharon struct iwl_rx_packet *pkt) 888db06f04dSSara Sharon { 889db06f04dSSara Sharon struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data; 890db06f04dSSara Sharon int i; 891db06f04dSSara Sharon 892db06f04dSSara Sharon mvm->shared_mem_cfg.num_txfifo_entries = 893db06f04dSSara Sharon ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); 894db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) 895db06f04dSSara Sharon mvm->shared_mem_cfg.txfifo_size[i] = 896db06f04dSSara Sharon le32_to_cpu(mem_cfg->txfifo_size[i]); 897db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) 898db06f04dSSara Sharon mvm->shared_mem_cfg.rxfifo_size[i] = 899db06f04dSSara Sharon le32_to_cpu(mem_cfg->rxfifo_size[i]); 900db06f04dSSara Sharon 901db06f04dSSara Sharon BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != 902db06f04dSSara Sharon sizeof(mem_cfg->internal_txfifo_size)); 903db06f04dSSara Sharon 904db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); 905db06f04dSSara Sharon i++) 906db06f04dSSara Sharon mvm->shared_mem_cfg.internal_txfifo_size[i] = 907db06f04dSSara Sharon le32_to_cpu(mem_cfg->internal_txfifo_size[i]); 908db06f04dSSara Sharon } 909db06f04dSSara Sharon 910db06f04dSSara Sharon static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm, 911db06f04dSSara Sharon struct iwl_rx_packet *pkt) 912db06f04dSSara Sharon { 913db06f04dSSara Sharon struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data; 914db06f04dSSara Sharon int i; 915db06f04dSSara Sharon 916db06f04dSSara Sharon mvm->shared_mem_cfg.num_txfifo_entries = 917db06f04dSSara Sharon ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); 918db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) 919db06f04dSSara Sharon mvm->shared_mem_cfg.txfifo_size[i] = 920db06f04dSSara Sharon le32_to_cpu(mem_cfg->txfifo_size[i]); 921db06f04dSSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++) 922db06f04dSSara Sharon mvm->shared_mem_cfg.rxfifo_size[i] = 923db06f04dSSara Sharon le32_to_cpu(mem_cfg->rxfifo_size[i]); 924db06f04dSSara Sharon 925db06f04dSSara Sharon /* new API has more data, from rxfifo_addr field and on */ 926db06f04dSSara Sharon if (fw_has_capa(&mvm->fw->ucode_capa, 927db06f04dSSara Sharon IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) { 928db06f04dSSara Sharon BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) != 929db06f04dSSara Sharon sizeof(mem_cfg->internal_txfifo_size)); 930db06f04dSSara Sharon 931db06f04dSSara Sharon for (i = 0; 932db06f04dSSara Sharon i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size); 933db06f04dSSara Sharon i++) 934db06f04dSSara Sharon mvm->shared_mem_cfg.internal_txfifo_size[i] = 935db06f04dSSara Sharon le32_to_cpu(mem_cfg->internal_txfifo_size[i]); 936db06f04dSSara Sharon } 937db06f04dSSara Sharon } 938db06f04dSSara Sharon 939e705c121SKalle Valo static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm) 940e705c121SKalle Valo { 941e705c121SKalle Valo struct iwl_host_cmd cmd = { 942e705c121SKalle Valo .flags = CMD_WANT_SKB, 943e705c121SKalle Valo .data = { NULL, }, 944e705c121SKalle Valo .len = { 0, }, 945e705c121SKalle Valo }; 9465b086414SGolan Ben-Ami struct iwl_rx_packet *pkt; 947e705c121SKalle Valo 948e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 949e705c121SKalle Valo 9505b086414SGolan Ben-Ami if (fw_has_capa(&mvm->fw->ucode_capa, 9515b086414SGolan Ben-Ami IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) 9525b086414SGolan Ben-Ami cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0); 9535b086414SGolan Ben-Ami else 9545b086414SGolan Ben-Ami cmd.id = SHARED_MEM_CFG; 9555b086414SGolan Ben-Ami 956e705c121SKalle Valo if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd))) 957e705c121SKalle Valo return; 958e705c121SKalle Valo 959e705c121SKalle Valo pkt = cmd.resp_pkt; 960db06f04dSSara Sharon if (iwl_mvm_has_new_tx_api(mvm)) 961db06f04dSSara Sharon iwl_mvm_parse_shared_mem_a000(mvm, pkt); 962db06f04dSSara Sharon else 963db06f04dSSara Sharon iwl_mvm_parse_shared_mem(mvm, pkt); 9645b086414SGolan Ben-Ami 965e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n"); 966e705c121SKalle Valo 967e705c121SKalle Valo iwl_free_resp(&cmd); 968e705c121SKalle Valo } 969e705c121SKalle Valo 970e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 971e705c121SKalle Valo { 972e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 973e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 974e705c121SKalle Valo }; 975e705c121SKalle Valo 976e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 977e705c121SKalle Valo return 0; 978e705c121SKalle Valo 979e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 980e705c121SKalle Valo sizeof(cmd), &cmd); 981e705c121SKalle Valo } 982e705c121SKalle Valo 983da2830acSLuca Coelho #define ACPI_WRDS_METHOD "WRDS" 984da2830acSLuca Coelho #define ACPI_WRDS_WIFI (0x07) 985da2830acSLuca Coelho #define ACPI_WRDS_TABLE_SIZE 10 986da2830acSLuca Coelho 987da2830acSLuca Coelho struct iwl_mvm_sar_table { 988da2830acSLuca Coelho bool enabled; 989da2830acSLuca Coelho u8 values[ACPI_WRDS_TABLE_SIZE]; 990da2830acSLuca Coelho }; 991da2830acSLuca Coelho 992da2830acSLuca Coelho #ifdef CONFIG_ACPI 993da2830acSLuca Coelho static int iwl_mvm_sar_get_wrds(struct iwl_mvm *mvm, union acpi_object *wrds, 994da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 995da2830acSLuca Coelho { 996da2830acSLuca Coelho union acpi_object *data_pkg; 997da2830acSLuca Coelho u32 i; 998da2830acSLuca Coelho 999da2830acSLuca Coelho /* We need at least two packages, one for the revision and one 1000da2830acSLuca Coelho * for the data itself. Also check that the revision is valid 1001da2830acSLuca Coelho * (i.e. it is an integer set to 0). 1002da2830acSLuca Coelho */ 1003da2830acSLuca Coelho if (wrds->type != ACPI_TYPE_PACKAGE || 1004da2830acSLuca Coelho wrds->package.count < 2 || 1005da2830acSLuca Coelho wrds->package.elements[0].type != ACPI_TYPE_INTEGER || 1006da2830acSLuca Coelho wrds->package.elements[0].integer.value != 0) { 1007da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "Unsupported wrds structure\n"); 1008da2830acSLuca Coelho return -EINVAL; 1009da2830acSLuca Coelho } 1010da2830acSLuca Coelho 1011da2830acSLuca Coelho /* loop through all the packages to find the one for WiFi */ 1012da2830acSLuca Coelho for (i = 1; i < wrds->package.count; i++) { 1013da2830acSLuca Coelho union acpi_object *domain; 1014da2830acSLuca Coelho 1015da2830acSLuca Coelho data_pkg = &wrds->package.elements[i]; 1016da2830acSLuca Coelho 1017da2830acSLuca Coelho /* Skip anything that is not a package with the right 1018da2830acSLuca Coelho * amount of elements (i.e. domain_type, 1019da2830acSLuca Coelho * enabled/disabled plus the sar table size. 1020da2830acSLuca Coelho */ 1021da2830acSLuca Coelho if (data_pkg->type != ACPI_TYPE_PACKAGE || 1022da2830acSLuca Coelho data_pkg->package.count != ACPI_WRDS_TABLE_SIZE + 2) 1023da2830acSLuca Coelho continue; 1024da2830acSLuca Coelho 1025da2830acSLuca Coelho domain = &data_pkg->package.elements[0]; 1026da2830acSLuca Coelho if (domain->type == ACPI_TYPE_INTEGER && 1027da2830acSLuca Coelho domain->integer.value == ACPI_WRDS_WIFI) 1028da2830acSLuca Coelho break; 1029da2830acSLuca Coelho 1030da2830acSLuca Coelho data_pkg = NULL; 1031da2830acSLuca Coelho } 1032da2830acSLuca Coelho 1033da2830acSLuca Coelho if (!data_pkg) 1034da2830acSLuca Coelho return -ENOENT; 1035da2830acSLuca Coelho 1036da2830acSLuca Coelho if (data_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) 1037da2830acSLuca Coelho return -EINVAL; 1038da2830acSLuca Coelho 1039da2830acSLuca Coelho sar_table->enabled = !!(data_pkg->package.elements[1].integer.value); 1040da2830acSLuca Coelho 1041da2830acSLuca Coelho for (i = 0; i < ACPI_WRDS_TABLE_SIZE; i++) { 1042da2830acSLuca Coelho union acpi_object *entry; 1043da2830acSLuca Coelho 1044da2830acSLuca Coelho entry = &data_pkg->package.elements[i + 2]; 1045da2830acSLuca Coelho if ((entry->type != ACPI_TYPE_INTEGER) || 1046da2830acSLuca Coelho (entry->integer.value > U8_MAX)) 1047da2830acSLuca Coelho return -EINVAL; 1048da2830acSLuca Coelho 1049da2830acSLuca Coelho sar_table->values[i] = entry->integer.value; 1050da2830acSLuca Coelho } 1051da2830acSLuca Coelho 1052da2830acSLuca Coelho return 0; 1053da2830acSLuca Coelho } 1054da2830acSLuca Coelho 1055da2830acSLuca Coelho static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm, 1056da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 1057da2830acSLuca Coelho { 1058da2830acSLuca Coelho acpi_handle root_handle; 1059da2830acSLuca Coelho acpi_handle handle; 1060da2830acSLuca Coelho struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL}; 1061da2830acSLuca Coelho acpi_status status; 1062da2830acSLuca Coelho int ret; 1063da2830acSLuca Coelho 1064da2830acSLuca Coelho root_handle = ACPI_HANDLE(mvm->dev); 1065da2830acSLuca Coelho if (!root_handle) { 1066da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 1067da2830acSLuca Coelho "Could not retrieve root port ACPI handle\n"); 1068da2830acSLuca Coelho return -ENOENT; 1069da2830acSLuca Coelho } 1070da2830acSLuca Coelho 1071da2830acSLuca Coelho /* Get the method's handle */ 1072da2830acSLuca Coelho status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD, 1073da2830acSLuca Coelho &handle); 1074da2830acSLuca Coelho if (ACPI_FAILURE(status)) { 1075da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "WRDS method not found\n"); 1076da2830acSLuca Coelho return -ENOENT; 1077da2830acSLuca Coelho } 1078da2830acSLuca Coelho 1079da2830acSLuca Coelho /* Call WRDS with no arguments */ 1080da2830acSLuca Coelho status = acpi_evaluate_object(handle, NULL, NULL, &wrds); 1081da2830acSLuca Coelho if (ACPI_FAILURE(status)) { 1082da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status); 1083da2830acSLuca Coelho return -ENOENT; 1084da2830acSLuca Coelho } 1085da2830acSLuca Coelho 1086da2830acSLuca Coelho ret = iwl_mvm_sar_get_wrds(mvm, wrds.pointer, sar_table); 1087da2830acSLuca Coelho kfree(wrds.pointer); 1088da2830acSLuca Coelho 1089da2830acSLuca Coelho return ret; 1090da2830acSLuca Coelho } 1091da2830acSLuca Coelho #else /* CONFIG_ACPI */ 1092da2830acSLuca Coelho static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm, 1093da2830acSLuca Coelho struct iwl_mvm_sar_table *sar_table) 1094da2830acSLuca Coelho { 1095da2830acSLuca Coelho return -ENOENT; 1096da2830acSLuca Coelho } 1097da2830acSLuca Coelho #endif /* CONFIG_ACPI */ 1098da2830acSLuca Coelho 1099da2830acSLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 1100da2830acSLuca Coelho { 1101da2830acSLuca Coelho struct iwl_mvm_sar_table sar_table; 1102da2830acSLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 11034b87e5afSLuca Coelho .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 1104da2830acSLuca Coelho }; 1105da2830acSLuca Coelho int ret, i, j, idx; 110655bfa4b9SLuca Coelho int len = sizeof(cmd); 1107da2830acSLuca Coelho 110855bfa4b9SLuca Coelho if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 110955bfa4b9SLuca Coelho len = sizeof(cmd.v3); 111055bfa4b9SLuca Coelho 1111da2830acSLuca Coelho ret = iwl_mvm_sar_get_table(mvm, &sar_table); 1112da2830acSLuca Coelho if (ret < 0) { 1113da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 1114da2830acSLuca Coelho "SAR BIOS table invalid or unavailable. (%d)\n", 1115da2830acSLuca Coelho ret); 1116da2830acSLuca Coelho /* we don't fail if the table is not available */ 1117da2830acSLuca Coelho return 0; 1118da2830acSLuca Coelho } 1119da2830acSLuca Coelho 1120da2830acSLuca Coelho if (!sar_table.enabled) 1121da2830acSLuca Coelho return 0; 1122da2830acSLuca Coelho 1123da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 1124da2830acSLuca Coelho 1125da2830acSLuca Coelho BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS != 1126da2830acSLuca Coelho ACPI_WRDS_TABLE_SIZE); 1127da2830acSLuca Coelho 1128da2830acSLuca Coelho for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { 1129da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); 1130da2830acSLuca Coelho for (j = 0; j < IWL_NUM_SUB_BANDS; j++) { 1131da2830acSLuca Coelho idx = (i * IWL_NUM_SUB_BANDS) + j; 113255bfa4b9SLuca Coelho cmd.v3.per_chain_restriction[i][j] = 1133da2830acSLuca Coelho cpu_to_le16(sar_table.values[idx]); 1134da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", 1135da2830acSLuca Coelho j, sar_table.values[idx]); 1136da2830acSLuca Coelho } 1137da2830acSLuca Coelho } 1138da2830acSLuca Coelho 113955bfa4b9SLuca Coelho ret = iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 1140da2830acSLuca Coelho if (ret) 1141da2830acSLuca Coelho IWL_ERR(mvm, "failed to set per-chain TX power: %d\n", ret); 1142da2830acSLuca Coelho 1143da2830acSLuca Coelho return ret; 1144da2830acSLuca Coelho } 1145da2830acSLuca Coelho 11461f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 11471f370650SSara Sharon { 11481f370650SSara Sharon int ret; 11491f370650SSara Sharon 11501f370650SSara Sharon if (iwl_mvm_has_new_tx_api(mvm)) 11511f370650SSara Sharon return iwl_run_unified_mvm_ucode(mvm, false); 11521f370650SSara Sharon 11531f370650SSara Sharon ret = iwl_run_init_mvm_ucode(mvm, false); 11541f370650SSara Sharon 11551f370650SSara Sharon if (iwlmvm_mod_params.init_dbg) 11561f370650SSara Sharon return 0; 11571f370650SSara Sharon 11581f370650SSara Sharon if (ret) { 11591f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 11601f370650SSara Sharon /* this can't happen */ 11611f370650SSara Sharon if (WARN_ON(ret > 0)) 11621f370650SSara Sharon ret = -ERFKILL; 11631f370650SSara Sharon return ret; 11641f370650SSara Sharon } 11651f370650SSara Sharon 11661f370650SSara Sharon /* 11671f370650SSara Sharon * Stop and start the transport without entering low power 11681f370650SSara Sharon * mode. This will save the state of other components on the 11691f370650SSara Sharon * device that are triggered by the INIT firwmare (MFUART). 11701f370650SSara Sharon */ 11711f370650SSara Sharon _iwl_trans_stop_device(mvm->trans, false); 11721f370650SSara Sharon ret = _iwl_trans_start_hw(mvm->trans, false); 11731f370650SSara Sharon if (ret) 11741f370650SSara Sharon return ret; 11751f370650SSara Sharon 11761f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 11771f370650SSara Sharon if (ret) 11781f370650SSara Sharon return ret; 11791f370650SSara Sharon 11801f370650SSara Sharon return iwl_mvm_init_paging(mvm); 11811f370650SSara Sharon } 11821f370650SSara Sharon 1183e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1184e705c121SKalle Valo { 1185e705c121SKalle Valo int ret, i; 1186e705c121SKalle Valo struct ieee80211_channel *chan; 1187e705c121SKalle Valo struct cfg80211_chan_def chandef; 1188e705c121SKalle Valo 1189e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1190e705c121SKalle Valo 1191e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1192e705c121SKalle Valo if (ret) 1193e705c121SKalle Valo return ret; 1194e705c121SKalle Valo 11951f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1196e705c121SKalle Valo if (ret) { 1197e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1198e705c121SKalle Valo goto error; 1199e705c121SKalle Valo } 1200e705c121SKalle Valo 1201e705c121SKalle Valo iwl_mvm_get_shared_mem_conf(mvm); 1202e705c121SKalle Valo 1203e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1204e705c121SKalle Valo if (ret) 1205e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1206e705c121SKalle Valo 1207e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_INVALID; 1208e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 1209e705c121SKalle Valo if (mvm->fw->dbg_dest_tlv) 1210e705c121SKalle Valo mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE; 1211e705c121SKalle Valo iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE); 1212e705c121SKalle Valo 1213e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1214e705c121SKalle Valo if (ret) 1215e705c121SKalle Valo goto error; 1216e705c121SKalle Valo 1217e705c121SKalle Valo ret = iwl_send_bt_init_conf(mvm); 1218e705c121SKalle Valo if (ret) 1219e705c121SKalle Valo goto error; 1220e705c121SKalle Valo 1221e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 12221f370650SSara Sharon if (!iwl_mvm_has_new_tx_api(mvm)) { 1223e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1224e705c121SKalle Valo if (ret) 1225e705c121SKalle Valo goto error; 1226e705c121SKalle Valo 1227e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1228e705c121SKalle Valo if (ret) 1229e705c121SKalle Valo goto error; 12301f370650SSara Sharon } 1231e705c121SKalle Valo 123243413a97SSara Sharon /* Init RSS configuration */ 123343413a97SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 123443413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 123543413a97SSara Sharon if (ret) { 123643413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 123743413a97SSara Sharon ret); 123843413a97SSara Sharon goto error; 123943413a97SSara Sharon } 124043413a97SSara Sharon } 124143413a97SSara Sharon 1242e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1243e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1244e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1245e705c121SKalle Valo 1246e705c121SKalle Valo mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT; 1247e705c121SKalle Valo 1248e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1249e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1250e705c121SKalle Valo 125197d5be7eSLiad Kaufman /* Enable DQA-mode if required */ 125297d5be7eSLiad Kaufman if (iwl_mvm_is_dqa_supported(mvm)) { 125397d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 125497d5be7eSLiad Kaufman if (ret) 125597d5be7eSLiad Kaufman goto error; 125697d5be7eSLiad Kaufman } else { 125797d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n"); 125897d5be7eSLiad Kaufman } 125997d5be7eSLiad Kaufman 1260e705c121SKalle Valo /* Add auxiliary station for scanning */ 1261e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1262e705c121SKalle Valo if (ret) 1263e705c121SKalle Valo goto error; 1264e705c121SKalle Valo 1265e705c121SKalle Valo /* Add all the PHY contexts */ 126657fbcce3SJohannes Berg chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; 1267e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1268e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1269e705c121SKalle Valo /* 1270e705c121SKalle Valo * The channel used here isn't relevant as it's 1271e705c121SKalle Valo * going to be overwritten in the other flows. 1272e705c121SKalle Valo * For now use the first channel we have. 1273e705c121SKalle Valo */ 1274e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1275e705c121SKalle Valo &chandef, 1, 1); 1276e705c121SKalle Valo if (ret) 1277e705c121SKalle Valo goto error; 1278e705c121SKalle Valo } 1279e705c121SKalle Valo 1280c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL 1281c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1282c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1283c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1284c221daf2SChaya Rachel Ivgi * cmd during init time 1285c221daf2SChaya Rachel Ivgi */ 1286c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1287c221daf2SChaya Rachel Ivgi } else { 1288e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1289e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1290c221daf2SChaya Rachel Ivgi } 12915c89e7bcSChaya Rachel Ivgi 12925c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 129375cfe338SLuca Coelho if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) { 12945c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 12955c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 129675cfe338SLuca Coelho if (ret) 129775cfe338SLuca Coelho goto error; 129875cfe338SLuca Coelho } 1299c221daf2SChaya Rachel Ivgi #else 1300c221daf2SChaya Rachel Ivgi /* Initialize tx backoffs to the minimal possible */ 1301c221daf2SChaya Rachel Ivgi iwl_mvm_tt_tx_backoff(mvm, 0); 1302c221daf2SChaya Rachel Ivgi #endif 1303e705c121SKalle Valo 1304e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1305e705c121SKalle Valo 1306e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1307e705c121SKalle Valo if (ret) 1308e705c121SKalle Valo goto error; 1309e705c121SKalle Valo 1310e705c121SKalle Valo /* 1311e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1312e705c121SKalle Valo * anyway, so don't init MCC. 1313e705c121SKalle Valo */ 1314e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1315e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1316e705c121SKalle Valo if (ret) 1317e705c121SKalle Valo goto error; 1318e705c121SKalle Valo } 1319e705c121SKalle Valo 1320e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 13214ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1322e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1323e705c121SKalle Valo if (ret) 1324e705c121SKalle Valo goto error; 1325e705c121SKalle Valo } 1326e705c121SKalle Valo 1327e705c121SKalle Valo if (iwl_mvm_is_csum_supported(mvm) && 1328e705c121SKalle Valo mvm->cfg->features & NETIF_F_RXCSUM) 1329e705c121SKalle Valo iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3); 1330e705c121SKalle Valo 1331e705c121SKalle Valo /* allow FW/transport low power modes if not during restart */ 1332e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1333e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); 1334e705c121SKalle Valo 1335da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 1336da2830acSLuca Coelho if (ret) 1337da2830acSLuca Coelho goto error; 1338da2830acSLuca Coelho 1339e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1340e705c121SKalle Valo return 0; 1341e705c121SKalle Valo error: 1342fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1343e705c121SKalle Valo return ret; 1344e705c121SKalle Valo } 1345e705c121SKalle Valo 1346e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1347e705c121SKalle Valo { 1348e705c121SKalle Valo int ret, i; 1349e705c121SKalle Valo 1350e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1351e705c121SKalle Valo 1352e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1353e705c121SKalle Valo if (ret) 1354e705c121SKalle Valo return ret; 1355e705c121SKalle Valo 1356e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1357e705c121SKalle Valo if (ret) { 1358e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1359e705c121SKalle Valo goto error; 1360e705c121SKalle Valo } 1361e705c121SKalle Valo 1362e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1363e705c121SKalle Valo if (ret) 1364e705c121SKalle Valo goto error; 1365e705c121SKalle Valo 1366e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1367e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1368e705c121SKalle Valo if (ret) 1369e705c121SKalle Valo goto error; 1370e705c121SKalle Valo 1371e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1372e705c121SKalle Valo if (ret) 1373e705c121SKalle Valo goto error; 1374e705c121SKalle Valo 1375e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1376e705c121SKalle Valo for (i = 0; i < IWL_MVM_STATION_COUNT; i++) 1377e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1378e705c121SKalle Valo 1379e705c121SKalle Valo /* Add auxiliary station for scanning */ 1380e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1381e705c121SKalle Valo if (ret) 1382e705c121SKalle Valo goto error; 1383e705c121SKalle Valo 1384e705c121SKalle Valo return 0; 1385e705c121SKalle Valo error: 1386fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1387e705c121SKalle Valo return ret; 1388e705c121SKalle Valo } 1389e705c121SKalle Valo 1390e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1391e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1392e705c121SKalle Valo { 1393e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1394e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1395e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1396e705c121SKalle Valo 1397e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1398e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1399e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1400e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1401e705c121SKalle Valo "Reached" : "Not reached"); 1402e705c121SKalle Valo } 1403e705c121SKalle Valo 1404e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1405e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1406e705c121SKalle Valo { 1407e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1408e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1409e705c121SKalle Valo 141019f63c53SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 141119f63c53SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 141219f63c53SGolan Ben-Ami "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x, image size: 0x%08x\n", 141319f63c53SGolan Ben-Ami le32_to_cpu(mfuart_notif->installed_ver), 141419f63c53SGolan Ben-Ami le32_to_cpu(mfuart_notif->external_ver), 141519f63c53SGolan Ben-Ami le32_to_cpu(mfuart_notif->status), 141619f63c53SGolan Ben-Ami le32_to_cpu(mfuart_notif->duration), 141719f63c53SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 141819f63c53SGolan Ben-Ami else 1419e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1420e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1421e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1422e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1423e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1424e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 1425e705c121SKalle Valo } 1426