18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 28e99ea8dSJohannes Berg /* 3*1724fc78SEmmanuel Grumbach * Copyright (C) 2012-2014, 2018-2023 Intel Corporation 48e99ea8dSJohannes Berg * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 58e99ea8dSJohannes Berg * Copyright (C) 2016-2017 Intel Deutschland GmbH 68e99ea8dSJohannes Berg */ 7e705c121SKalle Valo #include <net/mac80211.h> 8854d773eSSara Sharon #include <linux/netdevice.h> 9a2ac0f48SLuca Coelho #include <linux/dmi.h> 10e705c121SKalle Valo 11e705c121SKalle Valo #include "iwl-trans.h" 12e705c121SKalle Valo #include "iwl-op-mode.h" 13d962f9b1SJohannes Berg #include "fw/img.h" 14e705c121SKalle Valo #include "iwl-debug.h" 15e705c121SKalle Valo #include "iwl-prph.h" 16813df5ceSLuca Coelho #include "fw/acpi.h" 17b3e4c0f3SLuca Coelho #include "fw/pnvm.h" 18e705c121SKalle Valo 19e705c121SKalle Valo #include "mvm.h" 207174beb6SJohannes Berg #include "fw/dbg.h" 21e705c121SKalle Valo #include "iwl-phy-db.h" 229c4f7d51SShaul Triebitz #include "iwl-modparams.h" 239c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 24cf85123aSAvraham Stern #include "time-sync.h" 25e705c121SKalle Valo 26b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT (HZ) 27e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) 28e705c121SKalle Valo 29c3f40c3eSMiri Korenblit #define IWL_TAS_US_MCC 0x5553 30c3f40c3eSMiri Korenblit #define IWL_TAS_CANADA_MCC 0x4341 31c3f40c3eSMiri Korenblit 32e705c121SKalle Valo struct iwl_mvm_alive_data { 33e705c121SKalle Valo bool valid; 34e705c121SKalle Valo u32 scd_base_addr; 35e705c121SKalle Valo }; 36e705c121SKalle Valo 37e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 38e705c121SKalle Valo { 39e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 40e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 41e705c121SKalle Valo }; 42e705c121SKalle Valo 43e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 44e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 45e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 46e705c121SKalle Valo } 47e705c121SKalle Valo 4843413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 4943413a97SSara Sharon { 5043413a97SSara Sharon int i; 5143413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 5243413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 53608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 54608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 55608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 56608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 57608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 58608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 5943413a97SSara Sharon }; 6043413a97SSara Sharon 61f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 62f43495fdSSara Sharon return 0; 63f43495fdSSara Sharon 64854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 6543413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 66854d773eSSara Sharon cmd.indirection_table[i] = 67854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 68854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 6943413a97SSara Sharon 7043413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 7143413a97SSara Sharon } 7243413a97SSara Sharon 7397d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 7497d5be7eSLiad Kaufman { 7597d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 7697d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 7797d5be7eSLiad Kaufman }; 78f0c86427SJohannes Berg u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); 7997d5be7eSLiad Kaufman int ret; 8097d5be7eSLiad Kaufman 8197d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 8297d5be7eSLiad Kaufman if (ret) 8397d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 8497d5be7eSLiad Kaufman else 8597d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 8697d5be7eSLiad Kaufman 8797d5be7eSLiad Kaufman return ret; 8897d5be7eSLiad Kaufman } 8997d5be7eSLiad Kaufman 90bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 91bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 92bdccdb85SGolan Ben-Ami { 93bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 94bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 95bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 96bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 97bdccdb85SGolan Ben-Ami int i; 98bdccdb85SGolan Ben-Ami 99bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 100bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 101bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 102bdccdb85SGolan Ben-Ami 103bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 104bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 105bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 106bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 107bdccdb85SGolan Ben-Ami n_words + i, 108bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 109bdccdb85SGolan Ben-Ami } 110bdccdb85SGolan Ben-Ami 111e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 112e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 113e705c121SKalle Valo { 114fd1c3318SJohannes Berg unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 115e705c121SKalle Valo struct iwl_mvm *mvm = 116e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 117e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 1185c228d63SSara Sharon struct iwl_umac_alive *umac; 1195c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 1205c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 1215c228d63SSara Sharon u16 status; 122cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table; 123708d8c53SJohannes Berg u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, 124708d8c53SJohannes Berg UCODE_ALIVE_NTFY, 0); 1255053a451SMukesh Sisodiya u32 i; 126b2f20cf2SMukesh Sisodiya 127e705c121SKalle Valo 128c0941aceSMukesh Sisodiya if (version == 6) { 129c0941aceSMukesh Sisodiya struct iwl_alive_ntf_v6 *palive; 130c0941aceSMukesh Sisodiya 131c0941aceSMukesh Sisodiya if (pkt_len < sizeof(*palive)) 132c0941aceSMukesh Sisodiya return false; 133c0941aceSMukesh Sisodiya 134c0941aceSMukesh Sisodiya palive = (void *)pkt->data; 135c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_enable = 136c0941aceSMukesh Sisodiya le32_to_cpu(palive->imr.enabled); 137c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size = 138c0941aceSMukesh Sisodiya le32_to_cpu(palive->imr.size); 139c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr2sram_remainbyte = 140c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size; 141c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_base_addr = 142c0941aceSMukesh Sisodiya palive->imr.base_addr; 143c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_curr_addr = 144c0941aceSMukesh Sisodiya le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); 145c0941aceSMukesh Sisodiya IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", 146c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_enable, 147c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size, 148c0941aceSMukesh Sisodiya le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); 1495053a451SMukesh Sisodiya 1505053a451SMukesh Sisodiya if (!mvm->trans->dbg.imr_data.imr_enable) { 1515053a451SMukesh Sisodiya for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { 1525053a451SMukesh Sisodiya struct iwl_ucode_tlv *reg_tlv; 1535053a451SMukesh Sisodiya struct iwl_fw_ini_region_tlv *reg; 1545053a451SMukesh Sisodiya 1555053a451SMukesh Sisodiya reg_tlv = mvm->trans->dbg.active_regions[i]; 1565053a451SMukesh Sisodiya if (!reg_tlv) 1575053a451SMukesh Sisodiya continue; 1585053a451SMukesh Sisodiya 1595053a451SMukesh Sisodiya reg = (void *)reg_tlv->data; 16090824f2fSLuca Coelho /* 1615053a451SMukesh Sisodiya * We have only one DRAM IMR region, so we 1625053a451SMukesh Sisodiya * can break as soon as we find the first 1635053a451SMukesh Sisodiya * one. 16490824f2fSLuca Coelho */ 1655053a451SMukesh Sisodiya if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { 1665053a451SMukesh Sisodiya mvm->trans->dbg.unsupported_region_msk |= BIT(i); 1675053a451SMukesh Sisodiya break; 1685053a451SMukesh Sisodiya } 1695053a451SMukesh Sisodiya } 1705053a451SMukesh Sisodiya } 171c0941aceSMukesh Sisodiya } 172c0941aceSMukesh Sisodiya 173c0941aceSMukesh Sisodiya if (version >= 5) { 17490824f2fSLuca Coelho struct iwl_alive_ntf_v5 *palive; 17590824f2fSLuca Coelho 176fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 177fd1c3318SJohannes Berg return false; 178fd1c3318SJohannes Berg 17990824f2fSLuca Coelho palive = (void *)pkt->data; 18090824f2fSLuca Coelho umac = &palive->umac_data; 18190824f2fSLuca Coelho lmac1 = &palive->lmac_data[0]; 18290824f2fSLuca Coelho lmac2 = &palive->lmac_data[1]; 18390824f2fSLuca Coelho status = le16_to_cpu(palive->status); 18490824f2fSLuca Coelho 18590824f2fSLuca Coelho mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]); 18690824f2fSLuca Coelho mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]); 18790824f2fSLuca Coelho mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]); 18890824f2fSLuca Coelho 18990824f2fSLuca Coelho IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n", 19090824f2fSLuca Coelho mvm->trans->sku_id[0], 19190824f2fSLuca Coelho mvm->trans->sku_id[1], 19290824f2fSLuca Coelho mvm->trans->sku_id[2]); 19390824f2fSLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) { 1949422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive; 1959422b978SLuca Coelho 196fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive)) 197fd1c3318SJohannes Berg return false; 198fd1c3318SJohannes Berg 199e705c121SKalle Valo palive = (void *)pkt->data; 2005c228d63SSara Sharon umac = &palive->umac_data; 2015c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 2025c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 2035c228d63SSara Sharon status = le16_to_cpu(palive->status); 2049422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == 2059422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) { 2069422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3; 2079422b978SLuca Coelho 208fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive3)) 209fd1c3318SJohannes Berg return false; 210fd1c3318SJohannes Berg 2115c228d63SSara Sharon palive3 = (void *)pkt->data; 2125c228d63SSara Sharon umac = &palive3->umac_data; 2135c228d63SSara Sharon lmac1 = &palive3->lmac_data; 2145c228d63SSara Sharon status = le16_to_cpu(palive3->status); 2159422b978SLuca Coelho } else { 2169422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n", 2179422b978SLuca Coelho iwl_rx_packet_payload_len(pkt)); 2189422b978SLuca Coelho /* get timeout later */ 2199422b978SLuca Coelho return false; 2205c228d63SSara Sharon } 221e705c121SKalle Valo 22222463857SShahar S Matityahu lmac_error_event_table = 22322463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 22422463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 225e705c121SKalle Valo 22622463857SShahar S Matityahu if (lmac2) 22791c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 22822463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 22922463857SShahar S Matityahu 2304f7411d6SRoee Goldfiner umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) & 2314f7411d6SRoee Goldfiner ~FW_ADDR_CACHE_CONTROL; 2325c228d63SSara Sharon 233cfa5d0caSMordechay Goodstein if (umac_error_table) { 234cfa5d0caSMordechay Goodstein if (umac_error_table >= 235834f920eSMukesh Sisodiya mvm->trans->cfg->min_umac_error_event_table) { 236cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans, 237cfa5d0caSMordechay Goodstein umac_error_table); 2383485e76eSLuca Coelho } else { 239fb5b2846SLuca Coelho IWL_ERR(mvm, 240fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 241cfa5d0caSMordechay Goodstein umac_error_table, 242fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 243fb5b2846SLuca Coelho "Init" : "RT"); 2443485e76eSLuca Coelho } 245cfa5d0caSMordechay Goodstein } 24622463857SShahar S Matityahu 24722463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2485c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 249e705c121SKalle Valo 250e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2515c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2525c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2535c228d63SSara Sharon 2545c228d63SSara Sharon if (lmac2) 2555c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 256e705c121SKalle Valo 257e705c121SKalle Valo IWL_DEBUG_FW(mvm, 258e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2595c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2605c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 261e705c121SKalle Valo 2620a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2630a3a3e9eSShahar S Matityahu 264e705c121SKalle Valo return true; 265e705c121SKalle Valo } 266e705c121SKalle Valo 2671f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2681f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2691f370650SSara Sharon { 2701f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2711f370650SSara Sharon 2721f370650SSara Sharon return true; 2731f370650SSara Sharon } 2741f370650SSara Sharon 275e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 276e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 277e705c121SKalle Valo { 278e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 279e705c121SKalle Valo 280e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 281e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 282e705c121SKalle Valo return true; 283e705c121SKalle Valo } 284e705c121SKalle Valo 285ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 286e705c121SKalle Valo 287e705c121SKalle Valo return false; 288e705c121SKalle Valo } 289e705c121SKalle Valo 290a7de31d5SMordechay Goodstein static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) 291a7de31d5SMordechay Goodstein { 292184f10dbSMordechay Goodstein #define IWL_FW_PRINT_REG_INFO(reg_name) \ 293184f10dbSMordechay Goodstein IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name)) 294184f10dbSMordechay Goodstein 295a7de31d5SMordechay Goodstein struct iwl_trans *trans = mvm->trans; 296a7de31d5SMordechay Goodstein enum iwl_device_family device_family = trans->trans_cfg->device_family; 297a7de31d5SMordechay Goodstein 298a7de31d5SMordechay Goodstein if (device_family < IWL_DEVICE_FAMILY_8000) 299a7de31d5SMordechay Goodstein return; 300a7de31d5SMordechay Goodstein 301a7de31d5SMordechay Goodstein if (device_family <= IWL_DEVICE_FAMILY_9000) 302184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION); 303a7de31d5SMordechay Goodstein else 304184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION); 305f2f17ca0SMordechay Goodstein 306184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE); 307f2f17ca0SMordechay Goodstein 308184f10dbSMordechay Goodstein /* print OPT info */ 309184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR); 310184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA); 311a7de31d5SMordechay Goodstein } 312a7de31d5SMordechay Goodstein 313e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 314e705c121SKalle Valo enum iwl_ucode_type ucode_type) 315e705c121SKalle Valo { 316e705c121SKalle Valo struct iwl_notification_wait alive_wait; 31794a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 318e705c121SKalle Valo const struct fw_img *fw; 319cfbc6c4cSSara Sharon int ret; 320702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 3219422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY }; 322b3500b47SEmmanuel Grumbach bool run_in_rfkill = 323b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 3245e31b3dfSMukesh Sisodiya u8 count; 3255e31b3dfSMukesh Sisodiya struct iwl_pc_data *pc_data; 326e705c121SKalle Valo 327e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 3283d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 3293d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 3303d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 331612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 332e705c121SKalle Valo else 333612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 334e705c121SKalle Valo if (WARN_ON(!fw)) 335e705c121SKalle Valo return -EINVAL; 336702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 33765b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 338e705c121SKalle Valo 339e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 340e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 341e705c121SKalle Valo iwl_alive_fn, &alive_data); 342e705c121SKalle Valo 343b3500b47SEmmanuel Grumbach /* 344b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 345b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 346b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 347b3500b47SEmmanuel Grumbach */ 348b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 349e705c121SKalle Valo if (ret) { 350702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 351e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 352e705c121SKalle Valo return ret; 353e705c121SKalle Valo } 354e705c121SKalle Valo 355e705c121SKalle Valo /* 356e705c121SKalle Valo * Some things may run in the background now, but we 357e705c121SKalle Valo * just wait for the ALIVE notification here. 358e705c121SKalle Valo */ 359e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 360e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 36156731878SDaniel Gabay 36256731878SDaniel Gabay if (mvm->trans->trans_cfg->device_family == 36356731878SDaniel Gabay IWL_DEVICE_FAMILY_AX210) { 36456731878SDaniel Gabay /* print these registers regardless of alive fail/success */ 36556731878SDaniel Gabay IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n", 36656731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION)); 36756731878SDaniel Gabay IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n", 36856731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION)); 36956731878SDaniel Gabay IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n", 37056731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG)); 371b8133439SAvraham Stern IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n", 372b8133439SAvraham Stern iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9)); 37356731878SDaniel Gabay } 37456731878SDaniel Gabay 375e705c121SKalle Valo if (ret) { 376d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 377d6be9c1dSSara Sharon 3785667ccc2SMordechay Goodstein /* SecBoot info */ 37920f5aef5SJohannes Berg if (trans->trans_cfg->device_family >= 38020f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) { 381e705c121SKalle Valo IWL_ERR(mvm, 382e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 383ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 384ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 385ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 3865667ccc2SMordechay Goodstein } else if (trans->trans_cfg->device_family >= 3875667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_8000) { 3885667ccc2SMordechay Goodstein IWL_ERR(mvm, 3895667ccc2SMordechay Goodstein "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 3905667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_1_STATUS), 3915667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_2_STATUS)); 3925667ccc2SMordechay Goodstein } 3935667ccc2SMordechay Goodstein 394a7de31d5SMordechay Goodstein iwl_mvm_print_pd_notification(mvm); 395a7de31d5SMordechay Goodstein 3965667ccc2SMordechay Goodstein /* LMAC/UMAC PC info */ 3975667ccc2SMordechay Goodstein if (trans->trans_cfg->device_family >= 3985e31b3dfSMukesh Sisodiya IWL_DEVICE_FAMILY_22000) { 3995e31b3dfSMukesh Sisodiya pc_data = trans->dbg.pc_data; 4005e31b3dfSMukesh Sisodiya for (count = 0; count < trans->dbg.num_pc; 4015e31b3dfSMukesh Sisodiya count++, pc_data++) 4025e31b3dfSMukesh Sisodiya IWL_ERR(mvm, "%s: 0x%x\n", 4035e31b3dfSMukesh Sisodiya pc_data->pc_name, 4045e31b3dfSMukesh Sisodiya pc_data->pc_address); 4055e31b3dfSMukesh Sisodiya } else if (trans->trans_cfg->device_family >= 4065667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_9000) { 40720f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n", 40820f5aef5SJohannes Berg iwl_read_umac_prph(trans, 40920f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC)); 41020f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n", 41120f5aef5SJohannes Berg iwl_read_umac_prph(trans, 41220f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC)); 41320f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm)) 41420f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n", 41520f5aef5SJohannes Berg iwl_read_umac_prph(trans, 41620f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC)); 41720f5aef5SJohannes Berg } 41820f5aef5SJohannes Berg 419b8133439SAvraham Stern if (ret == -ETIMEDOUT && !mvm->pldr_sync) 42020f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 42120f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT); 42220f5aef5SJohannes Berg 423702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 424e705c121SKalle Valo return ret; 425e705c121SKalle Valo } 426e705c121SKalle Valo 427e705c121SKalle Valo if (!alive_data.valid) { 428e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 429702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 430e705c121SKalle Valo return -EIO; 431e705c121SKalle Valo } 432e705c121SKalle Valo 433f31f7cd9SGregory Greenman /* if reached this point, Alive notification was received */ 434f31f7cd9SGregory Greenman iwl_mei_alive_notif(true); 435733eb54fSAvraham Stern 43633182810SAlon Giladi ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait, 43733182810SAlon Giladi &mvm->fw->ucode_capa); 43870d3ca86SLuca Coelho if (ret) { 43970d3ca86SLuca Coelho IWL_ERR(mvm, "Timeout waiting for PNVM load!\n"); 44070d3ca86SLuca Coelho iwl_fw_set_current_image(&mvm->fwrt, old_type); 44170d3ca86SLuca Coelho return ret; 44270d3ca86SLuca Coelho } 44370d3ca86SLuca Coelho 444e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 445e705c121SKalle Valo 446e705c121SKalle Valo /* 447e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 448e705c121SKalle Valo * initialization, but in firmware restart scenarios they 449e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 450e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 451e705c121SKalle Valo * reconfiguration completes. During normal startup, they 452e705c121SKalle Valo * will be empty. 453e705c121SKalle Valo */ 454e705c121SKalle Valo 455e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 4561c14089eSJohannes Berg /* 4571c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 4581c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 4591c14089eSJohannes Berg * we ever even consider the command queue as one we might 4601c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 4611c14089eSJohannes Berg */ 4621c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 4631c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 464e705c121SKalle Valo 46565b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 466f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 467f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 468f7805b33SLior Cohen #endif 469e705c121SKalle Valo 470d3d9b4fcSEmmanuel Grumbach /* 471d3d9b4fcSEmmanuel Grumbach * All the BSSes in the BSS table include the GP2 in the system 472d3d9b4fcSEmmanuel Grumbach * at the beacon Rx time, this is of course no longer relevant 473d3d9b4fcSEmmanuel Grumbach * since we are resetting the firmware. 474d3d9b4fcSEmmanuel Grumbach * Purge all the BSS table. 475d3d9b4fcSEmmanuel Grumbach */ 476d3d9b4fcSEmmanuel Grumbach cfg80211_bss_flush(mvm->hw->wiphy); 477d3d9b4fcSEmmanuel Grumbach 478e705c121SKalle Valo return 0; 479e705c121SKalle Valo } 480e705c121SKalle Valo 481c4ace426SGil Adam #ifdef CONFIG_ACPI 482c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 483c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 484c4ace426SGil Adam { 485c4ace426SGil Adam /* 486c4ace426SGil Adam * TODO: read specific phy config from BIOS 487c4ace426SGil Adam * ACPI table for this feature has not been defined yet, 488c4ace426SGil Adam * so for now we use hardcoded values. 489c4ace426SGil Adam */ 490c4ace426SGil Adam 491c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_A) { 492c4ace426SGil Adam phy_filters->filter_cfg_chain_a = 493c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A); 494c4ace426SGil Adam } 495c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_B) { 496c4ace426SGil Adam phy_filters->filter_cfg_chain_b = 497c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B); 498c4ace426SGil Adam } 499c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_C) { 500c4ace426SGil Adam phy_filters->filter_cfg_chain_c = 501c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C); 502c4ace426SGil Adam } 503c4ace426SGil Adam if (IWL_MVM_PHY_FILTER_CHAIN_D) { 504c4ace426SGil Adam phy_filters->filter_cfg_chain_d = 505c4ace426SGil Adam cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D); 506c4ace426SGil Adam } 507c4ace426SGil Adam } 508c4ace426SGil Adam #else /* CONFIG_ACPI */ 509c4ace426SGil Adam 510c4ace426SGil Adam static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm, 511c4ace426SGil Adam struct iwl_phy_specific_cfg *phy_filters) 512c4ace426SGil Adam { 513c4ace426SGil Adam } 514c4ace426SGil Adam #endif /* CONFIG_ACPI */ 515c4ace426SGil Adam 516c593d2faSAyala Barazani #if defined(CONFIG_ACPI) && defined(CONFIG_EFI) 517c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 518c593d2faSAyala Barazani { 519c593d2faSAyala Barazani u8 cmd_ver; 520c593d2faSAyala Barazani int ret; 521c593d2faSAyala Barazani struct iwl_host_cmd cmd = { 522c593d2faSAyala Barazani .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, 523c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD), 524c593d2faSAyala Barazani .flags = 0, 525c593d2faSAyala Barazani .data[0] = &mvm->fwrt.sgom_table, 526c593d2faSAyala Barazani .len[0] = sizeof(mvm->fwrt.sgom_table), 527c593d2faSAyala Barazani .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 528c593d2faSAyala Barazani }; 529c593d2faSAyala Barazani 530c593d2faSAyala Barazani if (!mvm->fwrt.sgom_enabled) { 531c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n"); 532c593d2faSAyala Barazani return 0; 533c593d2faSAyala Barazani } 534c593d2faSAyala Barazani 535971cbe50SJohannes Berg cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 536c593d2faSAyala Barazani IWL_FW_CMD_VER_UNKNOWN); 537c593d2faSAyala Barazani 538c593d2faSAyala Barazani if (cmd_ver != 2) { 539c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n", 540c593d2faSAyala Barazani cmd_ver); 541c593d2faSAyala Barazani return 0; 542c593d2faSAyala Barazani } 543c593d2faSAyala Barazani 544c593d2faSAyala Barazani ret = iwl_mvm_send_cmd(mvm, &cmd); 545c593d2faSAyala Barazani if (ret < 0) 546c593d2faSAyala Barazani IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret); 547c593d2faSAyala Barazani 548c593d2faSAyala Barazani return ret; 549c593d2faSAyala Barazani } 550c593d2faSAyala Barazani #else 551c593d2faSAyala Barazani 552c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) 553c593d2faSAyala Barazani { 554c593d2faSAyala Barazani return 0; 555c593d2faSAyala Barazani } 556c593d2faSAyala Barazani #endif 557c593d2faSAyala Barazani 558e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 559e705c121SKalle Valo { 560971cbe50SJohannes Berg u32 cmd_id = PHY_CONFIGURATION_CMD; 561c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; 562702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 563c4ace426SGil Adam struct iwl_phy_specific_cfg phy_filters = {}; 564c4ace426SGil Adam u8 cmd_ver; 565c4ace426SGil Adam size_t cmd_size; 566e705c121SKalle Valo 567bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) && 568d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity) 569bb99ff9bSLuca Coelho return 0; 570d923b020SLuca Coelho 571d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) { 572bb99ff9bSLuca Coelho /* 573bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC 574bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS. 575bb99ff9bSLuca Coelho */ 576bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg = 577bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED); 578bb99ff9bSLuca Coelho } 579bb99ff9bSLuca Coelho 580e705c121SKalle Valo /* Set parameters */ 581e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 58286a2b204SLuca Coelho 58386a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 5847897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |= 5857897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags); 58686a2b204SLuca Coelho 587e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 588e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 589e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 590e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 591e705c121SKalle Valo 592971cbe50SJohannes Berg cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 593e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 594c4ace426SGil Adam if (cmd_ver == 3) { 595c4ace426SGil Adam iwl_mvm_phy_filter_init(mvm, &phy_filters); 596c4ace426SGil Adam memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters, 597c4ace426SGil Adam sizeof(struct iwl_phy_specific_cfg)); 598c4ace426SGil Adam } 599c4ace426SGil Adam 600e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 601e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 602c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : 603c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1); 604971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); 605e705c121SKalle Valo } 606e705c121SKalle Valo 607e305a408SMukesh Sisodiya static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm) 608e305a408SMukesh Sisodiya { 609e305a408SMukesh Sisodiya struct iwl_notification_wait init_wait; 610e305a408SMukesh Sisodiya struct iwl_nvm_access_complete_cmd nvm_complete = {}; 611e305a408SMukesh Sisodiya struct iwl_init_extended_cfg_cmd init_cfg = { 612e305a408SMukesh Sisodiya .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 613e305a408SMukesh Sisodiya }; 614e305a408SMukesh Sisodiya static const u16 init_complete[] = { 615e305a408SMukesh Sisodiya INIT_COMPLETE_NOTIF, 616e305a408SMukesh Sisodiya }; 617e305a408SMukesh Sisodiya int ret; 618e305a408SMukesh Sisodiya 619e305a408SMukesh Sisodiya if (mvm->trans->cfg->tx_with_siso_diversity) 620e305a408SMukesh Sisodiya init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); 621e305a408SMukesh Sisodiya 622e305a408SMukesh Sisodiya lockdep_assert_held(&mvm->mutex); 623e305a408SMukesh Sisodiya 624e305a408SMukesh Sisodiya mvm->rfkill_safe_init_done = false; 625e305a408SMukesh Sisodiya 626e305a408SMukesh Sisodiya iwl_init_notification_wait(&mvm->notif_wait, 627e305a408SMukesh Sisodiya &init_wait, 628e305a408SMukesh Sisodiya init_complete, 629e305a408SMukesh Sisodiya ARRAY_SIZE(init_complete), 630e305a408SMukesh Sisodiya iwl_wait_init_complete, 631e305a408SMukesh Sisodiya NULL); 632e305a408SMukesh Sisodiya 633e305a408SMukesh Sisodiya iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 634e305a408SMukesh Sisodiya 635e305a408SMukesh Sisodiya /* Will also start the device */ 636e305a408SMukesh Sisodiya ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 637e305a408SMukesh Sisodiya if (ret) { 638e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 639e305a408SMukesh Sisodiya goto error; 640e305a408SMukesh Sisodiya } 641e305a408SMukesh Sisodiya iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 642e305a408SMukesh Sisodiya NULL); 643e305a408SMukesh Sisodiya 644e305a408SMukesh Sisodiya /* Send init config command to mark that we are sending NVM access 645e305a408SMukesh Sisodiya * commands 646e305a408SMukesh Sisodiya */ 647e305a408SMukesh Sisodiya ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 648e305a408SMukesh Sisodiya INIT_EXTENDED_CFG_CMD), 649e305a408SMukesh Sisodiya CMD_SEND_IN_RFKILL, 650e305a408SMukesh Sisodiya sizeof(init_cfg), &init_cfg); 651e305a408SMukesh Sisodiya if (ret) { 652e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to run init config command: %d\n", 653e305a408SMukesh Sisodiya ret); 654e305a408SMukesh Sisodiya goto error; 655e305a408SMukesh Sisodiya } 656e305a408SMukesh Sisodiya 657e305a408SMukesh Sisodiya /* Load NVM to NIC if needed */ 658e305a408SMukesh Sisodiya if (mvm->nvm_file_name) { 659e305a408SMukesh Sisodiya ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 660e305a408SMukesh Sisodiya mvm->nvm_sections); 661e305a408SMukesh Sisodiya if (ret) 662e305a408SMukesh Sisodiya goto error; 663e305a408SMukesh Sisodiya ret = iwl_mvm_load_nvm_to_nic(mvm); 664e305a408SMukesh Sisodiya if (ret) 665e305a408SMukesh Sisodiya goto error; 666e305a408SMukesh Sisodiya } 667e305a408SMukesh Sisodiya 668e305a408SMukesh Sisodiya if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 669e305a408SMukesh Sisodiya ret = iwl_nvm_init(mvm); 670e305a408SMukesh Sisodiya if (ret) { 671e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 672e305a408SMukesh Sisodiya goto error; 673e305a408SMukesh Sisodiya } 674e305a408SMukesh Sisodiya } 675e305a408SMukesh Sisodiya 676e305a408SMukesh Sisodiya ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 677e305a408SMukesh Sisodiya NVM_ACCESS_COMPLETE), 678e305a408SMukesh Sisodiya CMD_SEND_IN_RFKILL, 679e305a408SMukesh Sisodiya sizeof(nvm_complete), &nvm_complete); 680e305a408SMukesh Sisodiya if (ret) { 681e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 682e305a408SMukesh Sisodiya ret); 683e305a408SMukesh Sisodiya goto error; 684e305a408SMukesh Sisodiya } 685e305a408SMukesh Sisodiya 686d2ccc5c1SMukesh Sisodiya ret = iwl_send_phy_cfg_cmd(mvm); 687d2ccc5c1SMukesh Sisodiya if (ret) { 688d2ccc5c1SMukesh Sisodiya IWL_ERR(mvm, "Failed to run PHY configuration: %d\n", 689d2ccc5c1SMukesh Sisodiya ret); 690d2ccc5c1SMukesh Sisodiya goto error; 691d2ccc5c1SMukesh Sisodiya } 692d2ccc5c1SMukesh Sisodiya 693e305a408SMukesh Sisodiya /* We wait for the INIT complete notification */ 694e305a408SMukesh Sisodiya ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 695e305a408SMukesh Sisodiya MVM_UCODE_ALIVE_TIMEOUT); 696e305a408SMukesh Sisodiya if (ret) 697e305a408SMukesh Sisodiya return ret; 698e305a408SMukesh Sisodiya 699e305a408SMukesh Sisodiya /* Read the NVM only at driver load time, no need to do this twice */ 700e305a408SMukesh Sisodiya if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) { 701e305a408SMukesh Sisodiya mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 702e305a408SMukesh Sisodiya if (IS_ERR(mvm->nvm_data)) { 703e305a408SMukesh Sisodiya ret = PTR_ERR(mvm->nvm_data); 704e305a408SMukesh Sisodiya mvm->nvm_data = NULL; 705e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 706e305a408SMukesh Sisodiya return ret; 707e305a408SMukesh Sisodiya } 708e305a408SMukesh Sisodiya } 709e305a408SMukesh Sisodiya 710e305a408SMukesh Sisodiya mvm->rfkill_safe_init_done = true; 711e305a408SMukesh Sisodiya 712e305a408SMukesh Sisodiya return 0; 713e305a408SMukesh Sisodiya 714e305a408SMukesh Sisodiya error: 715e305a408SMukesh Sisodiya iwl_remove_notification(&mvm->notif_wait, &init_wait); 716e305a408SMukesh Sisodiya return ret; 717e305a408SMukesh Sisodiya } 718e305a408SMukesh Sisodiya 7193b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) 720e705c121SKalle Valo { 721e705c121SKalle Valo struct iwl_notification_wait calib_wait; 722e705c121SKalle Valo static const u16 init_complete[] = { 723e705c121SKalle Valo INIT_COMPLETE_NOTIF, 724e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 725e705c121SKalle Valo }; 726e705c121SKalle Valo int ret; 727e705c121SKalle Valo 7287d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 72952b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 7308c5f47b1SJohannes Berg 731e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 732e705c121SKalle Valo 73394022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 734e705c121SKalle Valo 735e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 736e705c121SKalle Valo &calib_wait, 737e705c121SKalle Valo init_complete, 738e705c121SKalle Valo ARRAY_SIZE(init_complete), 739e705c121SKalle Valo iwl_wait_phy_db_entry, 740e705c121SKalle Valo mvm->phy_db); 741e705c121SKalle Valo 74211f8c533SLuca Coelho iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL); 74311f8c533SLuca Coelho 744e705c121SKalle Valo /* Will also start the device */ 745e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 746e705c121SKalle Valo if (ret) { 747e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 74800e0c6c8SLuca Coelho goto remove_notif; 749e705c121SKalle Valo } 750e705c121SKalle Valo 7517d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) { 752b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 753e705c121SKalle Valo if (ret) 75400e0c6c8SLuca Coelho goto remove_notif; 755b3de3ef4SEmmanuel Grumbach } 756e705c121SKalle Valo 757e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 7583b25f1afSEmmanuel Grumbach if (!mvm->nvm_data) { 7595bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 760e705c121SKalle Valo if (ret) { 761e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 76200e0c6c8SLuca Coelho goto remove_notif; 763e705c121SKalle Valo } 764e705c121SKalle Valo } 765e705c121SKalle Valo 766e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 7679ce505feSAbhishek Naik if (mvm->nvm_file_name) { 7689ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm); 7699ce505feSAbhishek Naik if (ret) 7709ce505feSAbhishek Naik goto remove_notif; 7719ce505feSAbhishek Naik } 772e705c121SKalle Valo 77364866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 77464866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 77564866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 776e705c121SKalle Valo 777e705c121SKalle Valo /* 778e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 779e705c121SKalle Valo * the init seq later when RF kill will switch to off 780e705c121SKalle Valo */ 781e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 782e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 783e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 78400e0c6c8SLuca Coelho goto remove_notif; 785e705c121SKalle Valo } 786e705c121SKalle Valo 787b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 788e705c121SKalle Valo 789e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 790e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 791e705c121SKalle Valo if (ret) 79200e0c6c8SLuca Coelho goto remove_notif; 793e705c121SKalle Valo 794e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 795e705c121SKalle Valo if (ret) { 796e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 797e705c121SKalle Valo ret); 79800e0c6c8SLuca Coelho goto remove_notif; 799e705c121SKalle Valo } 800e705c121SKalle Valo 801e705c121SKalle Valo /* 802e705c121SKalle Valo * Some things may run in the background now, but we 803e705c121SKalle Valo * just wait for the calibration complete notification. 804e705c121SKalle Valo */ 805e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 806e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 80700e0c6c8SLuca Coelho if (!ret) 808e705c121SKalle Valo goto out; 809e705c121SKalle Valo 81000e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 81100e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 81200e0c6c8SLuca Coelho ret = 0; 81300e0c6c8SLuca Coelho } else { 81400e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 81500e0c6c8SLuca Coelho ret); 81600e0c6c8SLuca Coelho } 81700e0c6c8SLuca Coelho 81800e0c6c8SLuca Coelho goto out; 81900e0c6c8SLuca Coelho 82000e0c6c8SLuca Coelho remove_notif: 821e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 822e705c121SKalle Valo out: 823b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 824e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 825e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 826e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 827e705c121SKalle Valo sizeof(struct ieee80211_channel) + 828e705c121SKalle Valo sizeof(struct ieee80211_rate), 829e705c121SKalle Valo GFP_KERNEL); 830e705c121SKalle Valo if (!mvm->nvm_data) 831e705c121SKalle Valo return -ENOMEM; 832e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 833e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 834e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 835e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 8363827cb59SJohannes Berg (void *)((u8 *)mvm->nvm_data->channels + 1); 837e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 838e705c121SKalle Valo } 839e705c121SKalle Valo 840e705c121SKalle Valo return ret; 841e705c121SKalle Valo } 842e705c121SKalle Valo 843e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 844e705c121SKalle Valo { 845e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 846e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 847e705c121SKalle Valo }; 848e705c121SKalle Valo 849e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 850e705c121SKalle Valo return 0; 851e705c121SKalle Valo 852e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 853e705c121SKalle Valo sizeof(cmd), &cmd); 854e705c121SKalle Valo } 855e705c121SKalle Valo 856c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 85742ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 858da2830acSLuca Coelho { 859971cbe50SJohannes Berg u32 cmd_id = REDUCE_TX_POWER_CMD; 860216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = { 861216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), 86271e9378bSLuca Coelho }; 8639c08cef8SLuca Coelho __le16 *per_chain; 8641edd56e6SLuca Coelho int ret; 86539c1a972SIhab Zhaika u16 len = 0; 866fbb7957dSLuca Coelho u32 n_subbands; 867971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 868e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 869b0aa02b3SAyala Barazani if (cmd_ver == 7) { 870b0aa02b3SAyala Barazani len = sizeof(cmd.v7); 871b0aa02b3SAyala Barazani n_subbands = IWL_NUM_SUB_BANDS_V2; 872b0aa02b3SAyala Barazani per_chain = cmd.v7.per_chain[0][0]; 873b0aa02b3SAyala Barazani cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); 874b0aa02b3SAyala Barazani } else if (cmd_ver == 6) { 875fbb7957dSLuca Coelho len = sizeof(cmd.v6); 876fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2; 877fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0]; 878fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa, 8799c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) { 8800791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 881e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 8829c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0]; 8839c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa, 8849c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) { 885216cdfb5SLuca Coelho len = sizeof(cmd.v4); 886e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 8879c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0]; 8889c08cef8SLuca Coelho } else { 889216cdfb5SLuca Coelho len = sizeof(cmd.v3); 890e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1; 8919c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0]; 8929c08cef8SLuca Coelho } 89355bfa4b9SLuca Coelho 894216cdfb5SLuca Coelho /* all structs have the same common part, add it */ 895216cdfb5SLuca Coelho len += sizeof(cmd.common); 89642ce76d6SLuca Coelho 897dac7171cSLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain, 898dac7171cSLuca Coelho IWL_NUM_CHAIN_TABLES, 899fbb7957dSLuca Coelho n_subbands, prof_a, prof_b); 9001edd56e6SLuca Coelho 9011edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */ 9021edd56e6SLuca Coelho if (ret) 9031edd56e6SLuca Coelho return ret; 9041edd56e6SLuca Coelho 9056d19a5ebSEmmanuel Grumbach iwl_mei_set_power_limit(per_chain); 9066d19a5ebSEmmanuel Grumbach 90742ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 908971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 90942ce76d6SLuca Coelho } 91042ce76d6SLuca Coelho 9117fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 9127fe90e0eSHaim Dreyfuss { 913dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd; 914f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp; 9150c3d7282SHaim Dreyfuss u16 len; 91639c1a972SIhab Zhaika int ret; 917c8611331SJohannes Berg struct iwl_host_cmd cmd = { 918c8611331SJohannes Berg .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), 919c8611331SJohannes Berg .flags = CMD_WANT_SKB, 920c8611331SJohannes Berg .data = { &geo_tx_cmd }, 921c8611331SJohannes Berg }; 922971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, 923e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 9247fe90e0eSHaim Dreyfuss 925dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */ 926dd2a1256SLuca Coelho geo_tx_cmd.v1.ops = 927dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 928dd2a1256SLuca Coelho 92997f8a3d1SAyala Barazani if (cmd_ver == 5) 93097f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v5); 93197f8a3d1SAyala Barazani else if (cmd_ver == 4) 93297f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v4); 93397f8a3d1SAyala Barazani else if (cmd_ver == 3) 9340ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3); 9350ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 936dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 937dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2); 938dd2a1256SLuca Coelho else 939dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1); 9400c3d7282SHaim Dreyfuss 94139c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt)) 94239c1a972SIhab Zhaika return -EOPNOTSUPP; 94339c1a972SIhab Zhaika 944c8611331SJohannes Berg cmd.len[0] = len; 9457fe90e0eSHaim Dreyfuss 9467fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 9477fe90e0eSHaim Dreyfuss if (ret) { 9487fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 9497fe90e0eSHaim Dreyfuss return ret; 9507fe90e0eSHaim Dreyfuss } 951f604324eSLuca Coelho 952f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data; 953f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx); 954f604324eSLuca Coelho 95597f8a3d1SAyala Barazani if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3)) 956f604324eSLuca Coelho ret = -EIO; 957f604324eSLuca Coelho 9587fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 9597fe90e0eSHaim Dreyfuss return ret; 9607fe90e0eSHaim Dreyfuss } 9617fe90e0eSHaim Dreyfuss 962a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 963a6bff3cbSHaim Dreyfuss { 964971cbe50SJohannes Berg u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); 965dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd; 96639c1a972SIhab Zhaika u16 len; 96745acebf8SNaftali Goldstein u32 n_bands; 96897f8a3d1SAyala Barazani u32 n_profiles; 969ac9952f6SLuca Coelho u32 sk = 0; 9700433ae55SGolan Ben Ami int ret; 971971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 972e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN); 973a6bff3cbSHaim Dreyfuss 97445acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != 97545acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) || 97645acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) != 97797f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) || 97897f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) != 97997f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) || 98097f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) != 98197f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops)); 98297f8a3d1SAyala Barazani 98345acebf8SNaftali Goldstein /* the ops field is at the same spot for all versions, so set in v1 */ 98445acebf8SNaftali Goldstein cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES); 98545acebf8SNaftali Goldstein 98697f8a3d1SAyala Barazani if (cmd_ver == 5) { 98797f8a3d1SAyala Barazani len = sizeof(cmd.v5); 98897f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v5.table[0]); 98997f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 99097f8a3d1SAyala Barazani } else if (cmd_ver == 4) { 99197f8a3d1SAyala Barazani len = sizeof(cmd.v4); 99297f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v4.table[0]); 99397f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3; 99497f8a3d1SAyala Barazani } else if (cmd_ver == 3) { 99545acebf8SNaftali Goldstein len = sizeof(cmd.v3); 99645acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v3.table[0]); 99797f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 99845acebf8SNaftali Goldstein } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 99945acebf8SNaftali Goldstein IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 100045acebf8SNaftali Goldstein len = sizeof(cmd.v2); 100145acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v2.table[0]); 100297f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 100345acebf8SNaftali Goldstein } else { 100445acebf8SNaftali Goldstein len = sizeof(cmd.v1); 100545acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v1.table[0]); 100697f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES; 100745acebf8SNaftali Goldstein } 100845acebf8SNaftali Goldstein 100945acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) != 101045acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) || 101145acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) != 101297f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) || 101397f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) != 101497f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) || 101597f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) != 101697f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table)); 101745acebf8SNaftali Goldstein /* the table is at the same position for all versions, so set use v1 */ 101897f8a3d1SAyala Barazani ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0], 101997f8a3d1SAyala Barazani n_bands, n_profiles); 1020eca1e56cSEmmanuel Grumbach 10210433ae55SGolan Ben Ami /* 10220433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table, 10230433ae55SGolan Ben Ami * but in that case there is no need to send the command. 10240433ae55SGolan Ben Ami */ 10250433ae55SGolan Ben Ami if (ret) 10260433ae55SGolan Ben Ami return 0; 1027a6bff3cbSHaim Dreyfuss 1028ac9952f6SLuca Coelho /* Only set to South Korea if the table revision is 1 */ 1029ac9952f6SLuca Coelho if (mvm->fwrt.geo_rev == 1) 1030ac9952f6SLuca Coelho sk = 1; 1031ac9952f6SLuca Coelho 103228db1862SLuca Coelho /* 1033ac9952f6SLuca Coelho * Set the table_revision to South Korea (1) or not (0). The 1034ac9952f6SLuca Coelho * element name is misleading, as it doesn't contain the table 1035ac9952f6SLuca Coelho * revision number, but whether the South Korea variation 1036ac9952f6SLuca Coelho * should be used. 103728db1862SLuca Coelho * This must be done after calling iwl_sar_geo_init(). 103828db1862SLuca Coelho */ 103997f8a3d1SAyala Barazani if (cmd_ver == 5) 1040ac9952f6SLuca Coelho cmd.v5.table_revision = cpu_to_le32(sk); 104197f8a3d1SAyala Barazani else if (cmd_ver == 4) 1042ac9952f6SLuca Coelho cmd.v4.table_revision = cpu_to_le32(sk); 104397f8a3d1SAyala Barazani else if (cmd_ver == 3) 1044ac9952f6SLuca Coelho cmd.v3.table_revision = cpu_to_le32(sk); 104528db1862SLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, 104628db1862SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER)) 1047ac9952f6SLuca Coelho cmd.v2.table_revision = cpu_to_le32(sk); 104828db1862SLuca Coelho 1049971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); 10506ce1e5c0SGil Adam } 10516ce1e5c0SGil Adam 10526ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 10536ce1e5c0SGil Adam { 10548bdc52b9SMiri Korenblit union iwl_ppag_table_cmd cmd; 1055e8e10a37SMatt Chen int ret, cmd_size; 10566ce1e5c0SGil Adam 1057e8e10a37SMatt Chen ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); 1058b20bdd9cSMiri Korenblit /* Not supporting PPAG table is a valid scenario */ 1059e8e10a37SMatt Chen if (ret < 0) 1060b20bdd9cSMiri Korenblit return 0; 1061160bab43SGil Adam 1062f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 10636ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 10646ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 10658bdc52b9SMiri Korenblit 0, cmd_size, &cmd); 10666ce1e5c0SGil Adam if (ret < 0) 10676ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 10686ce1e5c0SGil Adam ret); 10696ce1e5c0SGil Adam 10706ce1e5c0SGil Adam return ret; 10716ce1e5c0SGil Adam } 10726ce1e5c0SGil Adam 10736ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 10746ce1e5c0SGil Adam { 107578a19d52SMiri Korenblit /* no need to read the table, done in INIT stage */ 1076e8e10a37SMatt Chen if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) 1077a2ac0f48SLuca Coelho return 0; 1078a2ac0f48SLuca Coelho 10796ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 10806ce1e5c0SGil Adam } 10816ce1e5c0SGil Adam 10822856f623SAyala Barazani static const struct dmi_system_id dmi_tas_approved_list[] = { 10832856f623SAyala Barazani { .ident = "HP", 10842856f623SAyala Barazani .matches = { 10852856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "HP"), 10862856f623SAyala Barazani }, 10872856f623SAyala Barazani }, 10882856f623SAyala Barazani { .ident = "SAMSUNG", 10892856f623SAyala Barazani .matches = { 10902856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), 10912856f623SAyala Barazani }, 10922856f623SAyala Barazani }, 10932856f623SAyala Barazani { .ident = "LENOVO", 10942856f623SAyala Barazani .matches = { 1095d0246a0eSAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 10962856f623SAyala Barazani }, 10972856f623SAyala Barazani }, 10982856f623SAyala Barazani { .ident = "DELL", 10992856f623SAyala Barazani .matches = { 11002856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 11012856f623SAyala Barazani }, 11022856f623SAyala Barazani }, 11033ecf3411SAlon Giladi { .ident = "MSFT", 11043ecf3411SAlon Giladi .matches = { 11053ecf3411SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), 11063ecf3411SAlon Giladi }, 11073ecf3411SAlon Giladi }, 110806471b67SAlon Giladi { .ident = "Acer", 110906471b67SAlon Giladi .matches = { 111006471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 111106471b67SAlon Giladi }, 111206471b67SAlon Giladi }, 111306471b67SAlon Giladi { .ident = "ASUS", 111406471b67SAlon Giladi .matches = { 111506471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 111606471b67SAlon Giladi }, 111706471b67SAlon Giladi }, 111806471b67SAlon Giladi { .ident = "MSI", 111906471b67SAlon Giladi .matches = { 112006471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."), 112106471b67SAlon Giladi }, 112206471b67SAlon Giladi }, 112306471b67SAlon Giladi { .ident = "Honor", 112406471b67SAlon Giladi .matches = { 112506471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 112606471b67SAlon Giladi }, 112706471b67SAlon Giladi }, 11282856f623SAyala Barazani /* keep last */ 11292856f623SAyala Barazani {} 11302856f623SAyala Barazani }; 11312856f623SAyala Barazani 11329457077dSAbhishek Naik bool iwl_mvm_is_vendor_in_approved_list(void) 11339457077dSAbhishek Naik { 11349457077dSAbhishek Naik return dmi_check_system(dmi_tas_approved_list); 11359457077dSAbhishek Naik } 11369457077dSAbhishek Naik 1137c3f40c3eSMiri Korenblit static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc) 1138c3f40c3eSMiri Korenblit { 1139c3f40c3eSMiri Korenblit int i; 1140c3f40c3eSMiri Korenblit u32 size = le32_to_cpu(*le_size); 1141c3f40c3eSMiri Korenblit 1142c3f40c3eSMiri Korenblit /* Verify that there is room for another country */ 1143c3f40c3eSMiri Korenblit if (size >= IWL_TAS_BLOCK_LIST_MAX) 1144c3f40c3eSMiri Korenblit return false; 1145c3f40c3eSMiri Korenblit 1146c3f40c3eSMiri Korenblit for (i = 0; i < size; i++) { 1147c3f40c3eSMiri Korenblit if (list[i] == cpu_to_le32(mcc)) 1148c3f40c3eSMiri Korenblit return true; 1149c3f40c3eSMiri Korenblit } 1150c3f40c3eSMiri Korenblit 1151c3f40c3eSMiri Korenblit list[size++] = cpu_to_le32(mcc); 1152c3f40c3eSMiri Korenblit *le_size = cpu_to_le32(size); 1153c3f40c3eSMiri Korenblit return true; 1154c3f40c3eSMiri Korenblit } 1155c3f40c3eSMiri Korenblit 115628dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 115728dd7ccdSMordechay Goodstein { 1158971cbe50SJohannes Berg u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); 115928dd7ccdSMordechay Goodstein int ret; 11606da7ba3aSAyala Barazani union iwl_tas_config_cmd cmd = {}; 11616da7ba3aSAyala Barazani int cmd_size, fw_ver; 116228dd7ccdSMordechay Goodstein 11636da7ba3aSAyala Barazani BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < 116428dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX); 116528dd7ccdSMordechay Goodstein 116628dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { 116728dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n"); 116828dd7ccdSMordechay Goodstein return; 116928dd7ccdSMordechay Goodstein } 117028dd7ccdSMordechay Goodstein 1171971cbe50SJohannes Berg fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1172971cbe50SJohannes Berg IWL_FW_CMD_VER_UNKNOWN); 11736da7ba3aSAyala Barazani 11746da7ba3aSAyala Barazani ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); 117528dd7ccdSMordechay Goodstein if (ret < 0) { 117628dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, 117728dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n", 117828dd7ccdSMordechay Goodstein ret); 117928dd7ccdSMordechay Goodstein return; 118028dd7ccdSMordechay Goodstein } 118128dd7ccdSMordechay Goodstein 11827c530588SMiri Korenblit if (ret == 0) 118328dd7ccdSMordechay Goodstein return; 118428dd7ccdSMordechay Goodstein 1185c3f40c3eSMiri Korenblit if (!dmi_check_system(dmi_tas_approved_list)) { 1186c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1187c3f40c3eSMiri Korenblit "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", 1188c3f40c3eSMiri Korenblit dmi_get_system_info(DMI_SYS_VENDOR)); 11896da7ba3aSAyala Barazani if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 11906da7ba3aSAyala Barazani &cmd.v4.block_list_size, 11916da7ba3aSAyala Barazani IWL_TAS_US_MCC)) || 11926da7ba3aSAyala Barazani (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, 11936da7ba3aSAyala Barazani &cmd.v4.block_list_size, 11946da7ba3aSAyala Barazani IWL_TAS_CANADA_MCC))) { 1195c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm, 1196c3f40c3eSMiri Korenblit "Unable to add US/Canada to TAS block list, disabling TAS\n"); 1197c3f40c3eSMiri Korenblit return; 1198c3f40c3eSMiri Korenblit } 119906471b67SAlon Giladi } else { 120006471b67SAlon Giladi IWL_DEBUG_RADIO(mvm, 120106471b67SAlon Giladi "System vendor '%s' is in the approved list.\n", 120206471b67SAlon Giladi dmi_get_system_info(DMI_SYS_VENDOR)); 1203c3f40c3eSMiri Korenblit } 1204c3f40c3eSMiri Korenblit 12056da7ba3aSAyala Barazani /* v4 is the same size as v3, so no need to differentiate here */ 12066da7ba3aSAyala Barazani cmd_size = fw_ver < 3 ? 12077c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v2) : 12087c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v3); 120928dd7ccdSMordechay Goodstein 1210971cbe50SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); 121128dd7ccdSMordechay Goodstein if (ret < 0) 121228dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); 121328dd7ccdSMordechay Goodstein } 1214f5b1cb2eSGil Adam 12154e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 12164e8fe214SGregory Greenman { 12174e8fe214SGregory Greenman u8 value; 121845fe1b6bSLuca Coelho int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE, 12194e8fe214SGregory Greenman &iwl_rfi_guid, &value); 12204e8fe214SGregory Greenman 12214e8fe214SGregory Greenman if (ret < 0) { 12224e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret); 12234e8fe214SGregory Greenman 12244e8fe214SGregory Greenman } else if (value >= DSM_VALUE_RFI_MAX) { 12254e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n", 12264e8fe214SGregory Greenman value); 12274e8fe214SGregory Greenman 12284e8fe214SGregory Greenman } else if (value == DSM_VALUE_RFI_ENABLE) { 12294e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n"); 12304e8fe214SGregory Greenman return DSM_VALUE_RFI_ENABLE; 12314e8fe214SGregory Greenman } 12324e8fe214SGregory Greenman 12334e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n"); 12344e8fe214SGregory Greenman 12354e8fe214SGregory Greenman /* default behaviour is disabled */ 12364e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 12374e8fe214SGregory Greenman } 12384e8fe214SGregory Greenman 1239f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1240f5b1cb2eSGil Adam { 12417119f02bSMiri Korenblit int ret; 12427119f02bSMiri Korenblit u32 value; 12438f323d06SAyala Barazani struct iwl_lari_config_change_cmd_v6 cmd = {}; 1244f5b1cb2eSGil Adam 1245f21afabaSHarish Mitty cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); 1246d2bfda8aSMiri Korenblit 124745fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT, 12487119f02bSMiri Korenblit &iwl_guid, &value); 12497119f02bSMiri Korenblit if (!ret) 12507119f02bSMiri Korenblit cmd.oem_11ax_allow_bitmap = cpu_to_le32(value); 1251f5b1cb2eSGil Adam 125245fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 125354b4fda5SAbhishek Naik DSM_FUNC_ENABLE_UNII4_CHAN, 125454b4fda5SAbhishek Naik &iwl_guid, &value); 125554b4fda5SAbhishek Naik if (!ret) 125654b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap = cpu_to_le32(value); 125754b4fda5SAbhishek Naik 125845fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 12591f578d4fSMiri Korenblit DSM_FUNC_ACTIVATE_CHANNEL, 12601f578d4fSMiri Korenblit &iwl_guid, &value); 12611f578d4fSMiri Korenblit if (!ret) 12621f578d4fSMiri Korenblit cmd.chan_state_active_bitmap = cpu_to_le32(value); 12631f578d4fSMiri Korenblit 1264698b166eSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 1265698b166eSLuca Coelho DSM_FUNC_ENABLE_6E, 1266698b166eSLuca Coelho &iwl_guid, &value); 1267698b166eSLuca Coelho if (!ret) 1268698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); 1269698b166eSLuca Coelho 12708f323d06SAyala Barazani ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, 12718f323d06SAyala Barazani DSM_FUNC_FORCE_DISABLE_CHANNELS, 12728f323d06SAyala Barazani &iwl_guid, &value); 12738f323d06SAyala Barazani if (!ret) 12748f323d06SAyala Barazani cmd.force_disable_channels_bitmap = cpu_to_le32(value); 12758f323d06SAyala Barazani 127654b4fda5SAbhishek Naik if (cmd.config_bitmap || 1277698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap || 127854b4fda5SAbhishek Naik cmd.oem_11ax_allow_bitmap || 12791f578d4fSMiri Korenblit cmd.oem_unii4_allow_bitmap || 12808f323d06SAyala Barazani cmd.chan_state_active_bitmap || 12818f323d06SAyala Barazani cmd.force_disable_channels_bitmap) { 12823c21990bSMiri Korenblit size_t cmd_size; 12833c21990bSMiri Korenblit u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, 1284971cbe50SJohannes Berg WIDE_ID(REGULATORY_AND_NVM_GROUP, 1285971cbe50SJohannes Berg LARI_CONFIG_CHANGE), 1286971cbe50SJohannes Berg 1); 12878f323d06SAyala Barazani switch (cmd_ver) { 12888f323d06SAyala Barazani case 6: 12898f323d06SAyala Barazani cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); 12908f323d06SAyala Barazani break; 12918f323d06SAyala Barazani case 5: 12921f578d4fSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); 12938f323d06SAyala Barazani break; 12948f323d06SAyala Barazani case 4: 129554b4fda5SAbhishek Naik cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); 12968f323d06SAyala Barazani break; 12978f323d06SAyala Barazani case 3: 12983c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); 12998f323d06SAyala Barazani break; 13008f323d06SAyala Barazani case 2: 13013c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); 13028f323d06SAyala Barazani break; 13038f323d06SAyala Barazani default: 13043c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); 13058f323d06SAyala Barazani break; 13068f323d06SAyala Barazani } 13073c21990bSMiri Korenblit 13083ce88247SMiri Korenblit IWL_DEBUG_RADIO(mvm, 13097119f02bSMiri Korenblit "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", 13107119f02bSMiri Korenblit le32_to_cpu(cmd.config_bitmap), 13117119f02bSMiri Korenblit le32_to_cpu(cmd.oem_11ax_allow_bitmap)); 131254b4fda5SAbhishek Naik IWL_DEBUG_RADIO(mvm, 13131f578d4fSMiri Korenblit "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n", 131454b4fda5SAbhishek Naik le32_to_cpu(cmd.oem_unii4_allow_bitmap), 13151f578d4fSMiri Korenblit le32_to_cpu(cmd.chan_state_active_bitmap), 131654b4fda5SAbhishek Naik cmd_ver); 1317698b166eSLuca Coelho IWL_DEBUG_RADIO(mvm, 13188f323d06SAyala Barazani "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", 13198f323d06SAyala Barazani le32_to_cpu(cmd.oem_uhb_allow_bitmap), 13208f323d06SAyala Barazani le32_to_cpu(cmd.force_disable_channels_bitmap)); 13217119f02bSMiri Korenblit ret = iwl_mvm_send_cmd_pdu(mvm, 1322f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP, 1323f5b1cb2eSGil Adam LARI_CONFIG_CHANGE), 13243ce88247SMiri Korenblit 0, cmd_size, &cmd); 13257119f02bSMiri Korenblit if (ret < 0) 1326f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm, 1327f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n", 13287119f02bSMiri Korenblit ret); 1329f5b1cb2eSGil Adam } 1330f5b1cb2eSGil Adam } 133178a19d52SMiri Korenblit 133278a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 133378a19d52SMiri Korenblit { 133478a19d52SMiri Korenblit int ret; 133578a19d52SMiri Korenblit 133678a19d52SMiri Korenblit /* read PPAG table */ 1337e8e10a37SMatt Chen ret = iwl_acpi_get_ppag_table(&mvm->fwrt); 133878a19d52SMiri Korenblit if (ret < 0) { 133978a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 134078a19d52SMiri Korenblit "PPAG BIOS table invalid or unavailable. (%d)\n", 134178a19d52SMiri Korenblit ret); 134278a19d52SMiri Korenblit } 134378a19d52SMiri Korenblit 134478a19d52SMiri Korenblit /* read SAR tables */ 134578a19d52SMiri Korenblit ret = iwl_sar_get_wrds_table(&mvm->fwrt); 134678a19d52SMiri Korenblit if (ret < 0) { 134778a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 134878a19d52SMiri Korenblit "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 134978a19d52SMiri Korenblit ret); 135078a19d52SMiri Korenblit /* 135178a19d52SMiri Korenblit * If not available, don't fail and don't bother with EWRD and 135278a19d52SMiri Korenblit * WGDS */ 135378a19d52SMiri Korenblit 135478a19d52SMiri Korenblit if (!iwl_sar_get_wgds_table(&mvm->fwrt)) { 135578a19d52SMiri Korenblit /* 135678a19d52SMiri Korenblit * If basic SAR is not available, we check for WGDS, 135778a19d52SMiri Korenblit * which should *not* be available either. If it is 135878a19d52SMiri Korenblit * available, issue an error, because we can't use SAR 135978a19d52SMiri Korenblit * Geo without basic SAR. 136078a19d52SMiri Korenblit */ 136178a19d52SMiri Korenblit IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 136278a19d52SMiri Korenblit } 136378a19d52SMiri Korenblit 136478a19d52SMiri Korenblit } else { 136578a19d52SMiri Korenblit ret = iwl_sar_get_ewrd_table(&mvm->fwrt); 136678a19d52SMiri Korenblit /* if EWRD is not available, we can still use 136778a19d52SMiri Korenblit * WRDS, so don't fail */ 136878a19d52SMiri Korenblit if (ret < 0) 136978a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 137078a19d52SMiri Korenblit "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 137178a19d52SMiri Korenblit ret); 137278a19d52SMiri Korenblit 137378a19d52SMiri Korenblit /* read geo SAR table */ 137478a19d52SMiri Korenblit if (iwl_sar_geo_support(&mvm->fwrt)) { 137578a19d52SMiri Korenblit ret = iwl_sar_get_wgds_table(&mvm->fwrt); 137678a19d52SMiri Korenblit if (ret < 0) 137778a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm, 137878a19d52SMiri Korenblit "Geo SAR BIOS table invalid or unavailable. (%d)\n", 137978a19d52SMiri Korenblit ret); 138078a19d52SMiri Korenblit /* we don't fail if the table is not available */ 138178a19d52SMiri Korenblit } 138278a19d52SMiri Korenblit } 138378a19d52SMiri Korenblit } 138469964905SLuca Coelho #else /* CONFIG_ACPI */ 138539c1a972SIhab Zhaika 138639c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, 138739c1a972SIhab Zhaika int prof_a, int prof_b) 138869964905SLuca Coelho { 138978a19d52SMiri Korenblit return 1; 139069964905SLuca Coelho } 139169964905SLuca Coelho 139239c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 13935d041c46SLuca Coelho { 13945d041c46SLuca Coelho return -ENOENT; 13955d041c46SLuca Coelho } 13965d041c46SLuca Coelho 1397a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1398a6bff3cbSHaim Dreyfuss { 1399a6bff3cbSHaim Dreyfuss return 0; 1400a6bff3cbSHaim Dreyfuss } 140118f1755dSLuca Coelho 14026ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 14036ce1e5c0SGil Adam { 14046ce1e5c0SGil Adam return -ENOENT; 14056ce1e5c0SGil Adam } 14066ce1e5c0SGil Adam 14076ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 14086ce1e5c0SGil Adam { 14097937fd32SJohannes Berg return 0; 14106ce1e5c0SGil Adam } 141128dd7ccdSMordechay Goodstein 141228dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm) 141328dd7ccdSMordechay Goodstein { 141428dd7ccdSMordechay Goodstein } 1415f5b1cb2eSGil Adam 1416f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) 1417f5b1cb2eSGil Adam { 1418f5b1cb2eSGil Adam } 14194e8fe214SGregory Greenman 14209457077dSAbhishek Naik bool iwl_mvm_is_vendor_in_approved_list(void) 14219457077dSAbhishek Naik { 14229457077dSAbhishek Naik return false; 14239457077dSAbhishek Naik } 14249457077dSAbhishek Naik 14254e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm) 14264e8fe214SGregory Greenman { 14274e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE; 14284e8fe214SGregory Greenman } 142978a19d52SMiri Korenblit 143078a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) 143178a19d52SMiri Korenblit { 143278a19d52SMiri Korenblit } 1433c593d2faSAyala Barazani 143469964905SLuca Coelho #endif /* CONFIG_ACPI */ 143569964905SLuca Coelho 1436f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1437f130bb75SMordechay Goodstein { 1438f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1439f130bb75SMordechay Goodstein int ret; 1440f130bb75SMordechay Goodstein u32 resp; 1441f130bb75SMordechay Goodstein 1442f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1443f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1444f130bb75SMordechay Goodstein .buf_size = 0, 1445f130bb75SMordechay Goodstein }; 1446f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1447f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1448f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1449f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1450f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1451f130bb75SMordechay Goodstein }; 1452f130bb75SMordechay Goodstein 1453f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1454f130bb75SMordechay Goodstein if (!error_log_size) 1455f130bb75SMordechay Goodstein return; 1456f130bb75SMordechay Goodstein 1457f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1458f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1459f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1460f130bb75SMordechay Goodstein return; 1461f130bb75SMordechay Goodstein 1462f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1463f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1464f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1465f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1466f130bb75SMordechay Goodstein } 1467f130bb75SMordechay Goodstein 1468f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1469f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1470f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1471f130bb75SMordechay Goodstein 1472f130bb75SMordechay Goodstein if (ret) { 1473f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1474f130bb75SMordechay Goodstein return; 1475f130bb75SMordechay Goodstein } 1476f130bb75SMordechay Goodstein 1477f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1478f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1479f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1480f130bb75SMordechay Goodstein if (resp) 1481f130bb75SMordechay Goodstein IWL_ERR(mvm, 1482f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1483f130bb75SMordechay Goodstein resp); 1484f130bb75SMordechay Goodstein } 1485f130bb75SMordechay Goodstein } 1486f130bb75SMordechay Goodstein 148742ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 148842ce76d6SLuca Coelho { 14891edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1); 1490da2830acSLuca Coelho } 1491da2830acSLuca Coelho 14921f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 14931f370650SSara Sharon { 14941f370650SSara Sharon int ret; 14951f370650SSara Sharon 14967d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 149752b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm); 14981f370650SSara Sharon 14993b25f1afSEmmanuel Grumbach ret = iwl_run_init_mvm_ucode(mvm); 15001f370650SSara Sharon 15011f370650SSara Sharon if (ret) { 15021f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1503f4744258SLiad Kaufman 1504f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1505f4744258SLiad Kaufman return 0; 15061f370650SSara Sharon return ret; 15071f370650SSara Sharon } 15081f370650SSara Sharon 1509203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1510bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1511bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 15121f370650SSara Sharon if (ret) 15131f370650SSara Sharon return ret; 15141f370650SSara Sharon 151594022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 15161f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 15171f370650SSara Sharon if (ret) 15181f370650SSara Sharon return ret; 15191f370650SSara Sharon 152094022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 152194022562SEmmanuel Grumbach 1522b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 1523b108d8c7SShahar S Matityahu NULL); 1524da2eb669SSara Sharon 1525702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 15261f370650SSara Sharon } 15271f370650SSara Sharon 1528e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1529e705c121SKalle Valo { 1530e705c121SKalle Valo int ret, i; 1531e705c121SKalle Valo struct ieee80211_channel *chan; 1532e705c121SKalle Valo struct cfg80211_chan_def chandef; 1533dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1534733eb54fSAvraham Stern u32 sb_cfg; 1535e705c121SKalle Valo 1536e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1537e705c121SKalle Valo 1538e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1539e705c121SKalle Valo if (ret) 1540e705c121SKalle Valo return ret; 1541e705c121SKalle Valo 1542733eb54fSAvraham Stern sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG); 1543b8133439SAvraham Stern mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK); 1544b8133439SAvraham Stern if (mvm->pldr_sync && iwl_mei_pldr_req()) 1545274d9aa9SAvraham Stern return -EBUSY; 1546733eb54fSAvraham Stern 15471f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1548e705c121SKalle Valo if (ret) { 1549e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1550b8133439SAvraham Stern if (ret != -ERFKILL && !mvm->pldr_sync) 155172d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 155272d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1553e705c121SKalle Valo goto error; 1554e705c121SKalle Valo } 1555e705c121SKalle Valo 1556b8133439SAvraham Stern /* FW loaded successfully */ 1557b8133439SAvraham Stern mvm->pldr_sync = false; 1558b8133439SAvraham Stern 1559d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1560e705c121SKalle Valo 1561e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1562e705c121SKalle Valo if (ret) 1563e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1564e705c121SKalle Valo 1565a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 15667174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1567e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 156817b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 15697174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 15707174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 15717a14c23dSSara Sharon } 1572e705c121SKalle Valo 1573e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1574e705c121SKalle Valo if (ret) 1575e705c121SKalle Valo goto error; 1576e705c121SKalle Valo 15777d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1578e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1579e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1580e705c121SKalle Valo if (ret) 1581e705c121SKalle Valo goto error; 1582e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1583e705c121SKalle Valo if (ret) 1584e705c121SKalle Valo goto error; 1585d2ccc5c1SMukesh Sisodiya } 1586e705c121SKalle Valo 1587b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1588b3de3ef4SEmmanuel Grumbach if (ret) 1589b3de3ef4SEmmanuel Grumbach goto error; 1590b3de3ef4SEmmanuel Grumbach 1591cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa, 1592cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) { 1593a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt); 1594cceb4507SShahar S Matityahu if (ret) 1595cceb4507SShahar S Matityahu goto error; 1596cceb4507SShahar S Matityahu } 1597cceb4507SShahar S Matityahu 159843413a97SSara Sharon /* Init RSS configuration */ 15999cd243f2SMordechay Goodstein ret = iwl_configure_rxq(&mvm->fwrt); 16009cd243f2SMordechay Goodstein if (ret) 16018edbfaa1SSara Sharon goto error; 16028edbfaa1SSara Sharon 16038edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 160443413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 160543413a97SSara Sharon if (ret) { 160643413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 160743413a97SSara Sharon ret); 160843413a97SSara Sharon goto error; 160943413a97SSara Sharon } 161043413a97SSara Sharon } 161143413a97SSara Sharon 1612e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1613b8a85a1dSJohannes Berg for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1614e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1615b8a85a1dSJohannes Berg RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1616b8a85a1dSJohannes Berg } 1617e705c121SKalle Valo 1618d464550bSYedidya Benshimol for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++) 1619d464550bSYedidya Benshimol RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL); 1620d464550bSYedidya Benshimol 1621d6f6b0d8SGregory Greenman memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map)); 1622d6f6b0d8SGregory Greenman 16230ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1624e705c121SKalle Valo 1625e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1626e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1627e705c121SKalle Valo 162879660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 162997d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 163097d5be7eSLiad Kaufman if (ret) 163197d5be7eSLiad Kaufman goto error; 163279660869SIlia Lin } 163397d5be7eSLiad Kaufman 16342c2c3647SNathan Errera /* 16352c2c3647SNathan Errera * Add auxiliary station for scanning. 16362c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 16372c2c3647SNathan Errera * internal aux station for all aux activities that don't 16382c2c3647SNathan Errera * requires a dedicated data queue. 16392c2c3647SNathan Errera */ 1640*1724fc78SEmmanuel Grumbach if (!iwl_mvm_has_new_station_api(mvm->fw)) { 16412c2c3647SNathan Errera /* 16422c2c3647SNathan Errera * In old version the aux station uses mac id like other 16432c2c3647SNathan Errera * station and not lmac id 16442c2c3647SNathan Errera */ 16452c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1646e705c121SKalle Valo if (ret) 1647e705c121SKalle Valo goto error; 16482c2c3647SNathan Errera } 1649e705c121SKalle Valo 1650e705c121SKalle Valo /* Add all the PHY contexts */ 1651dd36a507STova Mussai i = 0; 1652dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1653dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1654dd36a507STova Mussai 1655583d1833SDan Carpenter if (WARN_ON_ONCE(!sband)) { 1656583d1833SDan Carpenter ret = -ENODEV; 1657dd36a507STova Mussai goto error; 1658583d1833SDan Carpenter } 1659dd36a507STova Mussai 1660dd36a507STova Mussai chan = &sband->channels[0]; 1661dd36a507STova Mussai 1662e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1663e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1664e705c121SKalle Valo /* 1665e705c121SKalle Valo * The channel used here isn't relevant as it's 1666e705c121SKalle Valo * going to be overwritten in the other flows. 1667e705c121SKalle Valo * For now use the first channel we have. 1668e705c121SKalle Valo */ 1669e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1670e705c121SKalle Valo &chandef, 1, 1); 1671e705c121SKalle Valo if (ret) 1672e705c121SKalle Valo goto error; 1673e705c121SKalle Valo } 1674e705c121SKalle Valo 1675c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1676c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1677c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1678c221daf2SChaya Rachel Ivgi * cmd during init time 1679c221daf2SChaya Rachel Ivgi */ 1680c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1681c221daf2SChaya Rachel Ivgi } else { 1682e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1683e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1684c221daf2SChaya Rachel Ivgi } 16855c89e7bcSChaya Rachel Ivgi 1686242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 16875c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1688944eafc2SChaya Rachel Ivgi 1689944eafc2SChaya Rachel Ivgi /* 1690944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1691944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1692944eafc2SChaya Rachel Ivgi */ 1693944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 16945c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 16955c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 169675cfe338SLuca Coelho if (ret) 169775cfe338SLuca Coelho goto error; 169875cfe338SLuca Coelho } 1699c221daf2SChaya Rachel Ivgi #endif 1700e705c121SKalle Valo 1701aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1702e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1703e705c121SKalle Valo 1704e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1705e705c121SKalle Valo if (ret) 1706e705c121SKalle Valo goto error; 1707e705c121SKalle Valo 1708f5b1cb2eSGil Adam iwl_mvm_lari_cfg(mvm); 1709e705c121SKalle Valo /* 1710e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1711e705c121SKalle Valo * anyway, so don't init MCC. 1712e705c121SKalle Valo */ 1713e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1714e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1715e705c121SKalle Valo if (ret) 1716e705c121SKalle Valo goto error; 1717e705c121SKalle Valo } 1718e705c121SKalle Valo 1719e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 17204ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1721b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1722e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1723e705c121SKalle Valo if (ret) 1724e705c121SKalle Valo goto error; 1725e705c121SKalle Valo } 1726e705c121SKalle Valo 1727cf85123aSAvraham Stern if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { 1728f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1729ead65aa2SJohannes Berg 1730ead65aa2SJohannes Berg if (mvm->time_sync.active) 1731cf85123aSAvraham Stern iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr, 1732cf85123aSAvraham Stern IWL_TIME_SYNC_PROTOCOL_TM | 1733cf85123aSAvraham Stern IWL_TIME_SYNC_PROTOCOL_FTM); 1734cf85123aSAvraham Stern } 1735f130bb75SMordechay Goodstein 17361595ecceSKrishnanand Prabhu if (!mvm->ptp_data.ptp_clock) 17371595ecceSKrishnanand Prabhu iwl_mvm_ptp_init(mvm); 17381595ecceSKrishnanand Prabhu 173948e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 174048e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 174148e775e6SHaim Dreyfuss 17426ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 17436ce1e5c0SGil Adam if (ret) 17446ce1e5c0SGil Adam goto error; 17456ce1e5c0SGil Adam 1746da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 174778a19d52SMiri Korenblit if (ret == 0) 1748a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 17495f06f6bfSLuca Coelho if (ret < 0) 1750a6bff3cbSHaim Dreyfuss goto error; 1751a6bff3cbSHaim Dreyfuss 1752c593d2faSAyala Barazani ret = iwl_mvm_sgom_init(mvm); 1753c593d2faSAyala Barazani if (ret) 1754c593d2faSAyala Barazani goto error; 1755c593d2faSAyala Barazani 175628dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm); 17577089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 17587089ae63SJohannes Berg 17599e26f098SGregory Greenman if (iwl_rfi_supported(mvm)) { 17604e8fe214SGregory Greenman if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE) 17614e8fe214SGregory Greenman iwl_rfi_send_config_cmd(mvm, NULL); 17624e8fe214SGregory Greenman } 17634e8fe214SGregory Greenman 17645aa7ce31SAvraham Stern iwl_mvm_mei_device_state(mvm, true); 17655aa7ce31SAvraham Stern 1766e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1767e705c121SKalle Valo return 0; 1768e705c121SKalle Valo error: 1769f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1770fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1771e705c121SKalle Valo return ret; 1772e705c121SKalle Valo } 1773e705c121SKalle Valo 1774e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1775e705c121SKalle Valo { 1776e705c121SKalle Valo int ret, i; 1777e705c121SKalle Valo 1778e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1779e705c121SKalle Valo 1780e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1781e705c121SKalle Valo if (ret) 1782e705c121SKalle Valo return ret; 1783e705c121SKalle Valo 1784e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1785e705c121SKalle Valo if (ret) { 1786e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1787e705c121SKalle Valo goto error; 1788e705c121SKalle Valo } 1789e705c121SKalle Valo 1790e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1791e705c121SKalle Valo if (ret) 1792e705c121SKalle Valo goto error; 1793e705c121SKalle Valo 1794e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1795e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1796e705c121SKalle Valo if (ret) 1797e705c121SKalle Valo goto error; 1798e705c121SKalle Valo 1799e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1800e705c121SKalle Valo if (ret) 1801e705c121SKalle Valo goto error; 1802e705c121SKalle Valo 1803e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 1804b8a85a1dSJohannes Berg for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) { 1805e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1806b8a85a1dSJohannes Berg RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL); 1807b8a85a1dSJohannes Berg } 1808e705c121SKalle Valo 1809*1724fc78SEmmanuel Grumbach if (!iwl_mvm_has_new_station_api(mvm->fw)) { 18102c2c3647SNathan Errera /* 18112c2c3647SNathan Errera * Add auxiliary station for scanning. 18122c2c3647SNathan Errera * Newer versions of this command implies that the fw uses 18132c2c3647SNathan Errera * internal aux station for all aux activities that don't 18142c2c3647SNathan Errera * requires a dedicated data queue. 18152c2c3647SNathan Errera * In old version the aux station uses mac id like other 18162c2c3647SNathan Errera * station and not lmac id 18172c2c3647SNathan Errera */ 18182c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX); 1819e705c121SKalle Valo if (ret) 1820e705c121SKalle Valo goto error; 18212c2c3647SNathan Errera } 1822e705c121SKalle Valo 1823e705c121SKalle Valo return 0; 1824e705c121SKalle Valo error: 1825fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1826e705c121SKalle Valo return ret; 1827e705c121SKalle Valo } 1828e705c121SKalle Valo 1829e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1830e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1831e705c121SKalle Valo { 1832e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1833e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1834e705c121SKalle Valo 1835e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1836e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1837e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1838e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1839e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1840e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 18410c8d0a47SGolan Ben-Ami 18420c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 18430c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 18440c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 18450c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1846e705c121SKalle Valo } 1847