1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 119c4f7d51SShaul Triebitz * Copyright(c) 2018 Intel Corporation 12e705c121SKalle Valo * 13e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 14e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 15e705c121SKalle Valo * published by the Free Software Foundation. 16e705c121SKalle Valo * 17e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 18e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 19e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20e705c121SKalle Valo * General Public License for more details. 21e705c121SKalle Valo * 22e705c121SKalle Valo * You should have received a copy of the GNU General Public License 23e705c121SKalle Valo * along with this program; if not, write to the Free Software 24e705c121SKalle Valo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 25e705c121SKalle Valo * USA 26e705c121SKalle Valo * 27e705c121SKalle Valo * The full GNU General Public License is included in this distribution 28e705c121SKalle Valo * in the file called COPYING. 29e705c121SKalle Valo * 30e705c121SKalle Valo * Contact Information: 31cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 32e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 33e705c121SKalle Valo * 34e705c121SKalle Valo * BSD LICENSE 35e705c121SKalle Valo * 36e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 37e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 38bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 399c4f7d51SShaul Triebitz * Copyright(c) 2018 Intel Corporation 40e705c121SKalle Valo * All rights reserved. 41e705c121SKalle Valo * 42e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 43e705c121SKalle Valo * modification, are permitted provided that the following conditions 44e705c121SKalle Valo * are met: 45e705c121SKalle Valo * 46e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 47e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 48e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 49e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 50e705c121SKalle Valo * the documentation and/or other materials provided with the 51e705c121SKalle Valo * distribution. 52e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 53e705c121SKalle Valo * contributors may be used to endorse or promote products derived 54e705c121SKalle Valo * from this software without specific prior written permission. 55e705c121SKalle Valo * 56e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 57e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 58e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 59e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 60e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 62e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 66e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67e705c121SKalle Valo * 68e705c121SKalle Valo *****************************************************************************/ 69e705c121SKalle Valo #include <net/mac80211.h> 70854d773eSSara Sharon #include <linux/netdevice.h> 71e705c121SKalle Valo 72e705c121SKalle Valo #include "iwl-trans.h" 73e705c121SKalle Valo #include "iwl-op-mode.h" 74d962f9b1SJohannes Berg #include "fw/img.h" 75e705c121SKalle Valo #include "iwl-debug.h" 76e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 77e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 78e705c121SKalle Valo #include "iwl-prph.h" 79813df5ceSLuca Coelho #include "fw/acpi.h" 80e705c121SKalle Valo 81e705c121SKalle Valo #include "mvm.h" 827174beb6SJohannes Berg #include "fw/dbg.h" 83e705c121SKalle Valo #include "iwl-phy-db.h" 849c4f7d51SShaul Triebitz #include "iwl-modparams.h" 859c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 86e705c121SKalle Valo 87e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 88e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 89e705c121SKalle Valo 90e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 91e705c121SKalle Valo 92e705c121SKalle Valo struct iwl_mvm_alive_data { 93e705c121SKalle Valo bool valid; 94e705c121SKalle Valo u32 scd_base_addr; 95e705c121SKalle Valo }; 96e705c121SKalle Valo 97e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 98e705c121SKalle Valo { 99e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 100e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 101e705c121SKalle Valo }; 102e705c121SKalle Valo 103e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 104e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 105e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 106e705c121SKalle Valo } 107e705c121SKalle Valo 10843413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 10943413a97SSara Sharon { 11043413a97SSara Sharon int i; 11143413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 11243413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 11343413a97SSara Sharon .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | 114854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV4_UDP | 11543413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | 11643413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_TCP | 117854d773eSSara Sharon IWL_RSS_HASH_TYPE_IPV6_UDP | 11843413a97SSara Sharon IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, 11943413a97SSara Sharon }; 12043413a97SSara Sharon 121f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 122f43495fdSSara Sharon return 0; 123f43495fdSSara Sharon 124854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 12543413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 126854d773eSSara Sharon cmd.indirection_table[i] = 127854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 128854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 12943413a97SSara Sharon 13043413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 13143413a97SSara Sharon } 13243413a97SSara Sharon 1338edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm) 1348edbfaa1SSara Sharon { 1358edbfaa1SSara Sharon int i, num_queues, size; 1368edbfaa1SSara Sharon struct iwl_rfh_queue_config *cmd; 1378edbfaa1SSara Sharon 1388edbfaa1SSara Sharon /* Do not configure default queue, it is configured via context info */ 1398edbfaa1SSara Sharon num_queues = mvm->trans->num_rx_queues - 1; 1408edbfaa1SSara Sharon 1418edbfaa1SSara Sharon size = sizeof(*cmd) + num_queues * sizeof(struct iwl_rfh_queue_data); 1428edbfaa1SSara Sharon 1438edbfaa1SSara Sharon cmd = kzalloc(size, GFP_KERNEL); 1448edbfaa1SSara Sharon if (!cmd) 1458edbfaa1SSara Sharon return -ENOMEM; 1468edbfaa1SSara Sharon 1478edbfaa1SSara Sharon cmd->num_queues = num_queues; 1488edbfaa1SSara Sharon 1498edbfaa1SSara Sharon for (i = 0; i < num_queues; i++) { 1508edbfaa1SSara Sharon struct iwl_trans_rxq_dma_data data; 1518edbfaa1SSara Sharon 1528edbfaa1SSara Sharon cmd->data[i].q_num = i + 1; 1538edbfaa1SSara Sharon iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data); 1548edbfaa1SSara Sharon 1558edbfaa1SSara Sharon cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 1568edbfaa1SSara Sharon cmd->data[i].urbd_stts_wrptr = 1578edbfaa1SSara Sharon cpu_to_le64(data.urbd_stts_wrptr); 1588edbfaa1SSara Sharon cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 1598edbfaa1SSara Sharon cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 1608edbfaa1SSara Sharon } 1618edbfaa1SSara Sharon 1628edbfaa1SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, 1638edbfaa1SSara Sharon WIDE_ID(DATA_PATH_GROUP, 1648edbfaa1SSara Sharon RFH_QUEUE_CONFIG_CMD), 1658edbfaa1SSara Sharon 0, size, cmd); 1668edbfaa1SSara Sharon } 1678edbfaa1SSara Sharon 16897d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 16997d5be7eSLiad Kaufman { 17097d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 17197d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 17297d5be7eSLiad Kaufman }; 17397d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 17497d5be7eSLiad Kaufman int ret; 17597d5be7eSLiad Kaufman 17697d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 17797d5be7eSLiad Kaufman if (ret) 17897d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 17997d5be7eSLiad Kaufman else 18097d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 18197d5be7eSLiad Kaufman 18297d5be7eSLiad Kaufman return ret; 18397d5be7eSLiad Kaufman } 18497d5be7eSLiad Kaufman 185bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 186bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 187bdccdb85SGolan Ben-Ami { 188bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 189bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 190bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 191bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 192bdccdb85SGolan Ben-Ami int i; 193bdccdb85SGolan Ben-Ami 194bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 195bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 196bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 197bdccdb85SGolan Ben-Ami 198bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 199bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 200bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 201bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 202bdccdb85SGolan Ben-Ami n_words + i, 203bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 204bdccdb85SGolan Ben-Ami } 205bdccdb85SGolan Ben-Ami 206e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 207e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 208e705c121SKalle Valo { 209e705c121SKalle Valo struct iwl_mvm *mvm = 210e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 211e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 2125c228d63SSara Sharon struct mvm_alive_resp_v3 *palive3; 213e705c121SKalle Valo struct mvm_alive_resp *palive; 2145c228d63SSara Sharon struct iwl_umac_alive *umac; 2155c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 2165c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 2175c228d63SSara Sharon u16 status; 2183485e76eSLuca Coelho u32 umac_error_event_table; 219e705c121SKalle Valo 2205c228d63SSara Sharon if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 221e705c121SKalle Valo palive = (void *)pkt->data; 2225c228d63SSara Sharon umac = &palive->umac_data; 2235c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 2245c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 2255c228d63SSara Sharon status = le16_to_cpu(palive->status); 2265c228d63SSara Sharon } else { 2275c228d63SSara Sharon palive3 = (void *)pkt->data; 2285c228d63SSara Sharon umac = &palive3->umac_data; 2295c228d63SSara Sharon lmac1 = &palive3->lmac_data; 2305c228d63SSara Sharon status = le16_to_cpu(palive3->status); 2315c228d63SSara Sharon } 232e705c121SKalle Valo 2335c228d63SSara Sharon mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr); 2345c228d63SSara Sharon if (lmac2) 2355c228d63SSara Sharon mvm->error_event_table[1] = 2365c228d63SSara Sharon le32_to_cpu(lmac2->error_event_table_ptr); 2375c228d63SSara Sharon mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr); 238e705c121SKalle Valo 2393485e76eSLuca Coelho umac_error_event_table = le32_to_cpu(umac->error_info_addr); 2405c228d63SSara Sharon 2413485e76eSLuca Coelho if (!umac_error_event_table) { 2423485e76eSLuca Coelho mvm->support_umac_log = false; 2433485e76eSLuca Coelho } else if (umac_error_event_table >= 2443485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 2453485e76eSLuca Coelho mvm->support_umac_log = true; 2463485e76eSLuca Coelho mvm->umac_error_event_table = umac_error_event_table; 2473485e76eSLuca Coelho } else { 248fb5b2846SLuca Coelho IWL_ERR(mvm, 249fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 250fb5b2846SLuca Coelho mvm->umac_error_event_table, 251fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 252fb5b2846SLuca Coelho "Init" : "RT"); 2533485e76eSLuca Coelho mvm->support_umac_log = false; 2543485e76eSLuca Coelho } 255fb5b2846SLuca Coelho 2565c228d63SSara Sharon alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr); 2575c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 258e705c121SKalle Valo 259e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2605c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2615c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2625c228d63SSara Sharon 2635c228d63SSara Sharon if (lmac2) 2645c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 265e705c121SKalle Valo 266e705c121SKalle Valo IWL_DEBUG_FW(mvm, 267e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2685c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2695c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 270e705c121SKalle Valo 271e705c121SKalle Valo return true; 272e705c121SKalle Valo } 273e705c121SKalle Valo 2741f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2751f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2761f370650SSara Sharon { 2771f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2781f370650SSara Sharon 2791f370650SSara Sharon return true; 2801f370650SSara Sharon } 2811f370650SSara Sharon 282e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 283e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 284e705c121SKalle Valo { 285e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 286e705c121SKalle Valo 287e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 288e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 289e705c121SKalle Valo return true; 290e705c121SKalle Valo } 291e705c121SKalle Valo 292ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 293e705c121SKalle Valo 294e705c121SKalle Valo return false; 295e705c121SKalle Valo } 296e705c121SKalle Valo 297e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 298e705c121SKalle Valo enum iwl_ucode_type ucode_type) 299e705c121SKalle Valo { 300e705c121SKalle Valo struct iwl_notification_wait alive_wait; 301e705c121SKalle Valo struct iwl_mvm_alive_data alive_data; 302e705c121SKalle Valo const struct fw_img *fw; 303e705c121SKalle Valo int ret, i; 304702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 305e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 306e705c121SKalle Valo 307e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 3083d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 3093d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 3103d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 311612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 312e705c121SKalle Valo else 313612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 314e705c121SKalle Valo if (WARN_ON(!fw)) 315e705c121SKalle Valo return -EINVAL; 316702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 31765b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 318e705c121SKalle Valo 319e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 320e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 321e705c121SKalle Valo iwl_alive_fn, &alive_data); 322e705c121SKalle Valo 323e705c121SKalle Valo ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); 324e705c121SKalle Valo if (ret) { 325702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 326e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 327e705c121SKalle Valo return ret; 328e705c121SKalle Valo } 329e705c121SKalle Valo 330e705c121SKalle Valo /* 331e705c121SKalle Valo * Some things may run in the background now, but we 332e705c121SKalle Valo * just wait for the ALIVE notification here. 333e705c121SKalle Valo */ 334e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 335e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 336e705c121SKalle Valo if (ret) { 337d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 338d6be9c1dSSara Sharon 3395f01df3fSGolan Ben Ami if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) 340e705c121SKalle Valo IWL_ERR(mvm, 341e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 342d6be9c1dSSara Sharon iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS), 343d6be9c1dSSara Sharon iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS)); 3446e584873SSara Sharon else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) 345d6be9c1dSSara Sharon IWL_ERR(mvm, 346d6be9c1dSSara Sharon "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 347d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_1_STATUS), 348d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_2_STATUS)); 349702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 350e705c121SKalle Valo return ret; 351e705c121SKalle Valo } 352e705c121SKalle Valo 353e705c121SKalle Valo if (!alive_data.valid) { 354e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 355702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 356e705c121SKalle Valo return -EIO; 357e705c121SKalle Valo } 358e705c121SKalle Valo 359e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 360e705c121SKalle Valo 361e705c121SKalle Valo /* 362e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 363e705c121SKalle Valo * initialization, but in firmware restart scenarios they 364e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 365e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 366e705c121SKalle Valo * reconfiguration completes. During normal startup, they 367e705c121SKalle Valo * will be empty. 368e705c121SKalle Valo */ 369e705c121SKalle Valo 370e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 371097129c9SLiad Kaufman mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; 372e705c121SKalle Valo 373e705c121SKalle Valo for (i = 0; i < IEEE80211_MAX_QUEUES; i++) 374e705c121SKalle Valo atomic_set(&mvm->mac80211_queue_stop_count[i], 0); 375e705c121SKalle Valo 37665b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 377e705c121SKalle Valo 378e705c121SKalle Valo return 0; 379e705c121SKalle Valo } 380e705c121SKalle Valo 3818c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 3828c5f47b1SJohannes Berg { 3838c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 3848c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 3858c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 3868c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 3878c5f47b1SJohannes Berg }; 3888c5f47b1SJohannes Berg static const u16 init_complete[] = { 3898c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 3908c5f47b1SJohannes Berg }; 3918c5f47b1SJohannes Berg int ret; 3928c5f47b1SJohannes Berg 3938c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 3948c5f47b1SJohannes Berg 3958c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 3968c5f47b1SJohannes Berg &init_wait, 3978c5f47b1SJohannes Berg init_complete, 3988c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 3998c5f47b1SJohannes Berg iwl_wait_init_complete, 4008c5f47b1SJohannes Berg NULL); 4018c5f47b1SJohannes Berg 4028c5f47b1SJohannes Berg /* Will also start the device */ 4038c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4048c5f47b1SJohannes Berg if (ret) { 4058c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4068c5f47b1SJohannes Berg goto error; 4078c5f47b1SJohannes Berg } 4088c5f47b1SJohannes Berg 4098c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4108c5f47b1SJohannes Berg * commands 4118c5f47b1SJohannes Berg */ 4128c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 4138c5f47b1SJohannes Berg INIT_EXTENDED_CFG_CMD), 0, 4148c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4158c5f47b1SJohannes Berg if (ret) { 4168c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4178c5f47b1SJohannes Berg ret); 4188c5f47b1SJohannes Berg goto error; 4198c5f47b1SJohannes Berg } 4208c5f47b1SJohannes Berg 421e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 422e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4239c4f7d51SShaul Triebitz iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4249c4f7d51SShaul Triebitz mvm->nvm_sections); 4258c5f47b1SJohannes Berg iwl_mvm_load_nvm_to_nic(mvm); 426e9e1ba3dSSara Sharon } 4278c5f47b1SJohannes Berg 428d4f3695eSSara Sharon if (IWL_MVM_PARSE_NVM && read_nvm) { 4295bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 430d4f3695eSSara Sharon if (ret) { 431d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 432d4f3695eSSara Sharon goto error; 433d4f3695eSSara Sharon } 434d4f3695eSSara Sharon } 435d4f3695eSSara Sharon 4368c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 4378c5f47b1SJohannes Berg NVM_ACCESS_COMPLETE), 0, 4388c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4398c5f47b1SJohannes Berg if (ret) { 4408c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4418c5f47b1SJohannes Berg ret); 4428c5f47b1SJohannes Berg goto error; 4438c5f47b1SJohannes Berg } 4448c5f47b1SJohannes Berg 4458c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 446e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4478c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 448e9e1ba3dSSara Sharon if (ret) 449e9e1ba3dSSara Sharon return ret; 450e9e1ba3dSSara Sharon 451e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 452d4f3695eSSara Sharon if (!IWL_MVM_PARSE_NVM && read_nvm) { 4534c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 454c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 455c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 456c135cb56SShaul Triebitz mvm->nvm_data = NULL; 457e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 458e9e1ba3dSSara Sharon return ret; 459e9e1ba3dSSara Sharon } 460e9e1ba3dSSara Sharon } 461e9e1ba3dSSara Sharon 462e9e1ba3dSSara Sharon return 0; 4638c5f47b1SJohannes Berg 4648c5f47b1SJohannes Berg error: 4658c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 4668c5f47b1SJohannes Berg return ret; 4678c5f47b1SJohannes Berg } 4688c5f47b1SJohannes Berg 469e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 470e705c121SKalle Valo { 471e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 472702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 473e705c121SKalle Valo 474e705c121SKalle Valo /* Set parameters */ 475e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 47686a2b204SLuca Coelho 47786a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 47886a2b204SLuca Coelho phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags); 47986a2b204SLuca Coelho 480e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 481e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 482e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 483e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 484e705c121SKalle Valo 485e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 486e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 487e705c121SKalle Valo 488e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 489e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 490e705c121SKalle Valo } 491e705c121SKalle Valo 492e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 493e705c121SKalle Valo { 494e705c121SKalle Valo struct iwl_notification_wait calib_wait; 495e705c121SKalle Valo static const u16 init_complete[] = { 496e705c121SKalle Valo INIT_COMPLETE_NOTIF, 497e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 498e705c121SKalle Valo }; 499e705c121SKalle Valo int ret; 500e705c121SKalle Valo 5017d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 5028c5f47b1SJohannes Berg return iwl_run_unified_mvm_ucode(mvm, true); 5038c5f47b1SJohannes Berg 504e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 505e705c121SKalle Valo 506e705c121SKalle Valo if (WARN_ON_ONCE(mvm->calibrating)) 507e705c121SKalle Valo return 0; 508e705c121SKalle Valo 509e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 510e705c121SKalle Valo &calib_wait, 511e705c121SKalle Valo init_complete, 512e705c121SKalle Valo ARRAY_SIZE(init_complete), 513e705c121SKalle Valo iwl_wait_phy_db_entry, 514e705c121SKalle Valo mvm->phy_db); 515e705c121SKalle Valo 516e705c121SKalle Valo /* Will also start the device */ 517e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 518e705c121SKalle Valo if (ret) { 519e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 52000e0c6c8SLuca Coelho goto remove_notif; 521e705c121SKalle Valo } 522e705c121SKalle Valo 523b3de3ef4SEmmanuel Grumbach if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) { 524b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 525e705c121SKalle Valo if (ret) 52600e0c6c8SLuca Coelho goto remove_notif; 527b3de3ef4SEmmanuel Grumbach } 528e705c121SKalle Valo 529e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 530e705c121SKalle Valo if (read_nvm) { 5315bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 532e705c121SKalle Valo if (ret) { 533e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 53400e0c6c8SLuca Coelho goto remove_notif; 535e705c121SKalle Valo } 536e705c121SKalle Valo } 537e705c121SKalle Valo 538e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 539e705c121SKalle Valo if (mvm->nvm_file_name) 540e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 541e705c121SKalle Valo 54200e0c6c8SLuca Coelho WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans)); 543e705c121SKalle Valo 544e705c121SKalle Valo /* 545e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 546e705c121SKalle Valo * the init seq later when RF kill will switch to off 547e705c121SKalle Valo */ 548e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 549e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 550e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 55100e0c6c8SLuca Coelho goto remove_notif; 552e705c121SKalle Valo } 553e705c121SKalle Valo 554e705c121SKalle Valo mvm->calibrating = true; 555e705c121SKalle Valo 556e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 557e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 558e705c121SKalle Valo if (ret) 55900e0c6c8SLuca Coelho goto remove_notif; 560e705c121SKalle Valo 561e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 562e705c121SKalle Valo if (ret) { 563e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 564e705c121SKalle Valo ret); 56500e0c6c8SLuca Coelho goto remove_notif; 566e705c121SKalle Valo } 567e705c121SKalle Valo 568e705c121SKalle Valo /* 569e705c121SKalle Valo * Some things may run in the background now, but we 570e705c121SKalle Valo * just wait for the calibration complete notification. 571e705c121SKalle Valo */ 572e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 573e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 57400e0c6c8SLuca Coelho if (!ret) 575e705c121SKalle Valo goto out; 576e705c121SKalle Valo 57700e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 57800e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 57900e0c6c8SLuca Coelho ret = 0; 58000e0c6c8SLuca Coelho } else { 58100e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 58200e0c6c8SLuca Coelho ret); 58300e0c6c8SLuca Coelho } 58400e0c6c8SLuca Coelho 58500e0c6c8SLuca Coelho goto out; 58600e0c6c8SLuca Coelho 58700e0c6c8SLuca Coelho remove_notif: 588e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 589e705c121SKalle Valo out: 590e705c121SKalle Valo mvm->calibrating = false; 591e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 592e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 593e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 594e705c121SKalle Valo sizeof(struct ieee80211_channel) + 595e705c121SKalle Valo sizeof(struct ieee80211_rate), 596e705c121SKalle Valo GFP_KERNEL); 597e705c121SKalle Valo if (!mvm->nvm_data) 598e705c121SKalle Valo return -ENOMEM; 599e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 600e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 601e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 602e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 603e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 604e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 605e705c121SKalle Valo } 606e705c121SKalle Valo 607e705c121SKalle Valo return ret; 608e705c121SKalle Valo } 609e705c121SKalle Valo 610e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 611e705c121SKalle Valo { 612e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 613e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 614e705c121SKalle Valo }; 615e705c121SKalle Valo 616e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 617e705c121SKalle Valo return 0; 618e705c121SKalle Valo 619e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 620e705c121SKalle Valo sizeof(cmd), &cmd); 621e705c121SKalle Valo } 622e705c121SKalle Valo 623c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 624c386dacbSHaim Dreyfuss static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm, 625c386dacbSHaim Dreyfuss union acpi_object *table, 626c386dacbSHaim Dreyfuss struct iwl_mvm_sar_profile *profile, 627c386dacbSHaim Dreyfuss bool enabled) 628da2830acSLuca Coelho { 629c386dacbSHaim Dreyfuss int i; 630da2830acSLuca Coelho 631c386dacbSHaim Dreyfuss profile->enabled = enabled; 632da2830acSLuca Coelho 633e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) { 634c386dacbSHaim Dreyfuss if ((table[i].type != ACPI_TYPE_INTEGER) || 635c386dacbSHaim Dreyfuss (table[i].integer.value > U8_MAX)) 636da2830acSLuca Coelho return -EINVAL; 637da2830acSLuca Coelho 638c386dacbSHaim Dreyfuss profile->table[i] = table[i].integer.value; 639da2830acSLuca Coelho } 640da2830acSLuca Coelho 641da2830acSLuca Coelho return 0; 642da2830acSLuca Coelho } 643da2830acSLuca Coelho 644c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 645c386dacbSHaim Dreyfuss { 646813df5ceSLuca Coelho union acpi_object *wifi_pkg, *table, *data; 647c386dacbSHaim Dreyfuss bool enabled; 648da2830acSLuca Coelho int ret; 649da2830acSLuca Coelho 650813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD); 651813df5ceSLuca Coelho if (IS_ERR(data)) 652813df5ceSLuca Coelho return PTR_ERR(data); 653da2830acSLuca Coelho 6542fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 655c386dacbSHaim Dreyfuss ACPI_WRDS_WIFI_DATA_SIZE); 656c386dacbSHaim Dreyfuss if (IS_ERR(wifi_pkg)) { 657c386dacbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 658c386dacbSHaim Dreyfuss goto out_free; 659c386dacbSHaim Dreyfuss } 660da2830acSLuca Coelho 661c386dacbSHaim Dreyfuss if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { 662c386dacbSHaim Dreyfuss ret = -EINVAL; 663c386dacbSHaim Dreyfuss goto out_free; 664c386dacbSHaim Dreyfuss } 665c386dacbSHaim Dreyfuss 666c386dacbSHaim Dreyfuss enabled = !!(wifi_pkg->package.elements[1].integer.value); 667c386dacbSHaim Dreyfuss 668c386dacbSHaim Dreyfuss /* position of the actual table */ 669c386dacbSHaim Dreyfuss table = &wifi_pkg->package.elements[2]; 670c386dacbSHaim Dreyfuss 671c386dacbSHaim Dreyfuss /* The profile from WRDS is officially profile 1, but goes 672c386dacbSHaim Dreyfuss * into sar_profiles[0] (because we don't have a profile 0). 673c386dacbSHaim Dreyfuss */ 674c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0], 675c386dacbSHaim Dreyfuss enabled); 676c386dacbSHaim Dreyfuss out_free: 677813df5ceSLuca Coelho kfree(data); 678da2830acSLuca Coelho return ret; 679da2830acSLuca Coelho } 680da2830acSLuca Coelho 68169964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 68269964905SLuca Coelho { 683813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 68469964905SLuca Coelho bool enabled; 68569964905SLuca Coelho int i, n_profiles, ret; 68669964905SLuca Coelho 687813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD); 688813df5ceSLuca Coelho if (IS_ERR(data)) 689813df5ceSLuca Coelho return PTR_ERR(data); 69069964905SLuca Coelho 6912fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 69269964905SLuca Coelho ACPI_EWRD_WIFI_DATA_SIZE); 69369964905SLuca Coelho if (IS_ERR(wifi_pkg)) { 69469964905SLuca Coelho ret = PTR_ERR(wifi_pkg); 69569964905SLuca Coelho goto out_free; 69669964905SLuca Coelho } 69769964905SLuca Coelho 69869964905SLuca Coelho if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || 69969964905SLuca Coelho (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { 70069964905SLuca Coelho ret = -EINVAL; 70169964905SLuca Coelho goto out_free; 70269964905SLuca Coelho } 70369964905SLuca Coelho 70469964905SLuca Coelho enabled = !!(wifi_pkg->package.elements[1].integer.value); 70569964905SLuca Coelho n_profiles = wifi_pkg->package.elements[2].integer.value; 70669964905SLuca Coelho 707e2ef1476SSharon Dvir /* in case of BIOS bug */ 708e2ef1476SSharon Dvir if (n_profiles <= 0) { 709e2ef1476SSharon Dvir ret = -EINVAL; 710e2ef1476SSharon Dvir goto out_free; 711e2ef1476SSharon Dvir } 712e2ef1476SSharon Dvir 71369964905SLuca Coelho for (i = 0; i < n_profiles; i++) { 71469964905SLuca Coelho /* the tables start at element 3 */ 71569964905SLuca Coelho static int pos = 3; 71669964905SLuca Coelho 71769964905SLuca Coelho /* The EWRD profiles officially go from 2 to 4, but we 71869964905SLuca Coelho * save them in sar_profiles[1-3] (because we don't 71969964905SLuca Coelho * have profile 0). So in the array we start from 1. 72069964905SLuca Coelho */ 72169964905SLuca Coelho ret = iwl_mvm_sar_set_profile(mvm, 72269964905SLuca Coelho &wifi_pkg->package.elements[pos], 72369964905SLuca Coelho &mvm->sar_profiles[i + 1], 72469964905SLuca Coelho enabled); 72569964905SLuca Coelho if (ret < 0) 72669964905SLuca Coelho break; 72769964905SLuca Coelho 72869964905SLuca Coelho /* go to the next table */ 729e7a3b8d8SLuca Coelho pos += ACPI_SAR_TABLE_SIZE; 73069964905SLuca Coelho } 73169964905SLuca Coelho 73269964905SLuca Coelho out_free: 733813df5ceSLuca Coelho kfree(data); 73469964905SLuca Coelho return ret; 73569964905SLuca Coelho } 73669964905SLuca Coelho 7377fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) 738a6bff3cbSHaim Dreyfuss { 739813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 7407fe90e0eSHaim Dreyfuss int i, j, ret; 7417fe90e0eSHaim Dreyfuss int idx = 1; 742a6bff3cbSHaim Dreyfuss 743813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD); 744813df5ceSLuca Coelho if (IS_ERR(data)) 745813df5ceSLuca Coelho return PTR_ERR(data); 746a6bff3cbSHaim Dreyfuss 7472fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 748a6bff3cbSHaim Dreyfuss ACPI_WGDS_WIFI_DATA_SIZE); 749a6bff3cbSHaim Dreyfuss if (IS_ERR(wifi_pkg)) { 750a6bff3cbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 751a6bff3cbSHaim Dreyfuss goto out_free; 752a6bff3cbSHaim Dreyfuss } 753a6bff3cbSHaim Dreyfuss 754e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 755e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) { 756a6bff3cbSHaim Dreyfuss union acpi_object *entry; 757a6bff3cbSHaim Dreyfuss 7587fe90e0eSHaim Dreyfuss entry = &wifi_pkg->package.elements[idx++]; 759a6bff3cbSHaim Dreyfuss if ((entry->type != ACPI_TYPE_INTEGER) || 760aae9d563SChristophe Jaillet (entry->integer.value > U8_MAX)) { 761aae9d563SChristophe Jaillet ret = -EINVAL; 762aae9d563SChristophe Jaillet goto out_free; 763aae9d563SChristophe Jaillet } 764a6bff3cbSHaim Dreyfuss 7657fe90e0eSHaim Dreyfuss mvm->geo_profiles[i].values[j] = entry->integer.value; 7667fe90e0eSHaim Dreyfuss } 767a6bff3cbSHaim Dreyfuss } 768a6bff3cbSHaim Dreyfuss ret = 0; 769a6bff3cbSHaim Dreyfuss out_free: 770813df5ceSLuca Coelho kfree(data); 771a6bff3cbSHaim Dreyfuss return ret; 772a6bff3cbSHaim Dreyfuss } 773a6bff3cbSHaim Dreyfuss 77442ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 775da2830acSLuca Coelho { 7760791c2fcSHaim Dreyfuss union { 7770791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd v5; 7780791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd_v4 v4; 7790791c2fcSHaim Dreyfuss } cmd; 78042ce76d6SLuca Coelho int i, j, idx; 781e7a3b8d8SLuca Coelho int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b }; 7820791c2fcSHaim Dreyfuss int len; 783da2830acSLuca Coelho 784e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2); 785e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS != 786e7a3b8d8SLuca Coelho ACPI_SAR_TABLE_SIZE); 78742ce76d6SLuca Coelho 7880791c2fcSHaim Dreyfuss cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS); 7890791c2fcSHaim Dreyfuss 7900791c2fcSHaim Dreyfuss if (fw_has_api(&mvm->fw->ucode_capa, 7910791c2fcSHaim Dreyfuss IWL_UCODE_TLV_API_REDUCE_TX_POWER)) 7920791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 7930791c2fcSHaim Dreyfuss else if (fw_has_capa(&mvm->fw->ucode_capa, 7940791c2fcSHaim Dreyfuss IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 7950791c2fcSHaim Dreyfuss len = sizeof(cmd.v4); 7960791c2fcSHaim Dreyfuss else 7970791c2fcSHaim Dreyfuss len = sizeof(cmd.v4.v3); 79855bfa4b9SLuca Coelho 799e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) { 80042ce76d6SLuca Coelho struct iwl_mvm_sar_profile *prof; 80142ce76d6SLuca Coelho 80242ce76d6SLuca Coelho /* don't allow SAR to be disabled (profile 0 means disable) */ 80342ce76d6SLuca Coelho if (profs[i] == 0) 80442ce76d6SLuca Coelho return -EPERM; 80542ce76d6SLuca Coelho 806e7a3b8d8SLuca Coelho /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */ 807e7a3b8d8SLuca Coelho if (profs[i] > ACPI_SAR_PROFILE_NUM) 80842ce76d6SLuca Coelho return -EINVAL; 80942ce76d6SLuca Coelho 81042ce76d6SLuca Coelho /* profiles go from 1 to 4, so decrement to access the array */ 81142ce76d6SLuca Coelho prof = &mvm->sar_profiles[profs[i] - 1]; 81242ce76d6SLuca Coelho 81342ce76d6SLuca Coelho /* if the profile is disabled, do nothing */ 81442ce76d6SLuca Coelho if (!prof->enabled) { 81542ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n", 81642ce76d6SLuca Coelho profs[i]); 81742ce76d6SLuca Coelho /* if one of the profiles is disabled, we fail all */ 81842ce76d6SLuca Coelho return -ENOENT; 81942ce76d6SLuca Coelho } 82042ce76d6SLuca Coelho 82142ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); 822e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) { 823e7a3b8d8SLuca Coelho idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j; 8240791c2fcSHaim Dreyfuss cmd.v5.v3.per_chain_restriction[i][j] = 82542ce76d6SLuca Coelho cpu_to_le16(prof->table[idx]); 82642ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", 82742ce76d6SLuca Coelho j, prof->table[idx]); 82842ce76d6SLuca Coelho } 82942ce76d6SLuca Coelho } 83042ce76d6SLuca Coelho 83142ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 83242ce76d6SLuca Coelho 83342ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 83442ce76d6SLuca Coelho } 83542ce76d6SLuca Coelho 8367fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 8377fe90e0eSHaim Dreyfuss { 8387fe90e0eSHaim Dreyfuss struct iwl_geo_tx_power_profiles_resp *resp; 8397fe90e0eSHaim Dreyfuss int ret; 8407fe90e0eSHaim Dreyfuss 8417fe90e0eSHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd geo_cmd = { 8427fe90e0eSHaim Dreyfuss .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE), 8437fe90e0eSHaim Dreyfuss }; 8447fe90e0eSHaim Dreyfuss struct iwl_host_cmd cmd = { 8457fe90e0eSHaim Dreyfuss .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 8467fe90e0eSHaim Dreyfuss .len = { sizeof(geo_cmd), }, 8477fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 8487fe90e0eSHaim Dreyfuss .data = { &geo_cmd }, 8497fe90e0eSHaim Dreyfuss }; 8507fe90e0eSHaim Dreyfuss 8517fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 8527fe90e0eSHaim Dreyfuss if (ret) { 8537fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 8547fe90e0eSHaim Dreyfuss return ret; 8557fe90e0eSHaim Dreyfuss } 8567fe90e0eSHaim Dreyfuss 8577fe90e0eSHaim Dreyfuss resp = (void *)cmd.resp_pkt->data; 8587fe90e0eSHaim Dreyfuss ret = le32_to_cpu(resp->profile_idx); 859e7a3b8d8SLuca Coelho if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) { 8607fe90e0eSHaim Dreyfuss ret = -EIO; 8617fe90e0eSHaim Dreyfuss IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret); 8627fe90e0eSHaim Dreyfuss } 8637fe90e0eSHaim Dreyfuss 8647fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 8657fe90e0eSHaim Dreyfuss return ret; 8667fe90e0eSHaim Dreyfuss } 8677fe90e0eSHaim Dreyfuss 868a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 869a6bff3cbSHaim Dreyfuss { 870a6bff3cbSHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd cmd = { 871a6bff3cbSHaim Dreyfuss .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES), 872a6bff3cbSHaim Dreyfuss }; 8737fe90e0eSHaim Dreyfuss int ret, i, j; 874a6bff3cbSHaim Dreyfuss u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT); 875a6bff3cbSHaim Dreyfuss 8767fe90e0eSHaim Dreyfuss ret = iwl_mvm_sar_get_wgds_table(mvm); 877a6bff3cbSHaim Dreyfuss if (ret < 0) { 878a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 879a6bff3cbSHaim Dreyfuss "Geo SAR BIOS table invalid or unavailable. (%d)\n", 880a6bff3cbSHaim Dreyfuss ret); 881a6bff3cbSHaim Dreyfuss /* we don't fail if the table is not available */ 882a6bff3cbSHaim Dreyfuss return 0; 883a6bff3cbSHaim Dreyfuss } 884a6bff3cbSHaim Dreyfuss 885a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n"); 886a6bff3cbSHaim Dreyfuss 887e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS * 888a6bff3cbSHaim Dreyfuss ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE); 889a6bff3cbSHaim Dreyfuss 890e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES); 891e7a3b8d8SLuca Coelho 892e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 893a6bff3cbSHaim Dreyfuss struct iwl_per_chain_offset *chain = 894a6bff3cbSHaim Dreyfuss (struct iwl_per_chain_offset *)&cmd.table[i]; 895a6bff3cbSHaim Dreyfuss 896a6bff3cbSHaim Dreyfuss for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) { 897a6bff3cbSHaim Dreyfuss u8 *value; 898a6bff3cbSHaim Dreyfuss 8997fe90e0eSHaim Dreyfuss value = &mvm->geo_profiles[i].values[j * 900e7a3b8d8SLuca Coelho ACPI_GEO_PER_CHAIN_SIZE]; 901a6bff3cbSHaim Dreyfuss chain[j].max_tx_power = cpu_to_le16(value[0]); 902a6bff3cbSHaim Dreyfuss chain[j].chain_a = value[1]; 903a6bff3cbSHaim Dreyfuss chain[j].chain_b = value[2]; 904a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 905a6bff3cbSHaim Dreyfuss "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n", 906a6bff3cbSHaim Dreyfuss i, j, value[1], value[2], value[0]); 907a6bff3cbSHaim Dreyfuss } 908a6bff3cbSHaim Dreyfuss } 909a6bff3cbSHaim Dreyfuss return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd); 910a6bff3cbSHaim Dreyfuss } 911a6bff3cbSHaim Dreyfuss 91269964905SLuca Coelho #else /* CONFIG_ACPI */ 91369964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 91469964905SLuca Coelho { 91569964905SLuca Coelho return -ENOENT; 91669964905SLuca Coelho } 91769964905SLuca Coelho 91869964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 91969964905SLuca Coelho { 92069964905SLuca Coelho return -ENOENT; 92169964905SLuca Coelho } 922a6bff3cbSHaim Dreyfuss 923a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 924a6bff3cbSHaim Dreyfuss { 925a6bff3cbSHaim Dreyfuss return 0; 926a6bff3cbSHaim Dreyfuss } 92718f1755dSLuca Coelho 92818f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, 92918f1755dSLuca Coelho int prof_b) 93018f1755dSLuca Coelho { 93118f1755dSLuca Coelho return -ENOENT; 93218f1755dSLuca Coelho } 93318f1755dSLuca Coelho 93418f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 93518f1755dSLuca Coelho { 93618f1755dSLuca Coelho return -ENOENT; 93718f1755dSLuca Coelho } 93869964905SLuca Coelho #endif /* CONFIG_ACPI */ 93969964905SLuca Coelho 94042ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 94142ce76d6SLuca Coelho { 94242ce76d6SLuca Coelho int ret; 94342ce76d6SLuca Coelho 944c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_get_wrds_table(mvm); 945da2830acSLuca Coelho if (ret < 0) { 946da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 94769964905SLuca Coelho "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 948da2830acSLuca Coelho ret); 94969964905SLuca Coelho /* if not available, don't fail and don't bother with EWRD */ 950da2830acSLuca Coelho return 0; 951da2830acSLuca Coelho } 952da2830acSLuca Coelho 95369964905SLuca Coelho ret = iwl_mvm_sar_get_ewrd_table(mvm); 95469964905SLuca Coelho /* if EWRD is not available, we can still use WRDS, so don't fail */ 95569964905SLuca Coelho if (ret < 0) 95669964905SLuca Coelho IWL_DEBUG_RADIO(mvm, 95769964905SLuca Coelho "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 95869964905SLuca Coelho ret); 95969964905SLuca Coelho 96042ce76d6SLuca Coelho /* choose profile 1 (WRDS) as default for both chains */ 96142ce76d6SLuca Coelho ret = iwl_mvm_sar_select_profile(mvm, 1, 1); 96242ce76d6SLuca Coelho 96342ce76d6SLuca Coelho /* if we don't have profile 0 from BIOS, just skip it */ 96442ce76d6SLuca Coelho if (ret == -ENOENT) 965da2830acSLuca Coelho return 0; 966da2830acSLuca Coelho 967da2830acSLuca Coelho return ret; 968da2830acSLuca Coelho } 969da2830acSLuca Coelho 9701f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 9711f370650SSara Sharon { 9721f370650SSara Sharon int ret; 9731f370650SSara Sharon 9747d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 9751f370650SSara Sharon return iwl_run_unified_mvm_ucode(mvm, false); 9761f370650SSara Sharon 9771f370650SSara Sharon ret = iwl_run_init_mvm_ucode(mvm, false); 9781f370650SSara Sharon 9791f370650SSara Sharon if (ret) { 9801f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 981f4744258SLiad Kaufman 982f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 983f4744258SLiad Kaufman return 0; 9841f370650SSara Sharon return ret; 9851f370650SSara Sharon } 9861f370650SSara Sharon 9871f370650SSara Sharon /* 9881f370650SSara Sharon * Stop and start the transport without entering low power 9891f370650SSara Sharon * mode. This will save the state of other components on the 9901f370650SSara Sharon * device that are triggered by the INIT firwmare (MFUART). 9911f370650SSara Sharon */ 9921f370650SSara Sharon _iwl_trans_stop_device(mvm->trans, false); 9931f370650SSara Sharon ret = _iwl_trans_start_hw(mvm->trans, false); 9941f370650SSara Sharon if (ret) 9951f370650SSara Sharon return ret; 9961f370650SSara Sharon 9971f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 9981f370650SSara Sharon if (ret) 9991f370650SSara Sharon return ret; 10001f370650SSara Sharon 1001702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 10021f370650SSara Sharon } 10031f370650SSara Sharon 1004e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1005e705c121SKalle Valo { 1006e705c121SKalle Valo int ret, i; 1007e705c121SKalle Valo struct ieee80211_channel *chan; 1008e705c121SKalle Valo struct cfg80211_chan_def chandef; 1009e705c121SKalle Valo 1010e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1011e705c121SKalle Valo 1012e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1013e705c121SKalle Valo if (ret) 1014e705c121SKalle Valo return ret; 1015e705c121SKalle Valo 10161f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1017e705c121SKalle Valo if (ret) { 1018e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 1019e705c121SKalle Valo goto error; 1020e705c121SKalle Valo } 1021e705c121SKalle Valo 1022d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1023e705c121SKalle Valo 1024e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1025e705c121SKalle Valo if (ret) 1026e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1027e705c121SKalle Valo 10287174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1029e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 1030e705c121SKalle Valo if (mvm->fw->dbg_dest_tlv) 10317174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 10327174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 1033e705c121SKalle Valo 1034e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1035e705c121SKalle Valo if (ret) 1036e705c121SKalle Valo goto error; 1037e705c121SKalle Valo 10387d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1039e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1040e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1041e705c121SKalle Valo if (ret) 1042e705c121SKalle Valo goto error; 1043e705c121SKalle Valo 1044e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1045e705c121SKalle Valo if (ret) 1046e705c121SKalle Valo goto error; 10471f370650SSara Sharon } 1048e705c121SKalle Valo 1049b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1050b3de3ef4SEmmanuel Grumbach if (ret) 1051b3de3ef4SEmmanuel Grumbach goto error; 1052b3de3ef4SEmmanuel Grumbach 105343413a97SSara Sharon /* Init RSS configuration */ 10548edbfaa1SSara Sharon if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) { 10558edbfaa1SSara Sharon ret = iwl_configure_rxq(mvm); 10568edbfaa1SSara Sharon if (ret) { 10578edbfaa1SSara Sharon IWL_ERR(mvm, "Failed to configure RX queues: %d\n", 10588edbfaa1SSara Sharon ret); 10598edbfaa1SSara Sharon goto error; 10608edbfaa1SSara Sharon } 10618edbfaa1SSara Sharon } 10628edbfaa1SSara Sharon 10638edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 106443413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 106543413a97SSara Sharon if (ret) { 106643413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 106743413a97SSara Sharon ret); 106843413a97SSara Sharon goto error; 106943413a97SSara Sharon } 107043413a97SSara Sharon } 107143413a97SSara Sharon 1072e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 10730ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1074e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1075e705c121SKalle Valo 10760ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1077e705c121SKalle Valo 1078e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1079e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1080e705c121SKalle Valo 108197d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 108297d5be7eSLiad Kaufman if (ret) 108397d5be7eSLiad Kaufman goto error; 108497d5be7eSLiad Kaufman 1085e705c121SKalle Valo /* Add auxiliary station for scanning */ 1086e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1087e705c121SKalle Valo if (ret) 1088e705c121SKalle Valo goto error; 1089e705c121SKalle Valo 1090e705c121SKalle Valo /* Add all the PHY contexts */ 109157fbcce3SJohannes Berg chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; 1092e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1093e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1094e705c121SKalle Valo /* 1095e705c121SKalle Valo * The channel used here isn't relevant as it's 1096e705c121SKalle Valo * going to be overwritten in the other flows. 1097e705c121SKalle Valo * For now use the first channel we have. 1098e705c121SKalle Valo */ 1099e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1100e705c121SKalle Valo &chandef, 1, 1); 1101e705c121SKalle Valo if (ret) 1102e705c121SKalle Valo goto error; 1103e705c121SKalle Valo } 1104e705c121SKalle Valo 1105c221daf2SChaya Rachel Ivgi #ifdef CONFIG_THERMAL 1106c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1107c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1108c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1109c221daf2SChaya Rachel Ivgi * cmd during init time 1110c221daf2SChaya Rachel Ivgi */ 1111c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1112c221daf2SChaya Rachel Ivgi } else { 1113e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1114e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1115c221daf2SChaya Rachel Ivgi } 11165c89e7bcSChaya Rachel Ivgi 11175c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1118944eafc2SChaya Rachel Ivgi 1119944eafc2SChaya Rachel Ivgi /* 1120944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1121944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1122944eafc2SChaya Rachel Ivgi */ 1123944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 11245c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 11255c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 112675cfe338SLuca Coelho if (ret) 112775cfe338SLuca Coelho goto error; 112875cfe338SLuca Coelho } 1129c221daf2SChaya Rachel Ivgi #else 1130c221daf2SChaya Rachel Ivgi /* Initialize tx backoffs to the minimal possible */ 1131c221daf2SChaya Rachel Ivgi iwl_mvm_tt_tx_backoff(mvm, 0); 1132c221daf2SChaya Rachel Ivgi #endif 1133e705c121SKalle Valo 1134e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1135e705c121SKalle Valo 1136e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1137e705c121SKalle Valo if (ret) 1138e705c121SKalle Valo goto error; 1139e705c121SKalle Valo 1140e705c121SKalle Valo /* 1141e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1142e705c121SKalle Valo * anyway, so don't init MCC. 1143e705c121SKalle Valo */ 1144e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1145e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1146e705c121SKalle Valo if (ret) 1147e705c121SKalle Valo goto error; 1148e705c121SKalle Valo } 1149e705c121SKalle Valo 1150e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 11514ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1152b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1153e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1154e705c121SKalle Valo if (ret) 1155e705c121SKalle Valo goto error; 1156e705c121SKalle Valo } 1157e705c121SKalle Valo 1158e705c121SKalle Valo /* allow FW/transport low power modes if not during restart */ 1159e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1160e705c121SKalle Valo iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); 1161e705c121SKalle Valo 1162da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 1163da2830acSLuca Coelho if (ret) 1164da2830acSLuca Coelho goto error; 1165da2830acSLuca Coelho 1166a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 1167a6bff3cbSHaim Dreyfuss if (ret) 1168a6bff3cbSHaim Dreyfuss goto error; 1169a6bff3cbSHaim Dreyfuss 11707089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 11717089ae63SJohannes Berg 1172e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1173e705c121SKalle Valo return 0; 1174e705c121SKalle Valo error: 1175f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1176fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1177e705c121SKalle Valo return ret; 1178e705c121SKalle Valo } 1179e705c121SKalle Valo 1180e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1181e705c121SKalle Valo { 1182e705c121SKalle Valo int ret, i; 1183e705c121SKalle Valo 1184e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1185e705c121SKalle Valo 1186e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1187e705c121SKalle Valo if (ret) 1188e705c121SKalle Valo return ret; 1189e705c121SKalle Valo 1190e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1191e705c121SKalle Valo if (ret) { 1192e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1193e705c121SKalle Valo goto error; 1194e705c121SKalle Valo } 1195e705c121SKalle Valo 1196e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1197e705c121SKalle Valo if (ret) 1198e705c121SKalle Valo goto error; 1199e705c121SKalle Valo 1200e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1201e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1202e705c121SKalle Valo if (ret) 1203e705c121SKalle Valo goto error; 1204e705c121SKalle Valo 1205e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1206e705c121SKalle Valo if (ret) 1207e705c121SKalle Valo goto error; 1208e705c121SKalle Valo 1209e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 12100ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1211e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1212e705c121SKalle Valo 1213e705c121SKalle Valo /* Add auxiliary station for scanning */ 1214e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1215e705c121SKalle Valo if (ret) 1216e705c121SKalle Valo goto error; 1217e705c121SKalle Valo 1218e705c121SKalle Valo return 0; 1219e705c121SKalle Valo error: 1220fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1221e705c121SKalle Valo return ret; 1222e705c121SKalle Valo } 1223e705c121SKalle Valo 1224e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1225e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1226e705c121SKalle Valo { 1227e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1228e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1229e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1230e705c121SKalle Valo 1231e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1232e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1233e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1234e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1235e705c121SKalle Valo "Reached" : "Not reached"); 1236e705c121SKalle Valo } 1237e705c121SKalle Valo 1238e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1239e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1240e705c121SKalle Valo { 1241e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1242e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1243e705c121SKalle Valo 1244e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1245e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1246e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1247e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1248e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1249e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 12500c8d0a47SGolan Ben-Ami 12510c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 12520c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 12530c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 12540c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1255e705c121SKalle Valo } 1256