1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 1148e775e6SHaim Dreyfuss * Copyright(c) 2018 - 2019 Intel Corporation 12e705c121SKalle Valo * 13e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 14e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 15e705c121SKalle Valo * published by the Free Software Foundation. 16e705c121SKalle Valo * 17e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 18e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 19e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20e705c121SKalle Valo * General Public License for more details. 21e705c121SKalle Valo * 22e705c121SKalle Valo * The full GNU General Public License is included in this distribution 23e705c121SKalle Valo * in the file called COPYING. 24e705c121SKalle Valo * 25e705c121SKalle Valo * Contact Information: 26cb2f8277SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 27e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28e705c121SKalle Valo * 29e705c121SKalle Valo * BSD LICENSE 30e705c121SKalle Valo * 31e705c121SKalle Valo * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 32e705c121SKalle Valo * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33bdccdb85SGolan Ben-Ami * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 3448e775e6SHaim Dreyfuss * Copyright(c) 2018 - 2019 Intel Corporation 35e705c121SKalle Valo * All rights reserved. 36e705c121SKalle Valo * 37e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 38e705c121SKalle Valo * modification, are permitted provided that the following conditions 39e705c121SKalle Valo * are met: 40e705c121SKalle Valo * 41e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 42e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 43e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 44e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 45e705c121SKalle Valo * the documentation and/or other materials provided with the 46e705c121SKalle Valo * distribution. 47e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 48e705c121SKalle Valo * contributors may be used to endorse or promote products derived 49e705c121SKalle Valo * from this software without specific prior written permission. 50e705c121SKalle Valo * 51e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62e705c121SKalle Valo * 63e705c121SKalle Valo *****************************************************************************/ 64e705c121SKalle Valo #include <net/mac80211.h> 65854d773eSSara Sharon #include <linux/netdevice.h> 66e705c121SKalle Valo 67e705c121SKalle Valo #include "iwl-trans.h" 68e705c121SKalle Valo #include "iwl-op-mode.h" 69d962f9b1SJohannes Berg #include "fw/img.h" 70e705c121SKalle Valo #include "iwl-debug.h" 71e705c121SKalle Valo #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ 72e705c121SKalle Valo #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ 73e705c121SKalle Valo #include "iwl-prph.h" 74813df5ceSLuca Coelho #include "fw/acpi.h" 75e705c121SKalle Valo 76e705c121SKalle Valo #include "mvm.h" 777174beb6SJohannes Berg #include "fw/dbg.h" 78e705c121SKalle Valo #include "iwl-phy-db.h" 799c4f7d51SShaul Triebitz #include "iwl-modparams.h" 809c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h" 81e705c121SKalle Valo 82e705c121SKalle Valo #define MVM_UCODE_ALIVE_TIMEOUT HZ 83e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) 84e705c121SKalle Valo 85e705c121SKalle Valo #define UCODE_VALID_OK cpu_to_le32(0x1) 86e705c121SKalle Valo 87e705c121SKalle Valo struct iwl_mvm_alive_data { 88e705c121SKalle Valo bool valid; 89e705c121SKalle Valo u32 scd_base_addr; 90e705c121SKalle Valo }; 91e705c121SKalle Valo 92e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) 93e705c121SKalle Valo { 94e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { 95e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant), 96e705c121SKalle Valo }; 97e705c121SKalle Valo 98e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); 99e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, 100e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd); 101e705c121SKalle Valo } 102e705c121SKalle Valo 10343413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) 10443413a97SSara Sharon { 10543413a97SSara Sharon int i; 10643413a97SSara Sharon struct iwl_rss_config_cmd cmd = { 10743413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE), 108608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) | 109608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) | 110608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) | 111608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) | 112608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) | 113608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD), 11443413a97SSara Sharon }; 11543413a97SSara Sharon 116f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1) 117f43495fdSSara Sharon return 0; 118f43495fdSSara Sharon 119854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */ 12043413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) 121854d773eSSara Sharon cmd.indirection_table[i] = 122854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1)); 123854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); 12443413a97SSara Sharon 12543413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); 12643413a97SSara Sharon } 12743413a97SSara Sharon 1288edbfaa1SSara Sharon static int iwl_configure_rxq(struct iwl_mvm *mvm) 1298edbfaa1SSara Sharon { 130dbf592f3SJohannes Berg int i, num_queues, size, ret; 1318edbfaa1SSara Sharon struct iwl_rfh_queue_config *cmd; 132dbf592f3SJohannes Berg struct iwl_host_cmd hcmd = { 133dbf592f3SJohannes Berg .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD), 134dbf592f3SJohannes Berg .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 135dbf592f3SJohannes Berg }; 1368edbfaa1SSara Sharon 1378edbfaa1SSara Sharon /* Do not configure default queue, it is configured via context info */ 1388edbfaa1SSara Sharon num_queues = mvm->trans->num_rx_queues - 1; 1398edbfaa1SSara Sharon 140dbf592f3SJohannes Berg size = struct_size(cmd, data, num_queues); 1418edbfaa1SSara Sharon 1428edbfaa1SSara Sharon cmd = kzalloc(size, GFP_KERNEL); 1438edbfaa1SSara Sharon if (!cmd) 1448edbfaa1SSara Sharon return -ENOMEM; 1458edbfaa1SSara Sharon 1468edbfaa1SSara Sharon cmd->num_queues = num_queues; 1478edbfaa1SSara Sharon 1488edbfaa1SSara Sharon for (i = 0; i < num_queues; i++) { 1498edbfaa1SSara Sharon struct iwl_trans_rxq_dma_data data; 1508edbfaa1SSara Sharon 1518edbfaa1SSara Sharon cmd->data[i].q_num = i + 1; 1528edbfaa1SSara Sharon iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data); 1538edbfaa1SSara Sharon 1548edbfaa1SSara Sharon cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 1558edbfaa1SSara Sharon cmd->data[i].urbd_stts_wrptr = 1568edbfaa1SSara Sharon cpu_to_le64(data.urbd_stts_wrptr); 1578edbfaa1SSara Sharon cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 1588edbfaa1SSara Sharon cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 1598edbfaa1SSara Sharon } 1608edbfaa1SSara Sharon 161dbf592f3SJohannes Berg hcmd.data[0] = cmd; 162dbf592f3SJohannes Berg hcmd.len[0] = size; 163dbf592f3SJohannes Berg 164dbf592f3SJohannes Berg ret = iwl_mvm_send_cmd(mvm, &hcmd); 165dbf592f3SJohannes Berg 166dbf592f3SJohannes Berg kfree(cmd); 167dbf592f3SJohannes Berg 168dbf592f3SJohannes Berg return ret; 1698edbfaa1SSara Sharon } 1708edbfaa1SSara Sharon 17197d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) 17297d5be7eSLiad Kaufman { 17397d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = { 17497d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), 17597d5be7eSLiad Kaufman }; 17697d5be7eSLiad Kaufman u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); 17797d5be7eSLiad Kaufman int ret; 17897d5be7eSLiad Kaufman 17997d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); 18097d5be7eSLiad Kaufman if (ret) 18197d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); 18297d5be7eSLiad Kaufman else 18397d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); 18497d5be7eSLiad Kaufman 18597d5be7eSLiad Kaufman return ret; 18697d5be7eSLiad Kaufman } 18797d5be7eSLiad Kaufman 188bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, 189bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb) 190bdccdb85SGolan Ben-Ami { 191bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb); 192bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; 193bdccdb85SGolan Ben-Ami __le32 *dump_data = mfu_dump_notif->data; 194bdccdb85SGolan Ben-Ami int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); 195bdccdb85SGolan Ben-Ami int i; 196bdccdb85SGolan Ben-Ami 197bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0) 198bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", 199bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id)); 200bdccdb85SGolan Ben-Ami 201bdccdb85SGolan Ben-Ami for (i = 0; i < n_words; i++) 202bdccdb85SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 203bdccdb85SGolan Ben-Ami "MFUART assert dump, dword %u: 0x%08x\n", 204bdccdb85SGolan Ben-Ami le16_to_cpu(mfu_dump_notif->index_num) * 205bdccdb85SGolan Ben-Ami n_words + i, 206bdccdb85SGolan Ben-Ami le32_to_cpu(dump_data[i])); 207bdccdb85SGolan Ben-Ami } 208bdccdb85SGolan Ben-Ami 209e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 210e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 211e705c121SKalle Valo { 212e705c121SKalle Valo struct iwl_mvm *mvm = 213e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait); 214e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data; 2155c228d63SSara Sharon struct mvm_alive_resp_v3 *palive3; 216e705c121SKalle Valo struct mvm_alive_resp *palive; 2175c228d63SSara Sharon struct iwl_umac_alive *umac; 2185c228d63SSara Sharon struct iwl_lmac_alive *lmac1; 2195c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL; 2205c228d63SSara Sharon u16 status; 22122463857SShahar S Matityahu u32 lmac_error_event_table, umac_error_event_table; 222e705c121SKalle Valo 2235c228d63SSara Sharon if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { 224e705c121SKalle Valo palive = (void *)pkt->data; 2255c228d63SSara Sharon umac = &palive->umac_data; 2265c228d63SSara Sharon lmac1 = &palive->lmac_data[0]; 2275c228d63SSara Sharon lmac2 = &palive->lmac_data[1]; 2285c228d63SSara Sharon status = le16_to_cpu(palive->status); 2295c228d63SSara Sharon } else { 2305c228d63SSara Sharon palive3 = (void *)pkt->data; 2315c228d63SSara Sharon umac = &palive3->umac_data; 2325c228d63SSara Sharon lmac1 = &palive3->lmac_data; 2335c228d63SSara Sharon status = le16_to_cpu(palive3->status); 2345c228d63SSara Sharon } 235e705c121SKalle Valo 23622463857SShahar S Matityahu lmac_error_event_table = 23722463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr); 23822463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table); 239e705c121SKalle Valo 24022463857SShahar S Matityahu if (lmac2) 24191c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] = 24222463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr); 24322463857SShahar S Matityahu 24422463857SShahar S Matityahu umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr); 2455c228d63SSara Sharon 2463485e76eSLuca Coelho if (!umac_error_event_table) { 2473485e76eSLuca Coelho mvm->support_umac_log = false; 2483485e76eSLuca Coelho } else if (umac_error_event_table >= 2493485e76eSLuca Coelho mvm->trans->cfg->min_umac_error_event_table) { 2503485e76eSLuca Coelho mvm->support_umac_log = true; 2513485e76eSLuca Coelho } else { 252fb5b2846SLuca Coelho IWL_ERR(mvm, 253fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n", 25422463857SShahar S Matityahu umac_error_event_table, 255fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ? 256fb5b2846SLuca Coelho "Init" : "RT"); 2573485e76eSLuca Coelho mvm->support_umac_log = false; 2583485e76eSLuca Coelho } 259fb5b2846SLuca Coelho 26022463857SShahar S Matityahu if (mvm->support_umac_log) 26122463857SShahar S Matityahu iwl_fw_umac_set_alive_err_table(mvm->trans, 26222463857SShahar S Matityahu umac_error_event_table); 26322463857SShahar S Matityahu 26422463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr); 2655c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK; 266e705c121SKalle Valo 267e705c121SKalle Valo IWL_DEBUG_FW(mvm, 2685c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", 2695c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype); 2705c228d63SSara Sharon 2715c228d63SSara Sharon if (lmac2) 2725c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); 273e705c121SKalle Valo 274e705c121SKalle Valo IWL_DEBUG_FW(mvm, 275e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n", 2765c228d63SSara Sharon le32_to_cpu(umac->umac_major), 2775c228d63SSara Sharon le32_to_cpu(umac->umac_minor)); 278e705c121SKalle Valo 2790a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac); 2800a3a3e9eSShahar S Matityahu 281e705c121SKalle Valo return true; 282e705c121SKalle Valo } 283e705c121SKalle Valo 2841f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, 2851f370650SSara Sharon struct iwl_rx_packet *pkt, void *data) 2861f370650SSara Sharon { 2871f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 2881f370650SSara Sharon 2891f370650SSara Sharon return true; 2901f370650SSara Sharon } 2911f370650SSara Sharon 292e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, 293e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data) 294e705c121SKalle Valo { 295e705c121SKalle Valo struct iwl_phy_db *phy_db = data; 296e705c121SKalle Valo 297e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { 298e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); 299e705c121SKalle Valo return true; 300e705c121SKalle Valo } 301e705c121SKalle Valo 302ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); 303e705c121SKalle Valo 304e705c121SKalle Valo return false; 305e705c121SKalle Valo } 306e705c121SKalle Valo 307e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, 308e705c121SKalle Valo enum iwl_ucode_type ucode_type) 309e705c121SKalle Valo { 310e705c121SKalle Valo struct iwl_notification_wait alive_wait; 31194a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {}; 312e705c121SKalle Valo const struct fw_img *fw; 313cfbc6c4cSSara Sharon int ret; 314702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img; 315e705c121SKalle Valo static const u16 alive_cmd[] = { MVM_ALIVE }; 316b3500b47SEmmanuel Grumbach bool run_in_rfkill = 317b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm); 318e705c121SKalle Valo 319e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR && 3203d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && 3213d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa, 3223d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) 323612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); 324e705c121SKalle Valo else 325612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type); 326e705c121SKalle Valo if (WARN_ON(!fw)) 327e705c121SKalle Valo return -EINVAL; 328702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type); 32965b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 330e705c121SKalle Valo 331e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, 332e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd), 333e705c121SKalle Valo iwl_alive_fn, &alive_data); 334e705c121SKalle Valo 335b3500b47SEmmanuel Grumbach /* 336b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL 337b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not 338b3500b47SEmmanuel Grumbach * INIT, but we still need to run it. 339b3500b47SEmmanuel Grumbach */ 340b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill); 341e705c121SKalle Valo if (ret) { 342702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 343e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait); 344e705c121SKalle Valo return ret; 345e705c121SKalle Valo } 346e705c121SKalle Valo 347e705c121SKalle Valo /* 348e705c121SKalle Valo * Some things may run in the background now, but we 349e705c121SKalle Valo * just wait for the ALIVE notification here. 350e705c121SKalle Valo */ 351e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, 352e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT); 353e705c121SKalle Valo if (ret) { 354d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans; 355d6be9c1dSSara Sharon 35667b8261cSShahar S Matityahu if (ret == -ETIMEDOUT) 357700b3799SShahar S Matityahu iwl_fw_dbg_error_collect(&mvm->fwrt, 358700b3799SShahar S Matityahu FW_DBG_TRIGGER_ALIVE_TIMEOUT); 35967b8261cSShahar S Matityahu 3605f01df3fSGolan Ben Ami if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) 361e705c121SKalle Valo IWL_ERR(mvm, 362e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 363ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS), 364ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, 365ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS)); 3666e584873SSara Sharon else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) 367d6be9c1dSSara Sharon IWL_ERR(mvm, 368d6be9c1dSSara Sharon "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", 369d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_1_STATUS), 370d6be9c1dSSara Sharon iwl_read_prph(trans, SB_CPU_2_STATUS)); 371702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 372e705c121SKalle Valo return ret; 373e705c121SKalle Valo } 374e705c121SKalle Valo 375e705c121SKalle Valo if (!alive_data.valid) { 376e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n"); 377702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type); 378e705c121SKalle Valo return -EIO; 379e705c121SKalle Valo } 380e705c121SKalle Valo 381e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); 382e705c121SKalle Valo 383e705c121SKalle Valo /* 384e705c121SKalle Valo * Note: all the queues are enabled as part of the interface 385e705c121SKalle Valo * initialization, but in firmware restart scenarios they 386e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart, 387e705c121SKalle Valo * mac80211 will have the queues stopped as well until the 388e705c121SKalle Valo * reconfiguration completes. During normal startup, they 389e705c121SKalle Valo * will be empty. 390e705c121SKalle Valo */ 391e705c121SKalle Valo 392e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); 3931c14089eSJohannes Berg /* 3941c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the 3951c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that 3961c14089eSJohannes Berg * we ever even consider the command queue as one we might 3971c14089eSJohannes Berg * want to reuse, but be safe nevertheless. 3981c14089eSJohannes Berg */ 3991c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap = 4001c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2); 401e705c121SKalle Valo 40265b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); 403f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS 404f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt); 405f7805b33SLior Cohen #endif 406e705c121SKalle Valo 407e705c121SKalle Valo return 0; 408e705c121SKalle Valo } 409e705c121SKalle Valo 4108c5f47b1SJohannes Berg static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 4118c5f47b1SJohannes Berg { 4128c5f47b1SJohannes Berg struct iwl_notification_wait init_wait; 4138c5f47b1SJohannes Berg struct iwl_nvm_access_complete_cmd nvm_complete = {}; 4148c5f47b1SJohannes Berg struct iwl_init_extended_cfg_cmd init_cfg = { 4158c5f47b1SJohannes Berg .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), 4168c5f47b1SJohannes Berg }; 4178c5f47b1SJohannes Berg static const u16 init_complete[] = { 4188c5f47b1SJohannes Berg INIT_COMPLETE_NOTIF, 4198c5f47b1SJohannes Berg }; 4208c5f47b1SJohannes Berg int ret; 4218c5f47b1SJohannes Berg 4228c5f47b1SJohannes Berg lockdep_assert_held(&mvm->mutex); 4238c5f47b1SJohannes Berg 42494022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 42594022562SEmmanuel Grumbach 4268c5f47b1SJohannes Berg iwl_init_notification_wait(&mvm->notif_wait, 4278c5f47b1SJohannes Berg &init_wait, 4288c5f47b1SJohannes Berg init_complete, 4298c5f47b1SJohannes Berg ARRAY_SIZE(init_complete), 4308c5f47b1SJohannes Berg iwl_wait_init_complete, 4318c5f47b1SJohannes Berg NULL); 4328c5f47b1SJohannes Berg 43300eacde4SShahar S Matityahu iwl_dbg_tlv_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY); 43486ce5c74SShahar S Matityahu 4358c5f47b1SJohannes Berg /* Will also start the device */ 4368c5f47b1SJohannes Berg ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 4378c5f47b1SJohannes Berg if (ret) { 4388c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 4398c5f47b1SJohannes Berg goto error; 4408c5f47b1SJohannes Berg } 44100eacde4SShahar S Matityahu iwl_dbg_tlv_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE); 4428c5f47b1SJohannes Berg 4438c5f47b1SJohannes Berg /* Send init config command to mark that we are sending NVM access 4448c5f47b1SJohannes Berg * commands 4458c5f47b1SJohannes Berg */ 4468c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, 447b3500b47SEmmanuel Grumbach INIT_EXTENDED_CFG_CMD), 448b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4498c5f47b1SJohannes Berg sizeof(init_cfg), &init_cfg); 4508c5f47b1SJohannes Berg if (ret) { 4518c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run init config command: %d\n", 4528c5f47b1SJohannes Berg ret); 4538c5f47b1SJohannes Berg goto error; 4548c5f47b1SJohannes Berg } 4558c5f47b1SJohannes Berg 456e9e1ba3dSSara Sharon /* Load NVM to NIC if needed */ 457e9e1ba3dSSara Sharon if (mvm->nvm_file_name) { 4589c4f7d51SShaul Triebitz iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name, 4599c4f7d51SShaul Triebitz mvm->nvm_sections); 4608c5f47b1SJohannes Berg iwl_mvm_load_nvm_to_nic(mvm); 461e9e1ba3dSSara Sharon } 4628c5f47b1SJohannes Berg 463d4f3695eSSara Sharon if (IWL_MVM_PARSE_NVM && read_nvm) { 4645bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 465d4f3695eSSara Sharon if (ret) { 466d4f3695eSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 467d4f3695eSSara Sharon goto error; 468d4f3695eSSara Sharon } 469d4f3695eSSara Sharon } 470d4f3695eSSara Sharon 4718c5f47b1SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, 472b3500b47SEmmanuel Grumbach NVM_ACCESS_COMPLETE), 473b3500b47SEmmanuel Grumbach CMD_SEND_IN_RFKILL, 4748c5f47b1SJohannes Berg sizeof(nvm_complete), &nvm_complete); 4758c5f47b1SJohannes Berg if (ret) { 4768c5f47b1SJohannes Berg IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", 4778c5f47b1SJohannes Berg ret); 4788c5f47b1SJohannes Berg goto error; 4798c5f47b1SJohannes Berg } 4808c5f47b1SJohannes Berg 4818c5f47b1SJohannes Berg /* We wait for the INIT complete notification */ 482e9e1ba3dSSara Sharon ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, 4838c5f47b1SJohannes Berg MVM_UCODE_ALIVE_TIMEOUT); 484e9e1ba3dSSara Sharon if (ret) 485e9e1ba3dSSara Sharon return ret; 486e9e1ba3dSSara Sharon 487e9e1ba3dSSara Sharon /* Read the NVM only at driver load time, no need to do this twice */ 488d4f3695eSSara Sharon if (!IWL_MVM_PARSE_NVM && read_nvm) { 4894c625c56SShaul Triebitz mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw); 490c135cb56SShaul Triebitz if (IS_ERR(mvm->nvm_data)) { 491c135cb56SShaul Triebitz ret = PTR_ERR(mvm->nvm_data); 492c135cb56SShaul Triebitz mvm->nvm_data = NULL; 493e9e1ba3dSSara Sharon IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 494e9e1ba3dSSara Sharon return ret; 495e9e1ba3dSSara Sharon } 496e9e1ba3dSSara Sharon } 497e9e1ba3dSSara Sharon 498b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 499b3500b47SEmmanuel Grumbach 500e9e1ba3dSSara Sharon return 0; 5018c5f47b1SJohannes Berg 5028c5f47b1SJohannes Berg error: 5038c5f47b1SJohannes Berg iwl_remove_notification(&mvm->notif_wait, &init_wait); 5048c5f47b1SJohannes Berg return ret; 5058c5f47b1SJohannes Berg } 5068c5f47b1SJohannes Berg 507e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) 508e705c121SKalle Valo { 509e705c121SKalle Valo struct iwl_phy_cfg_cmd phy_cfg_cmd; 510702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; 511e705c121SKalle Valo 512e705c121SKalle Valo /* Set parameters */ 513e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); 51486a2b204SLuca Coelho 51586a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */ 51686a2b204SLuca Coelho phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags); 51786a2b204SLuca Coelho 518e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger = 519e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger; 520e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger = 521e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger; 522e705c121SKalle Valo 523e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", 524e705c121SKalle Valo phy_cfg_cmd.phy_cfg); 525e705c121SKalle Valo 526e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, 527e705c121SKalle Valo sizeof(phy_cfg_cmd), &phy_cfg_cmd); 528e705c121SKalle Valo } 529e705c121SKalle Valo 530e705c121SKalle Valo int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) 531e705c121SKalle Valo { 532e705c121SKalle Valo struct iwl_notification_wait calib_wait; 533e705c121SKalle Valo static const u16 init_complete[] = { 534e705c121SKalle Valo INIT_COMPLETE_NOTIF, 535e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB 536e705c121SKalle Valo }; 537e705c121SKalle Valo int ret; 538e705c121SKalle Valo 5397d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 5408c5f47b1SJohannes Berg return iwl_run_unified_mvm_ucode(mvm, true); 5418c5f47b1SJohannes Berg 542e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 543e705c121SKalle Valo 54494022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 545e705c121SKalle Valo 546e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, 547e705c121SKalle Valo &calib_wait, 548e705c121SKalle Valo init_complete, 549e705c121SKalle Valo ARRAY_SIZE(init_complete), 550e705c121SKalle Valo iwl_wait_phy_db_entry, 551e705c121SKalle Valo mvm->phy_db); 552e705c121SKalle Valo 553e705c121SKalle Valo /* Will also start the device */ 554e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); 555e705c121SKalle Valo if (ret) { 556e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); 55700e0c6c8SLuca Coelho goto remove_notif; 558e705c121SKalle Valo } 559e705c121SKalle Valo 560b3de3ef4SEmmanuel Grumbach if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) { 561b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 562e705c121SKalle Valo if (ret) 56300e0c6c8SLuca Coelho goto remove_notif; 564b3de3ef4SEmmanuel Grumbach } 565e705c121SKalle Valo 566e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */ 567e705c121SKalle Valo if (read_nvm) { 5685bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm); 569e705c121SKalle Valo if (ret) { 570e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); 57100e0c6c8SLuca Coelho goto remove_notif; 572e705c121SKalle Valo } 573e705c121SKalle Valo } 574e705c121SKalle Valo 575e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */ 576e705c121SKalle Valo if (mvm->nvm_file_name) 577e705c121SKalle Valo iwl_mvm_load_nvm_to_nic(mvm); 578e705c121SKalle Valo 57964866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver, 58064866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)", 58164866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver); 582e705c121SKalle Valo 583e705c121SKalle Valo /* 584e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete 585e705c121SKalle Valo * the init seq later when RF kill will switch to off 586e705c121SKalle Valo */ 587e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) { 588e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, 589e705c121SKalle Valo "jump over all phy activities due to RF kill\n"); 59000e0c6c8SLuca Coelho goto remove_notif; 591e705c121SKalle Valo } 592e705c121SKalle Valo 593b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 594e705c121SKalle Valo 595e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */ 596e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 597e705c121SKalle Valo if (ret) 59800e0c6c8SLuca Coelho goto remove_notif; 599e705c121SKalle Valo 600e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 601e705c121SKalle Valo if (ret) { 602e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 603e705c121SKalle Valo ret); 60400e0c6c8SLuca Coelho goto remove_notif; 605e705c121SKalle Valo } 606e705c121SKalle Valo 607e705c121SKalle Valo /* 608e705c121SKalle Valo * Some things may run in the background now, but we 609e705c121SKalle Valo * just wait for the calibration complete notification. 610e705c121SKalle Valo */ 611e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, 612e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT); 61300e0c6c8SLuca Coelho if (!ret) 614e705c121SKalle Valo goto out; 615e705c121SKalle Valo 61600e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) { 61700e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); 61800e0c6c8SLuca Coelho ret = 0; 61900e0c6c8SLuca Coelho } else { 62000e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", 62100e0c6c8SLuca Coelho ret); 62200e0c6c8SLuca Coelho } 62300e0c6c8SLuca Coelho 62400e0c6c8SLuca Coelho goto out; 62500e0c6c8SLuca Coelho 62600e0c6c8SLuca Coelho remove_notif: 627e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait); 628e705c121SKalle Valo out: 629b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 630e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { 631e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */ 632e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + 633e705c121SKalle Valo sizeof(struct ieee80211_channel) + 634e705c121SKalle Valo sizeof(struct ieee80211_rate), 635e705c121SKalle Valo GFP_KERNEL); 636e705c121SKalle Valo if (!mvm->nvm_data) 637e705c121SKalle Valo return -ENOMEM; 638e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; 639e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1; 640e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1; 641e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates = 642e705c121SKalle Valo (void *)mvm->nvm_data->channels + 1; 643e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10; 644e705c121SKalle Valo } 645e705c121SKalle Valo 646e705c121SKalle Valo return ret; 647e705c121SKalle Valo } 648e705c121SKalle Valo 649e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) 650e705c121SKalle Valo { 651e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = { 652e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), 653e705c121SKalle Valo }; 654e705c121SKalle Valo 655e705c121SKalle Valo if (!mvm->trans->ltr_enabled) 656e705c121SKalle Valo return 0; 657e705c121SKalle Valo 658e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, 659e705c121SKalle Valo sizeof(cmd), &cmd); 660e705c121SKalle Valo } 661e705c121SKalle Valo 662c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI 663e8698301SArnd Bergmann static inline int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm, 664c386dacbSHaim Dreyfuss union acpi_object *table, 665c386dacbSHaim Dreyfuss struct iwl_mvm_sar_profile *profile, 666c386dacbSHaim Dreyfuss bool enabled) 667da2830acSLuca Coelho { 668c386dacbSHaim Dreyfuss int i; 669da2830acSLuca Coelho 670c386dacbSHaim Dreyfuss profile->enabled = enabled; 671da2830acSLuca Coelho 672e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) { 673c386dacbSHaim Dreyfuss if ((table[i].type != ACPI_TYPE_INTEGER) || 674c386dacbSHaim Dreyfuss (table[i].integer.value > U8_MAX)) 675da2830acSLuca Coelho return -EINVAL; 676da2830acSLuca Coelho 677c386dacbSHaim Dreyfuss profile->table[i] = table[i].integer.value; 678da2830acSLuca Coelho } 679da2830acSLuca Coelho 680da2830acSLuca Coelho return 0; 681da2830acSLuca Coelho } 682da2830acSLuca Coelho 683c386dacbSHaim Dreyfuss static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 684c386dacbSHaim Dreyfuss { 685813df5ceSLuca Coelho union acpi_object *wifi_pkg, *table, *data; 686c386dacbSHaim Dreyfuss bool enabled; 6870c3d7282SHaim Dreyfuss int ret, tbl_rev; 688da2830acSLuca Coelho 689813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD); 690813df5ceSLuca Coelho if (IS_ERR(data)) 691813df5ceSLuca Coelho return PTR_ERR(data); 692da2830acSLuca Coelho 6932fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 6940c3d7282SHaim Dreyfuss ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev); 6950c3d7282SHaim Dreyfuss if (IS_ERR(wifi_pkg) || tbl_rev != 0) { 696c386dacbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 697c386dacbSHaim Dreyfuss goto out_free; 698c386dacbSHaim Dreyfuss } 699da2830acSLuca Coelho 700c386dacbSHaim Dreyfuss if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { 701c386dacbSHaim Dreyfuss ret = -EINVAL; 702c386dacbSHaim Dreyfuss goto out_free; 703c386dacbSHaim Dreyfuss } 704c386dacbSHaim Dreyfuss 705c386dacbSHaim Dreyfuss enabled = !!(wifi_pkg->package.elements[1].integer.value); 706c386dacbSHaim Dreyfuss 707c386dacbSHaim Dreyfuss /* position of the actual table */ 708c386dacbSHaim Dreyfuss table = &wifi_pkg->package.elements[2]; 709c386dacbSHaim Dreyfuss 710c386dacbSHaim Dreyfuss /* The profile from WRDS is officially profile 1, but goes 711c386dacbSHaim Dreyfuss * into sar_profiles[0] (because we don't have a profile 0). 712c386dacbSHaim Dreyfuss */ 713c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0], 714c386dacbSHaim Dreyfuss enabled); 715c386dacbSHaim Dreyfuss out_free: 716813df5ceSLuca Coelho kfree(data); 717da2830acSLuca Coelho return ret; 718da2830acSLuca Coelho } 719da2830acSLuca Coelho 72069964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 72169964905SLuca Coelho { 722813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 72369964905SLuca Coelho bool enabled; 7240c3d7282SHaim Dreyfuss int i, n_profiles, ret, tbl_rev; 72569964905SLuca Coelho 726813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD); 727813df5ceSLuca Coelho if (IS_ERR(data)) 728813df5ceSLuca Coelho return PTR_ERR(data); 72969964905SLuca Coelho 7302fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 7310c3d7282SHaim Dreyfuss ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev); 7320c3d7282SHaim Dreyfuss if (IS_ERR(wifi_pkg) || tbl_rev != 0) { 73369964905SLuca Coelho ret = PTR_ERR(wifi_pkg); 73469964905SLuca Coelho goto out_free; 73569964905SLuca Coelho } 73669964905SLuca Coelho 73769964905SLuca Coelho if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || 73869964905SLuca Coelho (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { 73969964905SLuca Coelho ret = -EINVAL; 74069964905SLuca Coelho goto out_free; 74169964905SLuca Coelho } 74269964905SLuca Coelho 74369964905SLuca Coelho enabled = !!(wifi_pkg->package.elements[1].integer.value); 74469964905SLuca Coelho n_profiles = wifi_pkg->package.elements[2].integer.value; 74569964905SLuca Coelho 7462e1976bbSLuca Coelho /* 7472e1976bbSLuca Coelho * Check the validity of n_profiles. The EWRD profiles start 7482e1976bbSLuca Coelho * from index 1, so the maximum value allowed here is 7492e1976bbSLuca Coelho * ACPI_SAR_PROFILES_NUM - 1. 7502e1976bbSLuca Coelho */ 7512e1976bbSLuca Coelho if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) { 752e2ef1476SSharon Dvir ret = -EINVAL; 753e2ef1476SSharon Dvir goto out_free; 754e2ef1476SSharon Dvir } 755e2ef1476SSharon Dvir 75669964905SLuca Coelho for (i = 0; i < n_profiles; i++) { 75769964905SLuca Coelho /* the tables start at element 3 */ 758ba3224dbSEmmanuel Grumbach int pos = 3; 75969964905SLuca Coelho 76069964905SLuca Coelho /* The EWRD profiles officially go from 2 to 4, but we 76169964905SLuca Coelho * save them in sar_profiles[1-3] (because we don't 76269964905SLuca Coelho * have profile 0). So in the array we start from 1. 76369964905SLuca Coelho */ 76469964905SLuca Coelho ret = iwl_mvm_sar_set_profile(mvm, 76569964905SLuca Coelho &wifi_pkg->package.elements[pos], 76669964905SLuca Coelho &mvm->sar_profiles[i + 1], 76769964905SLuca Coelho enabled); 76869964905SLuca Coelho if (ret < 0) 76969964905SLuca Coelho break; 77069964905SLuca Coelho 77169964905SLuca Coelho /* go to the next table */ 772e7a3b8d8SLuca Coelho pos += ACPI_SAR_TABLE_SIZE; 77369964905SLuca Coelho } 77469964905SLuca Coelho 77569964905SLuca Coelho out_free: 776813df5ceSLuca Coelho kfree(data); 77769964905SLuca Coelho return ret; 77869964905SLuca Coelho } 77969964905SLuca Coelho 7807fe90e0eSHaim Dreyfuss static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) 781a6bff3cbSHaim Dreyfuss { 782813df5ceSLuca Coelho union acpi_object *wifi_pkg, *data; 7830c3d7282SHaim Dreyfuss int i, j, ret, tbl_rev; 7847fe90e0eSHaim Dreyfuss int idx = 1; 785a6bff3cbSHaim Dreyfuss 786813df5ceSLuca Coelho data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD); 787813df5ceSLuca Coelho if (IS_ERR(data)) 788813df5ceSLuca Coelho return PTR_ERR(data); 789a6bff3cbSHaim Dreyfuss 7902fa388cfSLuca Coelho wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 7910c3d7282SHaim Dreyfuss ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev); 7920c3d7282SHaim Dreyfuss if (IS_ERR(wifi_pkg) || tbl_rev > 1) { 793a6bff3cbSHaim Dreyfuss ret = PTR_ERR(wifi_pkg); 794a6bff3cbSHaim Dreyfuss goto out_free; 795a6bff3cbSHaim Dreyfuss } 796a6bff3cbSHaim Dreyfuss 7970c3d7282SHaim Dreyfuss mvm->geo_rev = tbl_rev; 798e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 799e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) { 800a6bff3cbSHaim Dreyfuss union acpi_object *entry; 801a6bff3cbSHaim Dreyfuss 8027fe90e0eSHaim Dreyfuss entry = &wifi_pkg->package.elements[idx++]; 803a6bff3cbSHaim Dreyfuss if ((entry->type != ACPI_TYPE_INTEGER) || 804aae9d563SChristophe Jaillet (entry->integer.value > U8_MAX)) { 805aae9d563SChristophe Jaillet ret = -EINVAL; 806aae9d563SChristophe Jaillet goto out_free; 807aae9d563SChristophe Jaillet } 808a6bff3cbSHaim Dreyfuss 8097fe90e0eSHaim Dreyfuss mvm->geo_profiles[i].values[j] = entry->integer.value; 8107fe90e0eSHaim Dreyfuss } 811a6bff3cbSHaim Dreyfuss } 812a6bff3cbSHaim Dreyfuss ret = 0; 813a6bff3cbSHaim Dreyfuss out_free: 814813df5ceSLuca Coelho kfree(data); 815a6bff3cbSHaim Dreyfuss return ret; 816a6bff3cbSHaim Dreyfuss } 817a6bff3cbSHaim Dreyfuss 81842ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) 819da2830acSLuca Coelho { 8200791c2fcSHaim Dreyfuss union { 8210791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd v5; 8220791c2fcSHaim Dreyfuss struct iwl_dev_tx_power_cmd_v4 v4; 8230791c2fcSHaim Dreyfuss } cmd; 82442ce76d6SLuca Coelho int i, j, idx; 825e7a3b8d8SLuca Coelho int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b }; 8260791c2fcSHaim Dreyfuss int len; 827da2830acSLuca Coelho 828e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2); 829e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS != 830e7a3b8d8SLuca Coelho ACPI_SAR_TABLE_SIZE); 83142ce76d6SLuca Coelho 8320791c2fcSHaim Dreyfuss cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS); 8330791c2fcSHaim Dreyfuss 8340791c2fcSHaim Dreyfuss if (fw_has_api(&mvm->fw->ucode_capa, 8350791c2fcSHaim Dreyfuss IWL_UCODE_TLV_API_REDUCE_TX_POWER)) 8360791c2fcSHaim Dreyfuss len = sizeof(cmd.v5); 8370791c2fcSHaim Dreyfuss else if (fw_has_capa(&mvm->fw->ucode_capa, 8380791c2fcSHaim Dreyfuss IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) 8390791c2fcSHaim Dreyfuss len = sizeof(cmd.v4); 8400791c2fcSHaim Dreyfuss else 8410791c2fcSHaim Dreyfuss len = sizeof(cmd.v4.v3); 84255bfa4b9SLuca Coelho 843e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) { 84442ce76d6SLuca Coelho struct iwl_mvm_sar_profile *prof; 84542ce76d6SLuca Coelho 84642ce76d6SLuca Coelho /* don't allow SAR to be disabled (profile 0 means disable) */ 84742ce76d6SLuca Coelho if (profs[i] == 0) 84842ce76d6SLuca Coelho return -EPERM; 84942ce76d6SLuca Coelho 850e7a3b8d8SLuca Coelho /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */ 851e7a3b8d8SLuca Coelho if (profs[i] > ACPI_SAR_PROFILE_NUM) 85242ce76d6SLuca Coelho return -EINVAL; 85342ce76d6SLuca Coelho 85442ce76d6SLuca Coelho /* profiles go from 1 to 4, so decrement to access the array */ 85542ce76d6SLuca Coelho prof = &mvm->sar_profiles[profs[i] - 1]; 85642ce76d6SLuca Coelho 85742ce76d6SLuca Coelho /* if the profile is disabled, do nothing */ 85842ce76d6SLuca Coelho if (!prof->enabled) { 85942ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n", 86042ce76d6SLuca Coelho profs[i]); 86142ce76d6SLuca Coelho /* if one of the profiles is disabled, we fail all */ 86242ce76d6SLuca Coelho return -ENOENT; 86342ce76d6SLuca Coelho } 86442ce76d6SLuca Coelho 8654fd445a2SHaim Dreyfuss IWL_DEBUG_INFO(mvm, 8664fd445a2SHaim Dreyfuss "SAR EWRD: chain %d profile index %d\n", 8674fd445a2SHaim Dreyfuss i, profs[i]); 86842ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); 869e7a3b8d8SLuca Coelho for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) { 870e7a3b8d8SLuca Coelho idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j; 8710791c2fcSHaim Dreyfuss cmd.v5.v3.per_chain_restriction[i][j] = 87242ce76d6SLuca Coelho cpu_to_le16(prof->table[idx]); 87342ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", 87442ce76d6SLuca Coelho j, prof->table[idx]); 87542ce76d6SLuca Coelho } 87642ce76d6SLuca Coelho } 87742ce76d6SLuca Coelho 87842ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); 87942ce76d6SLuca Coelho 88042ce76d6SLuca Coelho return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); 88142ce76d6SLuca Coelho } 88242ce76d6SLuca Coelho 88339bd984cSLuca Coelho static bool iwl_mvm_sar_geo_support(struct iwl_mvm *mvm) 88439bd984cSLuca Coelho { 88539bd984cSLuca Coelho /* 88639bd984cSLuca Coelho * The GEO_TX_POWER_LIMIT command is not supported on earlier 88739bd984cSLuca Coelho * firmware versions. Unfortunately, we don't have a TLV API 88839bd984cSLuca Coelho * flag to rely on, so rely on the major version which is in 889f5a47faeSLuca Coelho * the first byte of ucode_ver. This was implemented 890f5a47faeSLuca Coelho * initially on version 38 and then backported to 36, 29 and 891f5a47faeSLuca Coelho * 17. 89239bd984cSLuca Coelho */ 893f5a47faeSLuca Coelho return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 || 894f5a47faeSLuca Coelho IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 36 || 895f5a47faeSLuca Coelho IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 || 896f5a47faeSLuca Coelho IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17; 89739bd984cSLuca Coelho } 89839bd984cSLuca Coelho 8997fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 9007fe90e0eSHaim Dreyfuss { 9017fe90e0eSHaim Dreyfuss struct iwl_geo_tx_power_profiles_resp *resp; 9027fe90e0eSHaim Dreyfuss int ret; 9030c3d7282SHaim Dreyfuss u16 len; 9040c3d7282SHaim Dreyfuss void *data; 9050c3d7282SHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd geo_cmd; 9060c3d7282SHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd_v1 geo_cmd_v1; 9070c3d7282SHaim Dreyfuss struct iwl_host_cmd cmd; 9087fe90e0eSHaim Dreyfuss 9090c3d7282SHaim Dreyfuss if (fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 9100c3d7282SHaim Dreyfuss geo_cmd.ops = 9110c3d7282SHaim Dreyfuss cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 9120c3d7282SHaim Dreyfuss len = sizeof(geo_cmd); 9130c3d7282SHaim Dreyfuss data = &geo_cmd; 9140c3d7282SHaim Dreyfuss } else { 9150c3d7282SHaim Dreyfuss geo_cmd_v1.ops = 9160c3d7282SHaim Dreyfuss cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE); 9170c3d7282SHaim Dreyfuss len = sizeof(geo_cmd_v1); 9180c3d7282SHaim Dreyfuss data = &geo_cmd_v1; 9190c3d7282SHaim Dreyfuss } 9200c3d7282SHaim Dreyfuss 9210c3d7282SHaim Dreyfuss cmd = (struct iwl_host_cmd){ 9227fe90e0eSHaim Dreyfuss .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), 9230c3d7282SHaim Dreyfuss .len = { len, }, 9247fe90e0eSHaim Dreyfuss .flags = CMD_WANT_SKB, 9250c3d7282SHaim Dreyfuss .data = { data }, 9267fe90e0eSHaim Dreyfuss }; 9277fe90e0eSHaim Dreyfuss 92839bd984cSLuca Coelho if (!iwl_mvm_sar_geo_support(mvm)) 92939bd984cSLuca Coelho return -EOPNOTSUPP; 93039bd984cSLuca Coelho 9317fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd); 9327fe90e0eSHaim Dreyfuss if (ret) { 9337fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); 9347fe90e0eSHaim Dreyfuss return ret; 9357fe90e0eSHaim Dreyfuss } 9367fe90e0eSHaim Dreyfuss 9377fe90e0eSHaim Dreyfuss resp = (void *)cmd.resp_pkt->data; 9387fe90e0eSHaim Dreyfuss ret = le32_to_cpu(resp->profile_idx); 939e7a3b8d8SLuca Coelho if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) { 9407fe90e0eSHaim Dreyfuss ret = -EIO; 9417fe90e0eSHaim Dreyfuss IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret); 9427fe90e0eSHaim Dreyfuss } 9437fe90e0eSHaim Dreyfuss 9447fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd); 9457fe90e0eSHaim Dreyfuss return ret; 9467fe90e0eSHaim Dreyfuss } 9477fe90e0eSHaim Dreyfuss 948a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 949a6bff3cbSHaim Dreyfuss { 950a6bff3cbSHaim Dreyfuss struct iwl_geo_tx_power_profiles_cmd cmd = { 951a6bff3cbSHaim Dreyfuss .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES), 952a6bff3cbSHaim Dreyfuss }; 9537fe90e0eSHaim Dreyfuss int ret, i, j; 954a6bff3cbSHaim Dreyfuss u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT); 955a6bff3cbSHaim Dreyfuss 95639bd984cSLuca Coelho if (!iwl_mvm_sar_geo_support(mvm)) 957eca1e56cSEmmanuel Grumbach return 0; 958eca1e56cSEmmanuel Grumbach 9597fe90e0eSHaim Dreyfuss ret = iwl_mvm_sar_get_wgds_table(mvm); 960a6bff3cbSHaim Dreyfuss if (ret < 0) { 961a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 962a6bff3cbSHaim Dreyfuss "Geo SAR BIOS table invalid or unavailable. (%d)\n", 963a6bff3cbSHaim Dreyfuss ret); 964a6bff3cbSHaim Dreyfuss /* we don't fail if the table is not available */ 965a6bff3cbSHaim Dreyfuss return 0; 966a6bff3cbSHaim Dreyfuss } 967a6bff3cbSHaim Dreyfuss 968a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n"); 969a6bff3cbSHaim Dreyfuss 970e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS * 97166e83903SMatt Chen ACPI_WGDS_TABLE_SIZE + 1 != ACPI_WGDS_WIFI_DATA_SIZE); 972a6bff3cbSHaim Dreyfuss 973e7a3b8d8SLuca Coelho BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES); 974e7a3b8d8SLuca Coelho 975e7a3b8d8SLuca Coelho for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { 976a6bff3cbSHaim Dreyfuss struct iwl_per_chain_offset *chain = 977a6bff3cbSHaim Dreyfuss (struct iwl_per_chain_offset *)&cmd.table[i]; 978a6bff3cbSHaim Dreyfuss 979a6bff3cbSHaim Dreyfuss for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) { 980a6bff3cbSHaim Dreyfuss u8 *value; 981a6bff3cbSHaim Dreyfuss 9827fe90e0eSHaim Dreyfuss value = &mvm->geo_profiles[i].values[j * 983e7a3b8d8SLuca Coelho ACPI_GEO_PER_CHAIN_SIZE]; 984a6bff3cbSHaim Dreyfuss chain[j].max_tx_power = cpu_to_le16(value[0]); 985a6bff3cbSHaim Dreyfuss chain[j].chain_a = value[1]; 986a6bff3cbSHaim Dreyfuss chain[j].chain_b = value[2]; 987a6bff3cbSHaim Dreyfuss IWL_DEBUG_RADIO(mvm, 988a6bff3cbSHaim Dreyfuss "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n", 989a6bff3cbSHaim Dreyfuss i, j, value[1], value[2], value[0]); 990a6bff3cbSHaim Dreyfuss } 991a6bff3cbSHaim Dreyfuss } 9920c3d7282SHaim Dreyfuss 9930c3d7282SHaim Dreyfuss cmd.table_revision = cpu_to_le32(mvm->geo_rev); 9940c3d7282SHaim Dreyfuss 9950c3d7282SHaim Dreyfuss if (!fw_has_api(&mvm->fw->ucode_capa, 9960c3d7282SHaim Dreyfuss IWL_UCODE_TLV_API_SAR_TABLE_VER)) { 9970c3d7282SHaim Dreyfuss return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, 9980c3d7282SHaim Dreyfuss sizeof(struct iwl_geo_tx_power_profiles_cmd_v1), 9990c3d7282SHaim Dreyfuss &cmd); 10000c3d7282SHaim Dreyfuss } 10010c3d7282SHaim Dreyfuss 1002a6bff3cbSHaim Dreyfuss return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd); 1003a6bff3cbSHaim Dreyfuss } 1004a6bff3cbSHaim Dreyfuss 10056ce1e5c0SGil Adam static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) 10066ce1e5c0SGil Adam { 10076ce1e5c0SGil Adam union acpi_object *wifi_pkg, *data, *enabled; 10086ce1e5c0SGil Adam int i, j, ret, tbl_rev; 10096ce1e5c0SGil Adam int idx = 2; 10106ce1e5c0SGil Adam 10116ce1e5c0SGil Adam mvm->ppag_table.enabled = cpu_to_le32(0); 10126ce1e5c0SGil Adam data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); 10136ce1e5c0SGil Adam if (IS_ERR(data)) 10146ce1e5c0SGil Adam return PTR_ERR(data); 10156ce1e5c0SGil Adam 10166ce1e5c0SGil Adam wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, 10176ce1e5c0SGil Adam ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev); 10186ce1e5c0SGil Adam 10196ce1e5c0SGil Adam if (IS_ERR(wifi_pkg) || tbl_rev != 0) { 10206ce1e5c0SGil Adam ret = PTR_ERR(wifi_pkg); 10216ce1e5c0SGil Adam goto out_free; 10226ce1e5c0SGil Adam } 10236ce1e5c0SGil Adam 10246ce1e5c0SGil Adam enabled = &wifi_pkg->package.elements[1]; 10256ce1e5c0SGil Adam if (enabled->type != ACPI_TYPE_INTEGER || 10266ce1e5c0SGil Adam (enabled->integer.value != 0 && enabled->integer.value != 1)) { 10276ce1e5c0SGil Adam ret = -EINVAL; 10286ce1e5c0SGil Adam goto out_free; 10296ce1e5c0SGil Adam } 10306ce1e5c0SGil Adam 10316ce1e5c0SGil Adam mvm->ppag_table.enabled = cpu_to_le32(enabled->integer.value); 10326ce1e5c0SGil Adam if (!mvm->ppag_table.enabled) { 10336ce1e5c0SGil Adam ret = 0; 10346ce1e5c0SGil Adam goto out_free; 10356ce1e5c0SGil Adam } 10366ce1e5c0SGil Adam 10376ce1e5c0SGil Adam /* 10386ce1e5c0SGil Adam * read, verify gain values and save them into the PPAG table. 10396ce1e5c0SGil Adam * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the 10406ce1e5c0SGil Adam * following sub-bands to High-Band (5GHz). 10416ce1e5c0SGil Adam */ 10426ce1e5c0SGil Adam for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) { 10436ce1e5c0SGil Adam for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) { 10446ce1e5c0SGil Adam union acpi_object *ent; 10456ce1e5c0SGil Adam 10466ce1e5c0SGil Adam ent = &wifi_pkg->package.elements[idx++]; 10476ce1e5c0SGil Adam if (ent->type != ACPI_TYPE_INTEGER || 10486ce1e5c0SGil Adam (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) || 10496ce1e5c0SGil Adam (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) || 10506ce1e5c0SGil Adam (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) || 10516ce1e5c0SGil Adam (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) { 10526ce1e5c0SGil Adam mvm->ppag_table.enabled = cpu_to_le32(0); 10536ce1e5c0SGil Adam ret = -EINVAL; 10546ce1e5c0SGil Adam goto out_free; 10556ce1e5c0SGil Adam } 10566ce1e5c0SGil Adam mvm->ppag_table.gain[i][j] = ent->integer.value; 10576ce1e5c0SGil Adam } 10586ce1e5c0SGil Adam } 10596ce1e5c0SGil Adam ret = 0; 10606ce1e5c0SGil Adam out_free: 10616ce1e5c0SGil Adam kfree(data); 10626ce1e5c0SGil Adam return ret; 10636ce1e5c0SGil Adam } 10646ce1e5c0SGil Adam 10656ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 10666ce1e5c0SGil Adam { 10676ce1e5c0SGil Adam int i, j, ret; 10686ce1e5c0SGil Adam 10696ce1e5c0SGil Adam if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { 10706ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10716ce1e5c0SGil Adam "PPAG capability not supported by FW, command not sent.\n"); 10726ce1e5c0SGil Adam return 0; 10736ce1e5c0SGil Adam } 10746ce1e5c0SGil Adam 10756ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); 10766ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, "PPAG is %s\n", 10776ce1e5c0SGil Adam mvm->ppag_table.enabled ? "enabled" : "disabled"); 10786ce1e5c0SGil Adam 10796ce1e5c0SGil Adam for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) { 10806ce1e5c0SGil Adam for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) { 10816ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 10826ce1e5c0SGil Adam "PPAG table: chain[%d] band[%d]: gain = %d\n", 10836ce1e5c0SGil Adam i, j, mvm->ppag_table.gain[i][j]); 10846ce1e5c0SGil Adam } 10856ce1e5c0SGil Adam } 10866ce1e5c0SGil Adam 10876ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, 10886ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD), 10896ce1e5c0SGil Adam 0, sizeof(mvm->ppag_table), 10906ce1e5c0SGil Adam &mvm->ppag_table); 10916ce1e5c0SGil Adam if (ret < 0) 10926ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", 10936ce1e5c0SGil Adam ret); 10946ce1e5c0SGil Adam 10956ce1e5c0SGil Adam return ret; 10966ce1e5c0SGil Adam } 10976ce1e5c0SGil Adam 10986ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 10996ce1e5c0SGil Adam { 11006ce1e5c0SGil Adam int ret; 11016ce1e5c0SGil Adam 11026ce1e5c0SGil Adam ret = iwl_mvm_get_ppag_table(mvm); 11036ce1e5c0SGil Adam if (ret < 0) { 11046ce1e5c0SGil Adam IWL_DEBUG_RADIO(mvm, 11056ce1e5c0SGil Adam "PPAG BIOS table invalid or unavailable. (%d)\n", 11066ce1e5c0SGil Adam ret); 11076ce1e5c0SGil Adam return 0; 11086ce1e5c0SGil Adam } 11096ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm); 11106ce1e5c0SGil Adam } 11116ce1e5c0SGil Adam 111269964905SLuca Coelho #else /* CONFIG_ACPI */ 111369964905SLuca Coelho static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) 111469964905SLuca Coelho { 111569964905SLuca Coelho return -ENOENT; 111669964905SLuca Coelho } 111769964905SLuca Coelho 111869964905SLuca Coelho static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) 111969964905SLuca Coelho { 112069964905SLuca Coelho return -ENOENT; 112169964905SLuca Coelho } 1122a6bff3cbSHaim Dreyfuss 11235d041c46SLuca Coelho static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) 11245d041c46SLuca Coelho { 11255d041c46SLuca Coelho return -ENOENT; 11265d041c46SLuca Coelho } 11275d041c46SLuca Coelho 1128a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) 1129a6bff3cbSHaim Dreyfuss { 1130a6bff3cbSHaim Dreyfuss return 0; 1131a6bff3cbSHaim Dreyfuss } 113218f1755dSLuca Coelho 113318f1755dSLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, 113418f1755dSLuca Coelho int prof_b) 113518f1755dSLuca Coelho { 113618f1755dSLuca Coelho return -ENOENT; 113718f1755dSLuca Coelho } 113818f1755dSLuca Coelho 113918f1755dSLuca Coelho int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) 114018f1755dSLuca Coelho { 114118f1755dSLuca Coelho return -ENOENT; 114218f1755dSLuca Coelho } 11436ce1e5c0SGil Adam 11446ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) 11456ce1e5c0SGil Adam { 11466ce1e5c0SGil Adam return -ENOENT; 11476ce1e5c0SGil Adam } 11486ce1e5c0SGil Adam 11496ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) 11506ce1e5c0SGil Adam { 11516ce1e5c0SGil Adam return -ENOENT; 11526ce1e5c0SGil Adam } 115369964905SLuca Coelho #endif /* CONFIG_ACPI */ 115469964905SLuca Coelho 1155f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags) 1156f130bb75SMordechay Goodstein { 1157f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size; 1158f130bb75SMordechay Goodstein int ret; 1159f130bb75SMordechay Goodstein u32 resp; 1160f130bb75SMordechay Goodstein 1161f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = { 1162f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags), 1163f130bb75SMordechay Goodstein .buf_size = 0, 1164f130bb75SMordechay Goodstein }; 1165f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = { 1166f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD), 1167f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB, 1168f130bb75SMordechay Goodstein .data = {&recovery_cmd, }, 1169f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), }, 1170f130bb75SMordechay Goodstein }; 1171f130bb75SMordechay Goodstein 1172f130bb75SMordechay Goodstein /* no error log was defined in TLV */ 1173f130bb75SMordechay Goodstein if (!error_log_size) 1174f130bb75SMordechay Goodstein return; 1175f130bb75SMordechay Goodstein 1176f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1177f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */ 1178f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf) 1179f130bb75SMordechay Goodstein return; 1180f130bb75SMordechay Goodstein 1181f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf; 1182f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size; 1183f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; 1184f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size); 1185f130bb75SMordechay Goodstein } 1186f130bb75SMordechay Goodstein 1187f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd); 1188f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf); 1189f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL; 1190f130bb75SMordechay Goodstein 1191f130bb75SMordechay Goodstein if (ret) { 1192f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret); 1193f130bb75SMordechay Goodstein return; 1194f130bb75SMordechay Goodstein } 1195f130bb75SMordechay Goodstein 1196f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */ 1197f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) { 1198f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data); 1199f130bb75SMordechay Goodstein if (resp) 1200f130bb75SMordechay Goodstein IWL_ERR(mvm, 1201f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n", 1202f130bb75SMordechay Goodstein resp); 1203f130bb75SMordechay Goodstein } 1204f130bb75SMordechay Goodstein } 1205f130bb75SMordechay Goodstein 120642ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm) 120742ce76d6SLuca Coelho { 120842ce76d6SLuca Coelho int ret; 120942ce76d6SLuca Coelho 1210c386dacbSHaim Dreyfuss ret = iwl_mvm_sar_get_wrds_table(mvm); 1211da2830acSLuca Coelho if (ret < 0) { 1212da2830acSLuca Coelho IWL_DEBUG_RADIO(mvm, 121369964905SLuca Coelho "WRDS SAR BIOS table invalid or unavailable. (%d)\n", 1214da2830acSLuca Coelho ret); 12155d041c46SLuca Coelho /* 12165d041c46SLuca Coelho * If not available, don't fail and don't bother with EWRD. 12175d041c46SLuca Coelho * Return 1 to tell that we can't use WGDS either. 12185d041c46SLuca Coelho */ 12195d041c46SLuca Coelho return 1; 1220da2830acSLuca Coelho } 1221da2830acSLuca Coelho 122269964905SLuca Coelho ret = iwl_mvm_sar_get_ewrd_table(mvm); 122369964905SLuca Coelho /* if EWRD is not available, we can still use WRDS, so don't fail */ 122469964905SLuca Coelho if (ret < 0) 122569964905SLuca Coelho IWL_DEBUG_RADIO(mvm, 122669964905SLuca Coelho "EWRD SAR BIOS table invalid or unavailable. (%d)\n", 122769964905SLuca Coelho ret); 122869964905SLuca Coelho 122942ce76d6SLuca Coelho /* choose profile 1 (WRDS) as default for both chains */ 123042ce76d6SLuca Coelho ret = iwl_mvm_sar_select_profile(mvm, 1, 1); 123142ce76d6SLuca Coelho 12325d041c46SLuca Coelho /* 12335d041c46SLuca Coelho * If we don't have profile 0 from BIOS, just skip it. This 12345d041c46SLuca Coelho * means that SAR Geo will not be enabled either, even if we 12355d041c46SLuca Coelho * have other valid profiles. 12365d041c46SLuca Coelho */ 123742ce76d6SLuca Coelho if (ret == -ENOENT) 12385d041c46SLuca Coelho return 1; 1239da2830acSLuca Coelho 1240da2830acSLuca Coelho return ret; 1241da2830acSLuca Coelho } 1242da2830acSLuca Coelho 12431f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) 12441f370650SSara Sharon { 12451f370650SSara Sharon int ret; 12461f370650SSara Sharon 12477d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm)) 12481f370650SSara Sharon return iwl_run_unified_mvm_ucode(mvm, false); 12491f370650SSara Sharon 12501f370650SSara Sharon ret = iwl_run_init_mvm_ucode(mvm, false); 12511f370650SSara Sharon 12521f370650SSara Sharon if (ret) { 12531f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); 1254f4744258SLiad Kaufman 1255f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg) 1256f4744258SLiad Kaufman return 0; 12571f370650SSara Sharon return ret; 12581f370650SSara Sharon } 12591f370650SSara Sharon 1260203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt); 1261bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans); 1262bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans); 12631f370650SSara Sharon if (ret) 12641f370650SSara Sharon return ret; 12651f370650SSara Sharon 126600eacde4SShahar S Matityahu iwl_dbg_tlv_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY); 1267da2eb669SSara Sharon 126894022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false; 12691f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); 12701f370650SSara Sharon if (ret) 12711f370650SSara Sharon return ret; 12721f370650SSara Sharon 127394022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true; 127494022562SEmmanuel Grumbach 127500eacde4SShahar S Matityahu iwl_dbg_tlv_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE); 1276da2eb669SSara Sharon 1277702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img); 12781f370650SSara Sharon } 12791f370650SSara Sharon 1280e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm) 1281e705c121SKalle Valo { 1282e705c121SKalle Valo int ret, i; 1283e705c121SKalle Valo struct ieee80211_channel *chan; 1284e705c121SKalle Valo struct cfg80211_chan_def chandef; 1285dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL; 1286e705c121SKalle Valo 1287e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1288e705c121SKalle Valo 1289e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1290e705c121SKalle Valo if (ret) 1291e705c121SKalle Valo return ret; 1292e705c121SKalle Valo 12931f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm); 1294e705c121SKalle Valo if (ret) { 1295e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); 129672d3c7bbSJohannes Berg if (ret != -ERFKILL) 129772d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt, 129872d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER); 1299e705c121SKalle Valo goto error; 1300e705c121SKalle Valo } 1301e705c121SKalle Valo 1302d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt); 1303e705c121SKalle Valo 1304e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false); 1305e705c121SKalle Valo if (ret) 1306e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); 1307e705c121SKalle Valo 1308a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) { 13097174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID; 1310e705c121SKalle Valo /* if we have a destination, assume EARLY START */ 131117b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv) 13127174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE; 13137174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE); 13147a14c23dSSara Sharon } 1315e705c121SKalle Valo 1316e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1317e705c121SKalle Valo if (ret) 1318e705c121SKalle Valo goto error; 1319e705c121SKalle Valo 13207d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) { 1321e705c121SKalle Valo /* Send phy db control command and then phy db calibration */ 1322e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1323e705c121SKalle Valo if (ret) 1324e705c121SKalle Valo goto error; 1325e705c121SKalle Valo 1326e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1327e705c121SKalle Valo if (ret) 1328e705c121SKalle Valo goto error; 13291f370650SSara Sharon } 1330e705c121SKalle Valo 1331b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm); 1332b3de3ef4SEmmanuel Grumbach if (ret) 1333b3de3ef4SEmmanuel Grumbach goto error; 1334b3de3ef4SEmmanuel Grumbach 133543413a97SSara Sharon /* Init RSS configuration */ 13368edbfaa1SSara Sharon if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) { 13378edbfaa1SSara Sharon ret = iwl_configure_rxq(mvm); 13388edbfaa1SSara Sharon if (ret) { 13398edbfaa1SSara Sharon IWL_ERR(mvm, "Failed to configure RX queues: %d\n", 13408edbfaa1SSara Sharon ret); 13418edbfaa1SSara Sharon goto error; 13428edbfaa1SSara Sharon } 13438edbfaa1SSara Sharon } 13448edbfaa1SSara Sharon 13458edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) { 134643413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm); 134743413a97SSara Sharon if (ret) { 134843413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", 134943413a97SSara Sharon ret); 135043413a97SSara Sharon goto error; 135143413a97SSara Sharon } 135243413a97SSara Sharon } 135343413a97SSara Sharon 1354e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 13550ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1356e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1357e705c121SKalle Valo 13580ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; 1359e705c121SKalle Valo 1360e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */ 1361e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); 1362e705c121SKalle Valo 136379660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) { 136497d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm); 136597d5be7eSLiad Kaufman if (ret) 136697d5be7eSLiad Kaufman goto error; 136779660869SIlia Lin } 136897d5be7eSLiad Kaufman 1369e705c121SKalle Valo /* Add auxiliary station for scanning */ 1370e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1371e705c121SKalle Valo if (ret) 1372e705c121SKalle Valo goto error; 1373e705c121SKalle Valo 1374e705c121SKalle Valo /* Add all the PHY contexts */ 1375dd36a507STova Mussai i = 0; 1376dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS) 1377dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++]; 1378dd36a507STova Mussai 1379dd36a507STova Mussai if (WARN_ON_ONCE(!sband)) 1380dd36a507STova Mussai goto error; 1381dd36a507STova Mussai 1382dd36a507STova Mussai chan = &sband->channels[0]; 1383dd36a507STova Mussai 1384e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); 1385e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) { 1386e705c121SKalle Valo /* 1387e705c121SKalle Valo * The channel used here isn't relevant as it's 1388e705c121SKalle Valo * going to be overwritten in the other flows. 1389e705c121SKalle Valo * For now use the first channel we have. 1390e705c121SKalle Valo */ 1391e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], 1392e705c121SKalle Valo &chandef, 1, 1); 1393e705c121SKalle Valo if (ret) 1394e705c121SKalle Valo goto error; 1395e705c121SKalle Valo } 1396e705c121SKalle Valo 1397c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) { 1398c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and 1399c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting 1400c221daf2SChaya Rachel Ivgi * cmd during init time 1401c221daf2SChaya Rachel Ivgi */ 1402c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm); 1403c221daf2SChaya Rachel Ivgi } else { 1404e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */ 1405e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0); 1406c221daf2SChaya Rachel Ivgi } 14075c89e7bcSChaya Rachel Ivgi 1408242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL 14095c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */ 1410944eafc2SChaya Rachel Ivgi 1411944eafc2SChaya Rachel Ivgi /* 1412944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default 1413944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0). 1414944eafc2SChaya Rachel Ivgi */ 1415944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) { 14165c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, 14175c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state); 141875cfe338SLuca Coelho if (ret) 141975cfe338SLuca Coelho goto error; 142075cfe338SLuca Coelho } 1421c221daf2SChaya Rachel Ivgi #endif 1422e705c121SKalle Valo 1423aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2)) 1424e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm)); 1425e705c121SKalle Valo 1426e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm); 1427e705c121SKalle Valo if (ret) 1428e705c121SKalle Valo goto error; 1429e705c121SKalle Valo 1430e705c121SKalle Valo /* 1431e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx 1432e705c121SKalle Valo * anyway, so don't init MCC. 1433e705c121SKalle Valo */ 1434e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { 1435e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm); 1436e705c121SKalle Valo if (ret) 1437e705c121SKalle Valo goto error; 1438e705c121SKalle Valo } 1439e705c121SKalle Valo 1440e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { 14414ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; 1442b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET; 1443e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm); 1444e705c121SKalle Valo if (ret) 1445e705c121SKalle Valo goto error; 1446e705c121SKalle Valo } 1447e705c121SKalle Valo 1448f130bb75SMordechay Goodstein if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) 1449f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB); 1450f130bb75SMordechay Goodstein 145148e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid)) 145248e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n"); 145348e775e6SHaim Dreyfuss 14546ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm); 14556ce1e5c0SGil Adam if (ret) 14566ce1e5c0SGil Adam goto error; 14576ce1e5c0SGil Adam 1458da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm); 14595d041c46SLuca Coelho if (ret == 0) { 1460a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm); 14615d041c46SLuca Coelho } else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) { 14625d041c46SLuca Coelho /* 14635d041c46SLuca Coelho * If basic SAR is not available, we check for WGDS, 14645d041c46SLuca Coelho * which should *not* be available either. If it is 14655d041c46SLuca Coelho * available, issue an error, because we can't use SAR 14665d041c46SLuca Coelho * Geo without basic SAR. 14675d041c46SLuca Coelho */ 14685d041c46SLuca Coelho IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n"); 14695d041c46SLuca Coelho } 14705d041c46SLuca Coelho 14715d041c46SLuca Coelho if (ret < 0) 1472a6bff3cbSHaim Dreyfuss goto error; 1473a6bff3cbSHaim Dreyfuss 14747089ae63SJohannes Berg iwl_mvm_leds_sync(mvm); 14757089ae63SJohannes Berg 1476e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); 1477e705c121SKalle Valo return 0; 1478e705c121SKalle Valo error: 1479f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret) 1480fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1481e705c121SKalle Valo return ret; 1482e705c121SKalle Valo } 1483e705c121SKalle Valo 1484e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) 1485e705c121SKalle Valo { 1486e705c121SKalle Valo int ret, i; 1487e705c121SKalle Valo 1488e705c121SKalle Valo lockdep_assert_held(&mvm->mutex); 1489e705c121SKalle Valo 1490e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans); 1491e705c121SKalle Valo if (ret) 1492e705c121SKalle Valo return ret; 1493e705c121SKalle Valo 1494e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); 1495e705c121SKalle Valo if (ret) { 1496e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); 1497e705c121SKalle Valo goto error; 1498e705c121SKalle Valo } 1499e705c121SKalle Valo 1500e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); 1501e705c121SKalle Valo if (ret) 1502e705c121SKalle Valo goto error; 1503e705c121SKalle Valo 1504e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/ 1505e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db); 1506e705c121SKalle Valo if (ret) 1507e705c121SKalle Valo goto error; 1508e705c121SKalle Valo 1509e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm); 1510e705c121SKalle Valo if (ret) 1511e705c121SKalle Valo goto error; 1512e705c121SKalle Valo 1513e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */ 15140ae98812SSara Sharon for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) 1515e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); 1516e705c121SKalle Valo 1517e705c121SKalle Valo /* Add auxiliary station for scanning */ 1518e705c121SKalle Valo ret = iwl_mvm_add_aux_sta(mvm); 1519e705c121SKalle Valo if (ret) 1520e705c121SKalle Valo goto error; 1521e705c121SKalle Valo 1522e705c121SKalle Valo return 0; 1523e705c121SKalle Valo error: 1524fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm); 1525e705c121SKalle Valo return ret; 1526e705c121SKalle Valo } 1527e705c121SKalle Valo 1528e705c121SKalle Valo void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, 1529e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1530e705c121SKalle Valo { 1531e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1532e705c121SKalle Valo struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; 1533e705c121SKalle Valo u32 flags = le32_to_cpu(card_state_notif->flags); 1534e705c121SKalle Valo 1535e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", 1536e705c121SKalle Valo (flags & HW_CARD_DISABLED) ? "Kill" : "On", 1537e705c121SKalle Valo (flags & SW_CARD_DISABLED) ? "Kill" : "On", 1538e705c121SKalle Valo (flags & CT_KILL_CARD_DISABLED) ? 1539e705c121SKalle Valo "Reached" : "Not reached"); 1540e705c121SKalle Valo } 1541e705c121SKalle Valo 1542e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, 1543e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb) 1544e705c121SKalle Valo { 1545e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb); 1546e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; 1547e705c121SKalle Valo 1548e705c121SKalle Valo IWL_DEBUG_INFO(mvm, 1549e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", 1550e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver), 1551e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver), 1552e705c121SKalle Valo le32_to_cpu(mfuart_notif->status), 1553e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration)); 15540c8d0a47SGolan Ben-Ami 15550c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) 15560c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm, 15570c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n", 15580c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size)); 1559e705c121SKalle Valo } 1560