18e99ea8dSJohannes Berg // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
28e99ea8dSJohannes Berg /*
31724fc78SEmmanuel Grumbach * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
48e99ea8dSJohannes Berg * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
58e99ea8dSJohannes Berg * Copyright (C) 2016-2017 Intel Deutschland GmbH
68e99ea8dSJohannes Berg */
7e705c121SKalle Valo #include <net/mac80211.h>
8854d773eSSara Sharon #include <linux/netdevice.h>
9a2ac0f48SLuca Coelho #include <linux/dmi.h>
10e705c121SKalle Valo
11e705c121SKalle Valo #include "iwl-trans.h"
12e705c121SKalle Valo #include "iwl-op-mode.h"
13d962f9b1SJohannes Berg #include "fw/img.h"
14e705c121SKalle Valo #include "iwl-debug.h"
15e705c121SKalle Valo #include "iwl-prph.h"
16813df5ceSLuca Coelho #include "fw/acpi.h"
17b3e4c0f3SLuca Coelho #include "fw/pnvm.h"
18e705c121SKalle Valo
19e705c121SKalle Valo #include "mvm.h"
207174beb6SJohannes Berg #include "fw/dbg.h"
21e705c121SKalle Valo #include "iwl-phy-db.h"
229c4f7d51SShaul Triebitz #include "iwl-modparams.h"
239c4f7d51SShaul Triebitz #include "iwl-nvm-parse.h"
24cf85123aSAvraham Stern #include "time-sync.h"
25e705c121SKalle Valo
26b3e4c0f3SLuca Coelho #define MVM_UCODE_ALIVE_TIMEOUT (HZ)
27e705c121SKalle Valo #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
28e705c121SKalle Valo
29c3f40c3eSMiri Korenblit #define IWL_TAS_US_MCC 0x5553
30c3f40c3eSMiri Korenblit #define IWL_TAS_CANADA_MCC 0x4341
31c3f40c3eSMiri Korenblit
32e705c121SKalle Valo struct iwl_mvm_alive_data {
33e705c121SKalle Valo bool valid;
34e705c121SKalle Valo u32 scd_base_addr;
35e705c121SKalle Valo };
36e705c121SKalle Valo
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)37e705c121SKalle Valo static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
38e705c121SKalle Valo {
39e705c121SKalle Valo struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
40e705c121SKalle Valo .valid = cpu_to_le32(valid_tx_ant),
41e705c121SKalle Valo };
42e705c121SKalle Valo
43e705c121SKalle Valo IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
44e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
45e705c121SKalle Valo sizeof(tx_ant_cmd), &tx_ant_cmd);
46e705c121SKalle Valo }
47e705c121SKalle Valo
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)4843413a97SSara Sharon static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
4943413a97SSara Sharon {
5043413a97SSara Sharon int i;
5143413a97SSara Sharon struct iwl_rss_config_cmd cmd = {
5243413a97SSara Sharon .flags = cpu_to_le32(IWL_RSS_ENABLE),
53608dce95SSara Sharon .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
54608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
55608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
56608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
57608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
58608dce95SSara Sharon BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
5943413a97SSara Sharon };
6043413a97SSara Sharon
61f43495fdSSara Sharon if (mvm->trans->num_rx_queues == 1)
62f43495fdSSara Sharon return 0;
63f43495fdSSara Sharon
64854d773eSSara Sharon /* Do not direct RSS traffic to Q 0 which is our fallback queue */
6543413a97SSara Sharon for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
66854d773eSSara Sharon cmd.indirection_table[i] =
67854d773eSSara Sharon 1 + (i % (mvm->trans->num_rx_queues - 1));
68854d773eSSara Sharon netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
6943413a97SSara Sharon
7043413a97SSara Sharon return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
7143413a97SSara Sharon }
7243413a97SSara Sharon
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)7397d5be7eSLiad Kaufman static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
7497d5be7eSLiad Kaufman {
7597d5be7eSLiad Kaufman struct iwl_dqa_enable_cmd dqa_cmd = {
7697d5be7eSLiad Kaufman .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
7797d5be7eSLiad Kaufman };
78f0c86427SJohannes Berg u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
7997d5be7eSLiad Kaufman int ret;
8097d5be7eSLiad Kaufman
8197d5be7eSLiad Kaufman ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
8297d5be7eSLiad Kaufman if (ret)
8397d5be7eSLiad Kaufman IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
8497d5be7eSLiad Kaufman else
8597d5be7eSLiad Kaufman IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
8697d5be7eSLiad Kaufman
8797d5be7eSLiad Kaufman return ret;
8897d5be7eSLiad Kaufman }
8997d5be7eSLiad Kaufman
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)90bdccdb85SGolan Ben-Ami void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
91bdccdb85SGolan Ben-Ami struct iwl_rx_cmd_buffer *rxb)
92bdccdb85SGolan Ben-Ami {
93bdccdb85SGolan Ben-Ami struct iwl_rx_packet *pkt = rxb_addr(rxb);
94bdccdb85SGolan Ben-Ami struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
95bdccdb85SGolan Ben-Ami
96bdccdb85SGolan Ben-Ami if (mfu_dump_notif->index_num == 0)
97bdccdb85SGolan Ben-Ami IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
98bdccdb85SGolan Ben-Ami le32_to_cpu(mfu_dump_notif->assert_id));
99bdccdb85SGolan Ben-Ami }
100bdccdb85SGolan Ben-Ami
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)101e705c121SKalle Valo static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
102e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data)
103e705c121SKalle Valo {
104fd1c3318SJohannes Berg unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
105e705c121SKalle Valo struct iwl_mvm *mvm =
106e705c121SKalle Valo container_of(notif_wait, struct iwl_mvm, notif_wait);
107e705c121SKalle Valo struct iwl_mvm_alive_data *alive_data = data;
1085c228d63SSara Sharon struct iwl_umac_alive *umac;
1095c228d63SSara Sharon struct iwl_lmac_alive *lmac1;
1105c228d63SSara Sharon struct iwl_lmac_alive *lmac2 = NULL;
1115c228d63SSara Sharon u16 status;
112cfa5d0caSMordechay Goodstein u32 lmac_error_event_table, umac_error_table;
113708d8c53SJohannes Berg u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
114708d8c53SJohannes Berg UCODE_ALIVE_NTFY, 0);
1155053a451SMukesh Sisodiya u32 i;
116b2f20cf2SMukesh Sisodiya
117e705c121SKalle Valo
118c0941aceSMukesh Sisodiya if (version == 6) {
119c0941aceSMukesh Sisodiya struct iwl_alive_ntf_v6 *palive;
120c0941aceSMukesh Sisodiya
121c0941aceSMukesh Sisodiya if (pkt_len < sizeof(*palive))
122c0941aceSMukesh Sisodiya return false;
123c0941aceSMukesh Sisodiya
124c0941aceSMukesh Sisodiya palive = (void *)pkt->data;
125c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_enable =
126c0941aceSMukesh Sisodiya le32_to_cpu(palive->imr.enabled);
127c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size =
128c0941aceSMukesh Sisodiya le32_to_cpu(palive->imr.size);
129c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr2sram_remainbyte =
130c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size;
131c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_base_addr =
132c0941aceSMukesh Sisodiya palive->imr.base_addr;
133c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_curr_addr =
134c0941aceSMukesh Sisodiya le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
135c0941aceSMukesh Sisodiya IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
136c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_enable,
137c0941aceSMukesh Sisodiya mvm->trans->dbg.imr_data.imr_size,
138c0941aceSMukesh Sisodiya le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
1395053a451SMukesh Sisodiya
1405053a451SMukesh Sisodiya if (!mvm->trans->dbg.imr_data.imr_enable) {
1415053a451SMukesh Sisodiya for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
1425053a451SMukesh Sisodiya struct iwl_ucode_tlv *reg_tlv;
1435053a451SMukesh Sisodiya struct iwl_fw_ini_region_tlv *reg;
1445053a451SMukesh Sisodiya
1455053a451SMukesh Sisodiya reg_tlv = mvm->trans->dbg.active_regions[i];
1465053a451SMukesh Sisodiya if (!reg_tlv)
1475053a451SMukesh Sisodiya continue;
1485053a451SMukesh Sisodiya
1495053a451SMukesh Sisodiya reg = (void *)reg_tlv->data;
15090824f2fSLuca Coelho /*
1515053a451SMukesh Sisodiya * We have only one DRAM IMR region, so we
1525053a451SMukesh Sisodiya * can break as soon as we find the first
1535053a451SMukesh Sisodiya * one.
15490824f2fSLuca Coelho */
1555053a451SMukesh Sisodiya if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
1565053a451SMukesh Sisodiya mvm->trans->dbg.unsupported_region_msk |= BIT(i);
1575053a451SMukesh Sisodiya break;
1585053a451SMukesh Sisodiya }
1595053a451SMukesh Sisodiya }
1605053a451SMukesh Sisodiya }
161c0941aceSMukesh Sisodiya }
162c0941aceSMukesh Sisodiya
163c0941aceSMukesh Sisodiya if (version >= 5) {
16490824f2fSLuca Coelho struct iwl_alive_ntf_v5 *palive;
16590824f2fSLuca Coelho
166fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive))
167fd1c3318SJohannes Berg return false;
168fd1c3318SJohannes Berg
16990824f2fSLuca Coelho palive = (void *)pkt->data;
17090824f2fSLuca Coelho umac = &palive->umac_data;
17190824f2fSLuca Coelho lmac1 = &palive->lmac_data[0];
17290824f2fSLuca Coelho lmac2 = &palive->lmac_data[1];
17390824f2fSLuca Coelho status = le16_to_cpu(palive->status);
17490824f2fSLuca Coelho
17590824f2fSLuca Coelho mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
17690824f2fSLuca Coelho mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
17790824f2fSLuca Coelho mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
17890824f2fSLuca Coelho
17990824f2fSLuca Coelho IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
18090824f2fSLuca Coelho mvm->trans->sku_id[0],
18190824f2fSLuca Coelho mvm->trans->sku_id[1],
18290824f2fSLuca Coelho mvm->trans->sku_id[2]);
18390824f2fSLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
1849422b978SLuca Coelho struct iwl_alive_ntf_v4 *palive;
1859422b978SLuca Coelho
186fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive))
187fd1c3318SJohannes Berg return false;
188fd1c3318SJohannes Berg
189e705c121SKalle Valo palive = (void *)pkt->data;
1905c228d63SSara Sharon umac = &palive->umac_data;
1915c228d63SSara Sharon lmac1 = &palive->lmac_data[0];
1925c228d63SSara Sharon lmac2 = &palive->lmac_data[1];
1935c228d63SSara Sharon status = le16_to_cpu(palive->status);
1949422b978SLuca Coelho } else if (iwl_rx_packet_payload_len(pkt) ==
1959422b978SLuca Coelho sizeof(struct iwl_alive_ntf_v3)) {
1969422b978SLuca Coelho struct iwl_alive_ntf_v3 *palive3;
1979422b978SLuca Coelho
198fd1c3318SJohannes Berg if (pkt_len < sizeof(*palive3))
199fd1c3318SJohannes Berg return false;
200fd1c3318SJohannes Berg
2015c228d63SSara Sharon palive3 = (void *)pkt->data;
2025c228d63SSara Sharon umac = &palive3->umac_data;
2035c228d63SSara Sharon lmac1 = &palive3->lmac_data;
2045c228d63SSara Sharon status = le16_to_cpu(palive3->status);
2059422b978SLuca Coelho } else {
2069422b978SLuca Coelho WARN(1, "unsupported alive notification (size %d)\n",
2079422b978SLuca Coelho iwl_rx_packet_payload_len(pkt));
2089422b978SLuca Coelho /* get timeout later */
2099422b978SLuca Coelho return false;
2105c228d63SSara Sharon }
211e705c121SKalle Valo
21222463857SShahar S Matityahu lmac_error_event_table =
21322463857SShahar S Matityahu le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
21422463857SShahar S Matityahu iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
215e705c121SKalle Valo
21622463857SShahar S Matityahu if (lmac2)
21791c28b83SShahar S Matityahu mvm->trans->dbg.lmac_error_event_table[1] =
21822463857SShahar S Matityahu le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
21922463857SShahar S Matityahu
2204f7411d6SRoee Goldfiner umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
2214f7411d6SRoee Goldfiner ~FW_ADDR_CACHE_CONTROL;
2225c228d63SSara Sharon
223cfa5d0caSMordechay Goodstein if (umac_error_table) {
224cfa5d0caSMordechay Goodstein if (umac_error_table >=
225834f920eSMukesh Sisodiya mvm->trans->cfg->min_umac_error_event_table) {
226cfa5d0caSMordechay Goodstein iwl_fw_umac_set_alive_err_table(mvm->trans,
227cfa5d0caSMordechay Goodstein umac_error_table);
2283485e76eSLuca Coelho } else {
229fb5b2846SLuca Coelho IWL_ERR(mvm,
230fb5b2846SLuca Coelho "Not valid error log pointer 0x%08X for %s uCode\n",
231cfa5d0caSMordechay Goodstein umac_error_table,
232fb5b2846SLuca Coelho (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
233fb5b2846SLuca Coelho "Init" : "RT");
2343485e76eSLuca Coelho }
235cfa5d0caSMordechay Goodstein }
23622463857SShahar S Matityahu
23722463857SShahar S Matityahu alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
2385c228d63SSara Sharon alive_data->valid = status == IWL_ALIVE_STATUS_OK;
239e705c121SKalle Valo
240e705c121SKalle Valo IWL_DEBUG_FW(mvm,
2415c228d63SSara Sharon "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
2425c228d63SSara Sharon status, lmac1->ver_type, lmac1->ver_subtype);
2435c228d63SSara Sharon
2445c228d63SSara Sharon if (lmac2)
2455c228d63SSara Sharon IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
246e705c121SKalle Valo
247e705c121SKalle Valo IWL_DEBUG_FW(mvm,
248e705c121SKalle Valo "UMAC version: Major - 0x%x, Minor - 0x%x\n",
2495c228d63SSara Sharon le32_to_cpu(umac->umac_major),
2505c228d63SSara Sharon le32_to_cpu(umac->umac_minor));
251e705c121SKalle Valo
2520a3a3e9eSShahar S Matityahu iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
2530a3a3e9eSShahar S Matityahu
254e705c121SKalle Valo return true;
255e705c121SKalle Valo }
256e705c121SKalle Valo
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)2571f370650SSara Sharon static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
2581f370650SSara Sharon struct iwl_rx_packet *pkt, void *data)
2591f370650SSara Sharon {
2601f370650SSara Sharon WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
2611f370650SSara Sharon
2621f370650SSara Sharon return true;
2631f370650SSara Sharon }
2641f370650SSara Sharon
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)265e705c121SKalle Valo static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
266e705c121SKalle Valo struct iwl_rx_packet *pkt, void *data)
267e705c121SKalle Valo {
268e705c121SKalle Valo struct iwl_phy_db *phy_db = data;
269e705c121SKalle Valo
270e705c121SKalle Valo if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
271e705c121SKalle Valo WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
272e705c121SKalle Valo return true;
273e705c121SKalle Valo }
274e705c121SKalle Valo
275ce1f2778SSara Sharon WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
276e705c121SKalle Valo
277e705c121SKalle Valo return false;
278e705c121SKalle Valo }
279e705c121SKalle Valo
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)280a7de31d5SMordechay Goodstein static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
281a7de31d5SMordechay Goodstein {
282184f10dbSMordechay Goodstein #define IWL_FW_PRINT_REG_INFO(reg_name) \
283184f10dbSMordechay Goodstein IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
284184f10dbSMordechay Goodstein
285a7de31d5SMordechay Goodstein struct iwl_trans *trans = mvm->trans;
286a7de31d5SMordechay Goodstein enum iwl_device_family device_family = trans->trans_cfg->device_family;
287a7de31d5SMordechay Goodstein
288a7de31d5SMordechay Goodstein if (device_family < IWL_DEVICE_FAMILY_8000)
289a7de31d5SMordechay Goodstein return;
290a7de31d5SMordechay Goodstein
291a7de31d5SMordechay Goodstein if (device_family <= IWL_DEVICE_FAMILY_9000)
292184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
293a7de31d5SMordechay Goodstein else
294184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
295f2f17ca0SMordechay Goodstein
296184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
297f2f17ca0SMordechay Goodstein
298184f10dbSMordechay Goodstein /* print OPT info */
299184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
300184f10dbSMordechay Goodstein IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
301a7de31d5SMordechay Goodstein }
302a7de31d5SMordechay Goodstein
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)303e705c121SKalle Valo static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
304e705c121SKalle Valo enum iwl_ucode_type ucode_type)
305e705c121SKalle Valo {
306e705c121SKalle Valo struct iwl_notification_wait alive_wait;
30794a8d87cSLuca Coelho struct iwl_mvm_alive_data alive_data = {};
308e705c121SKalle Valo const struct fw_img *fw;
309cfbc6c4cSSara Sharon int ret;
310702e975dSJohannes Berg enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
3119422b978SLuca Coelho static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
312b3500b47SEmmanuel Grumbach bool run_in_rfkill =
313b3500b47SEmmanuel Grumbach ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
3145e31b3dfSMukesh Sisodiya u8 count;
3155e31b3dfSMukesh Sisodiya struct iwl_pc_data *pc_data;
316e705c121SKalle Valo
317e705c121SKalle Valo if (ucode_type == IWL_UCODE_REGULAR &&
3183d2d4422SGolan Ben-Ami iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
3193d2d4422SGolan Ben-Ami !(fw_has_capa(&mvm->fw->ucode_capa,
3203d2d4422SGolan Ben-Ami IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
321612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
322e705c121SKalle Valo else
323612da1efSSharon Dvir fw = iwl_get_ucode_image(mvm->fw, ucode_type);
324e705c121SKalle Valo if (WARN_ON(!fw))
325e705c121SKalle Valo return -EINVAL;
326702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
32765b280feSJohannes Berg clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
328e705c121SKalle Valo
329e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
330e705c121SKalle Valo alive_cmd, ARRAY_SIZE(alive_cmd),
331e705c121SKalle Valo iwl_alive_fn, &alive_data);
332e705c121SKalle Valo
333b3500b47SEmmanuel Grumbach /*
334b3500b47SEmmanuel Grumbach * We want to load the INIT firmware even in RFKILL
335b3500b47SEmmanuel Grumbach * For the unified firmware case, the ucode_type is not
336b3500b47SEmmanuel Grumbach * INIT, but we still need to run it.
337b3500b47SEmmanuel Grumbach */
338b3500b47SEmmanuel Grumbach ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
339e705c121SKalle Valo if (ret) {
340702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type);
341e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &alive_wait);
342e705c121SKalle Valo return ret;
343e705c121SKalle Valo }
344e705c121SKalle Valo
345e705c121SKalle Valo /*
346e705c121SKalle Valo * Some things may run in the background now, but we
347e705c121SKalle Valo * just wait for the ALIVE notification here.
348e705c121SKalle Valo */
349e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
350e705c121SKalle Valo MVM_UCODE_ALIVE_TIMEOUT);
35156731878SDaniel Gabay
35256731878SDaniel Gabay if (mvm->trans->trans_cfg->device_family ==
35356731878SDaniel Gabay IWL_DEVICE_FAMILY_AX210) {
35456731878SDaniel Gabay /* print these registers regardless of alive fail/success */
35556731878SDaniel Gabay IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
35656731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
35756731878SDaniel Gabay IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
35856731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
35956731878SDaniel Gabay IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
36056731878SDaniel Gabay iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
361b8133439SAvraham Stern IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
362b8133439SAvraham Stern iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
36356731878SDaniel Gabay }
36456731878SDaniel Gabay
365e705c121SKalle Valo if (ret) {
366d6be9c1dSSara Sharon struct iwl_trans *trans = mvm->trans;
367d6be9c1dSSara Sharon
3685667ccc2SMordechay Goodstein /* SecBoot info */
36920f5aef5SJohannes Berg if (trans->trans_cfg->device_family >=
37020f5aef5SJohannes Berg IWL_DEVICE_FAMILY_22000) {
371e705c121SKalle Valo IWL_ERR(mvm,
372e705c121SKalle Valo "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
373ea695b7cSShaul Triebitz iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
374ea695b7cSShaul Triebitz iwl_read_umac_prph(trans,
375ea695b7cSShaul Triebitz UMAG_SB_CPU_2_STATUS));
3765667ccc2SMordechay Goodstein } else if (trans->trans_cfg->device_family >=
3775667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_8000) {
3785667ccc2SMordechay Goodstein IWL_ERR(mvm,
3795667ccc2SMordechay Goodstein "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
3805667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_1_STATUS),
3815667ccc2SMordechay Goodstein iwl_read_prph(trans, SB_CPU_2_STATUS));
3825667ccc2SMordechay Goodstein }
3835667ccc2SMordechay Goodstein
384a7de31d5SMordechay Goodstein iwl_mvm_print_pd_notification(mvm);
385a7de31d5SMordechay Goodstein
3865667ccc2SMordechay Goodstein /* LMAC/UMAC PC info */
3875667ccc2SMordechay Goodstein if (trans->trans_cfg->device_family >=
3885e31b3dfSMukesh Sisodiya IWL_DEVICE_FAMILY_22000) {
3895e31b3dfSMukesh Sisodiya pc_data = trans->dbg.pc_data;
3905e31b3dfSMukesh Sisodiya for (count = 0; count < trans->dbg.num_pc;
3915e31b3dfSMukesh Sisodiya count++, pc_data++)
3925e31b3dfSMukesh Sisodiya IWL_ERR(mvm, "%s: 0x%x\n",
3935e31b3dfSMukesh Sisodiya pc_data->pc_name,
3945e31b3dfSMukesh Sisodiya pc_data->pc_address);
3955e31b3dfSMukesh Sisodiya } else if (trans->trans_cfg->device_family >=
3965667ccc2SMordechay Goodstein IWL_DEVICE_FAMILY_9000) {
39720f5aef5SJohannes Berg IWL_ERR(mvm, "UMAC PC: 0x%x\n",
39820f5aef5SJohannes Berg iwl_read_umac_prph(trans,
39920f5aef5SJohannes Berg UREG_UMAC_CURRENT_PC));
40020f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC PC: 0x%x\n",
40120f5aef5SJohannes Berg iwl_read_umac_prph(trans,
40220f5aef5SJohannes Berg UREG_LMAC1_CURRENT_PC));
40320f5aef5SJohannes Berg if (iwl_mvm_is_cdb_supported(mvm))
40420f5aef5SJohannes Berg IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
40520f5aef5SJohannes Berg iwl_read_umac_prph(trans,
40620f5aef5SJohannes Berg UREG_LMAC2_CURRENT_PC));
40720f5aef5SJohannes Berg }
40820f5aef5SJohannes Berg
409b8133439SAvraham Stern if (ret == -ETIMEDOUT && !mvm->pldr_sync)
41020f5aef5SJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt,
41120f5aef5SJohannes Berg FW_DBG_TRIGGER_ALIVE_TIMEOUT);
41220f5aef5SJohannes Berg
413702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type);
414e705c121SKalle Valo return ret;
415e705c121SKalle Valo }
416e705c121SKalle Valo
417e705c121SKalle Valo if (!alive_data.valid) {
418e705c121SKalle Valo IWL_ERR(mvm, "Loaded ucode is not valid!\n");
419702e975dSJohannes Berg iwl_fw_set_current_image(&mvm->fwrt, old_type);
420e705c121SKalle Valo return -EIO;
421e705c121SKalle Valo }
422e705c121SKalle Valo
423f31f7cd9SGregory Greenman /* if reached this point, Alive notification was received */
424f31f7cd9SGregory Greenman iwl_mei_alive_notif(true);
425733eb54fSAvraham Stern
42633182810SAlon Giladi ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
42733182810SAlon Giladi &mvm->fw->ucode_capa);
42870d3ca86SLuca Coelho if (ret) {
42970d3ca86SLuca Coelho IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
43070d3ca86SLuca Coelho iwl_fw_set_current_image(&mvm->fwrt, old_type);
43170d3ca86SLuca Coelho return ret;
43270d3ca86SLuca Coelho }
43370d3ca86SLuca Coelho
434e705c121SKalle Valo iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
435e705c121SKalle Valo
436e705c121SKalle Valo /*
437e705c121SKalle Valo * Note: all the queues are enabled as part of the interface
438e705c121SKalle Valo * initialization, but in firmware restart scenarios they
439e705c121SKalle Valo * could be stopped, so wake them up. In firmware restart,
440e705c121SKalle Valo * mac80211 will have the queues stopped as well until the
441e705c121SKalle Valo * reconfiguration completes. During normal startup, they
442e705c121SKalle Valo * will be empty.
443e705c121SKalle Valo */
444e705c121SKalle Valo
445e705c121SKalle Valo memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
4461c14089eSJohannes Berg /*
4471c14089eSJohannes Berg * Set a 'fake' TID for the command queue, since we use the
4481c14089eSJohannes Berg * hweight() of the tid_bitmap as a refcount now. Not that
4491c14089eSJohannes Berg * we ever even consider the command queue as one we might
4501c14089eSJohannes Berg * want to reuse, but be safe nevertheless.
4511c14089eSJohannes Berg */
4521c14089eSJohannes Berg mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
4531c14089eSJohannes Berg BIT(IWL_MAX_TID_COUNT + 2);
454e705c121SKalle Valo
45565b280feSJohannes Berg set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
456f7805b33SLior Cohen #ifdef CONFIG_IWLWIFI_DEBUGFS
457f7805b33SLior Cohen iwl_fw_set_dbg_rec_on(&mvm->fwrt);
458f7805b33SLior Cohen #endif
459e705c121SKalle Valo
460d3d9b4fcSEmmanuel Grumbach /*
461d3d9b4fcSEmmanuel Grumbach * All the BSSes in the BSS table include the GP2 in the system
462d3d9b4fcSEmmanuel Grumbach * at the beacon Rx time, this is of course no longer relevant
463d3d9b4fcSEmmanuel Grumbach * since we are resetting the firmware.
464d3d9b4fcSEmmanuel Grumbach * Purge all the BSS table.
465d3d9b4fcSEmmanuel Grumbach */
466d3d9b4fcSEmmanuel Grumbach cfg80211_bss_flush(mvm->hw->wiphy);
467d3d9b4fcSEmmanuel Grumbach
468e705c121SKalle Valo return 0;
469e705c121SKalle Valo }
470e705c121SKalle Valo
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)471c4c95454SJohannes Berg static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
472c4c95454SJohannes Berg struct iwl_phy_specific_cfg *phy_filters)
473c4c95454SJohannes Berg {
474c4ace426SGil Adam #ifdef CONFIG_ACPI
475c4c95454SJohannes Berg *phy_filters = mvm->phy_filters;
476c4ace426SGil Adam #endif /* CONFIG_ACPI */
477c4c95454SJohannes Berg }
478c4ace426SGil Adam
479c593d2faSAyala Barazani #if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
iwl_mvm_sgom_init(struct iwl_mvm * mvm)480c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
481c593d2faSAyala Barazani {
482c593d2faSAyala Barazani u8 cmd_ver;
483c593d2faSAyala Barazani int ret;
484c593d2faSAyala Barazani struct iwl_host_cmd cmd = {
485c593d2faSAyala Barazani .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
486c593d2faSAyala Barazani SAR_OFFSET_MAPPING_TABLE_CMD),
487c593d2faSAyala Barazani .flags = 0,
488c593d2faSAyala Barazani .data[0] = &mvm->fwrt.sgom_table,
489c593d2faSAyala Barazani .len[0] = sizeof(mvm->fwrt.sgom_table),
490c593d2faSAyala Barazani .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
491c593d2faSAyala Barazani };
492c593d2faSAyala Barazani
493c593d2faSAyala Barazani if (!mvm->fwrt.sgom_enabled) {
494c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
495c593d2faSAyala Barazani return 0;
496c593d2faSAyala Barazani }
497c593d2faSAyala Barazani
498971cbe50SJohannes Berg cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
499c593d2faSAyala Barazani IWL_FW_CMD_VER_UNKNOWN);
500c593d2faSAyala Barazani
501c593d2faSAyala Barazani if (cmd_ver != 2) {
502c593d2faSAyala Barazani IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
503c593d2faSAyala Barazani cmd_ver);
504c593d2faSAyala Barazani return 0;
505c593d2faSAyala Barazani }
506c593d2faSAyala Barazani
507c593d2faSAyala Barazani ret = iwl_mvm_send_cmd(mvm, &cmd);
508c593d2faSAyala Barazani if (ret < 0)
509c593d2faSAyala Barazani IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
510c593d2faSAyala Barazani
511c593d2faSAyala Barazani return ret;
512c593d2faSAyala Barazani }
513c593d2faSAyala Barazani #else
514c593d2faSAyala Barazani
iwl_mvm_sgom_init(struct iwl_mvm * mvm)515c593d2faSAyala Barazani static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
516c593d2faSAyala Barazani {
517c593d2faSAyala Barazani return 0;
518c593d2faSAyala Barazani }
519c593d2faSAyala Barazani #endif
520c593d2faSAyala Barazani
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)521e705c121SKalle Valo static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
522e705c121SKalle Valo {
523971cbe50SJohannes Berg u32 cmd_id = PHY_CONFIGURATION_CMD;
524c4ace426SGil Adam struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
525702e975dSJohannes Berg enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
526c4ace426SGil Adam u8 cmd_ver;
527c4ace426SGil Adam size_t cmd_size;
528e705c121SKalle Valo
529bb99ff9bSLuca Coelho if (iwl_mvm_has_unified_ucode(mvm) &&
530d923b020SLuca Coelho !mvm->trans->cfg->tx_with_siso_diversity)
531bb99ff9bSLuca Coelho return 0;
532d923b020SLuca Coelho
533d923b020SLuca Coelho if (mvm->trans->cfg->tx_with_siso_diversity) {
534bb99ff9bSLuca Coelho /*
535bb99ff9bSLuca Coelho * TODO: currently we don't set the antenna but letting the NIC
536bb99ff9bSLuca Coelho * to decide which antenna to use. This should come from BIOS.
537bb99ff9bSLuca Coelho */
538bb99ff9bSLuca Coelho phy_cfg_cmd.phy_cfg =
539bb99ff9bSLuca Coelho cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
540bb99ff9bSLuca Coelho }
541bb99ff9bSLuca Coelho
542e705c121SKalle Valo /* Set parameters */
543e705c121SKalle Valo phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
54486a2b204SLuca Coelho
54586a2b204SLuca Coelho /* set flags extra PHY configuration flags from the device's cfg */
5467897dfa2SLuca Coelho phy_cfg_cmd.phy_cfg |=
5477897dfa2SLuca Coelho cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
54886a2b204SLuca Coelho
549e705c121SKalle Valo phy_cfg_cmd.calib_control.event_trigger =
550e705c121SKalle Valo mvm->fw->default_calib[ucode_type].event_trigger;
551e705c121SKalle Valo phy_cfg_cmd.calib_control.flow_trigger =
552e705c121SKalle Valo mvm->fw->default_calib[ucode_type].flow_trigger;
553e705c121SKalle Valo
554971cbe50SJohannes Berg cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
555e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN);
556c4c95454SJohannes Berg if (cmd_ver >= 3)
557c4c95454SJohannes Berg iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
558c4ace426SGil Adam
559e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
560e705c121SKalle Valo phy_cfg_cmd.phy_cfg);
561c4ace426SGil Adam cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
562c4ace426SGil Adam sizeof(struct iwl_phy_cfg_cmd_v1);
563971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
564e705c121SKalle Valo }
565e705c121SKalle Valo
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)566e305a408SMukesh Sisodiya static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
567e305a408SMukesh Sisodiya {
568e305a408SMukesh Sisodiya struct iwl_notification_wait init_wait;
569e305a408SMukesh Sisodiya struct iwl_nvm_access_complete_cmd nvm_complete = {};
570e305a408SMukesh Sisodiya struct iwl_init_extended_cfg_cmd init_cfg = {
571e305a408SMukesh Sisodiya .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
572e305a408SMukesh Sisodiya };
573e305a408SMukesh Sisodiya static const u16 init_complete[] = {
574e305a408SMukesh Sisodiya INIT_COMPLETE_NOTIF,
575e305a408SMukesh Sisodiya };
576e305a408SMukesh Sisodiya int ret;
577e305a408SMukesh Sisodiya
578e305a408SMukesh Sisodiya if (mvm->trans->cfg->tx_with_siso_diversity)
579e305a408SMukesh Sisodiya init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
580e305a408SMukesh Sisodiya
581e305a408SMukesh Sisodiya lockdep_assert_held(&mvm->mutex);
582e305a408SMukesh Sisodiya
583e305a408SMukesh Sisodiya mvm->rfkill_safe_init_done = false;
584e305a408SMukesh Sisodiya
585e305a408SMukesh Sisodiya iwl_init_notification_wait(&mvm->notif_wait,
586e305a408SMukesh Sisodiya &init_wait,
587e305a408SMukesh Sisodiya init_complete,
588e305a408SMukesh Sisodiya ARRAY_SIZE(init_complete),
589e305a408SMukesh Sisodiya iwl_wait_init_complete,
590e305a408SMukesh Sisodiya NULL);
591e305a408SMukesh Sisodiya
592e305a408SMukesh Sisodiya iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
593e305a408SMukesh Sisodiya
594e305a408SMukesh Sisodiya /* Will also start the device */
595e305a408SMukesh Sisodiya ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
596e305a408SMukesh Sisodiya if (ret) {
597e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
598e305a408SMukesh Sisodiya goto error;
599e305a408SMukesh Sisodiya }
600e305a408SMukesh Sisodiya iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
601e305a408SMukesh Sisodiya NULL);
602e305a408SMukesh Sisodiya
603e305a408SMukesh Sisodiya /* Send init config command to mark that we are sending NVM access
604e305a408SMukesh Sisodiya * commands
605e305a408SMukesh Sisodiya */
606e305a408SMukesh Sisodiya ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
607e305a408SMukesh Sisodiya INIT_EXTENDED_CFG_CMD),
608e305a408SMukesh Sisodiya CMD_SEND_IN_RFKILL,
609e305a408SMukesh Sisodiya sizeof(init_cfg), &init_cfg);
610e305a408SMukesh Sisodiya if (ret) {
611e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to run init config command: %d\n",
612e305a408SMukesh Sisodiya ret);
613e305a408SMukesh Sisodiya goto error;
614e305a408SMukesh Sisodiya }
615e305a408SMukesh Sisodiya
616e305a408SMukesh Sisodiya /* Load NVM to NIC if needed */
617e305a408SMukesh Sisodiya if (mvm->nvm_file_name) {
618e305a408SMukesh Sisodiya ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
619e305a408SMukesh Sisodiya mvm->nvm_sections);
620e305a408SMukesh Sisodiya if (ret)
621e305a408SMukesh Sisodiya goto error;
622e305a408SMukesh Sisodiya ret = iwl_mvm_load_nvm_to_nic(mvm);
623e305a408SMukesh Sisodiya if (ret)
624e305a408SMukesh Sisodiya goto error;
625e305a408SMukesh Sisodiya }
626e305a408SMukesh Sisodiya
627e305a408SMukesh Sisodiya if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
628e305a408SMukesh Sisodiya ret = iwl_nvm_init(mvm);
629e305a408SMukesh Sisodiya if (ret) {
630e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
631e305a408SMukesh Sisodiya goto error;
632e305a408SMukesh Sisodiya }
633e305a408SMukesh Sisodiya }
634e305a408SMukesh Sisodiya
635e305a408SMukesh Sisodiya ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
636e305a408SMukesh Sisodiya NVM_ACCESS_COMPLETE),
637e305a408SMukesh Sisodiya CMD_SEND_IN_RFKILL,
638e305a408SMukesh Sisodiya sizeof(nvm_complete), &nvm_complete);
639e305a408SMukesh Sisodiya if (ret) {
640e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
641e305a408SMukesh Sisodiya ret);
642e305a408SMukesh Sisodiya goto error;
643e305a408SMukesh Sisodiya }
644e305a408SMukesh Sisodiya
645d2ccc5c1SMukesh Sisodiya ret = iwl_send_phy_cfg_cmd(mvm);
646d2ccc5c1SMukesh Sisodiya if (ret) {
647d2ccc5c1SMukesh Sisodiya IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
648d2ccc5c1SMukesh Sisodiya ret);
649d2ccc5c1SMukesh Sisodiya goto error;
650d2ccc5c1SMukesh Sisodiya }
651d2ccc5c1SMukesh Sisodiya
652e305a408SMukesh Sisodiya /* We wait for the INIT complete notification */
653e305a408SMukesh Sisodiya ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
654e305a408SMukesh Sisodiya MVM_UCODE_ALIVE_TIMEOUT);
655e305a408SMukesh Sisodiya if (ret)
656e305a408SMukesh Sisodiya return ret;
657e305a408SMukesh Sisodiya
658e305a408SMukesh Sisodiya /* Read the NVM only at driver load time, no need to do this twice */
659e305a408SMukesh Sisodiya if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
660e305a408SMukesh Sisodiya mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
661e305a408SMukesh Sisodiya if (IS_ERR(mvm->nvm_data)) {
662e305a408SMukesh Sisodiya ret = PTR_ERR(mvm->nvm_data);
663e305a408SMukesh Sisodiya mvm->nvm_data = NULL;
664e305a408SMukesh Sisodiya IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
665e305a408SMukesh Sisodiya return ret;
666e305a408SMukesh Sisodiya }
667e305a408SMukesh Sisodiya }
668e305a408SMukesh Sisodiya
669e305a408SMukesh Sisodiya mvm->rfkill_safe_init_done = true;
670e305a408SMukesh Sisodiya
671e305a408SMukesh Sisodiya return 0;
672e305a408SMukesh Sisodiya
673e305a408SMukesh Sisodiya error:
674e305a408SMukesh Sisodiya iwl_remove_notification(&mvm->notif_wait, &init_wait);
675e305a408SMukesh Sisodiya return ret;
676e305a408SMukesh Sisodiya }
677e305a408SMukesh Sisodiya
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)6783b25f1afSEmmanuel Grumbach int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
679e705c121SKalle Valo {
680e705c121SKalle Valo struct iwl_notification_wait calib_wait;
681e705c121SKalle Valo static const u16 init_complete[] = {
682e705c121SKalle Valo INIT_COMPLETE_NOTIF,
683e705c121SKalle Valo CALIB_RES_NOTIF_PHY_DB
684e705c121SKalle Valo };
685e705c121SKalle Valo int ret;
686e705c121SKalle Valo
6877d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm))
68852b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm);
6898c5f47b1SJohannes Berg
690e705c121SKalle Valo lockdep_assert_held(&mvm->mutex);
691e705c121SKalle Valo
69294022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false;
693e705c121SKalle Valo
694e705c121SKalle Valo iwl_init_notification_wait(&mvm->notif_wait,
695e705c121SKalle Valo &calib_wait,
696e705c121SKalle Valo init_complete,
697e705c121SKalle Valo ARRAY_SIZE(init_complete),
698e705c121SKalle Valo iwl_wait_phy_db_entry,
699e705c121SKalle Valo mvm->phy_db);
700e705c121SKalle Valo
70111f8c533SLuca Coelho iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
70211f8c533SLuca Coelho
703e705c121SKalle Valo /* Will also start the device */
704e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
705e705c121SKalle Valo if (ret) {
706e705c121SKalle Valo IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
70700e0c6c8SLuca Coelho goto remove_notif;
708e705c121SKalle Valo }
709e705c121SKalle Valo
7107d34a7d7SLuca Coelho if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
711b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm);
712e705c121SKalle Valo if (ret)
71300e0c6c8SLuca Coelho goto remove_notif;
714b3de3ef4SEmmanuel Grumbach }
715e705c121SKalle Valo
716e705c121SKalle Valo /* Read the NVM only at driver load time, no need to do this twice */
7173b25f1afSEmmanuel Grumbach if (!mvm->nvm_data) {
7185bd1d2c1SLuca Coelho ret = iwl_nvm_init(mvm);
719e705c121SKalle Valo if (ret) {
720e705c121SKalle Valo IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
72100e0c6c8SLuca Coelho goto remove_notif;
722e705c121SKalle Valo }
723e705c121SKalle Valo }
724e705c121SKalle Valo
725e705c121SKalle Valo /* In case we read the NVM from external file, load it to the NIC */
7269ce505feSAbhishek Naik if (mvm->nvm_file_name) {
7279ce505feSAbhishek Naik ret = iwl_mvm_load_nvm_to_nic(mvm);
7289ce505feSAbhishek Naik if (ret)
7299ce505feSAbhishek Naik goto remove_notif;
7309ce505feSAbhishek Naik }
731e705c121SKalle Valo
73264866e5dSLuca Coelho WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
73364866e5dSLuca Coelho "Too old NVM version (0x%0x, required = 0x%0x)",
73464866e5dSLuca Coelho mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
735e705c121SKalle Valo
736e705c121SKalle Valo /*
737e705c121SKalle Valo * abort after reading the nvm in case RF Kill is on, we will complete
738e705c121SKalle Valo * the init seq later when RF kill will switch to off
739e705c121SKalle Valo */
740e705c121SKalle Valo if (iwl_mvm_is_radio_hw_killed(mvm)) {
741e705c121SKalle Valo IWL_DEBUG_RF_KILL(mvm,
742e705c121SKalle Valo "jump over all phy activities due to RF kill\n");
74300e0c6c8SLuca Coelho goto remove_notif;
744e705c121SKalle Valo }
745e705c121SKalle Valo
746b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = true;
747e705c121SKalle Valo
748e705c121SKalle Valo /* Send TX valid antennas before triggering calibrations */
749e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
750e705c121SKalle Valo if (ret)
75100e0c6c8SLuca Coelho goto remove_notif;
752e705c121SKalle Valo
753e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm);
754e705c121SKalle Valo if (ret) {
755e705c121SKalle Valo IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
756e705c121SKalle Valo ret);
75700e0c6c8SLuca Coelho goto remove_notif;
758e705c121SKalle Valo }
759e705c121SKalle Valo
760e705c121SKalle Valo /*
761e705c121SKalle Valo * Some things may run in the background now, but we
762e705c121SKalle Valo * just wait for the calibration complete notification.
763e705c121SKalle Valo */
764e705c121SKalle Valo ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
765e705c121SKalle Valo MVM_UCODE_CALIB_TIMEOUT);
76600e0c6c8SLuca Coelho if (!ret)
767e705c121SKalle Valo goto out;
768e705c121SKalle Valo
76900e0c6c8SLuca Coelho if (iwl_mvm_is_radio_hw_killed(mvm)) {
77000e0c6c8SLuca Coelho IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
77100e0c6c8SLuca Coelho ret = 0;
77200e0c6c8SLuca Coelho } else {
77300e0c6c8SLuca Coelho IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
77400e0c6c8SLuca Coelho ret);
77500e0c6c8SLuca Coelho }
77600e0c6c8SLuca Coelho
77700e0c6c8SLuca Coelho goto out;
77800e0c6c8SLuca Coelho
77900e0c6c8SLuca Coelho remove_notif:
780e705c121SKalle Valo iwl_remove_notification(&mvm->notif_wait, &calib_wait);
781e705c121SKalle Valo out:
782b3500b47SEmmanuel Grumbach mvm->rfkill_safe_init_done = false;
783e705c121SKalle Valo if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
784e705c121SKalle Valo /* we want to debug INIT and we have no NVM - fake */
785e705c121SKalle Valo mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
786e705c121SKalle Valo sizeof(struct ieee80211_channel) +
787e705c121SKalle Valo sizeof(struct ieee80211_rate),
788e705c121SKalle Valo GFP_KERNEL);
789e705c121SKalle Valo if (!mvm->nvm_data)
790e705c121SKalle Valo return -ENOMEM;
791e705c121SKalle Valo mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
792e705c121SKalle Valo mvm->nvm_data->bands[0].n_channels = 1;
793e705c121SKalle Valo mvm->nvm_data->bands[0].n_bitrates = 1;
794e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates =
795*8ba438efSChristophe JAILLET (void *)(mvm->nvm_data->channels + 1);
796e705c121SKalle Valo mvm->nvm_data->bands[0].bitrates->hw_value = 10;
797e705c121SKalle Valo }
798e705c121SKalle Valo
799e705c121SKalle Valo return ret;
800e705c121SKalle Valo }
801e705c121SKalle Valo
iwl_mvm_config_ltr(struct iwl_mvm * mvm)802e705c121SKalle Valo static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
803e705c121SKalle Valo {
804e705c121SKalle Valo struct iwl_ltr_config_cmd cmd = {
805e705c121SKalle Valo .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
806e705c121SKalle Valo };
807e705c121SKalle Valo
808e705c121SKalle Valo if (!mvm->trans->ltr_enabled)
809e705c121SKalle Valo return 0;
810e705c121SKalle Valo
811e705c121SKalle Valo return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
812e705c121SKalle Valo sizeof(cmd), &cmd);
813e705c121SKalle Valo }
814e705c121SKalle Valo
815c386dacbSHaim Dreyfuss #ifdef CONFIG_ACPI
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)81642ce76d6SLuca Coelho int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
817da2830acSLuca Coelho {
818971cbe50SJohannes Berg u32 cmd_id = REDUCE_TX_POWER_CMD;
819216cdfb5SLuca Coelho struct iwl_dev_tx_power_cmd cmd = {
820216cdfb5SLuca Coelho .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
82171e9378bSLuca Coelho };
8229c08cef8SLuca Coelho __le16 *per_chain;
8231edd56e6SLuca Coelho int ret;
82439c1a972SIhab Zhaika u16 len = 0;
825fbb7957dSLuca Coelho u32 n_subbands;
826971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
827e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN);
828b0aa02b3SAyala Barazani if (cmd_ver == 7) {
829b0aa02b3SAyala Barazani len = sizeof(cmd.v7);
830b0aa02b3SAyala Barazani n_subbands = IWL_NUM_SUB_BANDS_V2;
831b0aa02b3SAyala Barazani per_chain = cmd.v7.per_chain[0][0];
832b0aa02b3SAyala Barazani cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
833b0aa02b3SAyala Barazani } else if (cmd_ver == 6) {
834fbb7957dSLuca Coelho len = sizeof(cmd.v6);
835fbb7957dSLuca Coelho n_subbands = IWL_NUM_SUB_BANDS_V2;
836fbb7957dSLuca Coelho per_chain = cmd.v6.per_chain[0][0];
837fbb7957dSLuca Coelho } else if (fw_has_api(&mvm->fw->ucode_capa,
8389c08cef8SLuca Coelho IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
8390791c2fcSHaim Dreyfuss len = sizeof(cmd.v5);
840e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1;
8419c08cef8SLuca Coelho per_chain = cmd.v5.per_chain[0][0];
8429c08cef8SLuca Coelho } else if (fw_has_capa(&mvm->fw->ucode_capa,
8439c08cef8SLuca Coelho IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
844216cdfb5SLuca Coelho len = sizeof(cmd.v4);
845e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1;
8469c08cef8SLuca Coelho per_chain = cmd.v4.per_chain[0][0];
8479c08cef8SLuca Coelho } else {
848216cdfb5SLuca Coelho len = sizeof(cmd.v3);
849e12cfc7bSMiri Korenblit n_subbands = IWL_NUM_SUB_BANDS_V1;
8509c08cef8SLuca Coelho per_chain = cmd.v3.per_chain[0][0];
8519c08cef8SLuca Coelho }
85255bfa4b9SLuca Coelho
853216cdfb5SLuca Coelho /* all structs have the same common part, add it */
854216cdfb5SLuca Coelho len += sizeof(cmd.common);
85542ce76d6SLuca Coelho
856dac7171cSLuca Coelho ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
857dac7171cSLuca Coelho IWL_NUM_CHAIN_TABLES,
858fbb7957dSLuca Coelho n_subbands, prof_a, prof_b);
8591edd56e6SLuca Coelho
8601edd56e6SLuca Coelho /* return on error or if the profile is disabled (positive number) */
8611edd56e6SLuca Coelho if (ret)
8621edd56e6SLuca Coelho return ret;
8631edd56e6SLuca Coelho
8646d19a5ebSEmmanuel Grumbach iwl_mei_set_power_limit(per_chain);
8656d19a5ebSEmmanuel Grumbach
86642ce76d6SLuca Coelho IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
867971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
86842ce76d6SLuca Coelho }
86942ce76d6SLuca Coelho
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)8707fe90e0eSHaim Dreyfuss int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
8717fe90e0eSHaim Dreyfuss {
872dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
873f604324eSLuca Coelho struct iwl_geo_tx_power_profiles_resp *resp;
8740c3d7282SHaim Dreyfuss u16 len;
87539c1a972SIhab Zhaika int ret;
876c8611331SJohannes Berg struct iwl_host_cmd cmd = {
877c8611331SJohannes Berg .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
878c8611331SJohannes Berg .flags = CMD_WANT_SKB,
879c8611331SJohannes Berg .data = { &geo_tx_cmd },
880c8611331SJohannes Berg };
881971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
882e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN);
8837fe90e0eSHaim Dreyfuss
884dd2a1256SLuca Coelho /* the ops field is at the same spot for all versions, so set in v1 */
885dd2a1256SLuca Coelho geo_tx_cmd.v1.ops =
886dd2a1256SLuca Coelho cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
887dd2a1256SLuca Coelho
88897f8a3d1SAyala Barazani if (cmd_ver == 5)
88997f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v5);
89097f8a3d1SAyala Barazani else if (cmd_ver == 4)
89197f8a3d1SAyala Barazani len = sizeof(geo_tx_cmd.v4);
89297f8a3d1SAyala Barazani else if (cmd_ver == 3)
8930ea788edSLuca Coelho len = sizeof(geo_tx_cmd.v3);
8940ea788edSLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
895dd2a1256SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER))
896dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v2);
897dd2a1256SLuca Coelho else
898dd2a1256SLuca Coelho len = sizeof(geo_tx_cmd.v1);
8990c3d7282SHaim Dreyfuss
90039c1a972SIhab Zhaika if (!iwl_sar_geo_support(&mvm->fwrt))
90139c1a972SIhab Zhaika return -EOPNOTSUPP;
90239c1a972SIhab Zhaika
903c8611331SJohannes Berg cmd.len[0] = len;
9047fe90e0eSHaim Dreyfuss
9057fe90e0eSHaim Dreyfuss ret = iwl_mvm_send_cmd(mvm, &cmd);
9067fe90e0eSHaim Dreyfuss if (ret) {
9077fe90e0eSHaim Dreyfuss IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
9087fe90e0eSHaim Dreyfuss return ret;
9097fe90e0eSHaim Dreyfuss }
910f604324eSLuca Coelho
911f604324eSLuca Coelho resp = (void *)cmd.resp_pkt->data;
912f604324eSLuca Coelho ret = le32_to_cpu(resp->profile_idx);
913f604324eSLuca Coelho
91497f8a3d1SAyala Barazani if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
915f604324eSLuca Coelho ret = -EIO;
916f604324eSLuca Coelho
9177fe90e0eSHaim Dreyfuss iwl_free_resp(&cmd);
9187fe90e0eSHaim Dreyfuss return ret;
9197fe90e0eSHaim Dreyfuss }
9207fe90e0eSHaim Dreyfuss
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)921a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
922a6bff3cbSHaim Dreyfuss {
923971cbe50SJohannes Berg u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
924dd2a1256SLuca Coelho union iwl_geo_tx_power_profiles_cmd cmd;
92539c1a972SIhab Zhaika u16 len;
92645acebf8SNaftali Goldstein u32 n_bands;
92797f8a3d1SAyala Barazani u32 n_profiles;
928ac9952f6SLuca Coelho u32 sk = 0;
9290433ae55SGolan Ben Ami int ret;
930971cbe50SJohannes Berg u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
931e80bfd11SMordechay Goodstein IWL_FW_CMD_VER_UNKNOWN);
932a6bff3cbSHaim Dreyfuss
93345acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
93445acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
93545acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
93697f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
93797f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
93897f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
93997f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
94097f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
94197f8a3d1SAyala Barazani
94245acebf8SNaftali Goldstein /* the ops field is at the same spot for all versions, so set in v1 */
94345acebf8SNaftali Goldstein cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
94445acebf8SNaftali Goldstein
94597f8a3d1SAyala Barazani if (cmd_ver == 5) {
94697f8a3d1SAyala Barazani len = sizeof(cmd.v5);
94797f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v5.table[0]);
94897f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
94997f8a3d1SAyala Barazani } else if (cmd_ver == 4) {
95097f8a3d1SAyala Barazani len = sizeof(cmd.v4);
95197f8a3d1SAyala Barazani n_bands = ARRAY_SIZE(cmd.v4.table[0]);
95297f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
95397f8a3d1SAyala Barazani } else if (cmd_ver == 3) {
95445acebf8SNaftali Goldstein len = sizeof(cmd.v3);
95545acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v3.table[0]);
95697f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES;
95745acebf8SNaftali Goldstein } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
95845acebf8SNaftali Goldstein IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
95945acebf8SNaftali Goldstein len = sizeof(cmd.v2);
96045acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v2.table[0]);
96197f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES;
96245acebf8SNaftali Goldstein } else {
96345acebf8SNaftali Goldstein len = sizeof(cmd.v1);
96445acebf8SNaftali Goldstein n_bands = ARRAY_SIZE(cmd.v1.table[0]);
96597f8a3d1SAyala Barazani n_profiles = ACPI_NUM_GEO_PROFILES;
96645acebf8SNaftali Goldstein }
96745acebf8SNaftali Goldstein
96845acebf8SNaftali Goldstein BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
96945acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
97045acebf8SNaftali Goldstein offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
97197f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
97297f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
97397f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
97497f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
97597f8a3d1SAyala Barazani offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
97645acebf8SNaftali Goldstein /* the table is at the same position for all versions, so set use v1 */
97797f8a3d1SAyala Barazani ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
97897f8a3d1SAyala Barazani n_bands, n_profiles);
979eca1e56cSEmmanuel Grumbach
9800433ae55SGolan Ben Ami /*
9810433ae55SGolan Ben Ami * It is a valid scenario to not support SAR, or miss wgds table,
9820433ae55SGolan Ben Ami * but in that case there is no need to send the command.
9830433ae55SGolan Ben Ami */
9840433ae55SGolan Ben Ami if (ret)
9850433ae55SGolan Ben Ami return 0;
986a6bff3cbSHaim Dreyfuss
987ac9952f6SLuca Coelho /* Only set to South Korea if the table revision is 1 */
988ac9952f6SLuca Coelho if (mvm->fwrt.geo_rev == 1)
989ac9952f6SLuca Coelho sk = 1;
990ac9952f6SLuca Coelho
99128db1862SLuca Coelho /*
992ac9952f6SLuca Coelho * Set the table_revision to South Korea (1) or not (0). The
993ac9952f6SLuca Coelho * element name is misleading, as it doesn't contain the table
994ac9952f6SLuca Coelho * revision number, but whether the South Korea variation
995ac9952f6SLuca Coelho * should be used.
99628db1862SLuca Coelho * This must be done after calling iwl_sar_geo_init().
99728db1862SLuca Coelho */
99897f8a3d1SAyala Barazani if (cmd_ver == 5)
999ac9952f6SLuca Coelho cmd.v5.table_revision = cpu_to_le32(sk);
100097f8a3d1SAyala Barazani else if (cmd_ver == 4)
1001ac9952f6SLuca Coelho cmd.v4.table_revision = cpu_to_le32(sk);
100297f8a3d1SAyala Barazani else if (cmd_ver == 3)
1003ac9952f6SLuca Coelho cmd.v3.table_revision = cpu_to_le32(sk);
100428db1862SLuca Coelho else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
100528db1862SLuca Coelho IWL_UCODE_TLV_API_SAR_TABLE_VER))
1006ac9952f6SLuca Coelho cmd.v2.table_revision = cpu_to_le32(sk);
100728db1862SLuca Coelho
1008971cbe50SJohannes Berg return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
10096ce1e5c0SGil Adam }
10106ce1e5c0SGil Adam
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)10116ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
10126ce1e5c0SGil Adam {
10138bdc52b9SMiri Korenblit union iwl_ppag_table_cmd cmd;
1014e8e10a37SMatt Chen int ret, cmd_size;
10156ce1e5c0SGil Adam
1016e8e10a37SMatt Chen ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1017b20bdd9cSMiri Korenblit /* Not supporting PPAG table is a valid scenario */
1018e8e10a37SMatt Chen if (ret < 0)
1019b20bdd9cSMiri Korenblit return 0;
1020160bab43SGil Adam
1021f2134f66SGil Adam IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
10226ce1e5c0SGil Adam ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
10236ce1e5c0SGil Adam PER_PLATFORM_ANT_GAIN_CMD),
10248bdc52b9SMiri Korenblit 0, cmd_size, &cmd);
10256ce1e5c0SGil Adam if (ret < 0)
10266ce1e5c0SGil Adam IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
10276ce1e5c0SGil Adam ret);
10286ce1e5c0SGil Adam
10296ce1e5c0SGil Adam return ret;
10306ce1e5c0SGil Adam }
10316ce1e5c0SGil Adam
iwl_mvm_ppag_init(struct iwl_mvm * mvm)10326ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
10336ce1e5c0SGil Adam {
103478a19d52SMiri Korenblit /* no need to read the table, done in INIT stage */
1035e8e10a37SMatt Chen if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
1036a2ac0f48SLuca Coelho return 0;
1037a2ac0f48SLuca Coelho
10386ce1e5c0SGil Adam return iwl_mvm_ppag_send_cmd(mvm);
10396ce1e5c0SGil Adam }
10406ce1e5c0SGil Adam
10412856f623SAyala Barazani static const struct dmi_system_id dmi_tas_approved_list[] = {
10422856f623SAyala Barazani { .ident = "HP",
10432856f623SAyala Barazani .matches = {
10442856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "HP"),
10452856f623SAyala Barazani },
10462856f623SAyala Barazani },
10472856f623SAyala Barazani { .ident = "SAMSUNG",
10482856f623SAyala Barazani .matches = {
10492856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
10502856f623SAyala Barazani },
10512856f623SAyala Barazani },
10522856f623SAyala Barazani { .ident = "LENOVO",
10532856f623SAyala Barazani .matches = {
1054d0246a0eSAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
10552856f623SAyala Barazani },
10562856f623SAyala Barazani },
10572856f623SAyala Barazani { .ident = "DELL",
10582856f623SAyala Barazani .matches = {
10592856f623SAyala Barazani DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
10602856f623SAyala Barazani },
10612856f623SAyala Barazani },
10623ecf3411SAlon Giladi { .ident = "MSFT",
10633ecf3411SAlon Giladi .matches = {
10643ecf3411SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
10653ecf3411SAlon Giladi },
10663ecf3411SAlon Giladi },
106706471b67SAlon Giladi { .ident = "Acer",
106806471b67SAlon Giladi .matches = {
106906471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
107006471b67SAlon Giladi },
107106471b67SAlon Giladi },
107206471b67SAlon Giladi { .ident = "ASUS",
107306471b67SAlon Giladi .matches = {
107406471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
107506471b67SAlon Giladi },
107606471b67SAlon Giladi },
107706471b67SAlon Giladi { .ident = "MSI",
107806471b67SAlon Giladi .matches = {
107906471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."),
108006471b67SAlon Giladi },
108106471b67SAlon Giladi },
108206471b67SAlon Giladi { .ident = "Honor",
108306471b67SAlon Giladi .matches = {
108406471b67SAlon Giladi DMI_MATCH(DMI_SYS_VENDOR, "HONOR"),
108506471b67SAlon Giladi },
108606471b67SAlon Giladi },
10872856f623SAyala Barazani /* keep last */
10882856f623SAyala Barazani {}
10892856f623SAyala Barazani };
10902856f623SAyala Barazani
iwl_mvm_is_vendor_in_approved_list(void)10919457077dSAbhishek Naik bool iwl_mvm_is_vendor_in_approved_list(void)
10929457077dSAbhishek Naik {
10939457077dSAbhishek Naik return dmi_check_system(dmi_tas_approved_list);
10949457077dSAbhishek Naik }
10959457077dSAbhishek Naik
iwl_mvm_add_to_tas_block_list(__le32 * list,__le32 * le_size,unsigned int mcc)1096c3f40c3eSMiri Korenblit static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1097c3f40c3eSMiri Korenblit {
1098c3f40c3eSMiri Korenblit int i;
1099c3f40c3eSMiri Korenblit u32 size = le32_to_cpu(*le_size);
1100c3f40c3eSMiri Korenblit
1101c3f40c3eSMiri Korenblit /* Verify that there is room for another country */
1102c3f40c3eSMiri Korenblit if (size >= IWL_TAS_BLOCK_LIST_MAX)
1103c3f40c3eSMiri Korenblit return false;
1104c3f40c3eSMiri Korenblit
1105c3f40c3eSMiri Korenblit for (i = 0; i < size; i++) {
1106c3f40c3eSMiri Korenblit if (list[i] == cpu_to_le32(mcc))
1107c3f40c3eSMiri Korenblit return true;
1108c3f40c3eSMiri Korenblit }
1109c3f40c3eSMiri Korenblit
1110c3f40c3eSMiri Korenblit list[size++] = cpu_to_le32(mcc);
1111c3f40c3eSMiri Korenblit *le_size = cpu_to_le32(size);
1112c3f40c3eSMiri Korenblit return true;
1113c3f40c3eSMiri Korenblit }
1114c3f40c3eSMiri Korenblit
iwl_mvm_tas_init(struct iwl_mvm * mvm)111528dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
111628dd7ccdSMordechay Goodstein {
1117971cbe50SJohannes Berg u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
111828dd7ccdSMordechay Goodstein int ret;
11196da7ba3aSAyala Barazani union iwl_tas_config_cmd cmd = {};
11206da7ba3aSAyala Barazani int cmd_size, fw_ver;
112128dd7ccdSMordechay Goodstein
11226da7ba3aSAyala Barazani BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
112328dd7ccdSMordechay Goodstein APCI_WTAS_BLACK_LIST_MAX);
112428dd7ccdSMordechay Goodstein
112528dd7ccdSMordechay Goodstein if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
112628dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
112728dd7ccdSMordechay Goodstein return;
112828dd7ccdSMordechay Goodstein }
112928dd7ccdSMordechay Goodstein
1130971cbe50SJohannes Berg fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1131971cbe50SJohannes Berg IWL_FW_CMD_VER_UNKNOWN);
11326da7ba3aSAyala Barazani
11336da7ba3aSAyala Barazani ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
113428dd7ccdSMordechay Goodstein if (ret < 0) {
113528dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm,
113628dd7ccdSMordechay Goodstein "TAS table invalid or unavailable. (%d)\n",
113728dd7ccdSMordechay Goodstein ret);
113828dd7ccdSMordechay Goodstein return;
113928dd7ccdSMordechay Goodstein }
114028dd7ccdSMordechay Goodstein
11417c530588SMiri Korenblit if (ret == 0)
114228dd7ccdSMordechay Goodstein return;
114328dd7ccdSMordechay Goodstein
1144c4fbf653SJohannes Berg if (!iwl_mvm_is_vendor_in_approved_list()) {
1145c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm,
1146c3f40c3eSMiri Korenblit "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1147c3f40c3eSMiri Korenblit dmi_get_system_info(DMI_SYS_VENDOR));
11486da7ba3aSAyala Barazani if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
11496da7ba3aSAyala Barazani &cmd.v4.block_list_size,
11506da7ba3aSAyala Barazani IWL_TAS_US_MCC)) ||
11516da7ba3aSAyala Barazani (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
11526da7ba3aSAyala Barazani &cmd.v4.block_list_size,
11536da7ba3aSAyala Barazani IWL_TAS_CANADA_MCC))) {
1154c3f40c3eSMiri Korenblit IWL_DEBUG_RADIO(mvm,
1155c3f40c3eSMiri Korenblit "Unable to add US/Canada to TAS block list, disabling TAS\n");
1156c3f40c3eSMiri Korenblit return;
1157c3f40c3eSMiri Korenblit }
115806471b67SAlon Giladi } else {
115906471b67SAlon Giladi IWL_DEBUG_RADIO(mvm,
116006471b67SAlon Giladi "System vendor '%s' is in the approved list.\n",
116106471b67SAlon Giladi dmi_get_system_info(DMI_SYS_VENDOR));
1162c3f40c3eSMiri Korenblit }
1163c3f40c3eSMiri Korenblit
11646da7ba3aSAyala Barazani /* v4 is the same size as v3, so no need to differentiate here */
11656da7ba3aSAyala Barazani cmd_size = fw_ver < 3 ?
11667c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v2) :
11677c530588SMiri Korenblit sizeof(struct iwl_tas_config_cmd_v3);
116828dd7ccdSMordechay Goodstein
1169971cbe50SJohannes Berg ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd);
117028dd7ccdSMordechay Goodstein if (ret < 0)
117128dd7ccdSMordechay Goodstein IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
117228dd7ccdSMordechay Goodstein }
1173f5b1cb2eSGil Adam
iwl_mvm_eval_dsm_rfi(struct iwl_mvm * mvm)11744e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
11754e8fe214SGregory Greenman {
11764e8fe214SGregory Greenman u8 value;
117745fe1b6bSLuca Coelho int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
11784e8fe214SGregory Greenman &iwl_rfi_guid, &value);
11794e8fe214SGregory Greenman
11804e8fe214SGregory Greenman if (ret < 0) {
11814e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
11824e8fe214SGregory Greenman
11834e8fe214SGregory Greenman } else if (value >= DSM_VALUE_RFI_MAX) {
11844e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
11854e8fe214SGregory Greenman value);
11864e8fe214SGregory Greenman
11874e8fe214SGregory Greenman } else if (value == DSM_VALUE_RFI_ENABLE) {
11884e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
11894e8fe214SGregory Greenman return DSM_VALUE_RFI_ENABLE;
11904e8fe214SGregory Greenman }
11914e8fe214SGregory Greenman
11924e8fe214SGregory Greenman IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
11934e8fe214SGregory Greenman
11944e8fe214SGregory Greenman /* default behaviour is disabled */
11954e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE;
11964e8fe214SGregory Greenman }
11974e8fe214SGregory Greenman
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1198f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1199f5b1cb2eSGil Adam {
12007119f02bSMiri Korenblit int ret;
12017119f02bSMiri Korenblit u32 value;
12028f323d06SAyala Barazani struct iwl_lari_config_change_cmd_v6 cmd = {};
1203f5b1cb2eSGil Adam
1204f21afabaSHarish Mitty cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1205d2bfda8aSMiri Korenblit
120645fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
12077119f02bSMiri Korenblit &iwl_guid, &value);
12087119f02bSMiri Korenblit if (!ret)
12097119f02bSMiri Korenblit cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1210f5b1cb2eSGil Adam
121145fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
121254b4fda5SAbhishek Naik DSM_FUNC_ENABLE_UNII4_CHAN,
121354b4fda5SAbhishek Naik &iwl_guid, &value);
121454b4fda5SAbhishek Naik if (!ret)
121554b4fda5SAbhishek Naik cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
121654b4fda5SAbhishek Naik
121745fe1b6bSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
12181f578d4fSMiri Korenblit DSM_FUNC_ACTIVATE_CHANNEL,
12191f578d4fSMiri Korenblit &iwl_guid, &value);
12201f578d4fSMiri Korenblit if (!ret)
12211f578d4fSMiri Korenblit cmd.chan_state_active_bitmap = cpu_to_le32(value);
12221f578d4fSMiri Korenblit
1223698b166eSLuca Coelho ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1224698b166eSLuca Coelho DSM_FUNC_ENABLE_6E,
1225698b166eSLuca Coelho &iwl_guid, &value);
1226698b166eSLuca Coelho if (!ret)
1227698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1228698b166eSLuca Coelho
12298f323d06SAyala Barazani ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
12308f323d06SAyala Barazani DSM_FUNC_FORCE_DISABLE_CHANNELS,
12318f323d06SAyala Barazani &iwl_guid, &value);
12328f323d06SAyala Barazani if (!ret)
12338f323d06SAyala Barazani cmd.force_disable_channels_bitmap = cpu_to_le32(value);
12348f323d06SAyala Barazani
123554b4fda5SAbhishek Naik if (cmd.config_bitmap ||
1236698b166eSLuca Coelho cmd.oem_uhb_allow_bitmap ||
123754b4fda5SAbhishek Naik cmd.oem_11ax_allow_bitmap ||
12381f578d4fSMiri Korenblit cmd.oem_unii4_allow_bitmap ||
12398f323d06SAyala Barazani cmd.chan_state_active_bitmap ||
12408f323d06SAyala Barazani cmd.force_disable_channels_bitmap) {
12413c21990bSMiri Korenblit size_t cmd_size;
12423c21990bSMiri Korenblit u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1243971cbe50SJohannes Berg WIDE_ID(REGULATORY_AND_NVM_GROUP,
1244971cbe50SJohannes Berg LARI_CONFIG_CHANGE),
1245971cbe50SJohannes Berg 1);
12468f323d06SAyala Barazani switch (cmd_ver) {
12478f323d06SAyala Barazani case 6:
12488f323d06SAyala Barazani cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
12498f323d06SAyala Barazani break;
12508f323d06SAyala Barazani case 5:
12511f578d4fSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
12528f323d06SAyala Barazani break;
12538f323d06SAyala Barazani case 4:
125454b4fda5SAbhishek Naik cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
12558f323d06SAyala Barazani break;
12568f323d06SAyala Barazani case 3:
12573c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
12588f323d06SAyala Barazani break;
12598f323d06SAyala Barazani case 2:
12603c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
12618f323d06SAyala Barazani break;
12628f323d06SAyala Barazani default:
12633c21990bSMiri Korenblit cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
12648f323d06SAyala Barazani break;
12658f323d06SAyala Barazani }
12663c21990bSMiri Korenblit
12673ce88247SMiri Korenblit IWL_DEBUG_RADIO(mvm,
12687119f02bSMiri Korenblit "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
12697119f02bSMiri Korenblit le32_to_cpu(cmd.config_bitmap),
12707119f02bSMiri Korenblit le32_to_cpu(cmd.oem_11ax_allow_bitmap));
127154b4fda5SAbhishek Naik IWL_DEBUG_RADIO(mvm,
12721f578d4fSMiri Korenblit "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
127354b4fda5SAbhishek Naik le32_to_cpu(cmd.oem_unii4_allow_bitmap),
12741f578d4fSMiri Korenblit le32_to_cpu(cmd.chan_state_active_bitmap),
127554b4fda5SAbhishek Naik cmd_ver);
1276698b166eSLuca Coelho IWL_DEBUG_RADIO(mvm,
12778f323d06SAyala Barazani "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
12788f323d06SAyala Barazani le32_to_cpu(cmd.oem_uhb_allow_bitmap),
12798f323d06SAyala Barazani le32_to_cpu(cmd.force_disable_channels_bitmap));
12807119f02bSMiri Korenblit ret = iwl_mvm_send_cmd_pdu(mvm,
1281f5b1cb2eSGil Adam WIDE_ID(REGULATORY_AND_NVM_GROUP,
1282f5b1cb2eSGil Adam LARI_CONFIG_CHANGE),
12833ce88247SMiri Korenblit 0, cmd_size, &cmd);
12847119f02bSMiri Korenblit if (ret < 0)
1285f5b1cb2eSGil Adam IWL_DEBUG_RADIO(mvm,
1286f5b1cb2eSGil Adam "Failed to send LARI_CONFIG_CHANGE (%d)\n",
12877119f02bSMiri Korenblit ret);
1288f5b1cb2eSGil Adam }
1289f5b1cb2eSGil Adam }
129078a19d52SMiri Korenblit
iwl_mvm_get_acpi_tables(struct iwl_mvm * mvm)129178a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
129278a19d52SMiri Korenblit {
129378a19d52SMiri Korenblit int ret;
129478a19d52SMiri Korenblit
129578a19d52SMiri Korenblit /* read PPAG table */
1296e8e10a37SMatt Chen ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
129778a19d52SMiri Korenblit if (ret < 0) {
129878a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm,
129978a19d52SMiri Korenblit "PPAG BIOS table invalid or unavailable. (%d)\n",
130078a19d52SMiri Korenblit ret);
130178a19d52SMiri Korenblit }
130278a19d52SMiri Korenblit
130378a19d52SMiri Korenblit /* read SAR tables */
130478a19d52SMiri Korenblit ret = iwl_sar_get_wrds_table(&mvm->fwrt);
130578a19d52SMiri Korenblit if (ret < 0) {
130678a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm,
130778a19d52SMiri Korenblit "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
130878a19d52SMiri Korenblit ret);
130978a19d52SMiri Korenblit /*
131078a19d52SMiri Korenblit * If not available, don't fail and don't bother with EWRD and
131178a19d52SMiri Korenblit * WGDS */
131278a19d52SMiri Korenblit
131378a19d52SMiri Korenblit if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
131478a19d52SMiri Korenblit /*
131578a19d52SMiri Korenblit * If basic SAR is not available, we check for WGDS,
131678a19d52SMiri Korenblit * which should *not* be available either. If it is
131778a19d52SMiri Korenblit * available, issue an error, because we can't use SAR
131878a19d52SMiri Korenblit * Geo without basic SAR.
131978a19d52SMiri Korenblit */
132078a19d52SMiri Korenblit IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
132178a19d52SMiri Korenblit }
132278a19d52SMiri Korenblit
132378a19d52SMiri Korenblit } else {
132478a19d52SMiri Korenblit ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
132578a19d52SMiri Korenblit /* if EWRD is not available, we can still use
132678a19d52SMiri Korenblit * WRDS, so don't fail */
132778a19d52SMiri Korenblit if (ret < 0)
132878a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm,
132978a19d52SMiri Korenblit "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
133078a19d52SMiri Korenblit ret);
133178a19d52SMiri Korenblit
133278a19d52SMiri Korenblit /* read geo SAR table */
133378a19d52SMiri Korenblit if (iwl_sar_geo_support(&mvm->fwrt)) {
133478a19d52SMiri Korenblit ret = iwl_sar_get_wgds_table(&mvm->fwrt);
133578a19d52SMiri Korenblit if (ret < 0)
133678a19d52SMiri Korenblit IWL_DEBUG_RADIO(mvm,
133778a19d52SMiri Korenblit "Geo SAR BIOS table invalid or unavailable. (%d)\n",
133878a19d52SMiri Korenblit ret);
133978a19d52SMiri Korenblit /* we don't fail if the table is not available */
134078a19d52SMiri Korenblit }
134178a19d52SMiri Korenblit }
1342c4c95454SJohannes Berg
1343c4c95454SJohannes Berg iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters);
134478a19d52SMiri Korenblit }
134569964905SLuca Coelho #else /* CONFIG_ACPI */
134639c1a972SIhab Zhaika
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)134739c1a972SIhab Zhaika inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
134839c1a972SIhab Zhaika int prof_a, int prof_b)
134969964905SLuca Coelho {
135078a19d52SMiri Korenblit return 1;
135169964905SLuca Coelho }
135269964905SLuca Coelho
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)135339c1a972SIhab Zhaika inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
13545d041c46SLuca Coelho {
13555d041c46SLuca Coelho return -ENOENT;
13565d041c46SLuca Coelho }
13575d041c46SLuca Coelho
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)1358a6bff3cbSHaim Dreyfuss static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1359a6bff3cbSHaim Dreyfuss {
1360a6bff3cbSHaim Dreyfuss return 0;
1361a6bff3cbSHaim Dreyfuss }
136218f1755dSLuca Coelho
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)13636ce1e5c0SGil Adam int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
13646ce1e5c0SGil Adam {
13656ce1e5c0SGil Adam return -ENOENT;
13666ce1e5c0SGil Adam }
13676ce1e5c0SGil Adam
iwl_mvm_ppag_init(struct iwl_mvm * mvm)13686ce1e5c0SGil Adam static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
13696ce1e5c0SGil Adam {
13707937fd32SJohannes Berg return 0;
13716ce1e5c0SGil Adam }
137228dd7ccdSMordechay Goodstein
iwl_mvm_tas_init(struct iwl_mvm * mvm)137328dd7ccdSMordechay Goodstein static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
137428dd7ccdSMordechay Goodstein {
137528dd7ccdSMordechay Goodstein }
1376f5b1cb2eSGil Adam
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1377f5b1cb2eSGil Adam static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1378f5b1cb2eSGil Adam {
1379f5b1cb2eSGil Adam }
13804e8fe214SGregory Greenman
iwl_mvm_is_vendor_in_approved_list(void)13819457077dSAbhishek Naik bool iwl_mvm_is_vendor_in_approved_list(void)
13829457077dSAbhishek Naik {
13839457077dSAbhishek Naik return false;
13849457077dSAbhishek Naik }
13859457077dSAbhishek Naik
iwl_mvm_eval_dsm_rfi(struct iwl_mvm * mvm)13864e8fe214SGregory Greenman static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
13874e8fe214SGregory Greenman {
13884e8fe214SGregory Greenman return DSM_VALUE_RFI_DISABLE;
13894e8fe214SGregory Greenman }
139078a19d52SMiri Korenblit
iwl_mvm_get_acpi_tables(struct iwl_mvm * mvm)139178a19d52SMiri Korenblit void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
139278a19d52SMiri Korenblit {
139378a19d52SMiri Korenblit }
1394c593d2faSAyala Barazani
139569964905SLuca Coelho #endif /* CONFIG_ACPI */
139669964905SLuca Coelho
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1397f130bb75SMordechay Goodstein void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1398f130bb75SMordechay Goodstein {
1399f130bb75SMordechay Goodstein u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1400f130bb75SMordechay Goodstein int ret;
1401f130bb75SMordechay Goodstein u32 resp;
1402f130bb75SMordechay Goodstein
1403f130bb75SMordechay Goodstein struct iwl_fw_error_recovery_cmd recovery_cmd = {
1404f130bb75SMordechay Goodstein .flags = cpu_to_le32(flags),
1405f130bb75SMordechay Goodstein .buf_size = 0,
1406f130bb75SMordechay Goodstein };
1407f130bb75SMordechay Goodstein struct iwl_host_cmd host_cmd = {
1408f130bb75SMordechay Goodstein .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1409f130bb75SMordechay Goodstein .flags = CMD_WANT_SKB,
1410f130bb75SMordechay Goodstein .data = {&recovery_cmd, },
1411f130bb75SMordechay Goodstein .len = {sizeof(recovery_cmd), },
1412f130bb75SMordechay Goodstein };
1413f130bb75SMordechay Goodstein
1414f130bb75SMordechay Goodstein /* no error log was defined in TLV */
1415f130bb75SMordechay Goodstein if (!error_log_size)
1416f130bb75SMordechay Goodstein return;
1417f130bb75SMordechay Goodstein
1418f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) {
1419f130bb75SMordechay Goodstein /* no buf was allocated while HW reset */
1420f130bb75SMordechay Goodstein if (!mvm->error_recovery_buf)
1421f130bb75SMordechay Goodstein return;
1422f130bb75SMordechay Goodstein
1423f130bb75SMordechay Goodstein host_cmd.data[1] = mvm->error_recovery_buf;
1424f130bb75SMordechay Goodstein host_cmd.len[1] = error_log_size;
1425f130bb75SMordechay Goodstein host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1426f130bb75SMordechay Goodstein recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1427f130bb75SMordechay Goodstein }
1428f130bb75SMordechay Goodstein
1429f130bb75SMordechay Goodstein ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1430f130bb75SMordechay Goodstein kfree(mvm->error_recovery_buf);
1431f130bb75SMordechay Goodstein mvm->error_recovery_buf = NULL;
1432f130bb75SMordechay Goodstein
1433f130bb75SMordechay Goodstein if (ret) {
1434f130bb75SMordechay Goodstein IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1435f130bb75SMordechay Goodstein return;
1436f130bb75SMordechay Goodstein }
1437f130bb75SMordechay Goodstein
1438f130bb75SMordechay Goodstein /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1439f130bb75SMordechay Goodstein if (flags & ERROR_RECOVERY_UPDATE_DB) {
1440f130bb75SMordechay Goodstein resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1441f130bb75SMordechay Goodstein if (resp)
1442f130bb75SMordechay Goodstein IWL_ERR(mvm,
1443f130bb75SMordechay Goodstein "Failed to send recovery cmd blob was invalid %d\n",
1444f130bb75SMordechay Goodstein resp);
1445f130bb75SMordechay Goodstein }
1446f130bb75SMordechay Goodstein }
1447f130bb75SMordechay Goodstein
iwl_mvm_sar_init(struct iwl_mvm * mvm)144842ce76d6SLuca Coelho static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
144942ce76d6SLuca Coelho {
14501edd56e6SLuca Coelho return iwl_mvm_sar_select_profile(mvm, 1, 1);
1451da2830acSLuca Coelho }
1452da2830acSLuca Coelho
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)14531f370650SSara Sharon static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
14541f370650SSara Sharon {
14551f370650SSara Sharon int ret;
14561f370650SSara Sharon
14577d6222e2SJohannes Berg if (iwl_mvm_has_unified_ucode(mvm))
145852b15521SEmmanuel Grumbach return iwl_run_unified_mvm_ucode(mvm);
14591f370650SSara Sharon
14603b25f1afSEmmanuel Grumbach ret = iwl_run_init_mvm_ucode(mvm);
14611f370650SSara Sharon
14621f370650SSara Sharon if (ret) {
14631f370650SSara Sharon IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1464f4744258SLiad Kaufman
1465f4744258SLiad Kaufman if (iwlmvm_mod_params.init_dbg)
1466f4744258SLiad Kaufman return 0;
14671f370650SSara Sharon return ret;
14681f370650SSara Sharon }
14691f370650SSara Sharon
1470203c83d3SShahar S Matityahu iwl_fw_dbg_stop_sync(&mvm->fwrt);
1471bab3cb92SEmmanuel Grumbach iwl_trans_stop_device(mvm->trans);
1472bab3cb92SEmmanuel Grumbach ret = iwl_trans_start_hw(mvm->trans);
14731f370650SSara Sharon if (ret)
14741f370650SSara Sharon return ret;
14751f370650SSara Sharon
147694022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = false;
14771f370650SSara Sharon ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
14781f370650SSara Sharon if (ret)
14791f370650SSara Sharon return ret;
14801f370650SSara Sharon
148194022562SEmmanuel Grumbach mvm->rfkill_safe_init_done = true;
148294022562SEmmanuel Grumbach
1483b108d8c7SShahar S Matityahu iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1484b108d8c7SShahar S Matityahu NULL);
1485da2eb669SSara Sharon
1486702e975dSJohannes Berg return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
14871f370650SSara Sharon }
14881f370650SSara Sharon
iwl_mvm_up(struct iwl_mvm * mvm)1489e705c121SKalle Valo int iwl_mvm_up(struct iwl_mvm *mvm)
1490e705c121SKalle Valo {
1491e705c121SKalle Valo int ret, i;
1492e705c121SKalle Valo struct ieee80211_channel *chan;
1493e705c121SKalle Valo struct cfg80211_chan_def chandef;
1494dd36a507STova Mussai struct ieee80211_supported_band *sband = NULL;
1495733eb54fSAvraham Stern u32 sb_cfg;
1496e705c121SKalle Valo
1497e705c121SKalle Valo lockdep_assert_held(&mvm->mutex);
1498e705c121SKalle Valo
1499e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans);
1500e705c121SKalle Valo if (ret)
1501e705c121SKalle Valo return ret;
1502e705c121SKalle Valo
1503733eb54fSAvraham Stern sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
1504b8133439SAvraham Stern mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK);
1505b8133439SAvraham Stern if (mvm->pldr_sync && iwl_mei_pldr_req())
1506274d9aa9SAvraham Stern return -EBUSY;
1507733eb54fSAvraham Stern
15081f370650SSara Sharon ret = iwl_mvm_load_rt_fw(mvm);
1509e705c121SKalle Valo if (ret) {
1510e705c121SKalle Valo IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1511b8133439SAvraham Stern if (ret != -ERFKILL && !mvm->pldr_sync)
151272d3c7bbSJohannes Berg iwl_fw_dbg_error_collect(&mvm->fwrt,
151372d3c7bbSJohannes Berg FW_DBG_TRIGGER_DRIVER);
1514e705c121SKalle Valo goto error;
1515e705c121SKalle Valo }
1516e705c121SKalle Valo
1517b8133439SAvraham Stern /* FW loaded successfully */
1518b8133439SAvraham Stern mvm->pldr_sync = false;
1519b8133439SAvraham Stern
1520d0b813fcSJohannes Berg iwl_get_shared_mem_conf(&mvm->fwrt);
1521e705c121SKalle Valo
1522e705c121SKalle Valo ret = iwl_mvm_sf_update(mvm, NULL, false);
1523e705c121SKalle Valo if (ret)
1524e705c121SKalle Valo IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1525e705c121SKalle Valo
1526a1af4c48SShahar S Matityahu if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
15277174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_INVALID;
1528e705c121SKalle Valo /* if we have a destination, assume EARLY START */
152917b809c9SSara Sharon if (mvm->fw->dbg.dest_tlv)
15307174beb6SJohannes Berg mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
15317174beb6SJohannes Berg iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
15327a14c23dSSara Sharon }
1533e705c121SKalle Valo
1534e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1535e705c121SKalle Valo if (ret)
1536e705c121SKalle Valo goto error;
1537e705c121SKalle Valo
15387d6222e2SJohannes Berg if (!iwl_mvm_has_unified_ucode(mvm)) {
1539e705c121SKalle Valo /* Send phy db control command and then phy db calibration */
1540e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db);
1541e705c121SKalle Valo if (ret)
1542e705c121SKalle Valo goto error;
1543e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm);
1544e705c121SKalle Valo if (ret)
1545e705c121SKalle Valo goto error;
1546d2ccc5c1SMukesh Sisodiya }
1547e705c121SKalle Valo
1548b3de3ef4SEmmanuel Grumbach ret = iwl_mvm_send_bt_init_conf(mvm);
1549b3de3ef4SEmmanuel Grumbach if (ret)
1550b3de3ef4SEmmanuel Grumbach goto error;
1551b3de3ef4SEmmanuel Grumbach
1552cceb4507SShahar S Matityahu if (fw_has_capa(&mvm->fw->ucode_capa,
1553cceb4507SShahar S Matityahu IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1554a8eb340fSEmmanuel Grumbach ret = iwl_set_soc_latency(&mvm->fwrt);
1555cceb4507SShahar S Matityahu if (ret)
1556cceb4507SShahar S Matityahu goto error;
1557cceb4507SShahar S Matityahu }
1558cceb4507SShahar S Matityahu
1559c0a2f819SBenjamin Berg iwl_mvm_lari_cfg(mvm);
1560c0a2f819SBenjamin Berg
156143413a97SSara Sharon /* Init RSS configuration */
15629cd243f2SMordechay Goodstein ret = iwl_configure_rxq(&mvm->fwrt);
15639cd243f2SMordechay Goodstein if (ret)
15648edbfaa1SSara Sharon goto error;
15658edbfaa1SSara Sharon
15668edbfaa1SSara Sharon if (iwl_mvm_has_new_rx_api(mvm)) {
156743413a97SSara Sharon ret = iwl_send_rss_cfg_cmd(mvm);
156843413a97SSara Sharon if (ret) {
156943413a97SSara Sharon IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
157043413a97SSara Sharon ret);
157143413a97SSara Sharon goto error;
157243413a97SSara Sharon }
157343413a97SSara Sharon }
157443413a97SSara Sharon
1575e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */
1576b8a85a1dSJohannes Berg for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1577e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1578b8a85a1dSJohannes Berg RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1579b8a85a1dSJohannes Berg }
1580e705c121SKalle Valo
1581d464550bSYedidya Benshimol for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++)
1582d464550bSYedidya Benshimol RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL);
1583d464550bSYedidya Benshimol
1584d6f6b0d8SGregory Greenman memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map));
1585d6f6b0d8SGregory Greenman
15860ae98812SSara Sharon mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1587e705c121SKalle Valo
1588e705c121SKalle Valo /* reset quota debouncing buffer - 0xff will yield invalid data */
1589e705c121SKalle Valo memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1590e705c121SKalle Valo
159179660869SIlia Lin if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
159297d5be7eSLiad Kaufman ret = iwl_mvm_send_dqa_cmd(mvm);
159397d5be7eSLiad Kaufman if (ret)
159497d5be7eSLiad Kaufman goto error;
159579660869SIlia Lin }
159697d5be7eSLiad Kaufman
15972c2c3647SNathan Errera /*
15982c2c3647SNathan Errera * Add auxiliary station for scanning.
15992c2c3647SNathan Errera * Newer versions of this command implies that the fw uses
16002c2c3647SNathan Errera * internal aux station for all aux activities that don't
16012c2c3647SNathan Errera * requires a dedicated data queue.
16022c2c3647SNathan Errera */
16031724fc78SEmmanuel Grumbach if (!iwl_mvm_has_new_station_api(mvm->fw)) {
16042c2c3647SNathan Errera /*
16052c2c3647SNathan Errera * In old version the aux station uses mac id like other
16062c2c3647SNathan Errera * station and not lmac id
16072c2c3647SNathan Errera */
16082c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1609e705c121SKalle Valo if (ret)
1610e705c121SKalle Valo goto error;
16112c2c3647SNathan Errera }
1612e705c121SKalle Valo
1613e705c121SKalle Valo /* Add all the PHY contexts */
1614dd36a507STova Mussai i = 0;
1615dd36a507STova Mussai while (!sband && i < NUM_NL80211_BANDS)
1616dd36a507STova Mussai sband = mvm->hw->wiphy->bands[i++];
1617dd36a507STova Mussai
1618583d1833SDan Carpenter if (WARN_ON_ONCE(!sband)) {
1619583d1833SDan Carpenter ret = -ENODEV;
1620dd36a507STova Mussai goto error;
1621583d1833SDan Carpenter }
1622dd36a507STova Mussai
1623dd36a507STova Mussai chan = &sband->channels[0];
1624dd36a507STova Mussai
1625e705c121SKalle Valo cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1626e705c121SKalle Valo for (i = 0; i < NUM_PHY_CTX; i++) {
1627e705c121SKalle Valo /*
1628e705c121SKalle Valo * The channel used here isn't relevant as it's
1629e705c121SKalle Valo * going to be overwritten in the other flows.
1630e705c121SKalle Valo * For now use the first channel we have.
1631e705c121SKalle Valo */
1632e705c121SKalle Valo ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1633e705c121SKalle Valo &chandef, 1, 1);
1634e705c121SKalle Valo if (ret)
1635e705c121SKalle Valo goto error;
1636e705c121SKalle Valo }
1637e705c121SKalle Valo
1638c221daf2SChaya Rachel Ivgi if (iwl_mvm_is_tt_in_fw(mvm)) {
1639c221daf2SChaya Rachel Ivgi /* in order to give the responsibility of ct-kill and
1640c221daf2SChaya Rachel Ivgi * TX backoff to FW we need to send empty temperature reporting
1641c221daf2SChaya Rachel Ivgi * cmd during init time
1642c221daf2SChaya Rachel Ivgi */
1643c221daf2SChaya Rachel Ivgi iwl_mvm_send_temp_report_ths_cmd(mvm);
1644c221daf2SChaya Rachel Ivgi } else {
1645e705c121SKalle Valo /* Initialize tx backoffs to the minimal possible */
1646e705c121SKalle Valo iwl_mvm_tt_tx_backoff(mvm, 0);
1647c221daf2SChaya Rachel Ivgi }
16485c89e7bcSChaya Rachel Ivgi
1649242d9c8bSJohannes Berg #ifdef CONFIG_THERMAL
16505c89e7bcSChaya Rachel Ivgi /* TODO: read the budget from BIOS / Platform NVM */
1651944eafc2SChaya Rachel Ivgi
1652944eafc2SChaya Rachel Ivgi /*
1653944eafc2SChaya Rachel Ivgi * In case there is no budget from BIOS / Platform NVM the default
1654944eafc2SChaya Rachel Ivgi * budget should be 2000mW (cooling state 0).
1655944eafc2SChaya Rachel Ivgi */
1656944eafc2SChaya Rachel Ivgi if (iwl_mvm_is_ctdp_supported(mvm)) {
16575c89e7bcSChaya Rachel Ivgi ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
16585c89e7bcSChaya Rachel Ivgi mvm->cooling_dev.cur_state);
165975cfe338SLuca Coelho if (ret)
166075cfe338SLuca Coelho goto error;
166175cfe338SLuca Coelho }
1662c221daf2SChaya Rachel Ivgi #endif
1663e705c121SKalle Valo
1664aa43ae12SAlex Malamud if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1665e705c121SKalle Valo WARN_ON(iwl_mvm_config_ltr(mvm));
1666e705c121SKalle Valo
1667e705c121SKalle Valo ret = iwl_mvm_power_update_device(mvm);
1668e705c121SKalle Valo if (ret)
1669e705c121SKalle Valo goto error;
1670e705c121SKalle Valo
1671e705c121SKalle Valo /*
1672e705c121SKalle Valo * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1673e705c121SKalle Valo * anyway, so don't init MCC.
1674e705c121SKalle Valo */
1675e705c121SKalle Valo if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1676e705c121SKalle Valo ret = iwl_mvm_init_mcc(mvm);
1677e705c121SKalle Valo if (ret)
1678e705c121SKalle Valo goto error;
1679e705c121SKalle Valo }
1680e705c121SKalle Valo
1681e705c121SKalle Valo if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
16824ca87a5fSEmmanuel Grumbach mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1683b66b5817SSara Sharon mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1684e705c121SKalle Valo ret = iwl_mvm_config_scan(mvm);
1685e705c121SKalle Valo if (ret)
1686e705c121SKalle Valo goto error;
1687e705c121SKalle Valo }
1688e705c121SKalle Valo
1689cf85123aSAvraham Stern if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1690f130bb75SMordechay Goodstein iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1691ead65aa2SJohannes Berg
1692ead65aa2SJohannes Berg if (mvm->time_sync.active)
1693cf85123aSAvraham Stern iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1694cf85123aSAvraham Stern IWL_TIME_SYNC_PROTOCOL_TM |
1695cf85123aSAvraham Stern IWL_TIME_SYNC_PROTOCOL_FTM);
1696cf85123aSAvraham Stern }
1697f130bb75SMordechay Goodstein
16981595ecceSKrishnanand Prabhu if (!mvm->ptp_data.ptp_clock)
16991595ecceSKrishnanand Prabhu iwl_mvm_ptp_init(mvm);
17001595ecceSKrishnanand Prabhu
170148e775e6SHaim Dreyfuss if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
170248e775e6SHaim Dreyfuss IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
170348e775e6SHaim Dreyfuss
17046ce1e5c0SGil Adam ret = iwl_mvm_ppag_init(mvm);
17056ce1e5c0SGil Adam if (ret)
17066ce1e5c0SGil Adam goto error;
17076ce1e5c0SGil Adam
1708da2830acSLuca Coelho ret = iwl_mvm_sar_init(mvm);
170978a19d52SMiri Korenblit if (ret == 0)
1710a6bff3cbSHaim Dreyfuss ret = iwl_mvm_sar_geo_init(mvm);
17115f06f6bfSLuca Coelho if (ret < 0)
1712a6bff3cbSHaim Dreyfuss goto error;
1713a6bff3cbSHaim Dreyfuss
1714c593d2faSAyala Barazani ret = iwl_mvm_sgom_init(mvm);
1715c593d2faSAyala Barazani if (ret)
1716c593d2faSAyala Barazani goto error;
1717c593d2faSAyala Barazani
171828dd7ccdSMordechay Goodstein iwl_mvm_tas_init(mvm);
17197089ae63SJohannes Berg iwl_mvm_leds_sync(mvm);
17207089ae63SJohannes Berg
17219e26f098SGregory Greenman if (iwl_rfi_supported(mvm)) {
17224e8fe214SGregory Greenman if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
17234e8fe214SGregory Greenman iwl_rfi_send_config_cmd(mvm, NULL);
17244e8fe214SGregory Greenman }
17254e8fe214SGregory Greenman
17265aa7ce31SAvraham Stern iwl_mvm_mei_device_state(mvm, true);
17275aa7ce31SAvraham Stern
1728e705c121SKalle Valo IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1729e705c121SKalle Valo return 0;
1730e705c121SKalle Valo error:
1731f4744258SLiad Kaufman if (!iwlmvm_mod_params.init_dbg || !ret)
1732fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm);
1733e705c121SKalle Valo return ret;
1734e705c121SKalle Valo }
1735e705c121SKalle Valo
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1736e705c121SKalle Valo int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1737e705c121SKalle Valo {
1738e705c121SKalle Valo int ret, i;
1739e705c121SKalle Valo
1740e705c121SKalle Valo lockdep_assert_held(&mvm->mutex);
1741e705c121SKalle Valo
1742e705c121SKalle Valo ret = iwl_trans_start_hw(mvm->trans);
1743e705c121SKalle Valo if (ret)
1744e705c121SKalle Valo return ret;
1745e705c121SKalle Valo
1746e705c121SKalle Valo ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1747e705c121SKalle Valo if (ret) {
1748e705c121SKalle Valo IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1749e705c121SKalle Valo goto error;
1750e705c121SKalle Valo }
1751e705c121SKalle Valo
1752e705c121SKalle Valo ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1753e705c121SKalle Valo if (ret)
1754e705c121SKalle Valo goto error;
1755e705c121SKalle Valo
1756e705c121SKalle Valo /* Send phy db control command and then phy db calibration*/
1757e705c121SKalle Valo ret = iwl_send_phy_db_data(mvm->phy_db);
1758e705c121SKalle Valo if (ret)
1759e705c121SKalle Valo goto error;
1760e705c121SKalle Valo
1761e705c121SKalle Valo ret = iwl_send_phy_cfg_cmd(mvm);
1762e705c121SKalle Valo if (ret)
1763e705c121SKalle Valo goto error;
1764e705c121SKalle Valo
1765e705c121SKalle Valo /* init the fw <-> mac80211 STA mapping */
1766b8a85a1dSJohannes Berg for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1767e705c121SKalle Valo RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1768b8a85a1dSJohannes Berg RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1769b8a85a1dSJohannes Berg }
1770e705c121SKalle Valo
17711724fc78SEmmanuel Grumbach if (!iwl_mvm_has_new_station_api(mvm->fw)) {
17722c2c3647SNathan Errera /*
17732c2c3647SNathan Errera * Add auxiliary station for scanning.
17742c2c3647SNathan Errera * Newer versions of this command implies that the fw uses
17752c2c3647SNathan Errera * internal aux station for all aux activities that don't
17762c2c3647SNathan Errera * requires a dedicated data queue.
17772c2c3647SNathan Errera * In old version the aux station uses mac id like other
17782c2c3647SNathan Errera * station and not lmac id
17792c2c3647SNathan Errera */
17802c2c3647SNathan Errera ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1781e705c121SKalle Valo if (ret)
1782e705c121SKalle Valo goto error;
17832c2c3647SNathan Errera }
1784e705c121SKalle Valo
1785e705c121SKalle Valo return 0;
1786e705c121SKalle Valo error:
1787fcb6b92aSChaya Rachel Ivgi iwl_mvm_stop_device(mvm);
1788e705c121SKalle Valo return ret;
1789e705c121SKalle Valo }
1790e705c121SKalle Valo
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1791e705c121SKalle Valo void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1792e705c121SKalle Valo struct iwl_rx_cmd_buffer *rxb)
1793e705c121SKalle Valo {
1794e705c121SKalle Valo struct iwl_rx_packet *pkt = rxb_addr(rxb);
1795e705c121SKalle Valo struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1796e705c121SKalle Valo
1797e705c121SKalle Valo IWL_DEBUG_INFO(mvm,
1798e705c121SKalle Valo "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1799e705c121SKalle Valo le32_to_cpu(mfuart_notif->installed_ver),
1800e705c121SKalle Valo le32_to_cpu(mfuart_notif->external_ver),
1801e705c121SKalle Valo le32_to_cpu(mfuart_notif->status),
1802e705c121SKalle Valo le32_to_cpu(mfuart_notif->duration));
18030c8d0a47SGolan Ben-Ami
18040c8d0a47SGolan Ben-Ami if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
18050c8d0a47SGolan Ben-Ami IWL_DEBUG_INFO(mvm,
18060c8d0a47SGolan Ben-Ami "MFUART: image size: 0x%08x\n",
18070c8d0a47SGolan Ben-Ami le32_to_cpu(mfuart_notif->image_size));
1808e705c121SKalle Valo }
1809