1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 - 2019 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * The full GNU General Public License is included in this distribution 23 * in the file called COPYING. 24 * 25 * Contact Information: 26 * Intel Linux Wireless <linuxwifi@intel.com> 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28 * 29 * BSD LICENSE 30 * 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 34 * Copyright(c) 2018 - 2019 Intel Corporation 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 41 * * Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * * Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in 45 * the documentation and/or other materials provided with the 46 * distribution. 47 * * Neither the name Intel Corporation nor the names of its 48 * contributors may be used to endorse or promote products derived 49 * from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 *****************************************************************************/ 64 #ifndef __iwl_trans_h__ 65 #define __iwl_trans_h__ 66 67 #include <linux/ieee80211.h> 68 #include <linux/mm.h> /* for page_address */ 69 #include <linux/lockdep.h> 70 #include <linux/kernel.h> 71 72 #include "iwl-debug.h" 73 #include "iwl-config.h" 74 #include "fw/img.h" 75 #include "iwl-op-mode.h" 76 #include "fw/api/cmdhdr.h" 77 #include "fw/api/txq.h" 78 #include "fw/api/dbg-tlv.h" 79 #include "iwl-dbg-tlv.h" 80 81 /** 82 * DOC: Transport layer - what is it ? 83 * 84 * The transport layer is the layer that deals with the HW directly. It provides 85 * an abstraction of the underlying HW to the upper layer. The transport layer 86 * doesn't provide any policy, algorithm or anything of this kind, but only 87 * mechanisms to make the HW do something. It is not completely stateless but 88 * close to it. 89 * We will have an implementation for each different supported bus. 90 */ 91 92 /** 93 * DOC: Life cycle of the transport layer 94 * 95 * The transport layer has a very precise life cycle. 96 * 97 * 1) A helper function is called during the module initialization and 98 * registers the bus driver's ops with the transport's alloc function. 99 * 2) Bus's probe calls to the transport layer's allocation functions. 100 * Of course this function is bus specific. 101 * 3) This allocation functions will spawn the upper layer which will 102 * register mac80211. 103 * 104 * 4) At some point (i.e. mac80211's start call), the op_mode will call 105 * the following sequence: 106 * start_hw 107 * start_fw 108 * 109 * 5) Then when finished (or reset): 110 * stop_device 111 * 112 * 6) Eventually, the free function will be called. 113 */ 114 115 #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ 116 #define FH_RSCSR_FRAME_INVALID 0x55550000 117 #define FH_RSCSR_FRAME_ALIGN 0x40 118 #define FH_RSCSR_RPA_EN BIT(25) 119 #define FH_RSCSR_RADA_EN BIT(26) 120 #define FH_RSCSR_RXQ_POS 16 121 #define FH_RSCSR_RXQ_MASK 0x3F0000 122 123 struct iwl_rx_packet { 124 /* 125 * The first 4 bytes of the RX frame header contain both the RX frame 126 * size and some flags. 127 * Bit fields: 128 * 31: flag flush RB request 129 * 30: flag ignore TC (terminal counter) request 130 * 29: flag fast IRQ request 131 * 28-27: Reserved 132 * 26: RADA enabled 133 * 25: Offload enabled 134 * 24: RPF enabled 135 * 23: RSS enabled 136 * 22: Checksum enabled 137 * 21-16: RX queue 138 * 15-14: Reserved 139 * 13-00: RX frame size 140 */ 141 __le32 len_n_flags; 142 struct iwl_cmd_header hdr; 143 u8 data[]; 144 } __packed; 145 146 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) 147 { 148 return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 149 } 150 151 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) 152 { 153 return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); 154 } 155 156 /** 157 * enum CMD_MODE - how to send the host commands ? 158 * 159 * @CMD_ASYNC: Return right away and don't wait for the response 160 * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of 161 * the response. The caller needs to call iwl_free_resp when done. 162 * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be 163 * called after this command completes. Valid only with CMD_ASYNC. 164 */ 165 enum CMD_MODE { 166 CMD_ASYNC = BIT(0), 167 CMD_WANT_SKB = BIT(1), 168 CMD_SEND_IN_RFKILL = BIT(2), 169 CMD_WANT_ASYNC_CALLBACK = BIT(3), 170 }; 171 172 #define DEF_CMD_PAYLOAD_SIZE 320 173 174 /** 175 * struct iwl_device_cmd 176 * 177 * For allocation of the command and tx queues, this establishes the overall 178 * size of the largest command we send to uCode, except for commands that 179 * aren't fully copied and use other TFD space. 180 */ 181 struct iwl_device_cmd { 182 union { 183 struct { 184 struct iwl_cmd_header hdr; /* uCode API */ 185 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 186 }; 187 struct { 188 struct iwl_cmd_header_wide hdr_wide; 189 u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - 190 sizeof(struct iwl_cmd_header_wide) + 191 sizeof(struct iwl_cmd_header)]; 192 }; 193 }; 194 } __packed; 195 196 /** 197 * struct iwl_device_tx_cmd - buffer for TX command 198 * @hdr: the header 199 * @payload: the payload placeholder 200 * 201 * The actual structure is sized dynamically according to need. 202 */ 203 struct iwl_device_tx_cmd { 204 struct iwl_cmd_header hdr; 205 u8 payload[]; 206 } __packed; 207 208 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 209 210 /* 211 * number of transfer buffers (fragments) per transmit frame descriptor; 212 * this is just the driver's idea, the hardware supports 20 213 */ 214 #define IWL_MAX_CMD_TBS_PER_TFD 2 215 216 /** 217 * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command 218 * 219 * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's 220 * ring. The transport layer doesn't map the command's buffer to DMA, but 221 * rather copies it to a previously allocated DMA buffer. This flag tells 222 * the transport layer not to copy the command, but to map the existing 223 * buffer (that is passed in) instead. This saves the memcpy and allows 224 * commands that are bigger than the fixed buffer to be submitted. 225 * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. 226 * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this 227 * chunk internally and free it again after the command completes. This 228 * can (currently) be used only once per command. 229 * Note that a TFD entry after a DUP one cannot be a normal copied one. 230 */ 231 enum iwl_hcmd_dataflag { 232 IWL_HCMD_DFL_NOCOPY = BIT(0), 233 IWL_HCMD_DFL_DUP = BIT(1), 234 }; 235 236 enum iwl_error_event_table_status { 237 IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0), 238 IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1), 239 IWL_ERROR_EVENT_TABLE_UMAC = BIT(2), 240 }; 241 242 /** 243 * struct iwl_host_cmd - Host command to the uCode 244 * 245 * @data: array of chunks that composes the data of the host command 246 * @resp_pkt: response packet, if %CMD_WANT_SKB was set 247 * @_rx_page_order: (internally used to free response packet) 248 * @_rx_page_addr: (internally used to free response packet) 249 * @flags: can be CMD_* 250 * @len: array of the lengths of the chunks in data 251 * @dataflags: IWL_HCMD_DFL_* 252 * @id: command id of the host command, for wide commands encoding the 253 * version and group as well 254 */ 255 struct iwl_host_cmd { 256 const void *data[IWL_MAX_CMD_TBS_PER_TFD]; 257 struct iwl_rx_packet *resp_pkt; 258 unsigned long _rx_page_addr; 259 u32 _rx_page_order; 260 261 u32 flags; 262 u32 id; 263 u16 len[IWL_MAX_CMD_TBS_PER_TFD]; 264 u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; 265 }; 266 267 static inline void iwl_free_resp(struct iwl_host_cmd *cmd) 268 { 269 free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); 270 } 271 272 struct iwl_rx_cmd_buffer { 273 struct page *_page; 274 int _offset; 275 bool _page_stolen; 276 u32 _rx_page_order; 277 unsigned int truesize; 278 }; 279 280 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) 281 { 282 return (void *)((unsigned long)page_address(r->_page) + r->_offset); 283 } 284 285 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) 286 { 287 return r->_offset; 288 } 289 290 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) 291 { 292 r->_page_stolen = true; 293 get_page(r->_page); 294 return r->_page; 295 } 296 297 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) 298 { 299 __free_pages(r->_page, r->_rx_page_order); 300 } 301 302 #define MAX_NO_RECLAIM_CMDS 6 303 304 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 305 306 /* 307 * Maximum number of HW queues the transport layer 308 * currently supports 309 */ 310 #define IWL_MAX_HW_QUEUES 32 311 #define IWL_MAX_TVQM_QUEUES 512 312 313 #define IWL_MAX_TID_COUNT 8 314 #define IWL_MGMT_TID 15 315 #define IWL_FRAME_LIMIT 64 316 #define IWL_MAX_RX_HW_QUEUES 16 317 318 /** 319 * enum iwl_wowlan_status - WoWLAN image/device status 320 * @IWL_D3_STATUS_ALIVE: firmware is still running after resume 321 * @IWL_D3_STATUS_RESET: device was reset while suspended 322 */ 323 enum iwl_d3_status { 324 IWL_D3_STATUS_ALIVE, 325 IWL_D3_STATUS_RESET, 326 }; 327 328 /** 329 * enum iwl_trans_status: transport status flags 330 * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed 331 * @STATUS_DEVICE_ENABLED: APM is enabled 332 * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) 333 * @STATUS_INT_ENABLED: interrupts are enabled 334 * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch 335 * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode 336 * @STATUS_FW_ERROR: the fw is in error state 337 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 338 * are sent 339 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 340 * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 341 */ 342 enum iwl_trans_status { 343 STATUS_SYNC_HCMD_ACTIVE, 344 STATUS_DEVICE_ENABLED, 345 STATUS_TPOWER_PMI, 346 STATUS_INT_ENABLED, 347 STATUS_RFKILL_HW, 348 STATUS_RFKILL_OPMODE, 349 STATUS_FW_ERROR, 350 STATUS_TRANS_GOING_IDLE, 351 STATUS_TRANS_IDLE, 352 STATUS_TRANS_DEAD, 353 }; 354 355 static inline int 356 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) 357 { 358 switch (rb_size) { 359 case IWL_AMSDU_2K: 360 return get_order(2 * 1024); 361 case IWL_AMSDU_4K: 362 return get_order(4 * 1024); 363 case IWL_AMSDU_8K: 364 return get_order(8 * 1024); 365 case IWL_AMSDU_12K: 366 return get_order(12 * 1024); 367 default: 368 WARN_ON(1); 369 return -1; 370 } 371 } 372 373 struct iwl_hcmd_names { 374 u8 cmd_id; 375 const char *const cmd_name; 376 }; 377 378 #define HCMD_NAME(x) \ 379 { .cmd_id = x, .cmd_name = #x } 380 381 struct iwl_hcmd_arr { 382 const struct iwl_hcmd_names *arr; 383 int size; 384 }; 385 386 #define HCMD_ARR(x) \ 387 { .arr = x, .size = ARRAY_SIZE(x) } 388 389 /** 390 * struct iwl_trans_config - transport configuration 391 * 392 * @op_mode: pointer to the upper layer. 393 * @cmd_queue: the index of the command queue. 394 * Must be set before start_fw. 395 * @cmd_fifo: the fifo for host commands 396 * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. 397 * @no_reclaim_cmds: Some devices erroneously don't set the 398 * SEQ_RX_FRAME bit on some notifications, this is the 399 * list of such notifications to filter. Max length is 400 * %MAX_NO_RECLAIM_CMDS. 401 * @n_no_reclaim_cmds: # of commands in list 402 * @rx_buf_size: RX buffer size needed for A-MSDUs 403 * if unset 4k will be the RX buffer size 404 * @bc_table_dword: set to true if the BC table expects the byte count to be 405 * in DWORD (as opposed to bytes) 406 * @scd_set_active: should the transport configure the SCD for HCMD queue 407 * @sw_csum_tx: transport should compute the TCP checksum 408 * @command_groups: array of command groups, each member is an array of the 409 * commands in the group; for debugging only 410 * @command_groups_size: number of command groups, to avoid illegal access 411 * @cb_data_offs: offset inside skb->cb to store transport data at, must have 412 * space for at least two pointers 413 */ 414 struct iwl_trans_config { 415 struct iwl_op_mode *op_mode; 416 417 u8 cmd_queue; 418 u8 cmd_fifo; 419 unsigned int cmd_q_wdg_timeout; 420 const u8 *no_reclaim_cmds; 421 unsigned int n_no_reclaim_cmds; 422 423 enum iwl_amsdu_size rx_buf_size; 424 bool bc_table_dword; 425 bool scd_set_active; 426 bool sw_csum_tx; 427 const struct iwl_hcmd_arr *command_groups; 428 int command_groups_size; 429 430 u8 cb_data_offs; 431 }; 432 433 struct iwl_trans_dump_data { 434 u32 len; 435 u8 data[]; 436 }; 437 438 struct iwl_trans; 439 440 struct iwl_trans_txq_scd_cfg { 441 u8 fifo; 442 u8 sta_id; 443 u8 tid; 444 bool aggregate; 445 int frame_limit; 446 }; 447 448 /** 449 * struct iwl_trans_rxq_dma_data - RX queue DMA data 450 * @fr_bd_cb: DMA address of free BD cyclic buffer 451 * @fr_bd_wid: Initial write index of the free BD cyclic buffer 452 * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr 453 * @ur_bd_cb: DMA address of used BD cyclic buffer 454 */ 455 struct iwl_trans_rxq_dma_data { 456 u64 fr_bd_cb; 457 u32 fr_bd_wid; 458 u64 urbd_stts_wrptr; 459 u64 ur_bd_cb; 460 }; 461 462 /** 463 * struct iwl_trans_ops - transport specific operations 464 * 465 * All the handlers MUST be implemented 466 * 467 * @start_hw: starts the HW. From that point on, the HW can send interrupts. 468 * May sleep. 469 * @op_mode_leave: Turn off the HW RF kill indication if on 470 * May sleep 471 * @start_fw: allocates and inits all the resources for the transport 472 * layer. Also kick a fw image. 473 * May sleep 474 * @fw_alive: called when the fw sends alive notification. If the fw provides 475 * the SCD base address in SRAM, then provide it here, or 0 otherwise. 476 * May sleep 477 * @stop_device: stops the whole device (embedded CPU put to reset) and stops 478 * the HW. From that point on, the HW will be stopped but will still issue 479 * an interrupt if the HW RF kill switch is triggered. 480 * This callback must do the right thing and not crash even if %start_hw() 481 * was called but not &start_fw(). May sleep. 482 * @d3_suspend: put the device into the correct mode for WoWLAN during 483 * suspend. This is optional, if not implemented WoWLAN will not be 484 * supported. This callback may sleep. 485 * @d3_resume: resume the device after WoWLAN, enabling the opmode to 486 * talk to the WoWLAN image to get its status. This is optional, if not 487 * implemented WoWLAN will not be supported. This callback may sleep. 488 * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. 489 * If RFkill is asserted in the middle of a SYNC host command, it must 490 * return -ERFKILL straight away. 491 * May sleep only if CMD_ASYNC is not set 492 * @tx: send an skb. The transport relies on the op_mode to zero the 493 * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all 494 * the CSUM will be taken care of (TCP CSUM and IP header in case of 495 * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP 496 * header if it is IPv4. 497 * Must be atomic 498 * @reclaim: free packet until ssn. Returns a list of freed packets. 499 * Must be atomic 500 * @txq_enable: setup a queue. To setup an AC queue, use the 501 * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before 502 * this one. The op_mode must not configure the HCMD queue. The scheduler 503 * configuration may be %NULL, in which case the hardware will not be 504 * configured. If true is returned, the operation mode needs to increment 505 * the sequence number of the packets routed to this queue because of a 506 * hardware scheduler bug. May sleep. 507 * @txq_disable: de-configure a Tx queue to send AMPDUs 508 * Must be atomic 509 * @txq_set_shared_mode: change Tx queue shared/unshared marking 510 * @wait_tx_queues_empty: wait until tx queues are empty. May sleep. 511 * @wait_txq_empty: wait until specific tx queue is empty. May sleep. 512 * @freeze_txq_timer: prevents the timer of the queue from firing until the 513 * queue is set to awake. Must be atomic. 514 * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note 515 * that the transport needs to refcount the calls since this function 516 * will be called several times with block = true, and then the queues 517 * need to be unblocked only after the same number of calls with 518 * block = false. 519 * @write8: write a u8 to a register at offset ofs from the BAR 520 * @write32: write a u32 to a register at offset ofs from the BAR 521 * @read32: read a u32 register at offset ofs from the BAR 522 * @read_prph: read a DWORD from a periphery register 523 * @write_prph: write a DWORD to a periphery register 524 * @read_mem: read device's SRAM in DWORD 525 * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory 526 * will be zeroed. 527 * @configure: configure parameters required by the transport layer from 528 * the op_mode. May be called several times before start_fw, can't be 529 * called after that. 530 * @set_pmi: set the power pmi state 531 * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. 532 * Sleeping is not allowed between grab_nic_access and 533 * release_nic_access. 534 * @release_nic_access: let the NIC go to sleep. The "flags" parameter 535 * must be the same one that was sent before to the grab_nic_access. 536 * @set_bits_mask - set SRAM register according to value and mask. 537 * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last 538 * TX'ed commands and similar. The buffer will be vfree'd by the caller. 539 * Note that the transport must fill in the proper file headers. 540 * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup 541 * of the trans debugfs 542 */ 543 struct iwl_trans_ops { 544 545 int (*start_hw)(struct iwl_trans *iwl_trans); 546 void (*op_mode_leave)(struct iwl_trans *iwl_trans); 547 int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, 548 bool run_in_rfkill); 549 void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); 550 void (*stop_device)(struct iwl_trans *trans); 551 552 int (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset); 553 int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, 554 bool test, bool reset); 555 556 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 557 558 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 559 struct iwl_device_tx_cmd *dev_cmd, int queue); 560 void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, 561 struct sk_buff_head *skbs); 562 563 void (*set_q_ptrs)(struct iwl_trans *trans, int queue, int ptr); 564 565 bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, 566 const struct iwl_trans_txq_scd_cfg *cfg, 567 unsigned int queue_wdg_timeout); 568 void (*txq_disable)(struct iwl_trans *trans, int queue, 569 bool configure_scd); 570 /* 22000 functions */ 571 int (*txq_alloc)(struct iwl_trans *trans, 572 __le16 flags, u8 sta_id, u8 tid, 573 int cmd_id, int size, 574 unsigned int queue_wdg_timeout); 575 void (*txq_free)(struct iwl_trans *trans, int queue); 576 int (*rxq_dma_data)(struct iwl_trans *trans, int queue, 577 struct iwl_trans_rxq_dma_data *data); 578 579 void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id, 580 bool shared); 581 582 int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm); 583 int (*wait_txq_empty)(struct iwl_trans *trans, int queue); 584 void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, 585 bool freeze); 586 void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); 587 588 void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); 589 void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); 590 u32 (*read32)(struct iwl_trans *trans, u32 ofs); 591 u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); 592 void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); 593 int (*read_mem)(struct iwl_trans *trans, u32 addr, 594 void *buf, int dwords); 595 int (*write_mem)(struct iwl_trans *trans, u32 addr, 596 const void *buf, int dwords); 597 void (*configure)(struct iwl_trans *trans, 598 const struct iwl_trans_config *trans_cfg); 599 void (*set_pmi)(struct iwl_trans *trans, bool state); 600 void (*sw_reset)(struct iwl_trans *trans); 601 bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); 602 void (*release_nic_access)(struct iwl_trans *trans, 603 unsigned long *flags); 604 void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, 605 u32 value); 606 int (*suspend)(struct iwl_trans *trans); 607 void (*resume)(struct iwl_trans *trans); 608 609 struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, 610 u32 dump_mask); 611 void (*debugfs_cleanup)(struct iwl_trans *trans); 612 void (*sync_nmi)(struct iwl_trans *trans); 613 }; 614 615 /** 616 * enum iwl_trans_state - state of the transport layer 617 * 618 * @IWL_TRANS_NO_FW: no fw has sent an alive response 619 * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response 620 */ 621 enum iwl_trans_state { 622 IWL_TRANS_NO_FW = 0, 623 IWL_TRANS_FW_ALIVE = 1, 624 }; 625 626 /** 627 * DOC: Platform power management 628 * 629 * In system-wide power management the entire platform goes into a low 630 * power state (e.g. idle or suspend to RAM) at the same time and the 631 * device is configured as a wakeup source for the entire platform. 632 * This is usually triggered by userspace activity (e.g. the user 633 * presses the suspend button or a power management daemon decides to 634 * put the platform in low power mode). The device's behavior in this 635 * mode is dictated by the wake-on-WLAN configuration. 636 * 637 * The terms used for the device's behavior are as follows: 638 * 639 * - D0: the device is fully powered and the host is awake; 640 * - D3: the device is in low power mode and only reacts to 641 * specific events (e.g. magic-packet received or scan 642 * results found); 643 * 644 * These terms reflect the power modes in the firmware and are not to 645 * be confused with the physical device power state. 646 */ 647 648 /** 649 * enum iwl_plat_pm_mode - platform power management mode 650 * 651 * This enumeration describes the device's platform power management 652 * behavior when in system-wide suspend (i.e WoWLAN). 653 * 654 * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this 655 * device. In system-wide suspend mode, it means that the all 656 * connections will be closed automatically by mac80211 before 657 * the platform is suspended. 658 * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). 659 */ 660 enum iwl_plat_pm_mode { 661 IWL_PLAT_PM_MODE_DISABLED, 662 IWL_PLAT_PM_MODE_D3, 663 }; 664 665 /** 666 * enum iwl_ini_cfg_state 667 * @IWL_INI_CFG_STATE_NOT_LOADED: no debug cfg was given 668 * @IWL_INI_CFG_STATE_LOADED: debug cfg was found and loaded 669 * @IWL_INI_CFG_STATE_CORRUPTED: debug cfg was found and some of the TLVs 670 * are corrupted. The rest of the debug TLVs will still be used 671 */ 672 enum iwl_ini_cfg_state { 673 IWL_INI_CFG_STATE_NOT_LOADED, 674 IWL_INI_CFG_STATE_LOADED, 675 IWL_INI_CFG_STATE_CORRUPTED, 676 }; 677 678 /* Max time to wait for nmi interrupt */ 679 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4) 680 681 /** 682 * struct iwl_dram_data 683 * @physical: page phy pointer 684 * @block: pointer to the allocated block/page 685 * @size: size of the block/page 686 */ 687 struct iwl_dram_data { 688 dma_addr_t physical; 689 void *block; 690 int size; 691 }; 692 693 /** 694 * struct iwl_fw_mon - fw monitor per allocation id 695 * @num_frags: number of fragments 696 * @frags: an array of DRAM buffer fragments 697 */ 698 struct iwl_fw_mon { 699 u32 num_frags; 700 struct iwl_dram_data *frags; 701 }; 702 703 /** 704 * struct iwl_self_init_dram - dram data used by self init process 705 * @fw: lmac and umac dram data 706 * @fw_cnt: total number of items in array 707 * @paging: paging dram data 708 * @paging_cnt: total number of items in array 709 */ 710 struct iwl_self_init_dram { 711 struct iwl_dram_data *fw; 712 int fw_cnt; 713 struct iwl_dram_data *paging; 714 int paging_cnt; 715 }; 716 717 /** 718 * struct iwl_trans_debug - transport debug related data 719 * 720 * @n_dest_reg: num of reg_ops in %dbg_dest_tlv 721 * @rec_on: true iff there is a fw debug recording currently active 722 * @dest_tlv: points to the destination TLV for debug 723 * @conf_tlv: array of pointers to configuration TLVs for debug 724 * @trigger_tlv: array of pointers to triggers TLVs for debug 725 * @lmac_error_event_table: addrs of lmacs error tables 726 * @umac_error_event_table: addr of umac error table 727 * @error_event_table_tlv_status: bitmap that indicates what error table 728 * pointers was recevied via TLV. uses enum &iwl_error_event_table_status 729 * @internal_ini_cfg: internal debug cfg state. Uses &enum iwl_ini_cfg_state 730 * @external_ini_cfg: external debug cfg state. Uses &enum iwl_ini_cfg_state 731 * @fw_mon_cfg: debug buffer allocation configuration 732 * @fw_mon_ini: DRAM buffer fragments per allocation id 733 * @fw_mon: DRAM buffer for firmware monitor 734 * @hw_error: equals true if hw error interrupt was received from the FW 735 * @ini_dest: debug monitor destination uses &enum iwl_fw_ini_buffer_location 736 * @active_regions: active regions 737 * @debug_info_tlv_list: list of debug info TLVs 738 * @time_point: array of debug time points 739 * @periodic_trig_list: periodic triggers list 740 * @domains_bitmap: bitmap of active domains other than 741 * &IWL_FW_INI_DOMAIN_ALWAYS_ON 742 */ 743 struct iwl_trans_debug { 744 u8 n_dest_reg; 745 bool rec_on; 746 747 const struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv; 748 const struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX]; 749 struct iwl_fw_dbg_trigger_tlv * const *trigger_tlv; 750 751 u32 lmac_error_event_table[2]; 752 u32 umac_error_event_table; 753 unsigned int error_event_table_tlv_status; 754 755 enum iwl_ini_cfg_state internal_ini_cfg; 756 enum iwl_ini_cfg_state external_ini_cfg; 757 758 struct iwl_fw_ini_allocation_tlv fw_mon_cfg[IWL_FW_INI_ALLOCATION_NUM]; 759 struct iwl_fw_mon fw_mon_ini[IWL_FW_INI_ALLOCATION_NUM]; 760 761 struct iwl_dram_data fw_mon; 762 763 bool hw_error; 764 enum iwl_fw_ini_buffer_location ini_dest; 765 766 struct iwl_ucode_tlv *active_regions[IWL_FW_INI_MAX_REGION_ID]; 767 struct list_head debug_info_tlv_list; 768 struct iwl_dbg_tlv_time_point_data 769 time_point[IWL_FW_INI_TIME_POINT_NUM]; 770 struct list_head periodic_trig_list; 771 772 u32 domains_bitmap; 773 }; 774 775 /** 776 * struct iwl_trans - transport common data 777 * 778 * @ops - pointer to iwl_trans_ops 779 * @op_mode - pointer to the op_mode 780 * @trans_cfg: the trans-specific configuration part 781 * @cfg - pointer to the configuration 782 * @drv - pointer to iwl_drv 783 * @status: a bit-mask of transport status flags 784 * @dev - pointer to struct device * that represents the device 785 * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. 786 * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. 787 * @hw_rf_id a u32 with the device RF ID 788 * @hw_id: a u32 with the ID of the device / sub-device. 789 * Set during transport allocation. 790 * @hw_id_str: a string with info about HW ID. Set during transport allocation. 791 * @pm_support: set to true in start_hw if link pm is supported 792 * @ltr_enabled: set to true if the LTR is enabled 793 * @wide_cmd_header: true when ucode supports wide command header format 794 * @num_rx_queues: number of RX queues allocated by the transport; 795 * the transport must set this before calling iwl_drv_start() 796 * @iml_len: the length of the image loader 797 * @iml: a pointer to the image loader itself 798 * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. 799 * The user should use iwl_trans_{alloc,free}_tx_cmd. 800 * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before 801 * starting the firmware, used for tracing 802 * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the 803 * start of the 802.11 header in the @rx_mpdu_cmd 804 * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) 805 * @system_pm_mode: the system-wide power management mode in use. 806 * This mode is set dynamically, depending on the WoWLAN values 807 * configured from the userspace at runtime. 808 */ 809 struct iwl_trans { 810 const struct iwl_trans_ops *ops; 811 struct iwl_op_mode *op_mode; 812 const struct iwl_cfg_trans_params *trans_cfg; 813 const struct iwl_cfg *cfg; 814 struct iwl_drv *drv; 815 enum iwl_trans_state state; 816 unsigned long status; 817 818 struct device *dev; 819 u32 max_skb_frags; 820 u32 hw_rev; 821 u32 hw_rf_id; 822 u32 hw_id; 823 char hw_id_str[52]; 824 825 u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; 826 827 bool pm_support; 828 bool ltr_enabled; 829 830 const struct iwl_hcmd_arr *command_groups; 831 int command_groups_size; 832 bool wide_cmd_header; 833 834 u8 num_rx_queues; 835 836 size_t iml_len; 837 u8 *iml; 838 839 /* The following fields are internal only */ 840 struct kmem_cache *dev_cmd_pool; 841 char dev_cmd_pool_name[50]; 842 843 struct dentry *dbgfs_dir; 844 845 #ifdef CONFIG_LOCKDEP 846 struct lockdep_map sync_cmd_lockdep_map; 847 #endif 848 849 struct iwl_trans_debug dbg; 850 struct iwl_self_init_dram init_dram; 851 852 enum iwl_plat_pm_mode system_pm_mode; 853 854 /* pointer to trans specific struct */ 855 /*Ensure that this pointer will always be aligned to sizeof pointer */ 856 char trans_specific[0] __aligned(sizeof(void *)); 857 }; 858 859 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); 860 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); 861 862 static inline void iwl_trans_configure(struct iwl_trans *trans, 863 const struct iwl_trans_config *trans_cfg) 864 { 865 trans->op_mode = trans_cfg->op_mode; 866 867 trans->ops->configure(trans, trans_cfg); 868 WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); 869 } 870 871 static inline int iwl_trans_start_hw(struct iwl_trans *trans) 872 { 873 might_sleep(); 874 875 return trans->ops->start_hw(trans); 876 } 877 878 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) 879 { 880 might_sleep(); 881 882 if (trans->ops->op_mode_leave) 883 trans->ops->op_mode_leave(trans); 884 885 trans->op_mode = NULL; 886 887 trans->state = IWL_TRANS_NO_FW; 888 } 889 890 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) 891 { 892 might_sleep(); 893 894 trans->state = IWL_TRANS_FW_ALIVE; 895 896 trans->ops->fw_alive(trans, scd_addr); 897 } 898 899 static inline int iwl_trans_start_fw(struct iwl_trans *trans, 900 const struct fw_img *fw, 901 bool run_in_rfkill) 902 { 903 might_sleep(); 904 905 WARN_ON_ONCE(!trans->rx_mpdu_cmd); 906 907 clear_bit(STATUS_FW_ERROR, &trans->status); 908 return trans->ops->start_fw(trans, fw, run_in_rfkill); 909 } 910 911 static inline void iwl_trans_stop_device(struct iwl_trans *trans) 912 { 913 might_sleep(); 914 915 trans->ops->stop_device(trans); 916 917 trans->state = IWL_TRANS_NO_FW; 918 } 919 920 static inline int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, 921 bool reset) 922 { 923 might_sleep(); 924 if (!trans->ops->d3_suspend) 925 return 0; 926 927 return trans->ops->d3_suspend(trans, test, reset); 928 } 929 930 static inline int iwl_trans_d3_resume(struct iwl_trans *trans, 931 enum iwl_d3_status *status, 932 bool test, bool reset) 933 { 934 might_sleep(); 935 if (!trans->ops->d3_resume) 936 return 0; 937 938 return trans->ops->d3_resume(trans, status, test, reset); 939 } 940 941 static inline int iwl_trans_suspend(struct iwl_trans *trans) 942 { 943 if (!trans->ops->suspend) 944 return 0; 945 946 return trans->ops->suspend(trans); 947 } 948 949 static inline void iwl_trans_resume(struct iwl_trans *trans) 950 { 951 if (trans->ops->resume) 952 trans->ops->resume(trans); 953 } 954 955 static inline struct iwl_trans_dump_data * 956 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask) 957 { 958 if (!trans->ops->dump_data) 959 return NULL; 960 return trans->ops->dump_data(trans, dump_mask); 961 } 962 963 static inline struct iwl_device_tx_cmd * 964 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) 965 { 966 return kmem_cache_zalloc(trans->dev_cmd_pool, GFP_ATOMIC); 967 } 968 969 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 970 971 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, 972 struct iwl_device_tx_cmd *dev_cmd) 973 { 974 kmem_cache_free(trans->dev_cmd_pool, dev_cmd); 975 } 976 977 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 978 struct iwl_device_tx_cmd *dev_cmd, int queue) 979 { 980 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) 981 return -EIO; 982 983 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 984 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 985 return -EIO; 986 } 987 988 return trans->ops->tx(trans, skb, dev_cmd, queue); 989 } 990 991 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, 992 int ssn, struct sk_buff_head *skbs) 993 { 994 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 995 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 996 return; 997 } 998 999 trans->ops->reclaim(trans, queue, ssn, skbs); 1000 } 1001 1002 static inline void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, 1003 int ptr) 1004 { 1005 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1006 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1007 return; 1008 } 1009 1010 trans->ops->set_q_ptrs(trans, queue, ptr); 1011 } 1012 1013 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, 1014 bool configure_scd) 1015 { 1016 trans->ops->txq_disable(trans, queue, configure_scd); 1017 } 1018 1019 static inline bool 1020 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, 1021 const struct iwl_trans_txq_scd_cfg *cfg, 1022 unsigned int queue_wdg_timeout) 1023 { 1024 might_sleep(); 1025 1026 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1027 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1028 return false; 1029 } 1030 1031 return trans->ops->txq_enable(trans, queue, ssn, 1032 cfg, queue_wdg_timeout); 1033 } 1034 1035 static inline int 1036 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue, 1037 struct iwl_trans_rxq_dma_data *data) 1038 { 1039 if (WARN_ON_ONCE(!trans->ops->rxq_dma_data)) 1040 return -ENOTSUPP; 1041 1042 return trans->ops->rxq_dma_data(trans, queue, data); 1043 } 1044 1045 static inline void 1046 iwl_trans_txq_free(struct iwl_trans *trans, int queue) 1047 { 1048 if (WARN_ON_ONCE(!trans->ops->txq_free)) 1049 return; 1050 1051 trans->ops->txq_free(trans, queue); 1052 } 1053 1054 static inline int 1055 iwl_trans_txq_alloc(struct iwl_trans *trans, 1056 __le16 flags, u8 sta_id, u8 tid, 1057 int cmd_id, int size, 1058 unsigned int wdg_timeout) 1059 { 1060 might_sleep(); 1061 1062 if (WARN_ON_ONCE(!trans->ops->txq_alloc)) 1063 return -ENOTSUPP; 1064 1065 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1066 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1067 return -EIO; 1068 } 1069 1070 return trans->ops->txq_alloc(trans, flags, sta_id, tid, 1071 cmd_id, size, wdg_timeout); 1072 } 1073 1074 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, 1075 int queue, bool shared_mode) 1076 { 1077 if (trans->ops->txq_set_shared_mode) 1078 trans->ops->txq_set_shared_mode(trans, queue, shared_mode); 1079 } 1080 1081 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, 1082 int fifo, int sta_id, int tid, 1083 int frame_limit, u16 ssn, 1084 unsigned int queue_wdg_timeout) 1085 { 1086 struct iwl_trans_txq_scd_cfg cfg = { 1087 .fifo = fifo, 1088 .sta_id = sta_id, 1089 .tid = tid, 1090 .frame_limit = frame_limit, 1091 .aggregate = sta_id >= 0, 1092 }; 1093 1094 iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); 1095 } 1096 1097 static inline 1098 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, 1099 unsigned int queue_wdg_timeout) 1100 { 1101 struct iwl_trans_txq_scd_cfg cfg = { 1102 .fifo = fifo, 1103 .sta_id = -1, 1104 .tid = IWL_MAX_TID_COUNT, 1105 .frame_limit = IWL_FRAME_LIMIT, 1106 .aggregate = false, 1107 }; 1108 1109 iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); 1110 } 1111 1112 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, 1113 unsigned long txqs, 1114 bool freeze) 1115 { 1116 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1117 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1118 return; 1119 } 1120 1121 if (trans->ops->freeze_txq_timer) 1122 trans->ops->freeze_txq_timer(trans, txqs, freeze); 1123 } 1124 1125 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, 1126 bool block) 1127 { 1128 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1129 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1130 return; 1131 } 1132 1133 if (trans->ops->block_txq_ptrs) 1134 trans->ops->block_txq_ptrs(trans, block); 1135 } 1136 1137 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, 1138 u32 txqs) 1139 { 1140 if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty)) 1141 return -ENOTSUPP; 1142 1143 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1144 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1145 return -EIO; 1146 } 1147 1148 return trans->ops->wait_tx_queues_empty(trans, txqs); 1149 } 1150 1151 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue) 1152 { 1153 if (WARN_ON_ONCE(!trans->ops->wait_txq_empty)) 1154 return -ENOTSUPP; 1155 1156 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1157 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1158 return -EIO; 1159 } 1160 1161 return trans->ops->wait_txq_empty(trans, queue); 1162 } 1163 1164 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) 1165 { 1166 trans->ops->write8(trans, ofs, val); 1167 } 1168 1169 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) 1170 { 1171 trans->ops->write32(trans, ofs, val); 1172 } 1173 1174 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) 1175 { 1176 return trans->ops->read32(trans, ofs); 1177 } 1178 1179 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) 1180 { 1181 return trans->ops->read_prph(trans, ofs); 1182 } 1183 1184 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, 1185 u32 val) 1186 { 1187 return trans->ops->write_prph(trans, ofs, val); 1188 } 1189 1190 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, 1191 void *buf, int dwords) 1192 { 1193 return trans->ops->read_mem(trans, addr, buf, dwords); 1194 } 1195 1196 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ 1197 do { \ 1198 if (__builtin_constant_p(bufsize)) \ 1199 BUILD_BUG_ON((bufsize) % sizeof(u32)); \ 1200 iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ 1201 } while (0) 1202 1203 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) 1204 { 1205 u32 value; 1206 1207 if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) 1208 return 0xa5a5a5a5; 1209 1210 return value; 1211 } 1212 1213 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, 1214 const void *buf, int dwords) 1215 { 1216 return trans->ops->write_mem(trans, addr, buf, dwords); 1217 } 1218 1219 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, 1220 u32 val) 1221 { 1222 return iwl_trans_write_mem(trans, addr, &val, 1); 1223 } 1224 1225 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) 1226 { 1227 if (trans->ops->set_pmi) 1228 trans->ops->set_pmi(trans, state); 1229 } 1230 1231 static inline void iwl_trans_sw_reset(struct iwl_trans *trans) 1232 { 1233 if (trans->ops->sw_reset) 1234 trans->ops->sw_reset(trans); 1235 } 1236 1237 static inline void 1238 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) 1239 { 1240 trans->ops->set_bits_mask(trans, reg, mask, value); 1241 } 1242 1243 #define iwl_trans_grab_nic_access(trans, flags) \ 1244 __cond_lock(nic_access, \ 1245 likely((trans)->ops->grab_nic_access(trans, flags))) 1246 1247 static inline void __releases(nic_access) 1248 iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) 1249 { 1250 trans->ops->release_nic_access(trans, flags); 1251 __release(nic_access); 1252 } 1253 1254 static inline void iwl_trans_fw_error(struct iwl_trans *trans) 1255 { 1256 if (WARN_ON_ONCE(!trans->op_mode)) 1257 return; 1258 1259 /* prevent double restarts due to the same erroneous FW */ 1260 if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) 1261 iwl_op_mode_nic_error(trans->op_mode); 1262 } 1263 1264 static inline bool iwl_trans_fw_running(struct iwl_trans *trans) 1265 { 1266 return trans->state == IWL_TRANS_FW_ALIVE; 1267 } 1268 1269 static inline void iwl_trans_sync_nmi(struct iwl_trans *trans) 1270 { 1271 if (trans->ops->sync_nmi) 1272 trans->ops->sync_nmi(trans); 1273 } 1274 1275 static inline bool iwl_trans_dbg_ini_valid(struct iwl_trans *trans) 1276 { 1277 return trans->dbg.internal_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED || 1278 trans->dbg.external_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED; 1279 } 1280 1281 /***************************************************** 1282 * transport helper functions 1283 *****************************************************/ 1284 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, 1285 struct device *dev, 1286 const struct iwl_trans_ops *ops, 1287 unsigned int cmd_pool_size, 1288 unsigned int cmd_pool_align); 1289 void iwl_trans_free(struct iwl_trans *trans); 1290 1291 /***************************************************** 1292 * driver (transport) register/unregister functions 1293 ******************************************************/ 1294 int __must_check iwl_pci_register_driver(void); 1295 void iwl_pci_unregister_driver(void); 1296 1297 #endif /* __iwl_trans_h__ */ 1298