1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 - 2019 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * The full GNU General Public License is included in this distribution 23 * in the file called COPYING. 24 * 25 * Contact Information: 26 * Intel Linux Wireless <linuxwifi@intel.com> 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28 * 29 * BSD LICENSE 30 * 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 34 * Copyright(c) 2018 - 2019 Intel Corporation 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 41 * * Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * * Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in 45 * the documentation and/or other materials provided with the 46 * distribution. 47 * * Neither the name Intel Corporation nor the names of its 48 * contributors may be used to endorse or promote products derived 49 * from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 *****************************************************************************/ 64 #ifndef __iwl_trans_h__ 65 #define __iwl_trans_h__ 66 67 #include <linux/ieee80211.h> 68 #include <linux/mm.h> /* for page_address */ 69 #include <linux/lockdep.h> 70 #include <linux/kernel.h> 71 72 #include "iwl-debug.h" 73 #include "iwl-config.h" 74 #include "fw/img.h" 75 #include "iwl-op-mode.h" 76 #include "fw/api/cmdhdr.h" 77 #include "fw/api/txq.h" 78 #include "fw/api/dbg-tlv.h" 79 #include "iwl-dbg-tlv.h" 80 81 /** 82 * DOC: Transport layer - what is it ? 83 * 84 * The transport layer is the layer that deals with the HW directly. It provides 85 * an abstraction of the underlying HW to the upper layer. The transport layer 86 * doesn't provide any policy, algorithm or anything of this kind, but only 87 * mechanisms to make the HW do something. It is not completely stateless but 88 * close to it. 89 * We will have an implementation for each different supported bus. 90 */ 91 92 /** 93 * DOC: Life cycle of the transport layer 94 * 95 * The transport layer has a very precise life cycle. 96 * 97 * 1) A helper function is called during the module initialization and 98 * registers the bus driver's ops with the transport's alloc function. 99 * 2) Bus's probe calls to the transport layer's allocation functions. 100 * Of course this function is bus specific. 101 * 3) This allocation functions will spawn the upper layer which will 102 * register mac80211. 103 * 104 * 4) At some point (i.e. mac80211's start call), the op_mode will call 105 * the following sequence: 106 * start_hw 107 * start_fw 108 * 109 * 5) Then when finished (or reset): 110 * stop_device 111 * 112 * 6) Eventually, the free function will be called. 113 */ 114 115 #define IWL_TRANS_FW_DBG_DOMAIN(trans) IWL_FW_INI_DOMAIN_ALWAYS_ON 116 117 #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ 118 #define FH_RSCSR_FRAME_INVALID 0x55550000 119 #define FH_RSCSR_FRAME_ALIGN 0x40 120 #define FH_RSCSR_RPA_EN BIT(25) 121 #define FH_RSCSR_RADA_EN BIT(26) 122 #define FH_RSCSR_RXQ_POS 16 123 #define FH_RSCSR_RXQ_MASK 0x3F0000 124 125 struct iwl_rx_packet { 126 /* 127 * The first 4 bytes of the RX frame header contain both the RX frame 128 * size and some flags. 129 * Bit fields: 130 * 31: flag flush RB request 131 * 30: flag ignore TC (terminal counter) request 132 * 29: flag fast IRQ request 133 * 28-27: Reserved 134 * 26: RADA enabled 135 * 25: Offload enabled 136 * 24: RPF enabled 137 * 23: RSS enabled 138 * 22: Checksum enabled 139 * 21-16: RX queue 140 * 15-14: Reserved 141 * 13-00: RX frame size 142 */ 143 __le32 len_n_flags; 144 struct iwl_cmd_header hdr; 145 u8 data[]; 146 } __packed; 147 148 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) 149 { 150 return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 151 } 152 153 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) 154 { 155 return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); 156 } 157 158 /** 159 * enum CMD_MODE - how to send the host commands ? 160 * 161 * @CMD_ASYNC: Return right away and don't wait for the response 162 * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of 163 * the response. The caller needs to call iwl_free_resp when done. 164 * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be 165 * called after this command completes. Valid only with CMD_ASYNC. 166 */ 167 enum CMD_MODE { 168 CMD_ASYNC = BIT(0), 169 CMD_WANT_SKB = BIT(1), 170 CMD_SEND_IN_RFKILL = BIT(2), 171 CMD_WANT_ASYNC_CALLBACK = BIT(3), 172 }; 173 174 #define DEF_CMD_PAYLOAD_SIZE 320 175 176 /** 177 * struct iwl_device_cmd 178 * 179 * For allocation of the command and tx queues, this establishes the overall 180 * size of the largest command we send to uCode, except for commands that 181 * aren't fully copied and use other TFD space. 182 */ 183 struct iwl_device_cmd { 184 union { 185 struct { 186 struct iwl_cmd_header hdr; /* uCode API */ 187 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 188 }; 189 struct { 190 struct iwl_cmd_header_wide hdr_wide; 191 u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - 192 sizeof(struct iwl_cmd_header_wide) + 193 sizeof(struct iwl_cmd_header)]; 194 }; 195 }; 196 } __packed; 197 198 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 199 200 /* 201 * number of transfer buffers (fragments) per transmit frame descriptor; 202 * this is just the driver's idea, the hardware supports 20 203 */ 204 #define IWL_MAX_CMD_TBS_PER_TFD 2 205 206 /** 207 * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command 208 * 209 * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's 210 * ring. The transport layer doesn't map the command's buffer to DMA, but 211 * rather copies it to a previously allocated DMA buffer. This flag tells 212 * the transport layer not to copy the command, but to map the existing 213 * buffer (that is passed in) instead. This saves the memcpy and allows 214 * commands that are bigger than the fixed buffer to be submitted. 215 * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. 216 * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this 217 * chunk internally and free it again after the command completes. This 218 * can (currently) be used only once per command. 219 * Note that a TFD entry after a DUP one cannot be a normal copied one. 220 */ 221 enum iwl_hcmd_dataflag { 222 IWL_HCMD_DFL_NOCOPY = BIT(0), 223 IWL_HCMD_DFL_DUP = BIT(1), 224 }; 225 226 enum iwl_error_event_table_status { 227 IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0), 228 IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1), 229 IWL_ERROR_EVENT_TABLE_UMAC = BIT(2), 230 }; 231 232 /** 233 * struct iwl_host_cmd - Host command to the uCode 234 * 235 * @data: array of chunks that composes the data of the host command 236 * @resp_pkt: response packet, if %CMD_WANT_SKB was set 237 * @_rx_page_order: (internally used to free response packet) 238 * @_rx_page_addr: (internally used to free response packet) 239 * @flags: can be CMD_* 240 * @len: array of the lengths of the chunks in data 241 * @dataflags: IWL_HCMD_DFL_* 242 * @id: command id of the host command, for wide commands encoding the 243 * version and group as well 244 */ 245 struct iwl_host_cmd { 246 const void *data[IWL_MAX_CMD_TBS_PER_TFD]; 247 struct iwl_rx_packet *resp_pkt; 248 unsigned long _rx_page_addr; 249 u32 _rx_page_order; 250 251 u32 flags; 252 u32 id; 253 u16 len[IWL_MAX_CMD_TBS_PER_TFD]; 254 u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; 255 }; 256 257 static inline void iwl_free_resp(struct iwl_host_cmd *cmd) 258 { 259 free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); 260 } 261 262 struct iwl_rx_cmd_buffer { 263 struct page *_page; 264 int _offset; 265 bool _page_stolen; 266 u32 _rx_page_order; 267 unsigned int truesize; 268 }; 269 270 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) 271 { 272 return (void *)((unsigned long)page_address(r->_page) + r->_offset); 273 } 274 275 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) 276 { 277 return r->_offset; 278 } 279 280 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) 281 { 282 r->_page_stolen = true; 283 get_page(r->_page); 284 return r->_page; 285 } 286 287 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) 288 { 289 __free_pages(r->_page, r->_rx_page_order); 290 } 291 292 #define MAX_NO_RECLAIM_CMDS 6 293 294 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 295 296 /* 297 * Maximum number of HW queues the transport layer 298 * currently supports 299 */ 300 #define IWL_MAX_HW_QUEUES 32 301 #define IWL_MAX_TVQM_QUEUES 512 302 303 #define IWL_MAX_TID_COUNT 8 304 #define IWL_MGMT_TID 15 305 #define IWL_FRAME_LIMIT 64 306 #define IWL_MAX_RX_HW_QUEUES 16 307 308 /** 309 * enum iwl_wowlan_status - WoWLAN image/device status 310 * @IWL_D3_STATUS_ALIVE: firmware is still running after resume 311 * @IWL_D3_STATUS_RESET: device was reset while suspended 312 */ 313 enum iwl_d3_status { 314 IWL_D3_STATUS_ALIVE, 315 IWL_D3_STATUS_RESET, 316 }; 317 318 /** 319 * enum iwl_trans_status: transport status flags 320 * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed 321 * @STATUS_DEVICE_ENABLED: APM is enabled 322 * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) 323 * @STATUS_INT_ENABLED: interrupts are enabled 324 * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch 325 * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode 326 * @STATUS_FW_ERROR: the fw is in error state 327 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 328 * are sent 329 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 330 * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 331 */ 332 enum iwl_trans_status { 333 STATUS_SYNC_HCMD_ACTIVE, 334 STATUS_DEVICE_ENABLED, 335 STATUS_TPOWER_PMI, 336 STATUS_INT_ENABLED, 337 STATUS_RFKILL_HW, 338 STATUS_RFKILL_OPMODE, 339 STATUS_FW_ERROR, 340 STATUS_TRANS_GOING_IDLE, 341 STATUS_TRANS_IDLE, 342 STATUS_TRANS_DEAD, 343 }; 344 345 static inline int 346 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) 347 { 348 switch (rb_size) { 349 case IWL_AMSDU_2K: 350 return get_order(2 * 1024); 351 case IWL_AMSDU_4K: 352 return get_order(4 * 1024); 353 case IWL_AMSDU_8K: 354 return get_order(8 * 1024); 355 case IWL_AMSDU_12K: 356 return get_order(12 * 1024); 357 default: 358 WARN_ON(1); 359 return -1; 360 } 361 } 362 363 static inline int 364 iwl_trans_get_rb_size(enum iwl_amsdu_size rb_size) 365 { 366 switch (rb_size) { 367 case IWL_AMSDU_2K: 368 return 2 * 1024; 369 case IWL_AMSDU_4K: 370 return 4 * 1024; 371 case IWL_AMSDU_8K: 372 return 8 * 1024; 373 case IWL_AMSDU_12K: 374 return 12 * 1024; 375 default: 376 WARN_ON(1); 377 return 0; 378 } 379 } 380 381 struct iwl_hcmd_names { 382 u8 cmd_id; 383 const char *const cmd_name; 384 }; 385 386 #define HCMD_NAME(x) \ 387 { .cmd_id = x, .cmd_name = #x } 388 389 struct iwl_hcmd_arr { 390 const struct iwl_hcmd_names *arr; 391 int size; 392 }; 393 394 #define HCMD_ARR(x) \ 395 { .arr = x, .size = ARRAY_SIZE(x) } 396 397 /** 398 * struct iwl_trans_config - transport configuration 399 * 400 * @op_mode: pointer to the upper layer. 401 * @cmd_queue: the index of the command queue. 402 * Must be set before start_fw. 403 * @cmd_fifo: the fifo for host commands 404 * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. 405 * @no_reclaim_cmds: Some devices erroneously don't set the 406 * SEQ_RX_FRAME bit on some notifications, this is the 407 * list of such notifications to filter. Max length is 408 * %MAX_NO_RECLAIM_CMDS. 409 * @n_no_reclaim_cmds: # of commands in list 410 * @rx_buf_size: RX buffer size needed for A-MSDUs 411 * if unset 4k will be the RX buffer size 412 * @bc_table_dword: set to true if the BC table expects the byte count to be 413 * in DWORD (as opposed to bytes) 414 * @scd_set_active: should the transport configure the SCD for HCMD queue 415 * @sw_csum_tx: transport should compute the TCP checksum 416 * @command_groups: array of command groups, each member is an array of the 417 * commands in the group; for debugging only 418 * @command_groups_size: number of command groups, to avoid illegal access 419 * @cb_data_offs: offset inside skb->cb to store transport data at, must have 420 * space for at least two pointers 421 */ 422 struct iwl_trans_config { 423 struct iwl_op_mode *op_mode; 424 425 u8 cmd_queue; 426 u8 cmd_fifo; 427 unsigned int cmd_q_wdg_timeout; 428 const u8 *no_reclaim_cmds; 429 unsigned int n_no_reclaim_cmds; 430 431 enum iwl_amsdu_size rx_buf_size; 432 bool bc_table_dword; 433 bool scd_set_active; 434 bool sw_csum_tx; 435 const struct iwl_hcmd_arr *command_groups; 436 int command_groups_size; 437 438 u8 cb_data_offs; 439 }; 440 441 struct iwl_trans_dump_data { 442 u32 len; 443 u8 data[]; 444 }; 445 446 struct iwl_trans; 447 448 struct iwl_trans_txq_scd_cfg { 449 u8 fifo; 450 u8 sta_id; 451 u8 tid; 452 bool aggregate; 453 int frame_limit; 454 }; 455 456 /** 457 * struct iwl_trans_rxq_dma_data - RX queue DMA data 458 * @fr_bd_cb: DMA address of free BD cyclic buffer 459 * @fr_bd_wid: Initial write index of the free BD cyclic buffer 460 * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr 461 * @ur_bd_cb: DMA address of used BD cyclic buffer 462 */ 463 struct iwl_trans_rxq_dma_data { 464 u64 fr_bd_cb; 465 u32 fr_bd_wid; 466 u64 urbd_stts_wrptr; 467 u64 ur_bd_cb; 468 }; 469 470 /** 471 * struct iwl_trans_ops - transport specific operations 472 * 473 * All the handlers MUST be implemented 474 * 475 * @start_hw: starts the HW. From that point on, the HW can send interrupts. 476 * May sleep. 477 * @op_mode_leave: Turn off the HW RF kill indication if on 478 * May sleep 479 * @start_fw: allocates and inits all the resources for the transport 480 * layer. Also kick a fw image. 481 * May sleep 482 * @fw_alive: called when the fw sends alive notification. If the fw provides 483 * the SCD base address in SRAM, then provide it here, or 0 otherwise. 484 * May sleep 485 * @stop_device: stops the whole device (embedded CPU put to reset) and stops 486 * the HW. From that point on, the HW will be stopped but will still issue 487 * an interrupt if the HW RF kill switch is triggered. 488 * This callback must do the right thing and not crash even if %start_hw() 489 * was called but not &start_fw(). May sleep. 490 * @d3_suspend: put the device into the correct mode for WoWLAN during 491 * suspend. This is optional, if not implemented WoWLAN will not be 492 * supported. This callback may sleep. 493 * @d3_resume: resume the device after WoWLAN, enabling the opmode to 494 * talk to the WoWLAN image to get its status. This is optional, if not 495 * implemented WoWLAN will not be supported. This callback may sleep. 496 * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. 497 * If RFkill is asserted in the middle of a SYNC host command, it must 498 * return -ERFKILL straight away. 499 * May sleep only if CMD_ASYNC is not set 500 * @tx: send an skb. The transport relies on the op_mode to zero the 501 * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all 502 * the CSUM will be taken care of (TCP CSUM and IP header in case of 503 * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP 504 * header if it is IPv4. 505 * Must be atomic 506 * @reclaim: free packet until ssn. Returns a list of freed packets. 507 * Must be atomic 508 * @txq_enable: setup a queue. To setup an AC queue, use the 509 * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before 510 * this one. The op_mode must not configure the HCMD queue. The scheduler 511 * configuration may be %NULL, in which case the hardware will not be 512 * configured. If true is returned, the operation mode needs to increment 513 * the sequence number of the packets routed to this queue because of a 514 * hardware scheduler bug. May sleep. 515 * @txq_disable: de-configure a Tx queue to send AMPDUs 516 * Must be atomic 517 * @txq_set_shared_mode: change Tx queue shared/unshared marking 518 * @wait_tx_queues_empty: wait until tx queues are empty. May sleep. 519 * @wait_txq_empty: wait until specific tx queue is empty. May sleep. 520 * @freeze_txq_timer: prevents the timer of the queue from firing until the 521 * queue is set to awake. Must be atomic. 522 * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note 523 * that the transport needs to refcount the calls since this function 524 * will be called several times with block = true, and then the queues 525 * need to be unblocked only after the same number of calls with 526 * block = false. 527 * @write8: write a u8 to a register at offset ofs from the BAR 528 * @write32: write a u32 to a register at offset ofs from the BAR 529 * @read32: read a u32 register at offset ofs from the BAR 530 * @read_prph: read a DWORD from a periphery register 531 * @write_prph: write a DWORD to a periphery register 532 * @read_mem: read device's SRAM in DWORD 533 * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory 534 * will be zeroed. 535 * @configure: configure parameters required by the transport layer from 536 * the op_mode. May be called several times before start_fw, can't be 537 * called after that. 538 * @set_pmi: set the power pmi state 539 * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. 540 * Sleeping is not allowed between grab_nic_access and 541 * release_nic_access. 542 * @release_nic_access: let the NIC go to sleep. The "flags" parameter 543 * must be the same one that was sent before to the grab_nic_access. 544 * @set_bits_mask - set SRAM register according to value and mask. 545 * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last 546 * TX'ed commands and similar. The buffer will be vfree'd by the caller. 547 * Note that the transport must fill in the proper file headers. 548 * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup 549 * of the trans debugfs 550 */ 551 struct iwl_trans_ops { 552 553 int (*start_hw)(struct iwl_trans *iwl_trans); 554 void (*op_mode_leave)(struct iwl_trans *iwl_trans); 555 int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, 556 bool run_in_rfkill); 557 void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); 558 void (*stop_device)(struct iwl_trans *trans); 559 560 int (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset); 561 int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, 562 bool test, bool reset); 563 564 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 565 566 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 567 struct iwl_device_cmd *dev_cmd, int queue); 568 void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, 569 struct sk_buff_head *skbs); 570 571 void (*set_q_ptrs)(struct iwl_trans *trans, int queue, int ptr); 572 573 bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, 574 const struct iwl_trans_txq_scd_cfg *cfg, 575 unsigned int queue_wdg_timeout); 576 void (*txq_disable)(struct iwl_trans *trans, int queue, 577 bool configure_scd); 578 /* 22000 functions */ 579 int (*txq_alloc)(struct iwl_trans *trans, 580 __le16 flags, u8 sta_id, u8 tid, 581 int cmd_id, int size, 582 unsigned int queue_wdg_timeout); 583 void (*txq_free)(struct iwl_trans *trans, int queue); 584 int (*rxq_dma_data)(struct iwl_trans *trans, int queue, 585 struct iwl_trans_rxq_dma_data *data); 586 587 void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id, 588 bool shared); 589 590 int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm); 591 int (*wait_txq_empty)(struct iwl_trans *trans, int queue); 592 void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, 593 bool freeze); 594 void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); 595 596 void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); 597 void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); 598 u32 (*read32)(struct iwl_trans *trans, u32 ofs); 599 u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); 600 void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); 601 int (*read_mem)(struct iwl_trans *trans, u32 addr, 602 void *buf, int dwords); 603 int (*write_mem)(struct iwl_trans *trans, u32 addr, 604 const void *buf, int dwords); 605 void (*configure)(struct iwl_trans *trans, 606 const struct iwl_trans_config *trans_cfg); 607 void (*set_pmi)(struct iwl_trans *trans, bool state); 608 void (*sw_reset)(struct iwl_trans *trans); 609 bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); 610 void (*release_nic_access)(struct iwl_trans *trans, 611 unsigned long *flags); 612 void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, 613 u32 value); 614 int (*suspend)(struct iwl_trans *trans); 615 void (*resume)(struct iwl_trans *trans); 616 617 struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, 618 u32 dump_mask); 619 void (*debugfs_cleanup)(struct iwl_trans *trans); 620 void (*sync_nmi)(struct iwl_trans *trans); 621 }; 622 623 /** 624 * enum iwl_trans_state - state of the transport layer 625 * 626 * @IWL_TRANS_NO_FW: no fw has sent an alive response 627 * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response 628 */ 629 enum iwl_trans_state { 630 IWL_TRANS_NO_FW = 0, 631 IWL_TRANS_FW_ALIVE = 1, 632 }; 633 634 /** 635 * DOC: Platform power management 636 * 637 * In system-wide power management the entire platform goes into a low 638 * power state (e.g. idle or suspend to RAM) at the same time and the 639 * device is configured as a wakeup source for the entire platform. 640 * This is usually triggered by userspace activity (e.g. the user 641 * presses the suspend button or a power management daemon decides to 642 * put the platform in low power mode). The device's behavior in this 643 * mode is dictated by the wake-on-WLAN configuration. 644 * 645 * The terms used for the device's behavior are as follows: 646 * 647 * - D0: the device is fully powered and the host is awake; 648 * - D3: the device is in low power mode and only reacts to 649 * specific events (e.g. magic-packet received or scan 650 * results found); 651 * 652 * These terms reflect the power modes in the firmware and are not to 653 * be confused with the physical device power state. 654 */ 655 656 /** 657 * enum iwl_plat_pm_mode - platform power management mode 658 * 659 * This enumeration describes the device's platform power management 660 * behavior when in system-wide suspend (i.e WoWLAN). 661 * 662 * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this 663 * device. In system-wide suspend mode, it means that the all 664 * connections will be closed automatically by mac80211 before 665 * the platform is suspended. 666 * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). 667 */ 668 enum iwl_plat_pm_mode { 669 IWL_PLAT_PM_MODE_DISABLED, 670 IWL_PLAT_PM_MODE_D3, 671 }; 672 673 /** 674 * enum iwl_ini_cfg_state 675 * @IWL_INI_CFG_STATE_NOT_LOADED: no debug cfg was given 676 * @IWL_INI_CFG_STATE_LOADED: debug cfg was found and loaded 677 * @IWL_INI_CFG_STATE_CORRUPTED: debug cfg was found and some of the TLVs 678 * are corrupted. The rest of the debug TLVs will still be used 679 */ 680 enum iwl_ini_cfg_state { 681 IWL_INI_CFG_STATE_NOT_LOADED, 682 IWL_INI_CFG_STATE_LOADED, 683 IWL_INI_CFG_STATE_CORRUPTED, 684 }; 685 686 /* Max time to wait for nmi interrupt */ 687 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4) 688 689 /** 690 * struct iwl_dram_data 691 * @physical: page phy pointer 692 * @block: pointer to the allocated block/page 693 * @size: size of the block/page 694 */ 695 struct iwl_dram_data { 696 dma_addr_t physical; 697 void *block; 698 int size; 699 }; 700 701 /** 702 * struct iwl_fw_mon - fw monitor per allocation id 703 * @num_frags: number of fragments 704 * @frags: an array of DRAM buffer fragments 705 */ 706 struct iwl_fw_mon { 707 u32 num_frags; 708 struct iwl_dram_data *frags; 709 }; 710 711 /** 712 * struct iwl_self_init_dram - dram data used by self init process 713 * @fw: lmac and umac dram data 714 * @fw_cnt: total number of items in array 715 * @paging: paging dram data 716 * @paging_cnt: total number of items in array 717 */ 718 struct iwl_self_init_dram { 719 struct iwl_dram_data *fw; 720 int fw_cnt; 721 struct iwl_dram_data *paging; 722 int paging_cnt; 723 }; 724 725 /** 726 * struct iwl_trans_debug - transport debug related data 727 * 728 * @n_dest_reg: num of reg_ops in %dbg_dest_tlv 729 * @rec_on: true iff there is a fw debug recording currently active 730 * @dest_tlv: points to the destination TLV for debug 731 * @conf_tlv: array of pointers to configuration TLVs for debug 732 * @trigger_tlv: array of pointers to triggers TLVs for debug 733 * @lmac_error_event_table: addrs of lmacs error tables 734 * @umac_error_event_table: addr of umac error table 735 * @error_event_table_tlv_status: bitmap that indicates what error table 736 * pointers was recevied via TLV. uses enum &iwl_error_event_table_status 737 * @internal_ini_cfg: internal debug cfg state. Uses &enum iwl_ini_cfg_state 738 * @external_ini_cfg: external debug cfg state. Uses &enum iwl_ini_cfg_state 739 * @fw_mon_cfg: debug buffer allocation configuration 740 * @fw_mon_ini: DRAM buffer fragments per allocation id 741 * @fw_mon: DRAM buffer for firmware monitor 742 * @hw_error: equals true if hw error interrupt was received from the FW 743 * @ini_dest: debug monitor destination uses &enum iwl_fw_ini_buffer_location 744 * @active_regions: active regions 745 * @debug_info_tlv_list: list of debug info TLVs 746 * @time_point: array of debug time points 747 * @periodic_trig_list: periodic triggers list 748 * @domains_bitmap: bitmap of active domains other than 749 * &IWL_FW_INI_DOMAIN_ALWAYS_ON 750 */ 751 struct iwl_trans_debug { 752 u8 n_dest_reg; 753 bool rec_on; 754 755 const struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv; 756 const struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX]; 757 struct iwl_fw_dbg_trigger_tlv * const *trigger_tlv; 758 759 u32 lmac_error_event_table[2]; 760 u32 umac_error_event_table; 761 unsigned int error_event_table_tlv_status; 762 763 enum iwl_ini_cfg_state internal_ini_cfg; 764 enum iwl_ini_cfg_state external_ini_cfg; 765 766 struct iwl_fw_ini_allocation_tlv fw_mon_cfg[IWL_FW_INI_ALLOCATION_NUM]; 767 struct iwl_fw_mon fw_mon_ini[IWL_FW_INI_ALLOCATION_NUM]; 768 769 struct iwl_dram_data fw_mon; 770 771 bool hw_error; 772 enum iwl_fw_ini_buffer_location ini_dest; 773 774 struct iwl_ucode_tlv *active_regions[IWL_FW_INI_MAX_REGION_ID]; 775 struct list_head debug_info_tlv_list; 776 struct iwl_dbg_tlv_time_point_data 777 time_point[IWL_FW_INI_TIME_POINT_NUM]; 778 struct list_head periodic_trig_list; 779 780 u32 domains_bitmap; 781 }; 782 783 /** 784 * struct iwl_trans - transport common data 785 * 786 * @ops - pointer to iwl_trans_ops 787 * @op_mode - pointer to the op_mode 788 * @trans_cfg: the trans-specific configuration part 789 * @cfg - pointer to the configuration 790 * @drv - pointer to iwl_drv 791 * @status: a bit-mask of transport status flags 792 * @dev - pointer to struct device * that represents the device 793 * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. 794 * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. 795 * @hw_rf_id a u32 with the device RF ID 796 * @hw_id: a u32 with the ID of the device / sub-device. 797 * Set during transport allocation. 798 * @hw_id_str: a string with info about HW ID. Set during transport allocation. 799 * @pm_support: set to true in start_hw if link pm is supported 800 * @ltr_enabled: set to true if the LTR is enabled 801 * @wide_cmd_header: true when ucode supports wide command header format 802 * @num_rx_queues: number of RX queues allocated by the transport; 803 * the transport must set this before calling iwl_drv_start() 804 * @iml_len: the length of the image loader 805 * @iml: a pointer to the image loader itself 806 * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. 807 * The user should use iwl_trans_{alloc,free}_tx_cmd. 808 * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before 809 * starting the firmware, used for tracing 810 * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the 811 * start of the 802.11 header in the @rx_mpdu_cmd 812 * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) 813 * @system_pm_mode: the system-wide power management mode in use. 814 * This mode is set dynamically, depending on the WoWLAN values 815 * configured from the userspace at runtime. 816 */ 817 struct iwl_trans { 818 const struct iwl_trans_ops *ops; 819 struct iwl_op_mode *op_mode; 820 const struct iwl_cfg_trans_params *trans_cfg; 821 const struct iwl_cfg *cfg; 822 struct iwl_drv *drv; 823 enum iwl_trans_state state; 824 unsigned long status; 825 826 struct device *dev; 827 u32 max_skb_frags; 828 u32 hw_rev; 829 u32 hw_rf_id; 830 u32 hw_id; 831 char hw_id_str[52]; 832 833 u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; 834 835 bool pm_support; 836 bool ltr_enabled; 837 838 const struct iwl_hcmd_arr *command_groups; 839 int command_groups_size; 840 bool wide_cmd_header; 841 842 u8 num_rx_queues; 843 844 size_t iml_len; 845 u8 *iml; 846 847 /* The following fields are internal only */ 848 struct kmem_cache *dev_cmd_pool; 849 char dev_cmd_pool_name[50]; 850 851 struct dentry *dbgfs_dir; 852 853 #ifdef CONFIG_LOCKDEP 854 struct lockdep_map sync_cmd_lockdep_map; 855 #endif 856 857 struct iwl_trans_debug dbg; 858 struct iwl_self_init_dram init_dram; 859 860 enum iwl_plat_pm_mode system_pm_mode; 861 862 /* pointer to trans specific struct */ 863 /*Ensure that this pointer will always be aligned to sizeof pointer */ 864 char trans_specific[0] __aligned(sizeof(void *)); 865 }; 866 867 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); 868 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); 869 870 static inline void iwl_trans_configure(struct iwl_trans *trans, 871 const struct iwl_trans_config *trans_cfg) 872 { 873 trans->op_mode = trans_cfg->op_mode; 874 875 trans->ops->configure(trans, trans_cfg); 876 WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); 877 } 878 879 static inline int iwl_trans_start_hw(struct iwl_trans *trans) 880 { 881 might_sleep(); 882 883 return trans->ops->start_hw(trans); 884 } 885 886 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) 887 { 888 might_sleep(); 889 890 if (trans->ops->op_mode_leave) 891 trans->ops->op_mode_leave(trans); 892 893 trans->op_mode = NULL; 894 895 trans->state = IWL_TRANS_NO_FW; 896 } 897 898 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) 899 { 900 might_sleep(); 901 902 trans->state = IWL_TRANS_FW_ALIVE; 903 904 trans->ops->fw_alive(trans, scd_addr); 905 } 906 907 static inline int iwl_trans_start_fw(struct iwl_trans *trans, 908 const struct fw_img *fw, 909 bool run_in_rfkill) 910 { 911 might_sleep(); 912 913 WARN_ON_ONCE(!trans->rx_mpdu_cmd); 914 915 clear_bit(STATUS_FW_ERROR, &trans->status); 916 return trans->ops->start_fw(trans, fw, run_in_rfkill); 917 } 918 919 static inline void iwl_trans_stop_device(struct iwl_trans *trans) 920 { 921 might_sleep(); 922 923 trans->ops->stop_device(trans); 924 925 trans->state = IWL_TRANS_NO_FW; 926 } 927 928 static inline int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, 929 bool reset) 930 { 931 might_sleep(); 932 if (!trans->ops->d3_suspend) 933 return 0; 934 935 return trans->ops->d3_suspend(trans, test, reset); 936 } 937 938 static inline int iwl_trans_d3_resume(struct iwl_trans *trans, 939 enum iwl_d3_status *status, 940 bool test, bool reset) 941 { 942 might_sleep(); 943 if (!trans->ops->d3_resume) 944 return 0; 945 946 return trans->ops->d3_resume(trans, status, test, reset); 947 } 948 949 static inline int iwl_trans_suspend(struct iwl_trans *trans) 950 { 951 if (!trans->ops->suspend) 952 return 0; 953 954 return trans->ops->suspend(trans); 955 } 956 957 static inline void iwl_trans_resume(struct iwl_trans *trans) 958 { 959 if (trans->ops->resume) 960 trans->ops->resume(trans); 961 } 962 963 static inline struct iwl_trans_dump_data * 964 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask) 965 { 966 if (!trans->ops->dump_data) 967 return NULL; 968 return trans->ops->dump_data(trans, dump_mask); 969 } 970 971 static inline struct iwl_device_cmd * 972 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) 973 { 974 return kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC); 975 } 976 977 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 978 979 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, 980 struct iwl_device_cmd *dev_cmd) 981 { 982 kmem_cache_free(trans->dev_cmd_pool, dev_cmd); 983 } 984 985 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 986 struct iwl_device_cmd *dev_cmd, int queue) 987 { 988 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) 989 return -EIO; 990 991 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 992 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 993 return -EIO; 994 } 995 996 return trans->ops->tx(trans, skb, dev_cmd, queue); 997 } 998 999 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, 1000 int ssn, struct sk_buff_head *skbs) 1001 { 1002 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1003 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1004 return; 1005 } 1006 1007 trans->ops->reclaim(trans, queue, ssn, skbs); 1008 } 1009 1010 static inline void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, 1011 int ptr) 1012 { 1013 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1014 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1015 return; 1016 } 1017 1018 trans->ops->set_q_ptrs(trans, queue, ptr); 1019 } 1020 1021 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, 1022 bool configure_scd) 1023 { 1024 trans->ops->txq_disable(trans, queue, configure_scd); 1025 } 1026 1027 static inline bool 1028 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, 1029 const struct iwl_trans_txq_scd_cfg *cfg, 1030 unsigned int queue_wdg_timeout) 1031 { 1032 might_sleep(); 1033 1034 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1035 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1036 return false; 1037 } 1038 1039 return trans->ops->txq_enable(trans, queue, ssn, 1040 cfg, queue_wdg_timeout); 1041 } 1042 1043 static inline int 1044 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue, 1045 struct iwl_trans_rxq_dma_data *data) 1046 { 1047 if (WARN_ON_ONCE(!trans->ops->rxq_dma_data)) 1048 return -ENOTSUPP; 1049 1050 return trans->ops->rxq_dma_data(trans, queue, data); 1051 } 1052 1053 static inline void 1054 iwl_trans_txq_free(struct iwl_trans *trans, int queue) 1055 { 1056 if (WARN_ON_ONCE(!trans->ops->txq_free)) 1057 return; 1058 1059 trans->ops->txq_free(trans, queue); 1060 } 1061 1062 static inline int 1063 iwl_trans_txq_alloc(struct iwl_trans *trans, 1064 __le16 flags, u8 sta_id, u8 tid, 1065 int cmd_id, int size, 1066 unsigned int wdg_timeout) 1067 { 1068 might_sleep(); 1069 1070 if (WARN_ON_ONCE(!trans->ops->txq_alloc)) 1071 return -ENOTSUPP; 1072 1073 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1074 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1075 return -EIO; 1076 } 1077 1078 return trans->ops->txq_alloc(trans, flags, sta_id, tid, 1079 cmd_id, size, wdg_timeout); 1080 } 1081 1082 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, 1083 int queue, bool shared_mode) 1084 { 1085 if (trans->ops->txq_set_shared_mode) 1086 trans->ops->txq_set_shared_mode(trans, queue, shared_mode); 1087 } 1088 1089 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, 1090 int fifo, int sta_id, int tid, 1091 int frame_limit, u16 ssn, 1092 unsigned int queue_wdg_timeout) 1093 { 1094 struct iwl_trans_txq_scd_cfg cfg = { 1095 .fifo = fifo, 1096 .sta_id = sta_id, 1097 .tid = tid, 1098 .frame_limit = frame_limit, 1099 .aggregate = sta_id >= 0, 1100 }; 1101 1102 iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); 1103 } 1104 1105 static inline 1106 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, 1107 unsigned int queue_wdg_timeout) 1108 { 1109 struct iwl_trans_txq_scd_cfg cfg = { 1110 .fifo = fifo, 1111 .sta_id = -1, 1112 .tid = IWL_MAX_TID_COUNT, 1113 .frame_limit = IWL_FRAME_LIMIT, 1114 .aggregate = false, 1115 }; 1116 1117 iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); 1118 } 1119 1120 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, 1121 unsigned long txqs, 1122 bool freeze) 1123 { 1124 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1125 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1126 return; 1127 } 1128 1129 if (trans->ops->freeze_txq_timer) 1130 trans->ops->freeze_txq_timer(trans, txqs, freeze); 1131 } 1132 1133 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, 1134 bool block) 1135 { 1136 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1137 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1138 return; 1139 } 1140 1141 if (trans->ops->block_txq_ptrs) 1142 trans->ops->block_txq_ptrs(trans, block); 1143 } 1144 1145 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, 1146 u32 txqs) 1147 { 1148 if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty)) 1149 return -ENOTSUPP; 1150 1151 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1152 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1153 return -EIO; 1154 } 1155 1156 return trans->ops->wait_tx_queues_empty(trans, txqs); 1157 } 1158 1159 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue) 1160 { 1161 if (WARN_ON_ONCE(!trans->ops->wait_txq_empty)) 1162 return -ENOTSUPP; 1163 1164 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1165 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1166 return -EIO; 1167 } 1168 1169 return trans->ops->wait_txq_empty(trans, queue); 1170 } 1171 1172 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) 1173 { 1174 trans->ops->write8(trans, ofs, val); 1175 } 1176 1177 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) 1178 { 1179 trans->ops->write32(trans, ofs, val); 1180 } 1181 1182 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) 1183 { 1184 return trans->ops->read32(trans, ofs); 1185 } 1186 1187 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) 1188 { 1189 return trans->ops->read_prph(trans, ofs); 1190 } 1191 1192 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, 1193 u32 val) 1194 { 1195 return trans->ops->write_prph(trans, ofs, val); 1196 } 1197 1198 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, 1199 void *buf, int dwords) 1200 { 1201 return trans->ops->read_mem(trans, addr, buf, dwords); 1202 } 1203 1204 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ 1205 do { \ 1206 if (__builtin_constant_p(bufsize)) \ 1207 BUILD_BUG_ON((bufsize) % sizeof(u32)); \ 1208 iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ 1209 } while (0) 1210 1211 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) 1212 { 1213 u32 value; 1214 1215 if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) 1216 return 0xa5a5a5a5; 1217 1218 return value; 1219 } 1220 1221 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, 1222 const void *buf, int dwords) 1223 { 1224 return trans->ops->write_mem(trans, addr, buf, dwords); 1225 } 1226 1227 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, 1228 u32 val) 1229 { 1230 return iwl_trans_write_mem(trans, addr, &val, 1); 1231 } 1232 1233 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) 1234 { 1235 if (trans->ops->set_pmi) 1236 trans->ops->set_pmi(trans, state); 1237 } 1238 1239 static inline void iwl_trans_sw_reset(struct iwl_trans *trans) 1240 { 1241 if (trans->ops->sw_reset) 1242 trans->ops->sw_reset(trans); 1243 } 1244 1245 static inline void 1246 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) 1247 { 1248 trans->ops->set_bits_mask(trans, reg, mask, value); 1249 } 1250 1251 #define iwl_trans_grab_nic_access(trans, flags) \ 1252 __cond_lock(nic_access, \ 1253 likely((trans)->ops->grab_nic_access(trans, flags))) 1254 1255 static inline void __releases(nic_access) 1256 iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) 1257 { 1258 trans->ops->release_nic_access(trans, flags); 1259 __release(nic_access); 1260 } 1261 1262 static inline void iwl_trans_fw_error(struct iwl_trans *trans) 1263 { 1264 if (WARN_ON_ONCE(!trans->op_mode)) 1265 return; 1266 1267 /* prevent double restarts due to the same erroneous FW */ 1268 if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) 1269 iwl_op_mode_nic_error(trans->op_mode); 1270 } 1271 1272 static inline bool iwl_trans_fw_running(struct iwl_trans *trans) 1273 { 1274 return trans->state == IWL_TRANS_FW_ALIVE; 1275 } 1276 1277 static inline void iwl_trans_sync_nmi(struct iwl_trans *trans) 1278 { 1279 if (trans->ops->sync_nmi) 1280 trans->ops->sync_nmi(trans); 1281 } 1282 1283 static inline bool iwl_trans_dbg_ini_valid(struct iwl_trans *trans) 1284 { 1285 return trans->dbg.internal_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED || 1286 trans->dbg.external_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED; 1287 } 1288 1289 /***************************************************** 1290 * transport helper functions 1291 *****************************************************/ 1292 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, 1293 struct device *dev, 1294 const struct iwl_trans_ops *ops); 1295 void iwl_trans_free(struct iwl_trans *trans); 1296 1297 /***************************************************** 1298 * driver (transport) register/unregister functions 1299 ******************************************************/ 1300 int __must_check iwl_pci_register_driver(void); 1301 void iwl_pci_unregister_driver(void); 1302 1303 #endif /* __iwl_trans_h__ */ 1304