1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 - 2019 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * The full GNU General Public License is included in this distribution 23 * in the file called COPYING. 24 * 25 * Contact Information: 26 * Intel Linux Wireless <linuxwifi@intel.com> 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28 * 29 * BSD LICENSE 30 * 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 34 * Copyright(c) 2018 - 2019 Intel Corporation 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 41 * * Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * * Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in 45 * the documentation and/or other materials provided with the 46 * distribution. 47 * * Neither the name Intel Corporation nor the names of its 48 * contributors may be used to endorse or promote products derived 49 * from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 *****************************************************************************/ 64 #ifndef __iwl_trans_h__ 65 #define __iwl_trans_h__ 66 67 #include <linux/ieee80211.h> 68 #include <linux/mm.h> /* for page_address */ 69 #include <linux/lockdep.h> 70 #include <linux/kernel.h> 71 72 #include "iwl-debug.h" 73 #include "iwl-config.h" 74 #include "fw/img.h" 75 #include "iwl-op-mode.h" 76 #include "fw/api/cmdhdr.h" 77 #include "fw/api/txq.h" 78 #include "fw/api/dbg-tlv.h" 79 #include "iwl-dbg-tlv.h" 80 81 /** 82 * DOC: Transport layer - what is it ? 83 * 84 * The transport layer is the layer that deals with the HW directly. It provides 85 * an abstraction of the underlying HW to the upper layer. The transport layer 86 * doesn't provide any policy, algorithm or anything of this kind, but only 87 * mechanisms to make the HW do something. It is not completely stateless but 88 * close to it. 89 * We will have an implementation for each different supported bus. 90 */ 91 92 /** 93 * DOC: Life cycle of the transport layer 94 * 95 * The transport layer has a very precise life cycle. 96 * 97 * 1) A helper function is called during the module initialization and 98 * registers the bus driver's ops with the transport's alloc function. 99 * 2) Bus's probe calls to the transport layer's allocation functions. 100 * Of course this function is bus specific. 101 * 3) This allocation functions will spawn the upper layer which will 102 * register mac80211. 103 * 104 * 4) At some point (i.e. mac80211's start call), the op_mode will call 105 * the following sequence: 106 * start_hw 107 * start_fw 108 * 109 * 5) Then when finished (or reset): 110 * stop_device 111 * 112 * 6) Eventually, the free function will be called. 113 */ 114 115 #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ 116 #define FH_RSCSR_FRAME_INVALID 0x55550000 117 #define FH_RSCSR_FRAME_ALIGN 0x40 118 #define FH_RSCSR_RPA_EN BIT(25) 119 #define FH_RSCSR_RADA_EN BIT(26) 120 #define FH_RSCSR_RXQ_POS 16 121 #define FH_RSCSR_RXQ_MASK 0x3F0000 122 123 struct iwl_rx_packet { 124 /* 125 * The first 4 bytes of the RX frame header contain both the RX frame 126 * size and some flags. 127 * Bit fields: 128 * 31: flag flush RB request 129 * 30: flag ignore TC (terminal counter) request 130 * 29: flag fast IRQ request 131 * 28-27: Reserved 132 * 26: RADA enabled 133 * 25: Offload enabled 134 * 24: RPF enabled 135 * 23: RSS enabled 136 * 22: Checksum enabled 137 * 21-16: RX queue 138 * 15-14: Reserved 139 * 13-00: RX frame size 140 */ 141 __le32 len_n_flags; 142 struct iwl_cmd_header hdr; 143 u8 data[]; 144 } __packed; 145 146 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) 147 { 148 return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 149 } 150 151 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) 152 { 153 return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); 154 } 155 156 /** 157 * enum CMD_MODE - how to send the host commands ? 158 * 159 * @CMD_ASYNC: Return right away and don't wait for the response 160 * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of 161 * the response. The caller needs to call iwl_free_resp when done. 162 * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the 163 * command queue, but after other high priority commands. Valid only 164 * with CMD_ASYNC. 165 * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle. 166 * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle. 167 * @CMD_WAKE_UP_TRANS: The command response should wake up the trans 168 * (i.e. mark it as non-idle). 169 * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be 170 * called after this command completes. Valid only with CMD_ASYNC. 171 */ 172 enum CMD_MODE { 173 CMD_ASYNC = BIT(0), 174 CMD_WANT_SKB = BIT(1), 175 CMD_SEND_IN_RFKILL = BIT(2), 176 CMD_HIGH_PRIO = BIT(3), 177 CMD_SEND_IN_IDLE = BIT(4), 178 CMD_MAKE_TRANS_IDLE = BIT(5), 179 CMD_WAKE_UP_TRANS = BIT(6), 180 CMD_WANT_ASYNC_CALLBACK = BIT(7), 181 }; 182 183 #define DEF_CMD_PAYLOAD_SIZE 320 184 185 /** 186 * struct iwl_device_cmd 187 * 188 * For allocation of the command and tx queues, this establishes the overall 189 * size of the largest command we send to uCode, except for commands that 190 * aren't fully copied and use other TFD space. 191 */ 192 struct iwl_device_cmd { 193 union { 194 struct { 195 struct iwl_cmd_header hdr; /* uCode API */ 196 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 197 }; 198 struct { 199 struct iwl_cmd_header_wide hdr_wide; 200 u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - 201 sizeof(struct iwl_cmd_header_wide) + 202 sizeof(struct iwl_cmd_header)]; 203 }; 204 }; 205 } __packed; 206 207 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 208 209 /* 210 * number of transfer buffers (fragments) per transmit frame descriptor; 211 * this is just the driver's idea, the hardware supports 20 212 */ 213 #define IWL_MAX_CMD_TBS_PER_TFD 2 214 215 /** 216 * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command 217 * 218 * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's 219 * ring. The transport layer doesn't map the command's buffer to DMA, but 220 * rather copies it to a previously allocated DMA buffer. This flag tells 221 * the transport layer not to copy the command, but to map the existing 222 * buffer (that is passed in) instead. This saves the memcpy and allows 223 * commands that are bigger than the fixed buffer to be submitted. 224 * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. 225 * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this 226 * chunk internally and free it again after the command completes. This 227 * can (currently) be used only once per command. 228 * Note that a TFD entry after a DUP one cannot be a normal copied one. 229 */ 230 enum iwl_hcmd_dataflag { 231 IWL_HCMD_DFL_NOCOPY = BIT(0), 232 IWL_HCMD_DFL_DUP = BIT(1), 233 }; 234 235 enum iwl_error_event_table_status { 236 IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0), 237 IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1), 238 IWL_ERROR_EVENT_TABLE_UMAC = BIT(2), 239 }; 240 241 /** 242 * struct iwl_host_cmd - Host command to the uCode 243 * 244 * @data: array of chunks that composes the data of the host command 245 * @resp_pkt: response packet, if %CMD_WANT_SKB was set 246 * @_rx_page_order: (internally used to free response packet) 247 * @_rx_page_addr: (internally used to free response packet) 248 * @flags: can be CMD_* 249 * @len: array of the lengths of the chunks in data 250 * @dataflags: IWL_HCMD_DFL_* 251 * @id: command id of the host command, for wide commands encoding the 252 * version and group as well 253 */ 254 struct iwl_host_cmd { 255 const void *data[IWL_MAX_CMD_TBS_PER_TFD]; 256 struct iwl_rx_packet *resp_pkt; 257 unsigned long _rx_page_addr; 258 u32 _rx_page_order; 259 260 u32 flags; 261 u32 id; 262 u16 len[IWL_MAX_CMD_TBS_PER_TFD]; 263 u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; 264 }; 265 266 static inline void iwl_free_resp(struct iwl_host_cmd *cmd) 267 { 268 free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); 269 } 270 271 struct iwl_rx_cmd_buffer { 272 struct page *_page; 273 int _offset; 274 bool _page_stolen; 275 u32 _rx_page_order; 276 unsigned int truesize; 277 u8 status; 278 }; 279 280 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) 281 { 282 return (void *)((unsigned long)page_address(r->_page) + r->_offset); 283 } 284 285 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) 286 { 287 return r->_offset; 288 } 289 290 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) 291 { 292 r->_page_stolen = true; 293 get_page(r->_page); 294 return r->_page; 295 } 296 297 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) 298 { 299 __free_pages(r->_page, r->_rx_page_order); 300 } 301 302 #define MAX_NO_RECLAIM_CMDS 6 303 304 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 305 306 /* 307 * Maximum number of HW queues the transport layer 308 * currently supports 309 */ 310 #define IWL_MAX_HW_QUEUES 32 311 #define IWL_MAX_TVQM_QUEUES 512 312 313 #define IWL_MAX_TID_COUNT 8 314 #define IWL_MGMT_TID 15 315 #define IWL_FRAME_LIMIT 64 316 #define IWL_MAX_RX_HW_QUEUES 16 317 318 /** 319 * enum iwl_wowlan_status - WoWLAN image/device status 320 * @IWL_D3_STATUS_ALIVE: firmware is still running after resume 321 * @IWL_D3_STATUS_RESET: device was reset while suspended 322 */ 323 enum iwl_d3_status { 324 IWL_D3_STATUS_ALIVE, 325 IWL_D3_STATUS_RESET, 326 }; 327 328 /** 329 * enum iwl_trans_status: transport status flags 330 * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed 331 * @STATUS_DEVICE_ENABLED: APM is enabled 332 * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) 333 * @STATUS_INT_ENABLED: interrupts are enabled 334 * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch 335 * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode 336 * @STATUS_FW_ERROR: the fw is in error state 337 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 338 * are sent 339 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 340 * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 341 * @STATUS_FW_WAIT_DUMP: if set, wait until cleared before collecting dump 342 */ 343 enum iwl_trans_status { 344 STATUS_SYNC_HCMD_ACTIVE, 345 STATUS_DEVICE_ENABLED, 346 STATUS_TPOWER_PMI, 347 STATUS_INT_ENABLED, 348 STATUS_RFKILL_HW, 349 STATUS_RFKILL_OPMODE, 350 STATUS_FW_ERROR, 351 STATUS_TRANS_GOING_IDLE, 352 STATUS_TRANS_IDLE, 353 STATUS_TRANS_DEAD, 354 STATUS_FW_WAIT_DUMP, 355 }; 356 357 static inline int 358 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) 359 { 360 switch (rb_size) { 361 case IWL_AMSDU_2K: 362 return get_order(2 * 1024); 363 case IWL_AMSDU_4K: 364 return get_order(4 * 1024); 365 case IWL_AMSDU_8K: 366 return get_order(8 * 1024); 367 case IWL_AMSDU_12K: 368 return get_order(12 * 1024); 369 default: 370 WARN_ON(1); 371 return -1; 372 } 373 } 374 375 struct iwl_hcmd_names { 376 u8 cmd_id; 377 const char *const cmd_name; 378 }; 379 380 #define HCMD_NAME(x) \ 381 { .cmd_id = x, .cmd_name = #x } 382 383 struct iwl_hcmd_arr { 384 const struct iwl_hcmd_names *arr; 385 int size; 386 }; 387 388 #define HCMD_ARR(x) \ 389 { .arr = x, .size = ARRAY_SIZE(x) } 390 391 /** 392 * struct iwl_trans_config - transport configuration 393 * 394 * @op_mode: pointer to the upper layer. 395 * @cmd_queue: the index of the command queue. 396 * Must be set before start_fw. 397 * @cmd_fifo: the fifo for host commands 398 * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. 399 * @no_reclaim_cmds: Some devices erroneously don't set the 400 * SEQ_RX_FRAME bit on some notifications, this is the 401 * list of such notifications to filter. Max length is 402 * %MAX_NO_RECLAIM_CMDS. 403 * @n_no_reclaim_cmds: # of commands in list 404 * @rx_buf_size: RX buffer size needed for A-MSDUs 405 * if unset 4k will be the RX buffer size 406 * @bc_table_dword: set to true if the BC table expects the byte count to be 407 * in DWORD (as opposed to bytes) 408 * @scd_set_active: should the transport configure the SCD for HCMD queue 409 * @sw_csum_tx: transport should compute the TCP checksum 410 * @command_groups: array of command groups, each member is an array of the 411 * commands in the group; for debugging only 412 * @command_groups_size: number of command groups, to avoid illegal access 413 * @cb_data_offs: offset inside skb->cb to store transport data at, must have 414 * space for at least two pointers 415 */ 416 struct iwl_trans_config { 417 struct iwl_op_mode *op_mode; 418 419 u8 cmd_queue; 420 u8 cmd_fifo; 421 unsigned int cmd_q_wdg_timeout; 422 const u8 *no_reclaim_cmds; 423 unsigned int n_no_reclaim_cmds; 424 425 enum iwl_amsdu_size rx_buf_size; 426 bool bc_table_dword; 427 bool scd_set_active; 428 bool sw_csum_tx; 429 const struct iwl_hcmd_arr *command_groups; 430 int command_groups_size; 431 432 u8 cb_data_offs; 433 }; 434 435 struct iwl_trans_dump_data { 436 u32 len; 437 u8 data[]; 438 }; 439 440 struct iwl_trans; 441 442 struct iwl_trans_txq_scd_cfg { 443 u8 fifo; 444 u8 sta_id; 445 u8 tid; 446 bool aggregate; 447 int frame_limit; 448 }; 449 450 /** 451 * struct iwl_trans_rxq_dma_data - RX queue DMA data 452 * @fr_bd_cb: DMA address of free BD cyclic buffer 453 * @fr_bd_wid: Initial write index of the free BD cyclic buffer 454 * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr 455 * @ur_bd_cb: DMA address of used BD cyclic buffer 456 */ 457 struct iwl_trans_rxq_dma_data { 458 u64 fr_bd_cb; 459 u32 fr_bd_wid; 460 u64 urbd_stts_wrptr; 461 u64 ur_bd_cb; 462 }; 463 464 /** 465 * struct iwl_trans_ops - transport specific operations 466 * 467 * All the handlers MUST be implemented 468 * 469 * @start_hw: starts the HW. If low_power is true, the NIC needs to be taken 470 * out of a low power state. From that point on, the HW can send 471 * interrupts. May sleep. 472 * @op_mode_leave: Turn off the HW RF kill indication if on 473 * May sleep 474 * @start_fw: allocates and inits all the resources for the transport 475 * layer. Also kick a fw image. 476 * May sleep 477 * @fw_alive: called when the fw sends alive notification. If the fw provides 478 * the SCD base address in SRAM, then provide it here, or 0 otherwise. 479 * May sleep 480 * @stop_device: stops the whole device (embedded CPU put to reset) and stops 481 * the HW. If low_power is true, the NIC will be put in low power state. 482 * From that point on, the HW will be stopped but will still issue an 483 * interrupt if the HW RF kill switch is triggered. 484 * This callback must do the right thing and not crash even if %start_hw() 485 * was called but not &start_fw(). May sleep. 486 * @d3_suspend: put the device into the correct mode for WoWLAN during 487 * suspend. This is optional, if not implemented WoWLAN will not be 488 * supported. This callback may sleep. 489 * @d3_resume: resume the device after WoWLAN, enabling the opmode to 490 * talk to the WoWLAN image to get its status. This is optional, if not 491 * implemented WoWLAN will not be supported. This callback may sleep. 492 * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. 493 * If RFkill is asserted in the middle of a SYNC host command, it must 494 * return -ERFKILL straight away. 495 * May sleep only if CMD_ASYNC is not set 496 * @tx: send an skb. The transport relies on the op_mode to zero the 497 * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all 498 * the CSUM will be taken care of (TCP CSUM and IP header in case of 499 * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP 500 * header if it is IPv4. 501 * Must be atomic 502 * @reclaim: free packet until ssn. Returns a list of freed packets. 503 * Must be atomic 504 * @txq_enable: setup a queue. To setup an AC queue, use the 505 * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before 506 * this one. The op_mode must not configure the HCMD queue. The scheduler 507 * configuration may be %NULL, in which case the hardware will not be 508 * configured. If true is returned, the operation mode needs to increment 509 * the sequence number of the packets routed to this queue because of a 510 * hardware scheduler bug. May sleep. 511 * @txq_disable: de-configure a Tx queue to send AMPDUs 512 * Must be atomic 513 * @txq_set_shared_mode: change Tx queue shared/unshared marking 514 * @wait_tx_queues_empty: wait until tx queues are empty. May sleep. 515 * @wait_txq_empty: wait until specific tx queue is empty. May sleep. 516 * @freeze_txq_timer: prevents the timer of the queue from firing until the 517 * queue is set to awake. Must be atomic. 518 * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note 519 * that the transport needs to refcount the calls since this function 520 * will be called several times with block = true, and then the queues 521 * need to be unblocked only after the same number of calls with 522 * block = false. 523 * @write8: write a u8 to a register at offset ofs from the BAR 524 * @write32: write a u32 to a register at offset ofs from the BAR 525 * @read32: read a u32 register at offset ofs from the BAR 526 * @read_prph: read a DWORD from a periphery register 527 * @write_prph: write a DWORD to a periphery register 528 * @read_mem: read device's SRAM in DWORD 529 * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory 530 * will be zeroed. 531 * @configure: configure parameters required by the transport layer from 532 * the op_mode. May be called several times before start_fw, can't be 533 * called after that. 534 * @set_pmi: set the power pmi state 535 * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. 536 * Sleeping is not allowed between grab_nic_access and 537 * release_nic_access. 538 * @release_nic_access: let the NIC go to sleep. The "flags" parameter 539 * must be the same one that was sent before to the grab_nic_access. 540 * @set_bits_mask - set SRAM register according to value and mask. 541 * @ref: grab a reference to the transport/FW layers, disallowing 542 * certain low power states 543 * @unref: release a reference previously taken with @ref. Note that 544 * initially the reference count is 1, making an initial @unref 545 * necessary to allow low power states. 546 * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last 547 * TX'ed commands and similar. The buffer will be vfree'd by the caller. 548 * Note that the transport must fill in the proper file headers. 549 * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup 550 * of the trans debugfs 551 */ 552 struct iwl_trans_ops { 553 554 int (*start_hw)(struct iwl_trans *iwl_trans, bool low_power); 555 void (*op_mode_leave)(struct iwl_trans *iwl_trans); 556 int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, 557 bool run_in_rfkill); 558 void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); 559 void (*stop_device)(struct iwl_trans *trans, bool low_power); 560 561 void (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset); 562 int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, 563 bool test, bool reset); 564 565 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 566 567 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 568 struct iwl_device_cmd *dev_cmd, int queue); 569 void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, 570 struct sk_buff_head *skbs); 571 572 bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, 573 const struct iwl_trans_txq_scd_cfg *cfg, 574 unsigned int queue_wdg_timeout); 575 void (*txq_disable)(struct iwl_trans *trans, int queue, 576 bool configure_scd); 577 /* 22000 functions */ 578 int (*txq_alloc)(struct iwl_trans *trans, 579 __le16 flags, u8 sta_id, u8 tid, 580 int cmd_id, int size, 581 unsigned int queue_wdg_timeout); 582 void (*txq_free)(struct iwl_trans *trans, int queue); 583 int (*rxq_dma_data)(struct iwl_trans *trans, int queue, 584 struct iwl_trans_rxq_dma_data *data); 585 586 void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id, 587 bool shared); 588 589 int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm); 590 int (*wait_txq_empty)(struct iwl_trans *trans, int queue); 591 void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, 592 bool freeze); 593 void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); 594 595 void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); 596 void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); 597 u32 (*read32)(struct iwl_trans *trans, u32 ofs); 598 u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); 599 void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); 600 int (*read_mem)(struct iwl_trans *trans, u32 addr, 601 void *buf, int dwords); 602 int (*write_mem)(struct iwl_trans *trans, u32 addr, 603 const void *buf, int dwords); 604 void (*configure)(struct iwl_trans *trans, 605 const struct iwl_trans_config *trans_cfg); 606 void (*set_pmi)(struct iwl_trans *trans, bool state); 607 void (*sw_reset)(struct iwl_trans *trans); 608 bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); 609 void (*release_nic_access)(struct iwl_trans *trans, 610 unsigned long *flags); 611 void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, 612 u32 value); 613 void (*ref)(struct iwl_trans *trans); 614 void (*unref)(struct iwl_trans *trans); 615 int (*suspend)(struct iwl_trans *trans); 616 void (*resume)(struct iwl_trans *trans); 617 618 struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, 619 u32 dump_mask); 620 void (*debugfs_cleanup)(struct iwl_trans *trans); 621 }; 622 623 /** 624 * enum iwl_trans_state - state of the transport layer 625 * 626 * @IWL_TRANS_NO_FW: no fw has sent an alive response 627 * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response 628 */ 629 enum iwl_trans_state { 630 IWL_TRANS_NO_FW = 0, 631 IWL_TRANS_FW_ALIVE = 1, 632 }; 633 634 /** 635 * DOC: Platform power management 636 * 637 * There are two types of platform power management: system-wide 638 * (WoWLAN) and runtime. 639 * 640 * In system-wide power management the entire platform goes into a low 641 * power state (e.g. idle or suspend to RAM) at the same time and the 642 * device is configured as a wakeup source for the entire platform. 643 * This is usually triggered by userspace activity (e.g. the user 644 * presses the suspend button or a power management daemon decides to 645 * put the platform in low power mode). The device's behavior in this 646 * mode is dictated by the wake-on-WLAN configuration. 647 * 648 * In runtime power management, only the devices which are themselves 649 * idle enter a low power state. This is done at runtime, which means 650 * that the entire system is still running normally. This mode is 651 * usually triggered automatically by the device driver and requires 652 * the ability to enter and exit the low power modes in a very short 653 * time, so there is not much impact in usability. 654 * 655 * The terms used for the device's behavior are as follows: 656 * 657 * - D0: the device is fully powered and the host is awake; 658 * - D3: the device is in low power mode and only reacts to 659 * specific events (e.g. magic-packet received or scan 660 * results found); 661 * - D0I3: the device is in low power mode and reacts to any 662 * activity (e.g. RX); 663 * 664 * These terms reflect the power modes in the firmware and are not to 665 * be confused with the physical device power state. The NIC can be 666 * in D0I3 mode even if, for instance, the PCI device is in D3 state. 667 */ 668 669 /** 670 * enum iwl_plat_pm_mode - platform power management mode 671 * 672 * This enumeration describes the device's platform power management 673 * behavior when in idle mode (i.e. runtime power management) or when 674 * in system-wide suspend (i.e WoWLAN). 675 * 676 * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this 677 * device. At runtime, this means that nothing happens and the 678 * device always remains in active. In system-wide suspend mode, 679 * it means that the all connections will be closed automatically 680 * by mac80211 before the platform is suspended. 681 * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). 682 * For runtime power management, this mode is not officially 683 * supported. 684 * @IWL_PLAT_PM_MODE_D0I3: the device goes into D0I3 mode. 685 */ 686 enum iwl_plat_pm_mode { 687 IWL_PLAT_PM_MODE_DISABLED, 688 IWL_PLAT_PM_MODE_D3, 689 IWL_PLAT_PM_MODE_D0I3, 690 }; 691 692 /* Max time to wait for trans to become idle/non-idle on d0i3 693 * enter/exit (in msecs). 694 */ 695 #define IWL_TRANS_IDLE_TIMEOUT 2000 696 697 /* Max time to wait for nmi interrupt */ 698 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4) 699 700 /** 701 * struct iwl_dram_data 702 * @physical: page phy pointer 703 * @block: pointer to the allocated block/page 704 * @size: size of the block/page 705 */ 706 struct iwl_dram_data { 707 dma_addr_t physical; 708 void *block; 709 int size; 710 }; 711 712 /** 713 * struct iwl_self_init_dram - dram data used by self init process 714 * @fw: lmac and umac dram data 715 * @fw_cnt: total number of items in array 716 * @paging: paging dram data 717 * @paging_cnt: total number of items in array 718 */ 719 struct iwl_self_init_dram { 720 struct iwl_dram_data *fw; 721 int fw_cnt; 722 struct iwl_dram_data *paging; 723 int paging_cnt; 724 }; 725 726 /** 727 * struct iwl_trans - transport common data 728 * 729 * @ops - pointer to iwl_trans_ops 730 * @op_mode - pointer to the op_mode 731 * @cfg - pointer to the configuration 732 * @drv - pointer to iwl_drv 733 * @status: a bit-mask of transport status flags 734 * @dev - pointer to struct device * that represents the device 735 * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. 736 * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. 737 * @hw_rf_id a u32 with the device RF ID 738 * @hw_id: a u32 with the ID of the device / sub-device. 739 * Set during transport allocation. 740 * @hw_id_str: a string with info about HW ID. Set during transport allocation. 741 * @pm_support: set to true in start_hw if link pm is supported 742 * @ltr_enabled: set to true if the LTR is enabled 743 * @wide_cmd_header: true when ucode supports wide command header format 744 * @num_rx_queues: number of RX queues allocated by the transport; 745 * the transport must set this before calling iwl_drv_start() 746 * @iml_len: the length of the image loader 747 * @iml: a pointer to the image loader itself 748 * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. 749 * The user should use iwl_trans_{alloc,free}_tx_cmd. 750 * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before 751 * starting the firmware, used for tracing 752 * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the 753 * start of the 802.11 header in the @rx_mpdu_cmd 754 * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) 755 * @dbg_dest_tlv: points to the destination TLV for debug 756 * @dbg_conf_tlv: array of pointers to configuration TLVs for debug 757 * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug 758 * @dbg_n_dest_reg: num of reg_ops in %dbg_dest_tlv 759 * @num_blocks: number of blocks in fw_mon 760 * @fw_mon: address of the buffers for firmware monitor 761 * @system_pm_mode: the system-wide power management mode in use. 762 * This mode is set dynamically, depending on the WoWLAN values 763 * configured from the userspace at runtime. 764 * @runtime_pm_mode: the runtime power management mode in use. This 765 * mode is set during the initialization phase and is not 766 * supposed to change during runtime. 767 * @dbg_rec_on: true iff there is a fw debug recording currently active 768 * @lmac_error_event_table: addrs of lmacs error tables 769 * @umac_error_event_table: addr of umac error table 770 * @error_event_table_tlv_status: bitmap that indicates what error table 771 * pointers was recevied via TLV. use enum &iwl_error_event_table_status 772 */ 773 struct iwl_trans { 774 const struct iwl_trans_ops *ops; 775 struct iwl_op_mode *op_mode; 776 const struct iwl_cfg *cfg; 777 struct iwl_drv *drv; 778 enum iwl_trans_state state; 779 unsigned long status; 780 781 struct device *dev; 782 u32 max_skb_frags; 783 u32 hw_rev; 784 u32 hw_rf_id; 785 u32 hw_id; 786 char hw_id_str[52]; 787 788 u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; 789 790 bool pm_support; 791 bool ltr_enabled; 792 793 const struct iwl_hcmd_arr *command_groups; 794 int command_groups_size; 795 bool wide_cmd_header; 796 797 u8 num_rx_queues; 798 799 size_t iml_len; 800 u8 *iml; 801 802 /* The following fields are internal only */ 803 struct kmem_cache *dev_cmd_pool; 804 char dev_cmd_pool_name[50]; 805 806 struct dentry *dbgfs_dir; 807 808 #ifdef CONFIG_LOCKDEP 809 struct lockdep_map sync_cmd_lockdep_map; 810 #endif 811 812 struct iwl_apply_point_data apply_points[IWL_FW_INI_APPLY_NUM]; 813 struct iwl_apply_point_data apply_points_ext[IWL_FW_INI_APPLY_NUM]; 814 815 bool external_ini_loaded; 816 bool ini_valid; 817 818 const struct iwl_fw_dbg_dest_tlv_v1 *dbg_dest_tlv; 819 const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX]; 820 struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv; 821 u8 dbg_n_dest_reg; 822 int num_blocks; 823 struct iwl_dram_data fw_mon[IWL_FW_INI_APPLY_NUM]; 824 struct iwl_self_init_dram init_dram; 825 826 enum iwl_plat_pm_mode system_pm_mode; 827 enum iwl_plat_pm_mode runtime_pm_mode; 828 bool suspending; 829 bool dbg_rec_on; 830 831 u32 lmac_error_event_table[2]; 832 u32 umac_error_event_table; 833 unsigned int error_event_table_tlv_status; 834 wait_queue_head_t fw_halt_waitq; 835 836 /* pointer to trans specific struct */ 837 /*Ensure that this pointer will always be aligned to sizeof pointer */ 838 char trans_specific[0] __aligned(sizeof(void *)); 839 }; 840 841 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); 842 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); 843 844 static inline void iwl_trans_configure(struct iwl_trans *trans, 845 const struct iwl_trans_config *trans_cfg) 846 { 847 trans->op_mode = trans_cfg->op_mode; 848 849 trans->ops->configure(trans, trans_cfg); 850 WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); 851 } 852 853 static inline int _iwl_trans_start_hw(struct iwl_trans *trans, bool low_power) 854 { 855 might_sleep(); 856 857 return trans->ops->start_hw(trans, low_power); 858 } 859 860 static inline int iwl_trans_start_hw(struct iwl_trans *trans) 861 { 862 return trans->ops->start_hw(trans, true); 863 } 864 865 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) 866 { 867 might_sleep(); 868 869 if (trans->ops->op_mode_leave) 870 trans->ops->op_mode_leave(trans); 871 872 trans->op_mode = NULL; 873 874 trans->state = IWL_TRANS_NO_FW; 875 } 876 877 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) 878 { 879 might_sleep(); 880 881 trans->state = IWL_TRANS_FW_ALIVE; 882 883 trans->ops->fw_alive(trans, scd_addr); 884 } 885 886 static inline int iwl_trans_start_fw(struct iwl_trans *trans, 887 const struct fw_img *fw, 888 bool run_in_rfkill) 889 { 890 might_sleep(); 891 892 WARN_ON_ONCE(!trans->rx_mpdu_cmd); 893 894 clear_bit(STATUS_FW_ERROR, &trans->status); 895 return trans->ops->start_fw(trans, fw, run_in_rfkill); 896 } 897 898 static inline void _iwl_trans_stop_device(struct iwl_trans *trans, 899 bool low_power) 900 { 901 might_sleep(); 902 903 trans->ops->stop_device(trans, low_power); 904 905 trans->state = IWL_TRANS_NO_FW; 906 } 907 908 static inline void iwl_trans_stop_device(struct iwl_trans *trans) 909 { 910 _iwl_trans_stop_device(trans, true); 911 } 912 913 static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, 914 bool reset) 915 { 916 might_sleep(); 917 if (trans->ops->d3_suspend) 918 trans->ops->d3_suspend(trans, test, reset); 919 } 920 921 static inline int iwl_trans_d3_resume(struct iwl_trans *trans, 922 enum iwl_d3_status *status, 923 bool test, bool reset) 924 { 925 might_sleep(); 926 if (!trans->ops->d3_resume) 927 return 0; 928 929 return trans->ops->d3_resume(trans, status, test, reset); 930 } 931 932 static inline int iwl_trans_suspend(struct iwl_trans *trans) 933 { 934 if (!trans->ops->suspend) 935 return 0; 936 937 return trans->ops->suspend(trans); 938 } 939 940 static inline void iwl_trans_resume(struct iwl_trans *trans) 941 { 942 if (trans->ops->resume) 943 trans->ops->resume(trans); 944 } 945 946 static inline struct iwl_trans_dump_data * 947 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask) 948 { 949 if (!trans->ops->dump_data) 950 return NULL; 951 return trans->ops->dump_data(trans, dump_mask); 952 } 953 954 static inline struct iwl_device_cmd * 955 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) 956 { 957 return kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC); 958 } 959 960 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 961 962 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, 963 struct iwl_device_cmd *dev_cmd) 964 { 965 kmem_cache_free(trans->dev_cmd_pool, dev_cmd); 966 } 967 968 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 969 struct iwl_device_cmd *dev_cmd, int queue) 970 { 971 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) 972 return -EIO; 973 974 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 975 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 976 return -EIO; 977 } 978 979 return trans->ops->tx(trans, skb, dev_cmd, queue); 980 } 981 982 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, 983 int ssn, struct sk_buff_head *skbs) 984 { 985 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 986 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 987 return; 988 } 989 990 trans->ops->reclaim(trans, queue, ssn, skbs); 991 } 992 993 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, 994 bool configure_scd) 995 { 996 trans->ops->txq_disable(trans, queue, configure_scd); 997 } 998 999 static inline bool 1000 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, 1001 const struct iwl_trans_txq_scd_cfg *cfg, 1002 unsigned int queue_wdg_timeout) 1003 { 1004 might_sleep(); 1005 1006 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1007 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1008 return false; 1009 } 1010 1011 return trans->ops->txq_enable(trans, queue, ssn, 1012 cfg, queue_wdg_timeout); 1013 } 1014 1015 static inline int 1016 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue, 1017 struct iwl_trans_rxq_dma_data *data) 1018 { 1019 if (WARN_ON_ONCE(!trans->ops->rxq_dma_data)) 1020 return -ENOTSUPP; 1021 1022 return trans->ops->rxq_dma_data(trans, queue, data); 1023 } 1024 1025 static inline void 1026 iwl_trans_txq_free(struct iwl_trans *trans, int queue) 1027 { 1028 if (WARN_ON_ONCE(!trans->ops->txq_free)) 1029 return; 1030 1031 trans->ops->txq_free(trans, queue); 1032 } 1033 1034 static inline int 1035 iwl_trans_txq_alloc(struct iwl_trans *trans, 1036 __le16 flags, u8 sta_id, u8 tid, 1037 int cmd_id, int size, 1038 unsigned int wdg_timeout) 1039 { 1040 might_sleep(); 1041 1042 if (WARN_ON_ONCE(!trans->ops->txq_alloc)) 1043 return -ENOTSUPP; 1044 1045 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1046 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1047 return -EIO; 1048 } 1049 1050 return trans->ops->txq_alloc(trans, flags, sta_id, tid, 1051 cmd_id, size, wdg_timeout); 1052 } 1053 1054 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, 1055 int queue, bool shared_mode) 1056 { 1057 if (trans->ops->txq_set_shared_mode) 1058 trans->ops->txq_set_shared_mode(trans, queue, shared_mode); 1059 } 1060 1061 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, 1062 int fifo, int sta_id, int tid, 1063 int frame_limit, u16 ssn, 1064 unsigned int queue_wdg_timeout) 1065 { 1066 struct iwl_trans_txq_scd_cfg cfg = { 1067 .fifo = fifo, 1068 .sta_id = sta_id, 1069 .tid = tid, 1070 .frame_limit = frame_limit, 1071 .aggregate = sta_id >= 0, 1072 }; 1073 1074 iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); 1075 } 1076 1077 static inline 1078 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, 1079 unsigned int queue_wdg_timeout) 1080 { 1081 struct iwl_trans_txq_scd_cfg cfg = { 1082 .fifo = fifo, 1083 .sta_id = -1, 1084 .tid = IWL_MAX_TID_COUNT, 1085 .frame_limit = IWL_FRAME_LIMIT, 1086 .aggregate = false, 1087 }; 1088 1089 iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); 1090 } 1091 1092 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, 1093 unsigned long txqs, 1094 bool freeze) 1095 { 1096 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1097 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1098 return; 1099 } 1100 1101 if (trans->ops->freeze_txq_timer) 1102 trans->ops->freeze_txq_timer(trans, txqs, freeze); 1103 } 1104 1105 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, 1106 bool block) 1107 { 1108 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1109 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1110 return; 1111 } 1112 1113 if (trans->ops->block_txq_ptrs) 1114 trans->ops->block_txq_ptrs(trans, block); 1115 } 1116 1117 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, 1118 u32 txqs) 1119 { 1120 if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty)) 1121 return -ENOTSUPP; 1122 1123 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1124 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1125 return -EIO; 1126 } 1127 1128 return trans->ops->wait_tx_queues_empty(trans, txqs); 1129 } 1130 1131 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue) 1132 { 1133 if (WARN_ON_ONCE(!trans->ops->wait_txq_empty)) 1134 return -ENOTSUPP; 1135 1136 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1137 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1138 return -EIO; 1139 } 1140 1141 return trans->ops->wait_txq_empty(trans, queue); 1142 } 1143 1144 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) 1145 { 1146 trans->ops->write8(trans, ofs, val); 1147 } 1148 1149 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) 1150 { 1151 trans->ops->write32(trans, ofs, val); 1152 } 1153 1154 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) 1155 { 1156 return trans->ops->read32(trans, ofs); 1157 } 1158 1159 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) 1160 { 1161 return trans->ops->read_prph(trans, ofs); 1162 } 1163 1164 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, 1165 u32 val) 1166 { 1167 return trans->ops->write_prph(trans, ofs, val); 1168 } 1169 1170 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, 1171 void *buf, int dwords) 1172 { 1173 return trans->ops->read_mem(trans, addr, buf, dwords); 1174 } 1175 1176 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ 1177 do { \ 1178 if (__builtin_constant_p(bufsize)) \ 1179 BUILD_BUG_ON((bufsize) % sizeof(u32)); \ 1180 iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ 1181 } while (0) 1182 1183 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) 1184 { 1185 u32 value; 1186 1187 if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) 1188 return 0xa5a5a5a5; 1189 1190 return value; 1191 } 1192 1193 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, 1194 const void *buf, int dwords) 1195 { 1196 return trans->ops->write_mem(trans, addr, buf, dwords); 1197 } 1198 1199 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, 1200 u32 val) 1201 { 1202 return iwl_trans_write_mem(trans, addr, &val, 1); 1203 } 1204 1205 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) 1206 { 1207 if (trans->ops->set_pmi) 1208 trans->ops->set_pmi(trans, state); 1209 } 1210 1211 static inline void iwl_trans_sw_reset(struct iwl_trans *trans) 1212 { 1213 if (trans->ops->sw_reset) 1214 trans->ops->sw_reset(trans); 1215 } 1216 1217 static inline void 1218 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) 1219 { 1220 trans->ops->set_bits_mask(trans, reg, mask, value); 1221 } 1222 1223 #define iwl_trans_grab_nic_access(trans, flags) \ 1224 __cond_lock(nic_access, \ 1225 likely((trans)->ops->grab_nic_access(trans, flags))) 1226 1227 static inline void __releases(nic_access) 1228 iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) 1229 { 1230 trans->ops->release_nic_access(trans, flags); 1231 __release(nic_access); 1232 } 1233 1234 static inline void iwl_trans_fw_error(struct iwl_trans *trans) 1235 { 1236 if (WARN_ON_ONCE(!trans->op_mode)) 1237 return; 1238 1239 /* prevent double restarts due to the same erroneous FW */ 1240 if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) 1241 iwl_op_mode_nic_error(trans->op_mode); 1242 1243 if (test_and_clear_bit(STATUS_FW_WAIT_DUMP, &trans->status)) 1244 wake_up(&trans->fw_halt_waitq); 1245 1246 } 1247 1248 /***************************************************** 1249 * transport helper functions 1250 *****************************************************/ 1251 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, 1252 struct device *dev, 1253 const struct iwl_cfg *cfg, 1254 const struct iwl_trans_ops *ops); 1255 void iwl_trans_free(struct iwl_trans *trans); 1256 void iwl_trans_ref(struct iwl_trans *trans); 1257 void iwl_trans_unref(struct iwl_trans *trans); 1258 1259 /***************************************************** 1260 * driver (transport) register/unregister functions 1261 ******************************************************/ 1262 int __must_check iwl_pci_register_driver(void); 1263 void iwl_pci_unregister_driver(void); 1264 1265 #endif /* __iwl_trans_h__ */ 1266