1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 11 * Copyright(c) 2018 - 2019 Intel Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of version 2 of the GNU General Public License as 15 * published by the Free Software Foundation. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * The full GNU General Public License is included in this distribution 23 * in the file called COPYING. 24 * 25 * Contact Information: 26 * Intel Linux Wireless <linuxwifi@intel.com> 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 28 * 29 * BSD LICENSE 30 * 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH 34 * Copyright(c) 2018 - 2019 Intel Corporation 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 41 * * Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * * Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in 45 * the documentation and/or other materials provided with the 46 * distribution. 47 * * Neither the name Intel Corporation nor the names of its 48 * contributors may be used to endorse or promote products derived 49 * from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 *****************************************************************************/ 64 #ifndef __iwl_trans_h__ 65 #define __iwl_trans_h__ 66 67 #include <linux/ieee80211.h> 68 #include <linux/mm.h> /* for page_address */ 69 #include <linux/lockdep.h> 70 #include <linux/kernel.h> 71 72 #include "iwl-debug.h" 73 #include "iwl-config.h" 74 #include "fw/img.h" 75 #include "iwl-op-mode.h" 76 #include "fw/api/cmdhdr.h" 77 #include "fw/api/txq.h" 78 #include "fw/api/dbg-tlv.h" 79 #include "iwl-dbg-tlv.h" 80 81 /** 82 * DOC: Transport layer - what is it ? 83 * 84 * The transport layer is the layer that deals with the HW directly. It provides 85 * an abstraction of the underlying HW to the upper layer. The transport layer 86 * doesn't provide any policy, algorithm or anything of this kind, but only 87 * mechanisms to make the HW do something. It is not completely stateless but 88 * close to it. 89 * We will have an implementation for each different supported bus. 90 */ 91 92 /** 93 * DOC: Life cycle of the transport layer 94 * 95 * The transport layer has a very precise life cycle. 96 * 97 * 1) A helper function is called during the module initialization and 98 * registers the bus driver's ops with the transport's alloc function. 99 * 2) Bus's probe calls to the transport layer's allocation functions. 100 * Of course this function is bus specific. 101 * 3) This allocation functions will spawn the upper layer which will 102 * register mac80211. 103 * 104 * 4) At some point (i.e. mac80211's start call), the op_mode will call 105 * the following sequence: 106 * start_hw 107 * start_fw 108 * 109 * 5) Then when finished (or reset): 110 * stop_device 111 * 112 * 6) Eventually, the free function will be called. 113 */ 114 115 #define IWL_TRANS_FW_DBG_DOMAIN(trans) IWL_FW_INI_DOMAIN_ALWAYS_ON 116 117 #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ 118 #define FH_RSCSR_FRAME_INVALID 0x55550000 119 #define FH_RSCSR_FRAME_ALIGN 0x40 120 #define FH_RSCSR_RPA_EN BIT(25) 121 #define FH_RSCSR_RADA_EN BIT(26) 122 #define FH_RSCSR_RXQ_POS 16 123 #define FH_RSCSR_RXQ_MASK 0x3F0000 124 125 struct iwl_rx_packet { 126 /* 127 * The first 4 bytes of the RX frame header contain both the RX frame 128 * size and some flags. 129 * Bit fields: 130 * 31: flag flush RB request 131 * 30: flag ignore TC (terminal counter) request 132 * 29: flag fast IRQ request 133 * 28-27: Reserved 134 * 26: RADA enabled 135 * 25: Offload enabled 136 * 24: RPF enabled 137 * 23: RSS enabled 138 * 22: Checksum enabled 139 * 21-16: RX queue 140 * 15-14: Reserved 141 * 13-00: RX frame size 142 */ 143 __le32 len_n_flags; 144 struct iwl_cmd_header hdr; 145 u8 data[]; 146 } __packed; 147 148 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) 149 { 150 return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 151 } 152 153 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) 154 { 155 return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); 156 } 157 158 /** 159 * enum CMD_MODE - how to send the host commands ? 160 * 161 * @CMD_ASYNC: Return right away and don't wait for the response 162 * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of 163 * the response. The caller needs to call iwl_free_resp when done. 164 * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be 165 * called after this command completes. Valid only with CMD_ASYNC. 166 */ 167 enum CMD_MODE { 168 CMD_ASYNC = BIT(0), 169 CMD_WANT_SKB = BIT(1), 170 CMD_SEND_IN_RFKILL = BIT(2), 171 CMD_WANT_ASYNC_CALLBACK = BIT(3), 172 }; 173 174 #define DEF_CMD_PAYLOAD_SIZE 320 175 176 /** 177 * struct iwl_device_cmd 178 * 179 * For allocation of the command and tx queues, this establishes the overall 180 * size of the largest command we send to uCode, except for commands that 181 * aren't fully copied and use other TFD space. 182 */ 183 struct iwl_device_cmd { 184 union { 185 struct { 186 struct iwl_cmd_header hdr; /* uCode API */ 187 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 188 }; 189 struct { 190 struct iwl_cmd_header_wide hdr_wide; 191 u8 payload_wide[DEF_CMD_PAYLOAD_SIZE - 192 sizeof(struct iwl_cmd_header_wide) + 193 sizeof(struct iwl_cmd_header)]; 194 }; 195 }; 196 } __packed; 197 198 /** 199 * struct iwl_device_tx_cmd - buffer for TX command 200 * @hdr: the header 201 * @payload: the payload placeholder 202 * 203 * The actual structure is sized dynamically according to need. 204 */ 205 struct iwl_device_tx_cmd { 206 struct iwl_cmd_header hdr; 207 u8 payload[]; 208 } __packed; 209 210 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 211 212 /* 213 * number of transfer buffers (fragments) per transmit frame descriptor; 214 * this is just the driver's idea, the hardware supports 20 215 */ 216 #define IWL_MAX_CMD_TBS_PER_TFD 2 217 218 /** 219 * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command 220 * 221 * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's 222 * ring. The transport layer doesn't map the command's buffer to DMA, but 223 * rather copies it to a previously allocated DMA buffer. This flag tells 224 * the transport layer not to copy the command, but to map the existing 225 * buffer (that is passed in) instead. This saves the memcpy and allows 226 * commands that are bigger than the fixed buffer to be submitted. 227 * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. 228 * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this 229 * chunk internally and free it again after the command completes. This 230 * can (currently) be used only once per command. 231 * Note that a TFD entry after a DUP one cannot be a normal copied one. 232 */ 233 enum iwl_hcmd_dataflag { 234 IWL_HCMD_DFL_NOCOPY = BIT(0), 235 IWL_HCMD_DFL_DUP = BIT(1), 236 }; 237 238 enum iwl_error_event_table_status { 239 IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0), 240 IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1), 241 IWL_ERROR_EVENT_TABLE_UMAC = BIT(2), 242 }; 243 244 /** 245 * struct iwl_host_cmd - Host command to the uCode 246 * 247 * @data: array of chunks that composes the data of the host command 248 * @resp_pkt: response packet, if %CMD_WANT_SKB was set 249 * @_rx_page_order: (internally used to free response packet) 250 * @_rx_page_addr: (internally used to free response packet) 251 * @flags: can be CMD_* 252 * @len: array of the lengths of the chunks in data 253 * @dataflags: IWL_HCMD_DFL_* 254 * @id: command id of the host command, for wide commands encoding the 255 * version and group as well 256 */ 257 struct iwl_host_cmd { 258 const void *data[IWL_MAX_CMD_TBS_PER_TFD]; 259 struct iwl_rx_packet *resp_pkt; 260 unsigned long _rx_page_addr; 261 u32 _rx_page_order; 262 263 u32 flags; 264 u32 id; 265 u16 len[IWL_MAX_CMD_TBS_PER_TFD]; 266 u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; 267 }; 268 269 static inline void iwl_free_resp(struct iwl_host_cmd *cmd) 270 { 271 free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); 272 } 273 274 struct iwl_rx_cmd_buffer { 275 struct page *_page; 276 int _offset; 277 bool _page_stolen; 278 u32 _rx_page_order; 279 unsigned int truesize; 280 }; 281 282 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) 283 { 284 return (void *)((unsigned long)page_address(r->_page) + r->_offset); 285 } 286 287 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) 288 { 289 return r->_offset; 290 } 291 292 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) 293 { 294 r->_page_stolen = true; 295 get_page(r->_page); 296 return r->_page; 297 } 298 299 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) 300 { 301 __free_pages(r->_page, r->_rx_page_order); 302 } 303 304 #define MAX_NO_RECLAIM_CMDS 6 305 306 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 307 308 /* 309 * Maximum number of HW queues the transport layer 310 * currently supports 311 */ 312 #define IWL_MAX_HW_QUEUES 32 313 #define IWL_MAX_TVQM_QUEUES 512 314 315 #define IWL_MAX_TID_COUNT 8 316 #define IWL_MGMT_TID 15 317 #define IWL_FRAME_LIMIT 64 318 #define IWL_MAX_RX_HW_QUEUES 16 319 #define IWL_9000_MAX_RX_HW_QUEUES 6 320 321 /** 322 * enum iwl_wowlan_status - WoWLAN image/device status 323 * @IWL_D3_STATUS_ALIVE: firmware is still running after resume 324 * @IWL_D3_STATUS_RESET: device was reset while suspended 325 */ 326 enum iwl_d3_status { 327 IWL_D3_STATUS_ALIVE, 328 IWL_D3_STATUS_RESET, 329 }; 330 331 /** 332 * enum iwl_trans_status: transport status flags 333 * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed 334 * @STATUS_DEVICE_ENABLED: APM is enabled 335 * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) 336 * @STATUS_INT_ENABLED: interrupts are enabled 337 * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch 338 * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode 339 * @STATUS_FW_ERROR: the fw is in error state 340 * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands 341 * are sent 342 * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent 343 * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation 344 */ 345 enum iwl_trans_status { 346 STATUS_SYNC_HCMD_ACTIVE, 347 STATUS_DEVICE_ENABLED, 348 STATUS_TPOWER_PMI, 349 STATUS_INT_ENABLED, 350 STATUS_RFKILL_HW, 351 STATUS_RFKILL_OPMODE, 352 STATUS_FW_ERROR, 353 STATUS_TRANS_GOING_IDLE, 354 STATUS_TRANS_IDLE, 355 STATUS_TRANS_DEAD, 356 }; 357 358 static inline int 359 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size) 360 { 361 switch (rb_size) { 362 case IWL_AMSDU_2K: 363 return get_order(2 * 1024); 364 case IWL_AMSDU_4K: 365 return get_order(4 * 1024); 366 case IWL_AMSDU_8K: 367 return get_order(8 * 1024); 368 case IWL_AMSDU_12K: 369 return get_order(12 * 1024); 370 default: 371 WARN_ON(1); 372 return -1; 373 } 374 } 375 376 static inline int 377 iwl_trans_get_rb_size(enum iwl_amsdu_size rb_size) 378 { 379 switch (rb_size) { 380 case IWL_AMSDU_2K: 381 return 2 * 1024; 382 case IWL_AMSDU_4K: 383 return 4 * 1024; 384 case IWL_AMSDU_8K: 385 return 8 * 1024; 386 case IWL_AMSDU_12K: 387 return 12 * 1024; 388 default: 389 WARN_ON(1); 390 return 0; 391 } 392 } 393 394 struct iwl_hcmd_names { 395 u8 cmd_id; 396 const char *const cmd_name; 397 }; 398 399 #define HCMD_NAME(x) \ 400 { .cmd_id = x, .cmd_name = #x } 401 402 struct iwl_hcmd_arr { 403 const struct iwl_hcmd_names *arr; 404 int size; 405 }; 406 407 #define HCMD_ARR(x) \ 408 { .arr = x, .size = ARRAY_SIZE(x) } 409 410 /** 411 * struct iwl_trans_config - transport configuration 412 * 413 * @op_mode: pointer to the upper layer. 414 * @cmd_queue: the index of the command queue. 415 * Must be set before start_fw. 416 * @cmd_fifo: the fifo for host commands 417 * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue. 418 * @no_reclaim_cmds: Some devices erroneously don't set the 419 * SEQ_RX_FRAME bit on some notifications, this is the 420 * list of such notifications to filter. Max length is 421 * %MAX_NO_RECLAIM_CMDS. 422 * @n_no_reclaim_cmds: # of commands in list 423 * @rx_buf_size: RX buffer size needed for A-MSDUs 424 * if unset 4k will be the RX buffer size 425 * @bc_table_dword: set to true if the BC table expects the byte count to be 426 * in DWORD (as opposed to bytes) 427 * @scd_set_active: should the transport configure the SCD for HCMD queue 428 * @sw_csum_tx: transport should compute the TCP checksum 429 * @command_groups: array of command groups, each member is an array of the 430 * commands in the group; for debugging only 431 * @command_groups_size: number of command groups, to avoid illegal access 432 * @cb_data_offs: offset inside skb->cb to store transport data at, must have 433 * space for at least two pointers 434 */ 435 struct iwl_trans_config { 436 struct iwl_op_mode *op_mode; 437 438 u8 cmd_queue; 439 u8 cmd_fifo; 440 unsigned int cmd_q_wdg_timeout; 441 const u8 *no_reclaim_cmds; 442 unsigned int n_no_reclaim_cmds; 443 444 enum iwl_amsdu_size rx_buf_size; 445 bool bc_table_dword; 446 bool scd_set_active; 447 bool sw_csum_tx; 448 const struct iwl_hcmd_arr *command_groups; 449 int command_groups_size; 450 451 u8 cb_data_offs; 452 }; 453 454 struct iwl_trans_dump_data { 455 u32 len; 456 u8 data[]; 457 }; 458 459 struct iwl_trans; 460 461 struct iwl_trans_txq_scd_cfg { 462 u8 fifo; 463 u8 sta_id; 464 u8 tid; 465 bool aggregate; 466 int frame_limit; 467 }; 468 469 /** 470 * struct iwl_trans_rxq_dma_data - RX queue DMA data 471 * @fr_bd_cb: DMA address of free BD cyclic buffer 472 * @fr_bd_wid: Initial write index of the free BD cyclic buffer 473 * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr 474 * @ur_bd_cb: DMA address of used BD cyclic buffer 475 */ 476 struct iwl_trans_rxq_dma_data { 477 u64 fr_bd_cb; 478 u32 fr_bd_wid; 479 u64 urbd_stts_wrptr; 480 u64 ur_bd_cb; 481 }; 482 483 /** 484 * struct iwl_trans_ops - transport specific operations 485 * 486 * All the handlers MUST be implemented 487 * 488 * @start_hw: starts the HW. From that point on, the HW can send interrupts. 489 * May sleep. 490 * @op_mode_leave: Turn off the HW RF kill indication if on 491 * May sleep 492 * @start_fw: allocates and inits all the resources for the transport 493 * layer. Also kick a fw image. 494 * May sleep 495 * @fw_alive: called when the fw sends alive notification. If the fw provides 496 * the SCD base address in SRAM, then provide it here, or 0 otherwise. 497 * May sleep 498 * @stop_device: stops the whole device (embedded CPU put to reset) and stops 499 * the HW. From that point on, the HW will be stopped but will still issue 500 * an interrupt if the HW RF kill switch is triggered. 501 * This callback must do the right thing and not crash even if %start_hw() 502 * was called but not &start_fw(). May sleep. 503 * @d3_suspend: put the device into the correct mode for WoWLAN during 504 * suspend. This is optional, if not implemented WoWLAN will not be 505 * supported. This callback may sleep. 506 * @d3_resume: resume the device after WoWLAN, enabling the opmode to 507 * talk to the WoWLAN image to get its status. This is optional, if not 508 * implemented WoWLAN will not be supported. This callback may sleep. 509 * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. 510 * If RFkill is asserted in the middle of a SYNC host command, it must 511 * return -ERFKILL straight away. 512 * May sleep only if CMD_ASYNC is not set 513 * @tx: send an skb. The transport relies on the op_mode to zero the 514 * the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all 515 * the CSUM will be taken care of (TCP CSUM and IP header in case of 516 * IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP 517 * header if it is IPv4. 518 * Must be atomic 519 * @reclaim: free packet until ssn. Returns a list of freed packets. 520 * Must be atomic 521 * @txq_enable: setup a queue. To setup an AC queue, use the 522 * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before 523 * this one. The op_mode must not configure the HCMD queue. The scheduler 524 * configuration may be %NULL, in which case the hardware will not be 525 * configured. If true is returned, the operation mode needs to increment 526 * the sequence number of the packets routed to this queue because of a 527 * hardware scheduler bug. May sleep. 528 * @txq_disable: de-configure a Tx queue to send AMPDUs 529 * Must be atomic 530 * @txq_set_shared_mode: change Tx queue shared/unshared marking 531 * @wait_tx_queues_empty: wait until tx queues are empty. May sleep. 532 * @wait_txq_empty: wait until specific tx queue is empty. May sleep. 533 * @freeze_txq_timer: prevents the timer of the queue from firing until the 534 * queue is set to awake. Must be atomic. 535 * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note 536 * that the transport needs to refcount the calls since this function 537 * will be called several times with block = true, and then the queues 538 * need to be unblocked only after the same number of calls with 539 * block = false. 540 * @write8: write a u8 to a register at offset ofs from the BAR 541 * @write32: write a u32 to a register at offset ofs from the BAR 542 * @read32: read a u32 register at offset ofs from the BAR 543 * @read_prph: read a DWORD from a periphery register 544 * @write_prph: write a DWORD to a periphery register 545 * @read_mem: read device's SRAM in DWORD 546 * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory 547 * will be zeroed. 548 * @read_config32: read a u32 value from the device's config space at 549 * the given offset. 550 * @configure: configure parameters required by the transport layer from 551 * the op_mode. May be called several times before start_fw, can't be 552 * called after that. 553 * @set_pmi: set the power pmi state 554 * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. 555 * Sleeping is not allowed between grab_nic_access and 556 * release_nic_access. 557 * @release_nic_access: let the NIC go to sleep. The "flags" parameter 558 * must be the same one that was sent before to the grab_nic_access. 559 * @set_bits_mask - set SRAM register according to value and mask. 560 * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last 561 * TX'ed commands and similar. The buffer will be vfree'd by the caller. 562 * Note that the transport must fill in the proper file headers. 563 * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup 564 * of the trans debugfs 565 */ 566 struct iwl_trans_ops { 567 568 int (*start_hw)(struct iwl_trans *iwl_trans); 569 void (*op_mode_leave)(struct iwl_trans *iwl_trans); 570 int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, 571 bool run_in_rfkill); 572 void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); 573 void (*stop_device)(struct iwl_trans *trans); 574 575 int (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset); 576 int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, 577 bool test, bool reset); 578 579 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 580 581 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 582 struct iwl_device_tx_cmd *dev_cmd, int queue); 583 void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, 584 struct sk_buff_head *skbs); 585 586 void (*set_q_ptrs)(struct iwl_trans *trans, int queue, int ptr); 587 588 bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn, 589 const struct iwl_trans_txq_scd_cfg *cfg, 590 unsigned int queue_wdg_timeout); 591 void (*txq_disable)(struct iwl_trans *trans, int queue, 592 bool configure_scd); 593 /* 22000 functions */ 594 int (*txq_alloc)(struct iwl_trans *trans, 595 __le16 flags, u8 sta_id, u8 tid, 596 int cmd_id, int size, 597 unsigned int queue_wdg_timeout); 598 void (*txq_free)(struct iwl_trans *trans, int queue); 599 int (*rxq_dma_data)(struct iwl_trans *trans, int queue, 600 struct iwl_trans_rxq_dma_data *data); 601 602 void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id, 603 bool shared); 604 605 int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm); 606 int (*wait_txq_empty)(struct iwl_trans *trans, int queue); 607 void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs, 608 bool freeze); 609 void (*block_txq_ptrs)(struct iwl_trans *trans, bool block); 610 611 void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); 612 void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); 613 u32 (*read32)(struct iwl_trans *trans, u32 ofs); 614 u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); 615 void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); 616 int (*read_mem)(struct iwl_trans *trans, u32 addr, 617 void *buf, int dwords); 618 int (*write_mem)(struct iwl_trans *trans, u32 addr, 619 const void *buf, int dwords); 620 int (*read_config32)(struct iwl_trans *trans, u32 ofs, u32 *val); 621 void (*configure)(struct iwl_trans *trans, 622 const struct iwl_trans_config *trans_cfg); 623 void (*set_pmi)(struct iwl_trans *trans, bool state); 624 void (*sw_reset)(struct iwl_trans *trans); 625 bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags); 626 void (*release_nic_access)(struct iwl_trans *trans, 627 unsigned long *flags); 628 void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, 629 u32 value); 630 int (*suspend)(struct iwl_trans *trans); 631 void (*resume)(struct iwl_trans *trans); 632 633 struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans, 634 u32 dump_mask); 635 void (*debugfs_cleanup)(struct iwl_trans *trans); 636 void (*sync_nmi)(struct iwl_trans *trans); 637 }; 638 639 /** 640 * enum iwl_trans_state - state of the transport layer 641 * 642 * @IWL_TRANS_NO_FW: no fw has sent an alive response 643 * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response 644 */ 645 enum iwl_trans_state { 646 IWL_TRANS_NO_FW = 0, 647 IWL_TRANS_FW_ALIVE = 1, 648 }; 649 650 /** 651 * DOC: Platform power management 652 * 653 * In system-wide power management the entire platform goes into a low 654 * power state (e.g. idle or suspend to RAM) at the same time and the 655 * device is configured as a wakeup source for the entire platform. 656 * This is usually triggered by userspace activity (e.g. the user 657 * presses the suspend button or a power management daemon decides to 658 * put the platform in low power mode). The device's behavior in this 659 * mode is dictated by the wake-on-WLAN configuration. 660 * 661 * The terms used for the device's behavior are as follows: 662 * 663 * - D0: the device is fully powered and the host is awake; 664 * - D3: the device is in low power mode and only reacts to 665 * specific events (e.g. magic-packet received or scan 666 * results found); 667 * 668 * These terms reflect the power modes in the firmware and are not to 669 * be confused with the physical device power state. 670 */ 671 672 /** 673 * enum iwl_plat_pm_mode - platform power management mode 674 * 675 * This enumeration describes the device's platform power management 676 * behavior when in system-wide suspend (i.e WoWLAN). 677 * 678 * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this 679 * device. In system-wide suspend mode, it means that the all 680 * connections will be closed automatically by mac80211 before 681 * the platform is suspended. 682 * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN). 683 */ 684 enum iwl_plat_pm_mode { 685 IWL_PLAT_PM_MODE_DISABLED, 686 IWL_PLAT_PM_MODE_D3, 687 }; 688 689 /** 690 * enum iwl_ini_cfg_state 691 * @IWL_INI_CFG_STATE_NOT_LOADED: no debug cfg was given 692 * @IWL_INI_CFG_STATE_LOADED: debug cfg was found and loaded 693 * @IWL_INI_CFG_STATE_CORRUPTED: debug cfg was found and some of the TLVs 694 * are corrupted. The rest of the debug TLVs will still be used 695 */ 696 enum iwl_ini_cfg_state { 697 IWL_INI_CFG_STATE_NOT_LOADED, 698 IWL_INI_CFG_STATE_LOADED, 699 IWL_INI_CFG_STATE_CORRUPTED, 700 }; 701 702 /* Max time to wait for nmi interrupt */ 703 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4) 704 705 /** 706 * struct iwl_dram_data 707 * @physical: page phy pointer 708 * @block: pointer to the allocated block/page 709 * @size: size of the block/page 710 */ 711 struct iwl_dram_data { 712 dma_addr_t physical; 713 void *block; 714 int size; 715 }; 716 717 /** 718 * struct iwl_fw_mon - fw monitor per allocation id 719 * @num_frags: number of fragments 720 * @frags: an array of DRAM buffer fragments 721 */ 722 struct iwl_fw_mon { 723 u32 num_frags; 724 struct iwl_dram_data *frags; 725 }; 726 727 /** 728 * struct iwl_self_init_dram - dram data used by self init process 729 * @fw: lmac and umac dram data 730 * @fw_cnt: total number of items in array 731 * @paging: paging dram data 732 * @paging_cnt: total number of items in array 733 */ 734 struct iwl_self_init_dram { 735 struct iwl_dram_data *fw; 736 int fw_cnt; 737 struct iwl_dram_data *paging; 738 int paging_cnt; 739 }; 740 741 /** 742 * struct iwl_trans_debug - transport debug related data 743 * 744 * @n_dest_reg: num of reg_ops in %dbg_dest_tlv 745 * @rec_on: true iff there is a fw debug recording currently active 746 * @dest_tlv: points to the destination TLV for debug 747 * @conf_tlv: array of pointers to configuration TLVs for debug 748 * @trigger_tlv: array of pointers to triggers TLVs for debug 749 * @lmac_error_event_table: addrs of lmacs error tables 750 * @umac_error_event_table: addr of umac error table 751 * @error_event_table_tlv_status: bitmap that indicates what error table 752 * pointers was recevied via TLV. uses enum &iwl_error_event_table_status 753 * @internal_ini_cfg: internal debug cfg state. Uses &enum iwl_ini_cfg_state 754 * @external_ini_cfg: external debug cfg state. Uses &enum iwl_ini_cfg_state 755 * @fw_mon_cfg: debug buffer allocation configuration 756 * @fw_mon_ini: DRAM buffer fragments per allocation id 757 * @fw_mon: DRAM buffer for firmware monitor 758 * @hw_error: equals true if hw error interrupt was received from the FW 759 * @ini_dest: debug monitor destination uses &enum iwl_fw_ini_buffer_location 760 * @active_regions: active regions 761 * @debug_info_tlv_list: list of debug info TLVs 762 * @time_point: array of debug time points 763 * @periodic_trig_list: periodic triggers list 764 * @domains_bitmap: bitmap of active domains other than 765 * &IWL_FW_INI_DOMAIN_ALWAYS_ON 766 */ 767 struct iwl_trans_debug { 768 u8 n_dest_reg; 769 bool rec_on; 770 771 const struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv; 772 const struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX]; 773 struct iwl_fw_dbg_trigger_tlv * const *trigger_tlv; 774 775 u32 lmac_error_event_table[2]; 776 u32 umac_error_event_table; 777 unsigned int error_event_table_tlv_status; 778 779 enum iwl_ini_cfg_state internal_ini_cfg; 780 enum iwl_ini_cfg_state external_ini_cfg; 781 782 struct iwl_fw_ini_allocation_tlv fw_mon_cfg[IWL_FW_INI_ALLOCATION_NUM]; 783 struct iwl_fw_mon fw_mon_ini[IWL_FW_INI_ALLOCATION_NUM]; 784 785 struct iwl_dram_data fw_mon; 786 787 bool hw_error; 788 enum iwl_fw_ini_buffer_location ini_dest; 789 790 struct iwl_ucode_tlv *active_regions[IWL_FW_INI_MAX_REGION_ID]; 791 struct list_head debug_info_tlv_list; 792 struct iwl_dbg_tlv_time_point_data 793 time_point[IWL_FW_INI_TIME_POINT_NUM]; 794 struct list_head periodic_trig_list; 795 796 u32 domains_bitmap; 797 }; 798 799 struct iwl_dma_ptr { 800 dma_addr_t dma; 801 void *addr; 802 size_t size; 803 }; 804 805 struct iwl_cmd_meta { 806 /* only for SYNC commands, iff the reply skb is wanted */ 807 struct iwl_host_cmd *source; 808 u32 flags; 809 u32 tbs; 810 }; 811 812 /* 813 * The FH will write back to the first TB only, so we need to copy some data 814 * into the buffer regardless of whether it should be mapped or not. 815 * This indicates how big the first TB must be to include the scratch buffer 816 * and the assigned PN. 817 * Since PN location is 8 bytes at offset 12, it's 20 now. 818 * If we make it bigger then allocations will be bigger and copy slower, so 819 * that's probably not useful. 820 */ 821 #define IWL_FIRST_TB_SIZE 20 822 #define IWL_FIRST_TB_SIZE_ALIGN ALIGN(IWL_FIRST_TB_SIZE, 64) 823 824 struct iwl_pcie_txq_entry { 825 void *cmd; 826 struct sk_buff *skb; 827 /* buffer to free after command completes */ 828 const void *free_buf; 829 struct iwl_cmd_meta meta; 830 }; 831 832 struct iwl_pcie_first_tb_buf { 833 u8 buf[IWL_FIRST_TB_SIZE_ALIGN]; 834 }; 835 836 /** 837 * struct iwl_txq - Tx Queue for DMA 838 * @q: generic Rx/Tx queue descriptor 839 * @tfds: transmit frame descriptors (DMA memory) 840 * @first_tb_bufs: start of command headers, including scratch buffers, for 841 * the writeback -- this is DMA memory and an array holding one buffer 842 * for each command on the queue 843 * @first_tb_dma: DMA address for the first_tb_bufs start 844 * @entries: transmit entries (driver state) 845 * @lock: queue lock 846 * @stuck_timer: timer that fires if queue gets stuck 847 * @trans: pointer back to transport (for timer) 848 * @need_update: indicates need to update read/write index 849 * @ampdu: true if this queue is an ampdu queue for an specific RA/TID 850 * @wd_timeout: queue watchdog timeout (jiffies) - per queue 851 * @frozen: tx stuck queue timer is frozen 852 * @frozen_expiry_remainder: remember how long until the timer fires 853 * @bc_tbl: byte count table of the queue (relevant only for gen2 transport) 854 * @write_ptr: 1-st empty entry (index) host_w 855 * @read_ptr: last used entry (index) host_r 856 * @dma_addr: physical addr for BD's 857 * @n_window: safe queue window 858 * @id: queue id 859 * @low_mark: low watermark, resume queue if free space more than this 860 * @high_mark: high watermark, stop queue if free space less than this 861 * 862 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame 863 * descriptors) and required locking structures. 864 * 865 * Note the difference between TFD_QUEUE_SIZE_MAX and n_window: the hardware 866 * always assumes 256 descriptors, so TFD_QUEUE_SIZE_MAX is always 256 (unless 867 * there might be HW changes in the future). For the normal TX 868 * queues, n_window, which is the size of the software queue data 869 * is also 256; however, for the command queue, n_window is only 870 * 32 since we don't need so many commands pending. Since the HW 871 * still uses 256 BDs for DMA though, TFD_QUEUE_SIZE_MAX stays 256. 872 * This means that we end up with the following: 873 * HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 | 874 * SW entries: | 0 | ... | 31 | 875 * where N is a number between 0 and 7. This means that the SW 876 * data is a window overlayed over the HW queue. 877 */ 878 struct iwl_txq { 879 void *tfds; 880 struct iwl_pcie_first_tb_buf *first_tb_bufs; 881 dma_addr_t first_tb_dma; 882 struct iwl_pcie_txq_entry *entries; 883 /* lock for syncing changes on the queue */ 884 spinlock_t lock; 885 unsigned long frozen_expiry_remainder; 886 struct timer_list stuck_timer; 887 struct iwl_trans *trans; 888 bool need_update; 889 bool frozen; 890 bool ampdu; 891 int block; 892 unsigned long wd_timeout; 893 struct sk_buff_head overflow_q; 894 struct iwl_dma_ptr bc_tbl; 895 896 int write_ptr; 897 int read_ptr; 898 dma_addr_t dma_addr; 899 int n_window; 900 u32 id; 901 int low_mark; 902 int high_mark; 903 904 bool overflow_tx; 905 }; 906 907 /** 908 * struct iwl_trans_txqs - transport tx queues data 909 * 910 * @queue_used - bit mask of used queues 911 * @queue_stopped - bit mask of stopped queues 912 */ 913 struct iwl_trans_txqs { 914 unsigned long queue_used[BITS_TO_LONGS(IWL_MAX_TVQM_QUEUES)]; 915 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_TVQM_QUEUES)]; 916 struct iwl_txq *txq[IWL_MAX_TVQM_QUEUES]; 917 struct { 918 u8 fifo; 919 u8 q_id; 920 unsigned int wdg_timeout; 921 } cmd; 922 923 }; 924 925 /** 926 * struct iwl_trans - transport common data 927 * 928 * @ops - pointer to iwl_trans_ops 929 * @op_mode - pointer to the op_mode 930 * @trans_cfg: the trans-specific configuration part 931 * @cfg - pointer to the configuration 932 * @drv - pointer to iwl_drv 933 * @status: a bit-mask of transport status flags 934 * @dev - pointer to struct device * that represents the device 935 * @max_skb_frags: maximum number of fragments an SKB can have when transmitted. 936 * 0 indicates that frag SKBs (NETIF_F_SG) aren't supported. 937 * @hw_rf_id a u32 with the device RF ID 938 * @hw_id: a u32 with the ID of the device / sub-device. 939 * Set during transport allocation. 940 * @hw_id_str: a string with info about HW ID. Set during transport allocation. 941 * @pm_support: set to true in start_hw if link pm is supported 942 * @ltr_enabled: set to true if the LTR is enabled 943 * @wide_cmd_header: true when ucode supports wide command header format 944 * @num_rx_queues: number of RX queues allocated by the transport; 945 * the transport must set this before calling iwl_drv_start() 946 * @iml_len: the length of the image loader 947 * @iml: a pointer to the image loader itself 948 * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. 949 * The user should use iwl_trans_{alloc,free}_tx_cmd. 950 * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before 951 * starting the firmware, used for tracing 952 * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the 953 * start of the 802.11 header in the @rx_mpdu_cmd 954 * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) 955 * @system_pm_mode: the system-wide power management mode in use. 956 * This mode is set dynamically, depending on the WoWLAN values 957 * configured from the userspace at runtime. 958 * @iwl_trans_txqs: transport tx queues data. 959 */ 960 struct iwl_trans { 961 const struct iwl_trans_ops *ops; 962 struct iwl_op_mode *op_mode; 963 const struct iwl_cfg_trans_params *trans_cfg; 964 const struct iwl_cfg *cfg; 965 struct iwl_drv *drv; 966 enum iwl_trans_state state; 967 unsigned long status; 968 969 struct device *dev; 970 u32 max_skb_frags; 971 u32 hw_rev; 972 u32 hw_rf_id; 973 u32 hw_id; 974 char hw_id_str[52]; 975 976 u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; 977 978 bool pm_support; 979 bool ltr_enabled; 980 981 const struct iwl_hcmd_arr *command_groups; 982 int command_groups_size; 983 bool wide_cmd_header; 984 985 u8 num_rx_queues; 986 987 size_t iml_len; 988 u8 *iml; 989 990 /* The following fields are internal only */ 991 struct kmem_cache *dev_cmd_pool; 992 char dev_cmd_pool_name[50]; 993 994 struct dentry *dbgfs_dir; 995 996 #ifdef CONFIG_LOCKDEP 997 struct lockdep_map sync_cmd_lockdep_map; 998 #endif 999 1000 struct iwl_trans_debug dbg; 1001 struct iwl_self_init_dram init_dram; 1002 1003 enum iwl_plat_pm_mode system_pm_mode; 1004 1005 const char *name; 1006 struct iwl_trans_txqs txqs; 1007 1008 /* pointer to trans specific struct */ 1009 /*Ensure that this pointer will always be aligned to sizeof pointer */ 1010 char trans_specific[] __aligned(sizeof(void *)); 1011 }; 1012 1013 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id); 1014 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans); 1015 1016 static inline void iwl_trans_configure(struct iwl_trans *trans, 1017 const struct iwl_trans_config *trans_cfg) 1018 { 1019 trans->op_mode = trans_cfg->op_mode; 1020 1021 trans->ops->configure(trans, trans_cfg); 1022 WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg)); 1023 } 1024 1025 static inline int iwl_trans_start_hw(struct iwl_trans *trans) 1026 { 1027 might_sleep(); 1028 1029 return trans->ops->start_hw(trans); 1030 } 1031 1032 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) 1033 { 1034 might_sleep(); 1035 1036 if (trans->ops->op_mode_leave) 1037 trans->ops->op_mode_leave(trans); 1038 1039 trans->op_mode = NULL; 1040 1041 trans->state = IWL_TRANS_NO_FW; 1042 } 1043 1044 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) 1045 { 1046 might_sleep(); 1047 1048 trans->state = IWL_TRANS_FW_ALIVE; 1049 1050 trans->ops->fw_alive(trans, scd_addr); 1051 } 1052 1053 static inline int iwl_trans_start_fw(struct iwl_trans *trans, 1054 const struct fw_img *fw, 1055 bool run_in_rfkill) 1056 { 1057 might_sleep(); 1058 1059 WARN_ON_ONCE(!trans->rx_mpdu_cmd); 1060 1061 clear_bit(STATUS_FW_ERROR, &trans->status); 1062 return trans->ops->start_fw(trans, fw, run_in_rfkill); 1063 } 1064 1065 static inline void iwl_trans_stop_device(struct iwl_trans *trans) 1066 { 1067 might_sleep(); 1068 1069 trans->ops->stop_device(trans); 1070 1071 trans->state = IWL_TRANS_NO_FW; 1072 } 1073 1074 static inline int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, 1075 bool reset) 1076 { 1077 might_sleep(); 1078 if (!trans->ops->d3_suspend) 1079 return 0; 1080 1081 return trans->ops->d3_suspend(trans, test, reset); 1082 } 1083 1084 static inline int iwl_trans_d3_resume(struct iwl_trans *trans, 1085 enum iwl_d3_status *status, 1086 bool test, bool reset) 1087 { 1088 might_sleep(); 1089 if (!trans->ops->d3_resume) 1090 return 0; 1091 1092 return trans->ops->d3_resume(trans, status, test, reset); 1093 } 1094 1095 static inline int iwl_trans_suspend(struct iwl_trans *trans) 1096 { 1097 if (!trans->ops->suspend) 1098 return 0; 1099 1100 return trans->ops->suspend(trans); 1101 } 1102 1103 static inline void iwl_trans_resume(struct iwl_trans *trans) 1104 { 1105 if (trans->ops->resume) 1106 trans->ops->resume(trans); 1107 } 1108 1109 static inline struct iwl_trans_dump_data * 1110 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask) 1111 { 1112 if (!trans->ops->dump_data) 1113 return NULL; 1114 return trans->ops->dump_data(trans, dump_mask); 1115 } 1116 1117 static inline struct iwl_device_tx_cmd * 1118 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) 1119 { 1120 return kmem_cache_zalloc(trans->dev_cmd_pool, GFP_ATOMIC); 1121 } 1122 1123 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 1124 1125 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, 1126 struct iwl_device_tx_cmd *dev_cmd) 1127 { 1128 kmem_cache_free(trans->dev_cmd_pool, dev_cmd); 1129 } 1130 1131 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 1132 struct iwl_device_tx_cmd *dev_cmd, int queue) 1133 { 1134 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) 1135 return -EIO; 1136 1137 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1138 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1139 return -EIO; 1140 } 1141 1142 return trans->ops->tx(trans, skb, dev_cmd, queue); 1143 } 1144 1145 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, 1146 int ssn, struct sk_buff_head *skbs) 1147 { 1148 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1149 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1150 return; 1151 } 1152 1153 trans->ops->reclaim(trans, queue, ssn, skbs); 1154 } 1155 1156 static inline void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, 1157 int ptr) 1158 { 1159 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1160 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1161 return; 1162 } 1163 1164 trans->ops->set_q_ptrs(trans, queue, ptr); 1165 } 1166 1167 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue, 1168 bool configure_scd) 1169 { 1170 trans->ops->txq_disable(trans, queue, configure_scd); 1171 } 1172 1173 static inline bool 1174 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn, 1175 const struct iwl_trans_txq_scd_cfg *cfg, 1176 unsigned int queue_wdg_timeout) 1177 { 1178 might_sleep(); 1179 1180 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1181 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1182 return false; 1183 } 1184 1185 return trans->ops->txq_enable(trans, queue, ssn, 1186 cfg, queue_wdg_timeout); 1187 } 1188 1189 static inline int 1190 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue, 1191 struct iwl_trans_rxq_dma_data *data) 1192 { 1193 if (WARN_ON_ONCE(!trans->ops->rxq_dma_data)) 1194 return -ENOTSUPP; 1195 1196 return trans->ops->rxq_dma_data(trans, queue, data); 1197 } 1198 1199 static inline void 1200 iwl_trans_txq_free(struct iwl_trans *trans, int queue) 1201 { 1202 if (WARN_ON_ONCE(!trans->ops->txq_free)) 1203 return; 1204 1205 trans->ops->txq_free(trans, queue); 1206 } 1207 1208 static inline int 1209 iwl_trans_txq_alloc(struct iwl_trans *trans, 1210 __le16 flags, u8 sta_id, u8 tid, 1211 int cmd_id, int size, 1212 unsigned int wdg_timeout) 1213 { 1214 might_sleep(); 1215 1216 if (WARN_ON_ONCE(!trans->ops->txq_alloc)) 1217 return -ENOTSUPP; 1218 1219 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1220 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1221 return -EIO; 1222 } 1223 1224 return trans->ops->txq_alloc(trans, flags, sta_id, tid, 1225 cmd_id, size, wdg_timeout); 1226 } 1227 1228 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, 1229 int queue, bool shared_mode) 1230 { 1231 if (trans->ops->txq_set_shared_mode) 1232 trans->ops->txq_set_shared_mode(trans, queue, shared_mode); 1233 } 1234 1235 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, 1236 int fifo, int sta_id, int tid, 1237 int frame_limit, u16 ssn, 1238 unsigned int queue_wdg_timeout) 1239 { 1240 struct iwl_trans_txq_scd_cfg cfg = { 1241 .fifo = fifo, 1242 .sta_id = sta_id, 1243 .tid = tid, 1244 .frame_limit = frame_limit, 1245 .aggregate = sta_id >= 0, 1246 }; 1247 1248 iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout); 1249 } 1250 1251 static inline 1252 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo, 1253 unsigned int queue_wdg_timeout) 1254 { 1255 struct iwl_trans_txq_scd_cfg cfg = { 1256 .fifo = fifo, 1257 .sta_id = -1, 1258 .tid = IWL_MAX_TID_COUNT, 1259 .frame_limit = IWL_FRAME_LIMIT, 1260 .aggregate = false, 1261 }; 1262 1263 iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout); 1264 } 1265 1266 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans, 1267 unsigned long txqs, 1268 bool freeze) 1269 { 1270 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1271 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1272 return; 1273 } 1274 1275 if (trans->ops->freeze_txq_timer) 1276 trans->ops->freeze_txq_timer(trans, txqs, freeze); 1277 } 1278 1279 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans, 1280 bool block) 1281 { 1282 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1283 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1284 return; 1285 } 1286 1287 if (trans->ops->block_txq_ptrs) 1288 trans->ops->block_txq_ptrs(trans, block); 1289 } 1290 1291 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, 1292 u32 txqs) 1293 { 1294 if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty)) 1295 return -ENOTSUPP; 1296 1297 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1298 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1299 return -EIO; 1300 } 1301 1302 return trans->ops->wait_tx_queues_empty(trans, txqs); 1303 } 1304 1305 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue) 1306 { 1307 if (WARN_ON_ONCE(!trans->ops->wait_txq_empty)) 1308 return -ENOTSUPP; 1309 1310 if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) { 1311 IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state); 1312 return -EIO; 1313 } 1314 1315 return trans->ops->wait_txq_empty(trans, queue); 1316 } 1317 1318 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) 1319 { 1320 trans->ops->write8(trans, ofs, val); 1321 } 1322 1323 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) 1324 { 1325 trans->ops->write32(trans, ofs, val); 1326 } 1327 1328 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) 1329 { 1330 return trans->ops->read32(trans, ofs); 1331 } 1332 1333 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) 1334 { 1335 return trans->ops->read_prph(trans, ofs); 1336 } 1337 1338 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, 1339 u32 val) 1340 { 1341 return trans->ops->write_prph(trans, ofs, val); 1342 } 1343 1344 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, 1345 void *buf, int dwords) 1346 { 1347 return trans->ops->read_mem(trans, addr, buf, dwords); 1348 } 1349 1350 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ 1351 do { \ 1352 if (__builtin_constant_p(bufsize)) \ 1353 BUILD_BUG_ON((bufsize) % sizeof(u32)); \ 1354 iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ 1355 } while (0) 1356 1357 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) 1358 { 1359 u32 value; 1360 1361 if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) 1362 return 0xa5a5a5a5; 1363 1364 return value; 1365 } 1366 1367 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, 1368 const void *buf, int dwords) 1369 { 1370 return trans->ops->write_mem(trans, addr, buf, dwords); 1371 } 1372 1373 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, 1374 u32 val) 1375 { 1376 return iwl_trans_write_mem(trans, addr, &val, 1); 1377 } 1378 1379 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) 1380 { 1381 if (trans->ops->set_pmi) 1382 trans->ops->set_pmi(trans, state); 1383 } 1384 1385 static inline void iwl_trans_sw_reset(struct iwl_trans *trans) 1386 { 1387 if (trans->ops->sw_reset) 1388 trans->ops->sw_reset(trans); 1389 } 1390 1391 static inline void 1392 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) 1393 { 1394 trans->ops->set_bits_mask(trans, reg, mask, value); 1395 } 1396 1397 #define iwl_trans_grab_nic_access(trans, flags) \ 1398 __cond_lock(nic_access, \ 1399 likely((trans)->ops->grab_nic_access(trans, flags))) 1400 1401 static inline void __releases(nic_access) 1402 iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) 1403 { 1404 trans->ops->release_nic_access(trans, flags); 1405 __release(nic_access); 1406 } 1407 1408 static inline void iwl_trans_fw_error(struct iwl_trans *trans) 1409 { 1410 if (WARN_ON_ONCE(!trans->op_mode)) 1411 return; 1412 1413 /* prevent double restarts due to the same erroneous FW */ 1414 if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) 1415 iwl_op_mode_nic_error(trans->op_mode); 1416 } 1417 1418 static inline bool iwl_trans_fw_running(struct iwl_trans *trans) 1419 { 1420 return trans->state == IWL_TRANS_FW_ALIVE; 1421 } 1422 1423 static inline void iwl_trans_sync_nmi(struct iwl_trans *trans) 1424 { 1425 if (trans->ops->sync_nmi) 1426 trans->ops->sync_nmi(trans); 1427 } 1428 1429 static inline bool iwl_trans_dbg_ini_valid(struct iwl_trans *trans) 1430 { 1431 return trans->dbg.internal_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED || 1432 trans->dbg.external_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED; 1433 } 1434 1435 /***************************************************** 1436 * transport helper functions 1437 *****************************************************/ 1438 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size, 1439 struct device *dev, 1440 const struct iwl_trans_ops *ops, 1441 unsigned int cmd_pool_size, 1442 unsigned int cmd_pool_align); 1443 void iwl_trans_free(struct iwl_trans *trans); 1444 1445 /***************************************************** 1446 * driver (transport) register/unregister functions 1447 ******************************************************/ 1448 int __must_check iwl_pci_register_driver(void); 1449 void iwl_pci_unregister_driver(void); 1450 1451 #endif /* __iwl_trans_h__ */ 1452