1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
106b35ff91SSara Sharon  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11e705c121SKalle Valo  *
12e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
13e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
14e705c121SKalle Valo  * published by the Free Software Foundation.
15e705c121SKalle Valo  *
16e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
17e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
18e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19e705c121SKalle Valo  * General Public License for more details.
20e705c121SKalle Valo  *
21e705c121SKalle Valo  * You should have received a copy of the GNU General Public License
22e705c121SKalle Valo  * along with this program; if not, write to the Free Software
23e705c121SKalle Valo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24e705c121SKalle Valo  * USA
25e705c121SKalle Valo  *
26e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
27e705c121SKalle Valo  * in the file called COPYING.
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * Contact Information:
30cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
31e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32e705c121SKalle Valo  *
33e705c121SKalle Valo  * BSD LICENSE
34e705c121SKalle Valo  *
35e705c121SKalle Valo  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
376b35ff91SSara Sharon  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
38e705c121SKalle Valo  * All rights reserved.
39e705c121SKalle Valo  *
40e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
41e705c121SKalle Valo  * modification, are permitted provided that the following conditions
42e705c121SKalle Valo  * are met:
43e705c121SKalle Valo  *
44e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
45e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
46e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
47e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
48e705c121SKalle Valo  *    the documentation and/or other materials provided with the
49e705c121SKalle Valo  *    distribution.
50e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
51e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
52e705c121SKalle Valo  *    from this software without specific prior written permission.
53e705c121SKalle Valo  *
54e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65e705c121SKalle Valo  *
66e705c121SKalle Valo  *****************************************************************************/
67e705c121SKalle Valo #ifndef __iwl_trans_h__
68e705c121SKalle Valo #define __iwl_trans_h__
69e705c121SKalle Valo 
70e705c121SKalle Valo #include <linux/ieee80211.h>
71e705c121SKalle Valo #include <linux/mm.h> /* for page_address */
72e705c121SKalle Valo #include <linux/lockdep.h>
7339bdb17eSSharon Dvir #include <linux/kernel.h>
74e705c121SKalle Valo 
75e705c121SKalle Valo #include "iwl-debug.h"
76e705c121SKalle Valo #include "iwl-config.h"
77d962f9b1SJohannes Berg #include "fw/img.h"
78e705c121SKalle Valo #include "iwl-op-mode.h"
79d172a5efSJohannes Berg #include "fw/api/cmdhdr.h"
80d172a5efSJohannes Berg #include "fw/api/txq.h"
81e705c121SKalle Valo 
82e705c121SKalle Valo /**
83e705c121SKalle Valo  * DOC: Transport layer - what is it ?
84e705c121SKalle Valo  *
85e705c121SKalle Valo  * The transport layer is the layer that deals with the HW directly. It provides
86e705c121SKalle Valo  * an abstraction of the underlying HW to the upper layer. The transport layer
87e705c121SKalle Valo  * doesn't provide any policy, algorithm or anything of this kind, but only
88e705c121SKalle Valo  * mechanisms to make the HW do something. It is not completely stateless but
89e705c121SKalle Valo  * close to it.
90e705c121SKalle Valo  * We will have an implementation for each different supported bus.
91e705c121SKalle Valo  */
92e705c121SKalle Valo 
93e705c121SKalle Valo /**
94e705c121SKalle Valo  * DOC: Life cycle of the transport layer
95e705c121SKalle Valo  *
96e705c121SKalle Valo  * The transport layer has a very precise life cycle.
97e705c121SKalle Valo  *
98e705c121SKalle Valo  *	1) A helper function is called during the module initialization and
99e705c121SKalle Valo  *	   registers the bus driver's ops with the transport's alloc function.
100e705c121SKalle Valo  *	2) Bus's probe calls to the transport layer's allocation functions.
101e705c121SKalle Valo  *	   Of course this function is bus specific.
102e705c121SKalle Valo  *	3) This allocation functions will spawn the upper layer which will
103e705c121SKalle Valo  *	   register mac80211.
104e705c121SKalle Valo  *
105e705c121SKalle Valo  *	4) At some point (i.e. mac80211's start call), the op_mode will call
106e705c121SKalle Valo  *	   the following sequence:
107e705c121SKalle Valo  *	   start_hw
108e705c121SKalle Valo  *	   start_fw
109e705c121SKalle Valo  *
110e705c121SKalle Valo  *	5) Then when finished (or reset):
111e705c121SKalle Valo  *	   stop_device
112e705c121SKalle Valo  *
113e705c121SKalle Valo  *	6) Eventually, the free function will be called.
114e705c121SKalle Valo  */
115e705c121SKalle Valo 
116e705c121SKalle Valo #define FH_RSCSR_FRAME_SIZE_MSK		0x00003FFF	/* bits 0-13 */
117e705c121SKalle Valo #define FH_RSCSR_FRAME_INVALID		0x55550000
118e705c121SKalle Valo #define FH_RSCSR_FRAME_ALIGN		0x40
119fbe41127SSara Sharon #define FH_RSCSR_RPA_EN			BIT(25)
1209d0fc5a5SDavid Spinadel #define FH_RSCSR_RADA_EN		BIT(26)
121ab2e696bSSara Sharon #define FH_RSCSR_RXQ_POS		16
122ab2e696bSSara Sharon #define FH_RSCSR_RXQ_MASK		0x3F0000
123e705c121SKalle Valo 
124e705c121SKalle Valo struct iwl_rx_packet {
125e705c121SKalle Valo 	/*
126e705c121SKalle Valo 	 * The first 4 bytes of the RX frame header contain both the RX frame
127e705c121SKalle Valo 	 * size and some flags.
128e705c121SKalle Valo 	 * Bit fields:
129e705c121SKalle Valo 	 * 31:    flag flush RB request
130e705c121SKalle Valo 	 * 30:    flag ignore TC (terminal counter) request
131e705c121SKalle Valo 	 * 29:    flag fast IRQ request
1329d0fc5a5SDavid Spinadel 	 * 28-27: Reserved
1339d0fc5a5SDavid Spinadel 	 * 26:    RADA enabled
134fbe41127SSara Sharon 	 * 25:    Offload enabled
135ab2e696bSSara Sharon 	 * 24:    RPF enabled
136ab2e696bSSara Sharon 	 * 23:    RSS enabled
137ab2e696bSSara Sharon 	 * 22:    Checksum enabled
138ab2e696bSSara Sharon 	 * 21-16: RX queue
139ab2e696bSSara Sharon 	 * 15-14: Reserved
140e705c121SKalle Valo 	 * 13-00: RX frame size
141e705c121SKalle Valo 	 */
142e705c121SKalle Valo 	__le32 len_n_flags;
143e705c121SKalle Valo 	struct iwl_cmd_header hdr;
144e705c121SKalle Valo 	u8 data[];
145e705c121SKalle Valo } __packed;
146e705c121SKalle Valo 
147e705c121SKalle Valo static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt)
148e705c121SKalle Valo {
149e705c121SKalle Valo 	return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
150e705c121SKalle Valo }
151e705c121SKalle Valo 
152e705c121SKalle Valo static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt)
153e705c121SKalle Valo {
154e705c121SKalle Valo 	return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr);
155e705c121SKalle Valo }
156e705c121SKalle Valo 
157e705c121SKalle Valo /**
158e705c121SKalle Valo  * enum CMD_MODE - how to send the host commands ?
159e705c121SKalle Valo  *
160e705c121SKalle Valo  * @CMD_ASYNC: Return right away and don't wait for the response
161e705c121SKalle Valo  * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of
162e705c121SKalle Valo  *	the response. The caller needs to call iwl_free_resp when done.
163e705c121SKalle Valo  * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the
164e705c121SKalle Valo  *	command queue, but after other high priority commands. Valid only
165e705c121SKalle Valo  *	with CMD_ASYNC.
166e705c121SKalle Valo  * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle.
167e705c121SKalle Valo  * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle.
168e705c121SKalle Valo  * @CMD_WAKE_UP_TRANS: The command response should wake up the trans
169e705c121SKalle Valo  *	(i.e. mark it as non-idle).
170dcbb4746SEmmanuel Grumbach  * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be
171dcbb4746SEmmanuel Grumbach  *	called after this command completes. Valid only with CMD_ASYNC.
172e705c121SKalle Valo  */
173e705c121SKalle Valo enum CMD_MODE {
174e705c121SKalle Valo 	CMD_ASYNC		= BIT(0),
175e705c121SKalle Valo 	CMD_WANT_SKB		= BIT(1),
176e705c121SKalle Valo 	CMD_SEND_IN_RFKILL	= BIT(2),
177e705c121SKalle Valo 	CMD_HIGH_PRIO		= BIT(3),
178e705c121SKalle Valo 	CMD_SEND_IN_IDLE	= BIT(4),
179e705c121SKalle Valo 	CMD_MAKE_TRANS_IDLE	= BIT(5),
180e705c121SKalle Valo 	CMD_WAKE_UP_TRANS	= BIT(6),
181dcbb4746SEmmanuel Grumbach 	CMD_WANT_ASYNC_CALLBACK	= BIT(7),
182e705c121SKalle Valo };
183e705c121SKalle Valo 
184e705c121SKalle Valo #define DEF_CMD_PAYLOAD_SIZE 320
185e705c121SKalle Valo 
186e705c121SKalle Valo /**
187e705c121SKalle Valo  * struct iwl_device_cmd
188e705c121SKalle Valo  *
189e705c121SKalle Valo  * For allocation of the command and tx queues, this establishes the overall
190e705c121SKalle Valo  * size of the largest command we send to uCode, except for commands that
191e705c121SKalle Valo  * aren't fully copied and use other TFD space.
192e705c121SKalle Valo  */
193e705c121SKalle Valo struct iwl_device_cmd {
194e705c121SKalle Valo 	union {
195e705c121SKalle Valo 		struct {
196e705c121SKalle Valo 			struct iwl_cmd_header hdr;	/* uCode API */
197e705c121SKalle Valo 			u8 payload[DEF_CMD_PAYLOAD_SIZE];
198e705c121SKalle Valo 		};
199e705c121SKalle Valo 		struct {
200e705c121SKalle Valo 			struct iwl_cmd_header_wide hdr_wide;
201e705c121SKalle Valo 			u8 payload_wide[DEF_CMD_PAYLOAD_SIZE -
202e705c121SKalle Valo 					sizeof(struct iwl_cmd_header_wide) +
203e705c121SKalle Valo 					sizeof(struct iwl_cmd_header)];
204e705c121SKalle Valo 		};
205e705c121SKalle Valo 	};
206e705c121SKalle Valo } __packed;
207e705c121SKalle Valo 
208e705c121SKalle Valo #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
209e705c121SKalle Valo 
210e705c121SKalle Valo /*
211e705c121SKalle Valo  * number of transfer buffers (fragments) per transmit frame descriptor;
212e705c121SKalle Valo  * this is just the driver's idea, the hardware supports 20
213e705c121SKalle Valo  */
214e705c121SKalle Valo #define IWL_MAX_CMD_TBS_PER_TFD	2
215e705c121SKalle Valo 
216e705c121SKalle Valo /**
217b8aed81cSJohannes Berg  * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command
218e705c121SKalle Valo  *
219e705c121SKalle Valo  * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's
220e705c121SKalle Valo  *	ring. The transport layer doesn't map the command's buffer to DMA, but
221e705c121SKalle Valo  *	rather copies it to a previously allocated DMA buffer. This flag tells
222e705c121SKalle Valo  *	the transport layer not to copy the command, but to map the existing
223e705c121SKalle Valo  *	buffer (that is passed in) instead. This saves the memcpy and allows
224e705c121SKalle Valo  *	commands that are bigger than the fixed buffer to be submitted.
225e705c121SKalle Valo  *	Note that a TFD entry after a NOCOPY one cannot be a normal copied one.
226e705c121SKalle Valo  * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this
227e705c121SKalle Valo  *	chunk internally and free it again after the command completes. This
228e705c121SKalle Valo  *	can (currently) be used only once per command.
229e705c121SKalle Valo  *	Note that a TFD entry after a DUP one cannot be a normal copied one.
230e705c121SKalle Valo  */
231e705c121SKalle Valo enum iwl_hcmd_dataflag {
232e705c121SKalle Valo 	IWL_HCMD_DFL_NOCOPY	= BIT(0),
233e705c121SKalle Valo 	IWL_HCMD_DFL_DUP	= BIT(1),
234e705c121SKalle Valo };
235e705c121SKalle Valo 
236e705c121SKalle Valo /**
237e705c121SKalle Valo  * struct iwl_host_cmd - Host command to the uCode
238e705c121SKalle Valo  *
239e705c121SKalle Valo  * @data: array of chunks that composes the data of the host command
240e705c121SKalle Valo  * @resp_pkt: response packet, if %CMD_WANT_SKB was set
241e705c121SKalle Valo  * @_rx_page_order: (internally used to free response packet)
242e705c121SKalle Valo  * @_rx_page_addr: (internally used to free response packet)
243e705c121SKalle Valo  * @flags: can be CMD_*
244e705c121SKalle Valo  * @len: array of the lengths of the chunks in data
245e705c121SKalle Valo  * @dataflags: IWL_HCMD_DFL_*
246e705c121SKalle Valo  * @id: command id of the host command, for wide commands encoding the
247e705c121SKalle Valo  *	version and group as well
248e705c121SKalle Valo  */
249e705c121SKalle Valo struct iwl_host_cmd {
250e705c121SKalle Valo 	const void *data[IWL_MAX_CMD_TBS_PER_TFD];
251e705c121SKalle Valo 	struct iwl_rx_packet *resp_pkt;
252e705c121SKalle Valo 	unsigned long _rx_page_addr;
253e705c121SKalle Valo 	u32 _rx_page_order;
254e705c121SKalle Valo 
255e705c121SKalle Valo 	u32 flags;
256e705c121SKalle Valo 	u32 id;
257e705c121SKalle Valo 	u16 len[IWL_MAX_CMD_TBS_PER_TFD];
258e705c121SKalle Valo 	u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD];
259e705c121SKalle Valo };
260e705c121SKalle Valo 
261e705c121SKalle Valo static inline void iwl_free_resp(struct iwl_host_cmd *cmd)
262e705c121SKalle Valo {
263e705c121SKalle Valo 	free_pages(cmd->_rx_page_addr, cmd->_rx_page_order);
264e705c121SKalle Valo }
265e705c121SKalle Valo 
266e705c121SKalle Valo struct iwl_rx_cmd_buffer {
267e705c121SKalle Valo 	struct page *_page;
268e705c121SKalle Valo 	int _offset;
269e705c121SKalle Valo 	bool _page_stolen;
270e705c121SKalle Valo 	u32 _rx_page_order;
271e705c121SKalle Valo 	unsigned int truesize;
272e705c121SKalle Valo };
273e705c121SKalle Valo 
274e705c121SKalle Valo static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r)
275e705c121SKalle Valo {
276e705c121SKalle Valo 	return (void *)((unsigned long)page_address(r->_page) + r->_offset);
277e705c121SKalle Valo }
278e705c121SKalle Valo 
279e705c121SKalle Valo static inline int rxb_offset(struct iwl_rx_cmd_buffer *r)
280e705c121SKalle Valo {
281e705c121SKalle Valo 	return r->_offset;
282e705c121SKalle Valo }
283e705c121SKalle Valo 
284e705c121SKalle Valo static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r)
285e705c121SKalle Valo {
286e705c121SKalle Valo 	r->_page_stolen = true;
287e705c121SKalle Valo 	get_page(r->_page);
288e705c121SKalle Valo 	return r->_page;
289e705c121SKalle Valo }
290e705c121SKalle Valo 
291e705c121SKalle Valo static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r)
292e705c121SKalle Valo {
293e705c121SKalle Valo 	__free_pages(r->_page, r->_rx_page_order);
294e705c121SKalle Valo }
295e705c121SKalle Valo 
296e705c121SKalle Valo #define MAX_NO_RECLAIM_CMDS	6
297e705c121SKalle Valo 
298e705c121SKalle Valo #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
299e705c121SKalle Valo 
300e705c121SKalle Valo /*
301e705c121SKalle Valo  * Maximum number of HW queues the transport layer
302e705c121SKalle Valo  * currently supports
303e705c121SKalle Valo  */
304e705c121SKalle Valo #define IWL_MAX_HW_QUEUES		32
305e982bc2cSSara Sharon #define IWL_MAX_TVQM_QUEUES		512
306e982bc2cSSara Sharon 
307e705c121SKalle Valo #define IWL_MAX_TID_COUNT	8
308c65f4e03SSara Sharon #define IWL_MGMT_TID		15
309e705c121SKalle Valo #define IWL_FRAME_LIMIT	64
310e705c121SKalle Valo #define IWL_MAX_RX_HW_QUEUES	16
311e705c121SKalle Valo 
312e705c121SKalle Valo /**
313e705c121SKalle Valo  * enum iwl_wowlan_status - WoWLAN image/device status
314e705c121SKalle Valo  * @IWL_D3_STATUS_ALIVE: firmware is still running after resume
315e705c121SKalle Valo  * @IWL_D3_STATUS_RESET: device was reset while suspended
316e705c121SKalle Valo  */
317e705c121SKalle Valo enum iwl_d3_status {
318e705c121SKalle Valo 	IWL_D3_STATUS_ALIVE,
319e705c121SKalle Valo 	IWL_D3_STATUS_RESET,
320e705c121SKalle Valo };
321e705c121SKalle Valo 
322e705c121SKalle Valo /**
323e705c121SKalle Valo  * enum iwl_trans_status: transport status flags
324e705c121SKalle Valo  * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed
325e705c121SKalle Valo  * @STATUS_DEVICE_ENABLED: APM is enabled
326e705c121SKalle Valo  * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up)
327e705c121SKalle Valo  * @STATUS_INT_ENABLED: interrupts are enabled
328326477e4SJohannes Berg  * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch
329326477e4SJohannes Berg  * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode
330e705c121SKalle Valo  * @STATUS_FW_ERROR: the fw is in error state
331e705c121SKalle Valo  * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands
332e705c121SKalle Valo  *	are sent
333e705c121SKalle Valo  * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent
334e705c121SKalle Valo  * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation
335e705c121SKalle Valo  */
336e705c121SKalle Valo enum iwl_trans_status {
337e705c121SKalle Valo 	STATUS_SYNC_HCMD_ACTIVE,
338e705c121SKalle Valo 	STATUS_DEVICE_ENABLED,
339e705c121SKalle Valo 	STATUS_TPOWER_PMI,
340e705c121SKalle Valo 	STATUS_INT_ENABLED,
341326477e4SJohannes Berg 	STATUS_RFKILL_HW,
342326477e4SJohannes Berg 	STATUS_RFKILL_OPMODE,
343e705c121SKalle Valo 	STATUS_FW_ERROR,
344e705c121SKalle Valo 	STATUS_TRANS_GOING_IDLE,
345e705c121SKalle Valo 	STATUS_TRANS_IDLE,
346e705c121SKalle Valo 	STATUS_TRANS_DEAD,
347e705c121SKalle Valo };
348e705c121SKalle Valo 
3496c4fbcbcSEmmanuel Grumbach static inline int
3506c4fbcbcSEmmanuel Grumbach iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size)
3516c4fbcbcSEmmanuel Grumbach {
3526c4fbcbcSEmmanuel Grumbach 	switch (rb_size) {
3536c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_4K:
3546c4fbcbcSEmmanuel Grumbach 		return get_order(4 * 1024);
3556c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_8K:
3566c4fbcbcSEmmanuel Grumbach 		return get_order(8 * 1024);
3576c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_12K:
3586c4fbcbcSEmmanuel Grumbach 		return get_order(12 * 1024);
3596c4fbcbcSEmmanuel Grumbach 	default:
3606c4fbcbcSEmmanuel Grumbach 		WARN_ON(1);
3616c4fbcbcSEmmanuel Grumbach 		return -1;
3626c4fbcbcSEmmanuel Grumbach 	}
3636c4fbcbcSEmmanuel Grumbach }
3646c4fbcbcSEmmanuel Grumbach 
36539bdb17eSSharon Dvir struct iwl_hcmd_names {
36639bdb17eSSharon Dvir 	u8 cmd_id;
36739bdb17eSSharon Dvir 	const char *const cmd_name;
36839bdb17eSSharon Dvir };
36939bdb17eSSharon Dvir 
37039bdb17eSSharon Dvir #define HCMD_NAME(x)	\
37139bdb17eSSharon Dvir 	{ .cmd_id = x, .cmd_name = #x }
37239bdb17eSSharon Dvir 
37339bdb17eSSharon Dvir struct iwl_hcmd_arr {
37439bdb17eSSharon Dvir 	const struct iwl_hcmd_names *arr;
37539bdb17eSSharon Dvir 	int size;
37639bdb17eSSharon Dvir };
37739bdb17eSSharon Dvir 
37839bdb17eSSharon Dvir #define HCMD_ARR(x)	\
37939bdb17eSSharon Dvir 	{ .arr = x, .size = ARRAY_SIZE(x) }
38039bdb17eSSharon Dvir 
381e705c121SKalle Valo /**
382e705c121SKalle Valo  * struct iwl_trans_config - transport configuration
383e705c121SKalle Valo  *
384e705c121SKalle Valo  * @op_mode: pointer to the upper layer.
385e705c121SKalle Valo  * @cmd_queue: the index of the command queue.
386e705c121SKalle Valo  *	Must be set before start_fw.
387e705c121SKalle Valo  * @cmd_fifo: the fifo for host commands
388e705c121SKalle Valo  * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue.
389e705c121SKalle Valo  * @no_reclaim_cmds: Some devices erroneously don't set the
390e705c121SKalle Valo  *	SEQ_RX_FRAME bit on some notifications, this is the
391e705c121SKalle Valo  *	list of such notifications to filter. Max length is
392e705c121SKalle Valo  *	%MAX_NO_RECLAIM_CMDS.
393e705c121SKalle Valo  * @n_no_reclaim_cmds: # of commands in list
3946c4fbcbcSEmmanuel Grumbach  * @rx_buf_size: RX buffer size needed for A-MSDUs
395e705c121SKalle Valo  *	if unset 4k will be the RX buffer size
396e705c121SKalle Valo  * @bc_table_dword: set to true if the BC table expects the byte count to be
397e705c121SKalle Valo  *	in DWORD (as opposed to bytes)
398e705c121SKalle Valo  * @scd_set_active: should the transport configure the SCD for HCMD queue
39941837ca9SEmmanuel Grumbach  * @sw_csum_tx: transport should compute the TCP checksum
40039bdb17eSSharon Dvir  * @command_groups: array of command groups, each member is an array of the
40139bdb17eSSharon Dvir  *	commands in the group; for debugging only
40239bdb17eSSharon Dvir  * @command_groups_size: number of command groups, to avoid illegal access
40321cb3222SJohannes Berg  * @cb_data_offs: offset inside skb->cb to store transport data at, must have
40421cb3222SJohannes Berg  *	space for at least two pointers
405e705c121SKalle Valo  */
406e705c121SKalle Valo struct iwl_trans_config {
407e705c121SKalle Valo 	struct iwl_op_mode *op_mode;
408e705c121SKalle Valo 
409e705c121SKalle Valo 	u8 cmd_queue;
410e705c121SKalle Valo 	u8 cmd_fifo;
411e705c121SKalle Valo 	unsigned int cmd_q_wdg_timeout;
412e705c121SKalle Valo 	const u8 *no_reclaim_cmds;
413e705c121SKalle Valo 	unsigned int n_no_reclaim_cmds;
414e705c121SKalle Valo 
4156c4fbcbcSEmmanuel Grumbach 	enum iwl_amsdu_size rx_buf_size;
416e705c121SKalle Valo 	bool bc_table_dword;
417e705c121SKalle Valo 	bool scd_set_active;
41841837ca9SEmmanuel Grumbach 	bool sw_csum_tx;
41939bdb17eSSharon Dvir 	const struct iwl_hcmd_arr *command_groups;
42039bdb17eSSharon Dvir 	int command_groups_size;
421e705c121SKalle Valo 
42221cb3222SJohannes Berg 	u8 cb_data_offs;
423e705c121SKalle Valo };
424e705c121SKalle Valo 
425e705c121SKalle Valo struct iwl_trans_dump_data {
426e705c121SKalle Valo 	u32 len;
427e705c121SKalle Valo 	u8 data[];
428e705c121SKalle Valo };
429e705c121SKalle Valo 
430e705c121SKalle Valo struct iwl_trans;
431e705c121SKalle Valo 
432e705c121SKalle Valo struct iwl_trans_txq_scd_cfg {
433e705c121SKalle Valo 	u8 fifo;
4342a2e9d10SLiad Kaufman 	u8 sta_id;
435e705c121SKalle Valo 	u8 tid;
436e705c121SKalle Valo 	bool aggregate;
437e705c121SKalle Valo 	int frame_limit;
438e705c121SKalle Valo };
439e705c121SKalle Valo 
4406b35ff91SSara Sharon /**
441e705c121SKalle Valo  * struct iwl_trans_ops - transport specific operations
442e705c121SKalle Valo  *
443e705c121SKalle Valo  * All the handlers MUST be implemented
444e705c121SKalle Valo  *
445e705c121SKalle Valo  * @start_hw: starts the HW. If low_power is true, the NIC needs to be taken
446e705c121SKalle Valo  *	out of a low power state. From that point on, the HW can send
447e705c121SKalle Valo  *	interrupts. May sleep.
448e705c121SKalle Valo  * @op_mode_leave: Turn off the HW RF kill indication if on
449e705c121SKalle Valo  *	May sleep
450e705c121SKalle Valo  * @start_fw: allocates and inits all the resources for the transport
451e705c121SKalle Valo  *	layer. Also kick a fw image.
452e705c121SKalle Valo  *	May sleep
453e705c121SKalle Valo  * @fw_alive: called when the fw sends alive notification. If the fw provides
454e705c121SKalle Valo  *	the SCD base address in SRAM, then provide it here, or 0 otherwise.
455e705c121SKalle Valo  *	May sleep
456e705c121SKalle Valo  * @stop_device: stops the whole device (embedded CPU put to reset) and stops
457e705c121SKalle Valo  *	the HW. If low_power is true, the NIC will be put in low power state.
458e705c121SKalle Valo  *	From that point on, the HW will be stopped but will still issue an
459e705c121SKalle Valo  *	interrupt if the HW RF kill switch is triggered.
460e705c121SKalle Valo  *	This callback must do the right thing and not crash even if %start_hw()
461e705c121SKalle Valo  *	was called but not &start_fw(). May sleep.
462e705c121SKalle Valo  * @d3_suspend: put the device into the correct mode for WoWLAN during
463e705c121SKalle Valo  *	suspend. This is optional, if not implemented WoWLAN will not be
464e705c121SKalle Valo  *	supported. This callback may sleep.
465e705c121SKalle Valo  * @d3_resume: resume the device after WoWLAN, enabling the opmode to
466e705c121SKalle Valo  *	talk to the WoWLAN image to get its status. This is optional, if not
467e705c121SKalle Valo  *	implemented WoWLAN will not be supported. This callback may sleep.
468e705c121SKalle Valo  * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted.
469e705c121SKalle Valo  *	If RFkill is asserted in the middle of a SYNC host command, it must
470e705c121SKalle Valo  *	return -ERFKILL straight away.
471e705c121SKalle Valo  *	May sleep only if CMD_ASYNC is not set
4723f73b8caSEmmanuel Grumbach  * @tx: send an skb. The transport relies on the op_mode to zero the
4736eb5e529SEmmanuel Grumbach  *	the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all
4746eb5e529SEmmanuel Grumbach  *	the CSUM will be taken care of (TCP CSUM and IP header in case of
4756eb5e529SEmmanuel Grumbach  *	IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP
4766eb5e529SEmmanuel Grumbach  *	header if it is IPv4.
477e705c121SKalle Valo  *	Must be atomic
478e705c121SKalle Valo  * @reclaim: free packet until ssn. Returns a list of freed packets.
479e705c121SKalle Valo  *	Must be atomic
480e705c121SKalle Valo  * @txq_enable: setup a queue. To setup an AC queue, use the
481e705c121SKalle Valo  *	iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before
482e705c121SKalle Valo  *	this one. The op_mode must not configure the HCMD queue. The scheduler
483e705c121SKalle Valo  *	configuration may be %NULL, in which case the hardware will not be
484dcfbd67bSEmmanuel Grumbach  *	configured. If true is returned, the operation mode needs to increment
485dcfbd67bSEmmanuel Grumbach  *	the sequence number of the packets routed to this queue because of a
486dcfbd67bSEmmanuel Grumbach  *	hardware scheduler bug. May sleep.
487e705c121SKalle Valo  * @txq_disable: de-configure a Tx queue to send AMPDUs
488e705c121SKalle Valo  *	Must be atomic
48942db09c1SLiad Kaufman  * @txq_set_shared_mode: change Tx queue shared/unshared marking
490d6d517b7SSara Sharon  * @wait_tx_queues_empty: wait until tx queues are empty. May sleep.
491d6d517b7SSara Sharon  * @wait_txq_empty: wait until specific tx queue is empty. May sleep.
492e705c121SKalle Valo  * @freeze_txq_timer: prevents the timer of the queue from firing until the
493e705c121SKalle Valo  *	queue is set to awake. Must be atomic.
4940cd58eaaSEmmanuel Grumbach  * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note
4950cd58eaaSEmmanuel Grumbach  *	that the transport needs to refcount the calls since this function
4960cd58eaaSEmmanuel Grumbach  *	will be called several times with block = true, and then the queues
4970cd58eaaSEmmanuel Grumbach  *	need to be unblocked only after the same number of calls with
4980cd58eaaSEmmanuel Grumbach  *	block = false.
499e705c121SKalle Valo  * @write8: write a u8 to a register at offset ofs from the BAR
500e705c121SKalle Valo  * @write32: write a u32 to a register at offset ofs from the BAR
501e705c121SKalle Valo  * @read32: read a u32 register at offset ofs from the BAR
502e705c121SKalle Valo  * @read_prph: read a DWORD from a periphery register
503e705c121SKalle Valo  * @write_prph: write a DWORD to a periphery register
504e705c121SKalle Valo  * @read_mem: read device's SRAM in DWORD
505e705c121SKalle Valo  * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory
506e705c121SKalle Valo  *	will be zeroed.
507e705c121SKalle Valo  * @configure: configure parameters required by the transport layer from
508e705c121SKalle Valo  *	the op_mode. May be called several times before start_fw, can't be
509e705c121SKalle Valo  *	called after that.
510e705c121SKalle Valo  * @set_pmi: set the power pmi state
511e705c121SKalle Valo  * @grab_nic_access: wake the NIC to be able to access non-HBUS regs.
512e705c121SKalle Valo  *	Sleeping is not allowed between grab_nic_access and
513e705c121SKalle Valo  *	release_nic_access.
514e705c121SKalle Valo  * @release_nic_access: let the NIC go to sleep. The "flags" parameter
515e705c121SKalle Valo  *	must be the same one that was sent before to the grab_nic_access.
516e705c121SKalle Valo  * @set_bits_mask - set SRAM register according to value and mask.
517e705c121SKalle Valo  * @ref: grab a reference to the transport/FW layers, disallowing
518e705c121SKalle Valo  *	certain low power states
519e705c121SKalle Valo  * @unref: release a reference previously taken with @ref. Note that
520e705c121SKalle Valo  *	initially the reference count is 1, making an initial @unref
521e705c121SKalle Valo  *	necessary to allow low power states.
522e705c121SKalle Valo  * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last
523e705c121SKalle Valo  *	TX'ed commands and similar. The buffer will be vfree'd by the caller.
524e705c121SKalle Valo  *	Note that the transport must fill in the proper file headers.
525fb12777aSKirtika Ruchandani  * @dump_regs: dump using IWL_ERR configuration space and memory mapped
526fb12777aSKirtika Ruchandani  *	registers of the device to diagnose failure, e.g., when HW becomes
527fb12777aSKirtika Ruchandani  *	inaccessible.
528e705c121SKalle Valo  */
529e705c121SKalle Valo struct iwl_trans_ops {
530e705c121SKalle Valo 
531e705c121SKalle Valo 	int (*start_hw)(struct iwl_trans *iwl_trans, bool low_power);
532e705c121SKalle Valo 	void (*op_mode_leave)(struct iwl_trans *iwl_trans);
533e705c121SKalle Valo 	int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw,
534e705c121SKalle Valo 			bool run_in_rfkill);
535e705c121SKalle Valo 	void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr);
536e705c121SKalle Valo 	void (*stop_device)(struct iwl_trans *trans, bool low_power);
537e705c121SKalle Valo 
53823ae6128SMatti Gottlieb 	void (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset);
539e705c121SKalle Valo 	int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status,
54023ae6128SMatti Gottlieb 			 bool test, bool reset);
541e705c121SKalle Valo 
542e705c121SKalle Valo 	int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
543e705c121SKalle Valo 
544e705c121SKalle Valo 	int (*tx)(struct iwl_trans *trans, struct sk_buff *skb,
545e705c121SKalle Valo 		  struct iwl_device_cmd *dev_cmd, int queue);
546e705c121SKalle Valo 	void (*reclaim)(struct iwl_trans *trans, int queue, int ssn,
547e705c121SKalle Valo 			struct sk_buff_head *skbs);
548e705c121SKalle Valo 
549dcfbd67bSEmmanuel Grumbach 	bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn,
550e705c121SKalle Valo 			   const struct iwl_trans_txq_scd_cfg *cfg,
551e705c121SKalle Valo 			   unsigned int queue_wdg_timeout);
552e705c121SKalle Valo 	void (*txq_disable)(struct iwl_trans *trans, int queue,
553e705c121SKalle Valo 			    bool configure_scd);
5546b35ff91SSara Sharon 	/* a000 functions */
5556b35ff91SSara Sharon 	int (*txq_alloc)(struct iwl_trans *trans,
5566b35ff91SSara Sharon 			 struct iwl_tx_queue_cfg_cmd *cmd,
5576b35ff91SSara Sharon 			 int cmd_id,
5586b35ff91SSara Sharon 			 unsigned int queue_wdg_timeout);
5596b35ff91SSara Sharon 	void (*txq_free)(struct iwl_trans *trans, int queue);
560e705c121SKalle Valo 
56142db09c1SLiad Kaufman 	void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id,
56242db09c1SLiad Kaufman 				    bool shared);
56342db09c1SLiad Kaufman 
564a1a57877SSara Sharon 	int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm);
565d6d517b7SSara Sharon 	int (*wait_txq_empty)(struct iwl_trans *trans, int queue);
566e705c121SKalle Valo 	void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs,
567e705c121SKalle Valo 				 bool freeze);
5680cd58eaaSEmmanuel Grumbach 	void (*block_txq_ptrs)(struct iwl_trans *trans, bool block);
569e705c121SKalle Valo 
570e705c121SKalle Valo 	void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
571e705c121SKalle Valo 	void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
572e705c121SKalle Valo 	u32 (*read32)(struct iwl_trans *trans, u32 ofs);
573e705c121SKalle Valo 	u32 (*read_prph)(struct iwl_trans *trans, u32 ofs);
574e705c121SKalle Valo 	void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val);
575e705c121SKalle Valo 	int (*read_mem)(struct iwl_trans *trans, u32 addr,
576e705c121SKalle Valo 			void *buf, int dwords);
577e705c121SKalle Valo 	int (*write_mem)(struct iwl_trans *trans, u32 addr,
578e705c121SKalle Valo 			 const void *buf, int dwords);
579e705c121SKalle Valo 	void (*configure)(struct iwl_trans *trans,
580e705c121SKalle Valo 			  const struct iwl_trans_config *trans_cfg);
581e705c121SKalle Valo 	void (*set_pmi)(struct iwl_trans *trans, bool state);
58223ba9340SEmmanuel Grumbach 	bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags);
583e705c121SKalle Valo 	void (*release_nic_access)(struct iwl_trans *trans,
584e705c121SKalle Valo 				   unsigned long *flags);
585e705c121SKalle Valo 	void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask,
586e705c121SKalle Valo 			      u32 value);
587e705c121SKalle Valo 	void (*ref)(struct iwl_trans *trans);
588e705c121SKalle Valo 	void (*unref)(struct iwl_trans *trans);
589e705c121SKalle Valo 	int  (*suspend)(struct iwl_trans *trans);
590e705c121SKalle Valo 	void (*resume)(struct iwl_trans *trans);
591e705c121SKalle Valo 
592e705c121SKalle Valo 	struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans,
593a80c7a69SEmmanuel Grumbach 						 const struct iwl_fw_dbg_trigger_tlv
594e705c121SKalle Valo 						 *trigger);
595fb12777aSKirtika Ruchandani 
596fb12777aSKirtika Ruchandani 	void (*dump_regs)(struct iwl_trans *trans);
597e705c121SKalle Valo };
598e705c121SKalle Valo 
599e705c121SKalle Valo /**
600e705c121SKalle Valo  * enum iwl_trans_state - state of the transport layer
601e705c121SKalle Valo  *
602e705c121SKalle Valo  * @IWL_TRANS_NO_FW: no fw has sent an alive response
603e705c121SKalle Valo  * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response
604e705c121SKalle Valo  */
605e705c121SKalle Valo enum iwl_trans_state {
606e705c121SKalle Valo 	IWL_TRANS_NO_FW = 0,
607e705c121SKalle Valo 	IWL_TRANS_FW_ALIVE	= 1,
608e705c121SKalle Valo };
609e705c121SKalle Valo 
610e705c121SKalle Valo /**
611b7282643SLuca Coelho  * DOC: Platform power management
612e705c121SKalle Valo  *
613b7282643SLuca Coelho  * There are two types of platform power management: system-wide
614b7282643SLuca Coelho  * (WoWLAN) and runtime.
615b7282643SLuca Coelho  *
616b7282643SLuca Coelho  * In system-wide power management the entire platform goes into a low
617b7282643SLuca Coelho  * power state (e.g. idle or suspend to RAM) at the same time and the
618b7282643SLuca Coelho  * device is configured as a wakeup source for the entire platform.
619b7282643SLuca Coelho  * This is usually triggered by userspace activity (e.g. the user
620b7282643SLuca Coelho  * presses the suspend button or a power management daemon decides to
621b7282643SLuca Coelho  * put the platform in low power mode).  The device's behavior in this
622b7282643SLuca Coelho  * mode is dictated by the wake-on-WLAN configuration.
623b7282643SLuca Coelho  *
624b7282643SLuca Coelho  * In runtime power management, only the devices which are themselves
625b7282643SLuca Coelho  * idle enter a low power state.  This is done at runtime, which means
626b7282643SLuca Coelho  * that the entire system is still running normally.  This mode is
627b7282643SLuca Coelho  * usually triggered automatically by the device driver and requires
628b7282643SLuca Coelho  * the ability to enter and exit the low power modes in a very short
629b7282643SLuca Coelho  * time, so there is not much impact in usability.
630b7282643SLuca Coelho  *
631b7282643SLuca Coelho  * The terms used for the device's behavior are as follows:
632b7282643SLuca Coelho  *
633b7282643SLuca Coelho  *	- D0: the device is fully powered and the host is awake;
634b7282643SLuca Coelho  *	- D3: the device is in low power mode and only reacts to
635b7282643SLuca Coelho  *		specific events (e.g. magic-packet received or scan
636b7282643SLuca Coelho  *		results found);
637b7282643SLuca Coelho  *	- D0I3: the device is in low power mode and reacts to any
638b7282643SLuca Coelho  *		activity (e.g. RX);
639b7282643SLuca Coelho  *
640b7282643SLuca Coelho  * These terms reflect the power modes in the firmware and are not to
641b7282643SLuca Coelho  * be confused with the physical device power state.  The NIC can be
642b7282643SLuca Coelho  * in D0I3 mode even if, for instance, the PCI device is in D3 state.
643e705c121SKalle Valo  */
644b7282643SLuca Coelho 
645b7282643SLuca Coelho /**
646b7282643SLuca Coelho  * enum iwl_plat_pm_mode - platform power management mode
647b7282643SLuca Coelho  *
648b7282643SLuca Coelho  * This enumeration describes the device's platform power management
649b7282643SLuca Coelho  * behavior when in idle mode (i.e. runtime power management) or when
650b7282643SLuca Coelho  * in system-wide suspend (i.e WoWLAN).
651b7282643SLuca Coelho  *
652b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this
653b7282643SLuca Coelho  *	device.  At runtime, this means that nothing happens and the
654b7282643SLuca Coelho  *	device always remains in active.  In system-wide suspend mode,
655b7282643SLuca Coelho  *	it means that the all connections will be closed automatically
656b7282643SLuca Coelho  *	by mac80211 before the platform is suspended.
657b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN).
658b7282643SLuca Coelho  *	For runtime power management, this mode is not officially
659b7282643SLuca Coelho  *	supported.
660b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_D0I3: the device goes into D0I3 mode.
661b7282643SLuca Coelho  */
662b7282643SLuca Coelho enum iwl_plat_pm_mode {
663b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_DISABLED,
664b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_D3,
665b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_D0I3,
666e705c121SKalle Valo };
667e705c121SKalle Valo 
6684cbb8e50SLuciano Coelho /* Max time to wait for trans to become idle/non-idle on d0i3
6694cbb8e50SLuciano Coelho  * enter/exit (in msecs).
6704cbb8e50SLuciano Coelho  */
6714cbb8e50SLuciano Coelho #define IWL_TRANS_IDLE_TIMEOUT 2000
6724cbb8e50SLuciano Coelho 
673e705c121SKalle Valo /**
674e705c121SKalle Valo  * struct iwl_trans - transport common data
675e705c121SKalle Valo  *
676e705c121SKalle Valo  * @ops - pointer to iwl_trans_ops
677e705c121SKalle Valo  * @op_mode - pointer to the op_mode
678e705c121SKalle Valo  * @cfg - pointer to the configuration
6796f482e37SSara Sharon  * @drv - pointer to iwl_drv
680e705c121SKalle Valo  * @status: a bit-mask of transport status flags
681e705c121SKalle Valo  * @dev - pointer to struct device * that represents the device
682e705c121SKalle Valo  * @max_skb_frags: maximum number of fragments an SKB can have when transmitted.
683e705c121SKalle Valo  *	0 indicates that frag SKBs (NETIF_F_SG) aren't supported.
6841afb0ae4SHaim Dreyfuss  * @hw_rf_id a u32 with the device RF ID
685e705c121SKalle Valo  * @hw_id: a u32 with the ID of the device / sub-device.
686e705c121SKalle Valo  *	Set during transport allocation.
687e705c121SKalle Valo  * @hw_id_str: a string with info about HW ID. Set during transport allocation.
688e705c121SKalle Valo  * @pm_support: set to true in start_hw if link pm is supported
689e705c121SKalle Valo  * @ltr_enabled: set to true if the LTR is enabled
6905b88792cSSara Sharon  * @wide_cmd_header: true when ucode supports wide command header format
691e705c121SKalle Valo  * @num_rx_queues: number of RX queues allocated by the transport;
692e705c121SKalle Valo  *	the transport must set this before calling iwl_drv_start()
693e705c121SKalle Valo  * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only.
694e705c121SKalle Valo  *	The user should use iwl_trans_{alloc,free}_tx_cmd.
695e705c121SKalle Valo  * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before
696e705c121SKalle Valo  *	starting the firmware, used for tracing
697e705c121SKalle Valo  * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the
698e705c121SKalle Valo  *	start of the 802.11 header in the @rx_mpdu_cmd
699e705c121SKalle Valo  * @dflt_pwr_limit: default power limit fetched from the platform (ACPI)
700e705c121SKalle Valo  * @dbg_dest_tlv: points to the destination TLV for debug
701e705c121SKalle Valo  * @dbg_conf_tlv: array of pointers to configuration TLVs for debug
702e705c121SKalle Valo  * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug
703e705c121SKalle Valo  * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
704b7282643SLuca Coelho  * @system_pm_mode: the system-wide power management mode in use.
705b7282643SLuca Coelho  *	This mode is set dynamically, depending on the WoWLAN values
706b7282643SLuca Coelho  *	configured from the userspace at runtime.
707b7282643SLuca Coelho  * @runtime_pm_mode: the runtime power management mode in use.  This
708b7282643SLuca Coelho  *	mode is set during the initialization phase and is not
709b7282643SLuca Coelho  *	supposed to change during runtime.
710e705c121SKalle Valo  */
711e705c121SKalle Valo struct iwl_trans {
712e705c121SKalle Valo 	const struct iwl_trans_ops *ops;
713e705c121SKalle Valo 	struct iwl_op_mode *op_mode;
714e705c121SKalle Valo 	const struct iwl_cfg *cfg;
7156f482e37SSara Sharon 	struct iwl_drv *drv;
716e705c121SKalle Valo 	enum iwl_trans_state state;
717e705c121SKalle Valo 	unsigned long status;
718e705c121SKalle Valo 
719e705c121SKalle Valo 	struct device *dev;
720e705c121SKalle Valo 	u32 max_skb_frags;
721e705c121SKalle Valo 	u32 hw_rev;
7221afb0ae4SHaim Dreyfuss 	u32 hw_rf_id;
723e705c121SKalle Valo 	u32 hw_id;
724e705c121SKalle Valo 	char hw_id_str[52];
725e705c121SKalle Valo 
726e705c121SKalle Valo 	u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size;
727e705c121SKalle Valo 
728e705c121SKalle Valo 	bool pm_support;
729e705c121SKalle Valo 	bool ltr_enabled;
730e705c121SKalle Valo 
73139bdb17eSSharon Dvir 	const struct iwl_hcmd_arr *command_groups;
73239bdb17eSSharon Dvir 	int command_groups_size;
7335b88792cSSara Sharon 	bool wide_cmd_header;
73439bdb17eSSharon Dvir 
735e705c121SKalle Valo 	u8 num_rx_queues;
736e705c121SKalle Valo 
737e705c121SKalle Valo 	/* The following fields are internal only */
738e705c121SKalle Valo 	struct kmem_cache *dev_cmd_pool;
739e705c121SKalle Valo 	char dev_cmd_pool_name[50];
740e705c121SKalle Valo 
741e705c121SKalle Valo 	struct dentry *dbgfs_dir;
742e705c121SKalle Valo 
743e705c121SKalle Valo #ifdef CONFIG_LOCKDEP
744e705c121SKalle Valo 	struct lockdep_map sync_cmd_lockdep_map;
745e705c121SKalle Valo #endif
746e705c121SKalle Valo 
747e705c121SKalle Valo 	const struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv;
748e705c121SKalle Valo 	const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
749e705c121SKalle Valo 	struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv;
750e705c121SKalle Valo 	u8 dbg_dest_reg_num;
751e705c121SKalle Valo 
752b7282643SLuca Coelho 	enum iwl_plat_pm_mode system_pm_mode;
753b7282643SLuca Coelho 	enum iwl_plat_pm_mode runtime_pm_mode;
754863eac30SLuca Coelho 	bool suspending;
755e705c121SKalle Valo 
756e705c121SKalle Valo 	/* pointer to trans specific struct */
757e705c121SKalle Valo 	/*Ensure that this pointer will always be aligned to sizeof pointer */
758e705c121SKalle Valo 	char trans_specific[0] __aligned(sizeof(void *));
759e705c121SKalle Valo };
760e705c121SKalle Valo 
76139bdb17eSSharon Dvir const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id);
76239bdb17eSSharon Dvir int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans);
76339bdb17eSSharon Dvir 
764e705c121SKalle Valo static inline void iwl_trans_configure(struct iwl_trans *trans,
765e705c121SKalle Valo 				       const struct iwl_trans_config *trans_cfg)
766e705c121SKalle Valo {
767e705c121SKalle Valo 	trans->op_mode = trans_cfg->op_mode;
768e705c121SKalle Valo 
769e705c121SKalle Valo 	trans->ops->configure(trans, trans_cfg);
77039bdb17eSSharon Dvir 	WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg));
771e705c121SKalle Valo }
772e705c121SKalle Valo 
773e705c121SKalle Valo static inline int _iwl_trans_start_hw(struct iwl_trans *trans, bool low_power)
774e705c121SKalle Valo {
775e705c121SKalle Valo 	might_sleep();
776e705c121SKalle Valo 
777e705c121SKalle Valo 	return trans->ops->start_hw(trans, low_power);
778e705c121SKalle Valo }
779e705c121SKalle Valo 
780e705c121SKalle Valo static inline int iwl_trans_start_hw(struct iwl_trans *trans)
781e705c121SKalle Valo {
782e705c121SKalle Valo 	return trans->ops->start_hw(trans, true);
783e705c121SKalle Valo }
784e705c121SKalle Valo 
785e705c121SKalle Valo static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans)
786e705c121SKalle Valo {
787e705c121SKalle Valo 	might_sleep();
788e705c121SKalle Valo 
789e705c121SKalle Valo 	if (trans->ops->op_mode_leave)
790e705c121SKalle Valo 		trans->ops->op_mode_leave(trans);
791e705c121SKalle Valo 
792e705c121SKalle Valo 	trans->op_mode = NULL;
793e705c121SKalle Valo 
794e705c121SKalle Valo 	trans->state = IWL_TRANS_NO_FW;
795e705c121SKalle Valo }
796e705c121SKalle Valo 
797e705c121SKalle Valo static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
798e705c121SKalle Valo {
799e705c121SKalle Valo 	might_sleep();
800e705c121SKalle Valo 
801e705c121SKalle Valo 	trans->state = IWL_TRANS_FW_ALIVE;
802e705c121SKalle Valo 
803e705c121SKalle Valo 	trans->ops->fw_alive(trans, scd_addr);
804e705c121SKalle Valo }
805e705c121SKalle Valo 
806e705c121SKalle Valo static inline int iwl_trans_start_fw(struct iwl_trans *trans,
807e705c121SKalle Valo 				     const struct fw_img *fw,
808e705c121SKalle Valo 				     bool run_in_rfkill)
809e705c121SKalle Valo {
810e705c121SKalle Valo 	might_sleep();
811e705c121SKalle Valo 
812e705c121SKalle Valo 	WARN_ON_ONCE(!trans->rx_mpdu_cmd);
813e705c121SKalle Valo 
814e705c121SKalle Valo 	clear_bit(STATUS_FW_ERROR, &trans->status);
815e705c121SKalle Valo 	return trans->ops->start_fw(trans, fw, run_in_rfkill);
816e705c121SKalle Valo }
817e705c121SKalle Valo 
818e705c121SKalle Valo static inline void _iwl_trans_stop_device(struct iwl_trans *trans,
819e705c121SKalle Valo 					  bool low_power)
820e705c121SKalle Valo {
821e705c121SKalle Valo 	might_sleep();
822e705c121SKalle Valo 
823e705c121SKalle Valo 	trans->ops->stop_device(trans, low_power);
824e705c121SKalle Valo 
825e705c121SKalle Valo 	trans->state = IWL_TRANS_NO_FW;
826e705c121SKalle Valo }
827e705c121SKalle Valo 
828e705c121SKalle Valo static inline void iwl_trans_stop_device(struct iwl_trans *trans)
829e705c121SKalle Valo {
830e705c121SKalle Valo 	_iwl_trans_stop_device(trans, true);
831e705c121SKalle Valo }
832e705c121SKalle Valo 
83323ae6128SMatti Gottlieb static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test,
83423ae6128SMatti Gottlieb 					bool reset)
835e705c121SKalle Valo {
836e705c121SKalle Valo 	might_sleep();
837e705c121SKalle Valo 	if (trans->ops->d3_suspend)
83823ae6128SMatti Gottlieb 		trans->ops->d3_suspend(trans, test, reset);
839e705c121SKalle Valo }
840e705c121SKalle Valo 
841e705c121SKalle Valo static inline int iwl_trans_d3_resume(struct iwl_trans *trans,
842e705c121SKalle Valo 				      enum iwl_d3_status *status,
84323ae6128SMatti Gottlieb 				      bool test, bool reset)
844e705c121SKalle Valo {
845e705c121SKalle Valo 	might_sleep();
846e705c121SKalle Valo 	if (!trans->ops->d3_resume)
847e705c121SKalle Valo 		return 0;
848e705c121SKalle Valo 
84923ae6128SMatti Gottlieb 	return trans->ops->d3_resume(trans, status, test, reset);
850e705c121SKalle Valo }
851e705c121SKalle Valo 
852e705c121SKalle Valo static inline int iwl_trans_suspend(struct iwl_trans *trans)
853e705c121SKalle Valo {
854e705c121SKalle Valo 	if (!trans->ops->suspend)
855e705c121SKalle Valo 		return 0;
856e705c121SKalle Valo 
857e705c121SKalle Valo 	return trans->ops->suspend(trans);
858e705c121SKalle Valo }
859e705c121SKalle Valo 
860e705c121SKalle Valo static inline void iwl_trans_resume(struct iwl_trans *trans)
861e705c121SKalle Valo {
862e705c121SKalle Valo 	if (trans->ops->resume)
863e705c121SKalle Valo 		trans->ops->resume(trans);
864e705c121SKalle Valo }
865e705c121SKalle Valo 
866e705c121SKalle Valo static inline struct iwl_trans_dump_data *
867e705c121SKalle Valo iwl_trans_dump_data(struct iwl_trans *trans,
868a80c7a69SEmmanuel Grumbach 		    const struct iwl_fw_dbg_trigger_tlv *trigger)
869e705c121SKalle Valo {
870e705c121SKalle Valo 	if (!trans->ops->dump_data)
871e705c121SKalle Valo 		return NULL;
872e705c121SKalle Valo 	return trans->ops->dump_data(trans, trigger);
873e705c121SKalle Valo }
874e705c121SKalle Valo 
875fb12777aSKirtika Ruchandani static inline void iwl_trans_dump_regs(struct iwl_trans *trans)
876fb12777aSKirtika Ruchandani {
877fb12777aSKirtika Ruchandani 	if (trans->ops->dump_regs)
878fb12777aSKirtika Ruchandani 		trans->ops->dump_regs(trans);
879fb12777aSKirtika Ruchandani }
880fb12777aSKirtika Ruchandani 
881e705c121SKalle Valo static inline struct iwl_device_cmd *
882e705c121SKalle Valo iwl_trans_alloc_tx_cmd(struct iwl_trans *trans)
883e705c121SKalle Valo {
8840ae0bb3fSLuca Coelho 	return kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC);
885e705c121SKalle Valo }
886e705c121SKalle Valo 
88792fe8343SEmmanuel Grumbach int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
88892fe8343SEmmanuel Grumbach 
889e705c121SKalle Valo static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans,
890e705c121SKalle Valo 					 struct iwl_device_cmd *dev_cmd)
891e705c121SKalle Valo {
8921ea423b0SLuca Coelho 	kmem_cache_free(trans->dev_cmd_pool, dev_cmd);
893e705c121SKalle Valo }
894e705c121SKalle Valo 
895e705c121SKalle Valo static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
896e705c121SKalle Valo 			       struct iwl_device_cmd *dev_cmd, int queue)
897e705c121SKalle Valo {
898e705c121SKalle Valo 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
899e705c121SKalle Valo 		return -EIO;
900e705c121SKalle Valo 
901e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
902e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
903e5d15cb5SEliad Peller 		return -EIO;
904e5d15cb5SEliad Peller 	}
905e705c121SKalle Valo 
906e705c121SKalle Valo 	return trans->ops->tx(trans, skb, dev_cmd, queue);
907e705c121SKalle Valo }
908e705c121SKalle Valo 
909e705c121SKalle Valo static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue,
910e705c121SKalle Valo 				     int ssn, struct sk_buff_head *skbs)
911e705c121SKalle Valo {
912e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
913e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
914e5d15cb5SEliad Peller 		return;
915e5d15cb5SEliad Peller 	}
916e705c121SKalle Valo 
917e705c121SKalle Valo 	trans->ops->reclaim(trans, queue, ssn, skbs);
918e705c121SKalle Valo }
919e705c121SKalle Valo 
920e705c121SKalle Valo static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
921e705c121SKalle Valo 					 bool configure_scd)
922e705c121SKalle Valo {
923e705c121SKalle Valo 	trans->ops->txq_disable(trans, queue, configure_scd);
924e705c121SKalle Valo }
925e705c121SKalle Valo 
926dcfbd67bSEmmanuel Grumbach static inline bool
927e705c121SKalle Valo iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
928e705c121SKalle Valo 			 const struct iwl_trans_txq_scd_cfg *cfg,
929e705c121SKalle Valo 			 unsigned int queue_wdg_timeout)
930e705c121SKalle Valo {
931e705c121SKalle Valo 	might_sleep();
932e705c121SKalle Valo 
933e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
934e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
935dcfbd67bSEmmanuel Grumbach 		return false;
936e5d15cb5SEliad Peller 	}
937e705c121SKalle Valo 
938dcfbd67bSEmmanuel Grumbach 	return trans->ops->txq_enable(trans, queue, ssn,
939dcfbd67bSEmmanuel Grumbach 				      cfg, queue_wdg_timeout);
940e705c121SKalle Valo }
941e705c121SKalle Valo 
9426b35ff91SSara Sharon static inline void
9436b35ff91SSara Sharon iwl_trans_txq_free(struct iwl_trans *trans, int queue)
9446b35ff91SSara Sharon {
9456b35ff91SSara Sharon 	if (WARN_ON_ONCE(!trans->ops->txq_free))
9466b35ff91SSara Sharon 		return;
9476b35ff91SSara Sharon 
9486b35ff91SSara Sharon 	trans->ops->txq_free(trans, queue);
9496b35ff91SSara Sharon }
9506b35ff91SSara Sharon 
9516b35ff91SSara Sharon static inline int
9526b35ff91SSara Sharon iwl_trans_txq_alloc(struct iwl_trans *trans,
9536b35ff91SSara Sharon 		    struct iwl_tx_queue_cfg_cmd *cmd,
9546b35ff91SSara Sharon 		    int cmd_id,
9556b35ff91SSara Sharon 		    unsigned int queue_wdg_timeout)
9566b35ff91SSara Sharon {
9576b35ff91SSara Sharon 	might_sleep();
9586b35ff91SSara Sharon 
9596b35ff91SSara Sharon 	if (WARN_ON_ONCE(!trans->ops->txq_alloc))
9606b35ff91SSara Sharon 		return -ENOTSUPP;
9616b35ff91SSara Sharon 
9626b35ff91SSara Sharon 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
9636b35ff91SSara Sharon 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
9646b35ff91SSara Sharon 		return -EIO;
9656b35ff91SSara Sharon 	}
9666b35ff91SSara Sharon 
9676b35ff91SSara Sharon 	return trans->ops->txq_alloc(trans, cmd, cmd_id, queue_wdg_timeout);
9686b35ff91SSara Sharon }
9696b35ff91SSara Sharon 
97042db09c1SLiad Kaufman static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
97142db09c1SLiad Kaufman 						 int queue, bool shared_mode)
97242db09c1SLiad Kaufman {
97342db09c1SLiad Kaufman 	if (trans->ops->txq_set_shared_mode)
97442db09c1SLiad Kaufman 		trans->ops->txq_set_shared_mode(trans, queue, shared_mode);
97542db09c1SLiad Kaufman }
97642db09c1SLiad Kaufman 
977e705c121SKalle Valo static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue,
978e705c121SKalle Valo 					int fifo, int sta_id, int tid,
979e705c121SKalle Valo 					int frame_limit, u16 ssn,
980e705c121SKalle Valo 					unsigned int queue_wdg_timeout)
981e705c121SKalle Valo {
982e705c121SKalle Valo 	struct iwl_trans_txq_scd_cfg cfg = {
983e705c121SKalle Valo 		.fifo = fifo,
984e705c121SKalle Valo 		.sta_id = sta_id,
985e705c121SKalle Valo 		.tid = tid,
986e705c121SKalle Valo 		.frame_limit = frame_limit,
987e705c121SKalle Valo 		.aggregate = sta_id >= 0,
988e705c121SKalle Valo 	};
989e705c121SKalle Valo 
990e705c121SKalle Valo 	iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout);
991e705c121SKalle Valo }
992e705c121SKalle Valo 
993e705c121SKalle Valo static inline
994e705c121SKalle Valo void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo,
995e705c121SKalle Valo 			     unsigned int queue_wdg_timeout)
996e705c121SKalle Valo {
997e705c121SKalle Valo 	struct iwl_trans_txq_scd_cfg cfg = {
998e705c121SKalle Valo 		.fifo = fifo,
999e705c121SKalle Valo 		.sta_id = -1,
1000e705c121SKalle Valo 		.tid = IWL_MAX_TID_COUNT,
1001e705c121SKalle Valo 		.frame_limit = IWL_FRAME_LIMIT,
1002e705c121SKalle Valo 		.aggregate = false,
1003e705c121SKalle Valo 	};
1004e705c121SKalle Valo 
1005e705c121SKalle Valo 	iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout);
1006e705c121SKalle Valo }
1007e705c121SKalle Valo 
1008e705c121SKalle Valo static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
1009e705c121SKalle Valo 					      unsigned long txqs,
1010e705c121SKalle Valo 					      bool freeze)
1011e705c121SKalle Valo {
1012e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1013e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1014e5d15cb5SEliad Peller 		return;
1015e5d15cb5SEliad Peller 	}
1016e705c121SKalle Valo 
1017e705c121SKalle Valo 	if (trans->ops->freeze_txq_timer)
1018e705c121SKalle Valo 		trans->ops->freeze_txq_timer(trans, txqs, freeze);
1019e705c121SKalle Valo }
1020e705c121SKalle Valo 
10210cd58eaaSEmmanuel Grumbach static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans,
10220cd58eaaSEmmanuel Grumbach 					    bool block)
10230cd58eaaSEmmanuel Grumbach {
1024e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
10250cd58eaaSEmmanuel Grumbach 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1026e5d15cb5SEliad Peller 		return;
1027e5d15cb5SEliad Peller 	}
10280cd58eaaSEmmanuel Grumbach 
10290cd58eaaSEmmanuel Grumbach 	if (trans->ops->block_txq_ptrs)
10300cd58eaaSEmmanuel Grumbach 		trans->ops->block_txq_ptrs(trans, block);
10310cd58eaaSEmmanuel Grumbach }
10320cd58eaaSEmmanuel Grumbach 
1033a1a57877SSara Sharon static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans,
1034e705c121SKalle Valo 						 u32 txqs)
1035e705c121SKalle Valo {
1036d6d517b7SSara Sharon 	if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty))
1037d6d517b7SSara Sharon 		return -ENOTSUPP;
1038d6d517b7SSara Sharon 
1039e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1040e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1041e5d15cb5SEliad Peller 		return -EIO;
1042e5d15cb5SEliad Peller 	}
1043e705c121SKalle Valo 
1044a1a57877SSara Sharon 	return trans->ops->wait_tx_queues_empty(trans, txqs);
1045e705c121SKalle Valo }
1046e705c121SKalle Valo 
1047d6d517b7SSara Sharon static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
1048d6d517b7SSara Sharon {
1049d6d517b7SSara Sharon 	if (WARN_ON_ONCE(!trans->ops->wait_txq_empty))
1050d6d517b7SSara Sharon 		return -ENOTSUPP;
1051d6d517b7SSara Sharon 
1052d6d517b7SSara Sharon 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1053d6d517b7SSara Sharon 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1054d6d517b7SSara Sharon 		return -EIO;
1055d6d517b7SSara Sharon 	}
1056d6d517b7SSara Sharon 
1057d6d517b7SSara Sharon 	return trans->ops->wait_txq_empty(trans, queue);
1058d6d517b7SSara Sharon }
1059d6d517b7SSara Sharon 
1060e705c121SKalle Valo static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
1061e705c121SKalle Valo {
1062e705c121SKalle Valo 	trans->ops->write8(trans, ofs, val);
1063e705c121SKalle Valo }
1064e705c121SKalle Valo 
1065e705c121SKalle Valo static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
1066e705c121SKalle Valo {
1067e705c121SKalle Valo 	trans->ops->write32(trans, ofs, val);
1068e705c121SKalle Valo }
1069e705c121SKalle Valo 
1070e705c121SKalle Valo static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
1071e705c121SKalle Valo {
1072e705c121SKalle Valo 	return trans->ops->read32(trans, ofs);
1073e705c121SKalle Valo }
1074e705c121SKalle Valo 
1075e705c121SKalle Valo static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
1076e705c121SKalle Valo {
1077e705c121SKalle Valo 	return trans->ops->read_prph(trans, ofs);
1078e705c121SKalle Valo }
1079e705c121SKalle Valo 
1080e705c121SKalle Valo static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs,
1081e705c121SKalle Valo 					u32 val)
1082e705c121SKalle Valo {
1083e705c121SKalle Valo 	return trans->ops->write_prph(trans, ofs, val);
1084e705c121SKalle Valo }
1085e705c121SKalle Valo 
1086e705c121SKalle Valo static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
1087e705c121SKalle Valo 				     void *buf, int dwords)
1088e705c121SKalle Valo {
1089e705c121SKalle Valo 	return trans->ops->read_mem(trans, addr, buf, dwords);
1090e705c121SKalle Valo }
1091e705c121SKalle Valo 
1092e705c121SKalle Valo #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize)		      \
1093e705c121SKalle Valo 	do {								      \
1094e705c121SKalle Valo 		if (__builtin_constant_p(bufsize))			      \
1095e705c121SKalle Valo 			BUILD_BUG_ON((bufsize) % sizeof(u32));		      \
1096e705c121SKalle Valo 		iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\
1097e705c121SKalle Valo 	} while (0)
1098e705c121SKalle Valo 
1099e705c121SKalle Valo static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr)
1100e705c121SKalle Valo {
1101e705c121SKalle Valo 	u32 value;
1102e705c121SKalle Valo 
1103e705c121SKalle Valo 	if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1)))
1104e705c121SKalle Valo 		return 0xa5a5a5a5;
1105e705c121SKalle Valo 
1106e705c121SKalle Valo 	return value;
1107e705c121SKalle Valo }
1108e705c121SKalle Valo 
1109e705c121SKalle Valo static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
1110e705c121SKalle Valo 				      const void *buf, int dwords)
1111e705c121SKalle Valo {
1112e705c121SKalle Valo 	return trans->ops->write_mem(trans, addr, buf, dwords);
1113e705c121SKalle Valo }
1114e705c121SKalle Valo 
1115e705c121SKalle Valo static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr,
1116e705c121SKalle Valo 					u32 val)
1117e705c121SKalle Valo {
1118e705c121SKalle Valo 	return iwl_trans_write_mem(trans, addr, &val, 1);
1119e705c121SKalle Valo }
1120e705c121SKalle Valo 
1121e705c121SKalle Valo static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
1122e705c121SKalle Valo {
1123e705c121SKalle Valo 	if (trans->ops->set_pmi)
1124e705c121SKalle Valo 		trans->ops->set_pmi(trans, state);
1125e705c121SKalle Valo }
1126e705c121SKalle Valo 
1127e705c121SKalle Valo static inline void
1128e705c121SKalle Valo iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
1129e705c121SKalle Valo {
1130e705c121SKalle Valo 	trans->ops->set_bits_mask(trans, reg, mask, value);
1131e705c121SKalle Valo }
1132e705c121SKalle Valo 
113323ba9340SEmmanuel Grumbach #define iwl_trans_grab_nic_access(trans, flags)	\
1134e705c121SKalle Valo 	__cond_lock(nic_access,				\
113523ba9340SEmmanuel Grumbach 		    likely((trans)->ops->grab_nic_access(trans, flags)))
1136e705c121SKalle Valo 
1137e705c121SKalle Valo static inline void __releases(nic_access)
1138e705c121SKalle Valo iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags)
1139e705c121SKalle Valo {
1140e705c121SKalle Valo 	trans->ops->release_nic_access(trans, flags);
1141e705c121SKalle Valo 	__release(nic_access);
1142e705c121SKalle Valo }
1143e705c121SKalle Valo 
1144e705c121SKalle Valo static inline void iwl_trans_fw_error(struct iwl_trans *trans)
1145e705c121SKalle Valo {
1146e705c121SKalle Valo 	if (WARN_ON_ONCE(!trans->op_mode))
1147e705c121SKalle Valo 		return;
1148e705c121SKalle Valo 
1149e705c121SKalle Valo 	/* prevent double restarts due to the same erroneous FW */
1150e705c121SKalle Valo 	if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status))
1151e705c121SKalle Valo 		iwl_op_mode_nic_error(trans->op_mode);
1152e705c121SKalle Valo }
1153e705c121SKalle Valo 
1154e705c121SKalle Valo /*****************************************************
1155e705c121SKalle Valo  * transport helper functions
1156e705c121SKalle Valo  *****************************************************/
1157e705c121SKalle Valo struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
1158e705c121SKalle Valo 				  struct device *dev,
1159e705c121SKalle Valo 				  const struct iwl_cfg *cfg,
11601ea423b0SLuca Coelho 				  const struct iwl_trans_ops *ops);
1161e705c121SKalle Valo void iwl_trans_free(struct iwl_trans *trans);
1162d621d3c7SLuca Coelho void iwl_trans_ref(struct iwl_trans *trans);
1163d621d3c7SLuca Coelho void iwl_trans_unref(struct iwl_trans *trans);
1164e705c121SKalle Valo 
1165e705c121SKalle Valo /*****************************************************
1166e705c121SKalle Valo * driver (transport) register/unregister functions
1167e705c121SKalle Valo ******************************************************/
1168e705c121SKalle Valo int __must_check iwl_pci_register_driver(void);
1169e705c121SKalle Valo void iwl_pci_unregister_driver(void);
1170e705c121SKalle Valo 
1171e705c121SKalle Valo #endif /* __iwl_trans_h__ */
1172