1e705c121SKalle Valo /******************************************************************************
2e705c121SKalle Valo  *
3e705c121SKalle Valo  * This file is provided under a dual BSD/GPLv2 license.  When using or
4e705c121SKalle Valo  * redistributing this file, you may do so under either license.
5e705c121SKalle Valo  *
6e705c121SKalle Valo  * GPL LICENSE SUMMARY
7e705c121SKalle Valo  *
8e705c121SKalle Valo  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
102a2e9d10SLiad Kaufman  * Copyright(c) 2016        Intel Deutschland GmbH
11e705c121SKalle Valo  *
12e705c121SKalle Valo  * This program is free software; you can redistribute it and/or modify
13e705c121SKalle Valo  * it under the terms of version 2 of the GNU General Public License as
14e705c121SKalle Valo  * published by the Free Software Foundation.
15e705c121SKalle Valo  *
16e705c121SKalle Valo  * This program is distributed in the hope that it will be useful, but
17e705c121SKalle Valo  * WITHOUT ANY WARRANTY; without even the implied warranty of
18e705c121SKalle Valo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19e705c121SKalle Valo  * General Public License for more details.
20e705c121SKalle Valo  *
21e705c121SKalle Valo  * You should have received a copy of the GNU General Public License
22e705c121SKalle Valo  * along with this program; if not, write to the Free Software
23e705c121SKalle Valo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24e705c121SKalle Valo  * USA
25e705c121SKalle Valo  *
26e705c121SKalle Valo  * The full GNU General Public License is included in this distribution
27e705c121SKalle Valo  * in the file called COPYING.
28e705c121SKalle Valo  *
29e705c121SKalle Valo  * Contact Information:
30cb2f8277SEmmanuel Grumbach  *  Intel Linux Wireless <linuxwifi@intel.com>
31e705c121SKalle Valo  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32e705c121SKalle Valo  *
33e705c121SKalle Valo  * BSD LICENSE
34e705c121SKalle Valo  *
35e705c121SKalle Valo  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36e705c121SKalle Valo  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
372a2e9d10SLiad Kaufman  * Copyright(c) 2016        Intel Deutschland GmbH
38e705c121SKalle Valo  * All rights reserved.
39e705c121SKalle Valo  *
40e705c121SKalle Valo  * Redistribution and use in source and binary forms, with or without
41e705c121SKalle Valo  * modification, are permitted provided that the following conditions
42e705c121SKalle Valo  * are met:
43e705c121SKalle Valo  *
44e705c121SKalle Valo  *  * Redistributions of source code must retain the above copyright
45e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer.
46e705c121SKalle Valo  *  * Redistributions in binary form must reproduce the above copyright
47e705c121SKalle Valo  *    notice, this list of conditions and the following disclaimer in
48e705c121SKalle Valo  *    the documentation and/or other materials provided with the
49e705c121SKalle Valo  *    distribution.
50e705c121SKalle Valo  *  * Neither the name Intel Corporation nor the names of its
51e705c121SKalle Valo  *    contributors may be used to endorse or promote products derived
52e705c121SKalle Valo  *    from this software without specific prior written permission.
53e705c121SKalle Valo  *
54e705c121SKalle Valo  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55e705c121SKalle Valo  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56e705c121SKalle Valo  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57e705c121SKalle Valo  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58e705c121SKalle Valo  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59e705c121SKalle Valo  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60e705c121SKalle Valo  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61e705c121SKalle Valo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62e705c121SKalle Valo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63e705c121SKalle Valo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64e705c121SKalle Valo  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65e705c121SKalle Valo  *
66e705c121SKalle Valo  *****************************************************************************/
67e705c121SKalle Valo #ifndef __iwl_trans_h__
68e705c121SKalle Valo #define __iwl_trans_h__
69e705c121SKalle Valo 
70e705c121SKalle Valo #include <linux/ieee80211.h>
71e705c121SKalle Valo #include <linux/mm.h> /* for page_address */
72e705c121SKalle Valo #include <linux/lockdep.h>
7339bdb17eSSharon Dvir #include <linux/kernel.h>
74e705c121SKalle Valo 
75e705c121SKalle Valo #include "iwl-debug.h"
76e705c121SKalle Valo #include "iwl-config.h"
77e705c121SKalle Valo #include "iwl-fw.h"
78e705c121SKalle Valo #include "iwl-op-mode.h"
79e705c121SKalle Valo 
80e705c121SKalle Valo /**
81e705c121SKalle Valo  * DOC: Transport layer - what is it ?
82e705c121SKalle Valo  *
83e705c121SKalle Valo  * The transport layer is the layer that deals with the HW directly. It provides
84e705c121SKalle Valo  * an abstraction of the underlying HW to the upper layer. The transport layer
85e705c121SKalle Valo  * doesn't provide any policy, algorithm or anything of this kind, but only
86e705c121SKalle Valo  * mechanisms to make the HW do something. It is not completely stateless but
87e705c121SKalle Valo  * close to it.
88e705c121SKalle Valo  * We will have an implementation for each different supported bus.
89e705c121SKalle Valo  */
90e705c121SKalle Valo 
91e705c121SKalle Valo /**
92e705c121SKalle Valo  * DOC: Life cycle of the transport layer
93e705c121SKalle Valo  *
94e705c121SKalle Valo  * The transport layer has a very precise life cycle.
95e705c121SKalle Valo  *
96e705c121SKalle Valo  *	1) A helper function is called during the module initialization and
97e705c121SKalle Valo  *	   registers the bus driver's ops with the transport's alloc function.
98e705c121SKalle Valo  *	2) Bus's probe calls to the transport layer's allocation functions.
99e705c121SKalle Valo  *	   Of course this function is bus specific.
100e705c121SKalle Valo  *	3) This allocation functions will spawn the upper layer which will
101e705c121SKalle Valo  *	   register mac80211.
102e705c121SKalle Valo  *
103e705c121SKalle Valo  *	4) At some point (i.e. mac80211's start call), the op_mode will call
104e705c121SKalle Valo  *	   the following sequence:
105e705c121SKalle Valo  *	   start_hw
106e705c121SKalle Valo  *	   start_fw
107e705c121SKalle Valo  *
108e705c121SKalle Valo  *	5) Then when finished (or reset):
109e705c121SKalle Valo  *	   stop_device
110e705c121SKalle Valo  *
111e705c121SKalle Valo  *	6) Eventually, the free function will be called.
112e705c121SKalle Valo  */
113e705c121SKalle Valo 
114e705c121SKalle Valo /**
115e705c121SKalle Valo  * DOC: Host command section
116e705c121SKalle Valo  *
117e705c121SKalle Valo  * A host command is a command issued by the upper layer to the fw. There are
118e705c121SKalle Valo  * several versions of fw that have several APIs. The transport layer is
119e705c121SKalle Valo  * completely agnostic to these differences.
120e705c121SKalle Valo  * The transport does provide helper functionality (i.e. SYNC / ASYNC mode),
121e705c121SKalle Valo  */
122e705c121SKalle Valo #define SEQ_TO_QUEUE(s)	(((s) >> 8) & 0x1f)
123e705c121SKalle Valo #define QUEUE_TO_SEQ(q)	(((q) & 0x1f) << 8)
124e705c121SKalle Valo #define SEQ_TO_INDEX(s)	((s) & 0xff)
125e705c121SKalle Valo #define INDEX_TO_SEQ(i)	((i) & 0xff)
126e705c121SKalle Valo #define SEQ_RX_FRAME	cpu_to_le16(0x8000)
127e705c121SKalle Valo 
128e705c121SKalle Valo /*
129e705c121SKalle Valo  * those functions retrieve specific information from
130e705c121SKalle Valo  * the id field in the iwl_host_cmd struct which contains
131e705c121SKalle Valo  * the command id, the group id and the version of the command
132e705c121SKalle Valo  * and vice versa
133e705c121SKalle Valo */
134e705c121SKalle Valo static inline u8 iwl_cmd_opcode(u32 cmdid)
135e705c121SKalle Valo {
136e705c121SKalle Valo 	return cmdid & 0xFF;
137e705c121SKalle Valo }
138e705c121SKalle Valo 
139e705c121SKalle Valo static inline u8 iwl_cmd_groupid(u32 cmdid)
140e705c121SKalle Valo {
141e705c121SKalle Valo 	return ((cmdid & 0xFF00) >> 8);
142e705c121SKalle Valo }
143e705c121SKalle Valo 
144e705c121SKalle Valo static inline u8 iwl_cmd_version(u32 cmdid)
145e705c121SKalle Valo {
146e705c121SKalle Valo 	return ((cmdid & 0xFF0000) >> 16);
147e705c121SKalle Valo }
148e705c121SKalle Valo 
149e705c121SKalle Valo static inline u32 iwl_cmd_id(u8 opcode, u8 groupid, u8 version)
150e705c121SKalle Valo {
151e705c121SKalle Valo 	return opcode + (groupid << 8) + (version << 16);
152e705c121SKalle Valo }
153e705c121SKalle Valo 
154e705c121SKalle Valo /* make u16 wide id out of u8 group and opcode */
155e705c121SKalle Valo #define WIDE_ID(grp, opcode) ((grp << 8) | opcode)
1565b88792cSSara Sharon #define DEF_ID(opcode) ((1 << 8) | (opcode))
157e705c121SKalle Valo 
158e705c121SKalle Valo /* due to the conversion, this group is special; new groups
159e705c121SKalle Valo  * should be defined in the appropriate fw-api header files
160e705c121SKalle Valo  */
161e705c121SKalle Valo #define IWL_ALWAYS_LONG_GROUP	1
162e705c121SKalle Valo 
163e705c121SKalle Valo /**
164e705c121SKalle Valo  * struct iwl_cmd_header
165e705c121SKalle Valo  *
166e705c121SKalle Valo  * This header format appears in the beginning of each command sent from the
167e705c121SKalle Valo  * driver, and each response/notification received from uCode.
168e705c121SKalle Valo  */
169e705c121SKalle Valo struct iwl_cmd_header {
170e705c121SKalle Valo 	u8 cmd;		/* Command ID:  REPLY_RXON, etc. */
171e705c121SKalle Valo 	u8 group_id;
172e705c121SKalle Valo 	/*
173e705c121SKalle Valo 	 * The driver sets up the sequence number to values of its choosing.
174e705c121SKalle Valo 	 * uCode does not use this value, but passes it back to the driver
175e705c121SKalle Valo 	 * when sending the response to each driver-originated command, so
176e705c121SKalle Valo 	 * the driver can match the response to the command.  Since the values
177e705c121SKalle Valo 	 * don't get used by uCode, the driver may set up an arbitrary format.
178e705c121SKalle Valo 	 *
179e705c121SKalle Valo 	 * There is one exception:  uCode sets bit 15 when it originates
180e705c121SKalle Valo 	 * the response/notification, i.e. when the response/notification
181e705c121SKalle Valo 	 * is not a direct response to a command sent by the driver.  For
182e705c121SKalle Valo 	 * example, uCode issues REPLY_RX when it sends a received frame
183e705c121SKalle Valo 	 * to the driver; it is not a direct response to any driver command.
184e705c121SKalle Valo 	 *
185e705c121SKalle Valo 	 * The Linux driver uses the following format:
186e705c121SKalle Valo 	 *
187e705c121SKalle Valo 	 *  0:7		tfd index - position within TX queue
188e705c121SKalle Valo 	 *  8:12	TX queue id
189e705c121SKalle Valo 	 *  13:14	reserved
190e705c121SKalle Valo 	 *  15		unsolicited RX or uCode-originated notification
191e705c121SKalle Valo 	 */
192e705c121SKalle Valo 	__le16 sequence;
193e705c121SKalle Valo } __packed;
194e705c121SKalle Valo 
195e705c121SKalle Valo /**
196e705c121SKalle Valo  * struct iwl_cmd_header_wide
197e705c121SKalle Valo  *
198e705c121SKalle Valo  * This header format appears in the beginning of each command sent from the
199e705c121SKalle Valo  * driver, and each response/notification received from uCode.
200e705c121SKalle Valo  * this is the wide version that contains more information about the command
201e705c121SKalle Valo  * like length, version and command type
202e705c121SKalle Valo  */
203e705c121SKalle Valo struct iwl_cmd_header_wide {
204e705c121SKalle Valo 	u8 cmd;
205e705c121SKalle Valo 	u8 group_id;
206e705c121SKalle Valo 	__le16 sequence;
207e705c121SKalle Valo 	__le16 length;
208e705c121SKalle Valo 	u8 reserved;
209e705c121SKalle Valo 	u8 version;
210e705c121SKalle Valo } __packed;
211e705c121SKalle Valo 
212e705c121SKalle Valo #define FH_RSCSR_FRAME_SIZE_MSK		0x00003FFF	/* bits 0-13 */
213e705c121SKalle Valo #define FH_RSCSR_FRAME_INVALID		0x55550000
214e705c121SKalle Valo #define FH_RSCSR_FRAME_ALIGN		0x40
215fbe41127SSara Sharon #define FH_RSCSR_RPA_EN			BIT(25)
216ab2e696bSSara Sharon #define FH_RSCSR_RXQ_POS		16
217ab2e696bSSara Sharon #define FH_RSCSR_RXQ_MASK		0x3F0000
218e705c121SKalle Valo 
219e705c121SKalle Valo struct iwl_rx_packet {
220e705c121SKalle Valo 	/*
221e705c121SKalle Valo 	 * The first 4 bytes of the RX frame header contain both the RX frame
222e705c121SKalle Valo 	 * size and some flags.
223e705c121SKalle Valo 	 * Bit fields:
224e705c121SKalle Valo 	 * 31:    flag flush RB request
225e705c121SKalle Valo 	 * 30:    flag ignore TC (terminal counter) request
226e705c121SKalle Valo 	 * 29:    flag fast IRQ request
227fbe41127SSara Sharon 	 * 28-26: Reserved
228fbe41127SSara Sharon 	 * 25:    Offload enabled
229ab2e696bSSara Sharon 	 * 24:    RPF enabled
230ab2e696bSSara Sharon 	 * 23:    RSS enabled
231ab2e696bSSara Sharon 	 * 22:    Checksum enabled
232ab2e696bSSara Sharon 	 * 21-16: RX queue
233ab2e696bSSara Sharon 	 * 15-14: Reserved
234e705c121SKalle Valo 	 * 13-00: RX frame size
235e705c121SKalle Valo 	 */
236e705c121SKalle Valo 	__le32 len_n_flags;
237e705c121SKalle Valo 	struct iwl_cmd_header hdr;
238e705c121SKalle Valo 	u8 data[];
239e705c121SKalle Valo } __packed;
240e705c121SKalle Valo 
241e705c121SKalle Valo static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt)
242e705c121SKalle Valo {
243e705c121SKalle Valo 	return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
244e705c121SKalle Valo }
245e705c121SKalle Valo 
246e705c121SKalle Valo static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt)
247e705c121SKalle Valo {
248e705c121SKalle Valo 	return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr);
249e705c121SKalle Valo }
250e705c121SKalle Valo 
251e705c121SKalle Valo /**
252e705c121SKalle Valo  * enum CMD_MODE - how to send the host commands ?
253e705c121SKalle Valo  *
254e705c121SKalle Valo  * @CMD_ASYNC: Return right away and don't wait for the response
255e705c121SKalle Valo  * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of
256e705c121SKalle Valo  *	the response. The caller needs to call iwl_free_resp when done.
257e705c121SKalle Valo  * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the
258e705c121SKalle Valo  *	command queue, but after other high priority commands. Valid only
259e705c121SKalle Valo  *	with CMD_ASYNC.
260e705c121SKalle Valo  * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle.
261e705c121SKalle Valo  * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle.
262e705c121SKalle Valo  * @CMD_WAKE_UP_TRANS: The command response should wake up the trans
263e705c121SKalle Valo  *	(i.e. mark it as non-idle).
264dcbb4746SEmmanuel Grumbach  * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be
265dcbb4746SEmmanuel Grumbach  *	called after this command completes. Valid only with CMD_ASYNC.
266e705c121SKalle Valo  */
267e705c121SKalle Valo enum CMD_MODE {
268e705c121SKalle Valo 	CMD_ASYNC		= BIT(0),
269e705c121SKalle Valo 	CMD_WANT_SKB		= BIT(1),
270e705c121SKalle Valo 	CMD_SEND_IN_RFKILL	= BIT(2),
271e705c121SKalle Valo 	CMD_HIGH_PRIO		= BIT(3),
272e705c121SKalle Valo 	CMD_SEND_IN_IDLE	= BIT(4),
273e705c121SKalle Valo 	CMD_MAKE_TRANS_IDLE	= BIT(5),
274e705c121SKalle Valo 	CMD_WAKE_UP_TRANS	= BIT(6),
275dcbb4746SEmmanuel Grumbach 	CMD_WANT_ASYNC_CALLBACK	= BIT(7),
276e705c121SKalle Valo };
277e705c121SKalle Valo 
278e705c121SKalle Valo #define DEF_CMD_PAYLOAD_SIZE 320
279e705c121SKalle Valo 
280e705c121SKalle Valo /**
281e705c121SKalle Valo  * struct iwl_device_cmd
282e705c121SKalle Valo  *
283e705c121SKalle Valo  * For allocation of the command and tx queues, this establishes the overall
284e705c121SKalle Valo  * size of the largest command we send to uCode, except for commands that
285e705c121SKalle Valo  * aren't fully copied and use other TFD space.
286e705c121SKalle Valo  */
287e705c121SKalle Valo struct iwl_device_cmd {
288e705c121SKalle Valo 	union {
289e705c121SKalle Valo 		struct {
290e705c121SKalle Valo 			struct iwl_cmd_header hdr;	/* uCode API */
291e705c121SKalle Valo 			u8 payload[DEF_CMD_PAYLOAD_SIZE];
292e705c121SKalle Valo 		};
293e705c121SKalle Valo 		struct {
294e705c121SKalle Valo 			struct iwl_cmd_header_wide hdr_wide;
295e705c121SKalle Valo 			u8 payload_wide[DEF_CMD_PAYLOAD_SIZE -
296e705c121SKalle Valo 					sizeof(struct iwl_cmd_header_wide) +
297e705c121SKalle Valo 					sizeof(struct iwl_cmd_header)];
298e705c121SKalle Valo 		};
299e705c121SKalle Valo 	};
300e705c121SKalle Valo } __packed;
301e705c121SKalle Valo 
302e705c121SKalle Valo #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
303e705c121SKalle Valo 
304e705c121SKalle Valo /*
305e705c121SKalle Valo  * number of transfer buffers (fragments) per transmit frame descriptor;
306e705c121SKalle Valo  * this is just the driver's idea, the hardware supports 20
307e705c121SKalle Valo  */
308e705c121SKalle Valo #define IWL_MAX_CMD_TBS_PER_TFD	2
309e705c121SKalle Valo 
310e705c121SKalle Valo /**
311e705c121SKalle Valo  * struct iwl_hcmd_dataflag - flag for each one of the chunks of the command
312e705c121SKalle Valo  *
313e705c121SKalle Valo  * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's
314e705c121SKalle Valo  *	ring. The transport layer doesn't map the command's buffer to DMA, but
315e705c121SKalle Valo  *	rather copies it to a previously allocated DMA buffer. This flag tells
316e705c121SKalle Valo  *	the transport layer not to copy the command, but to map the existing
317e705c121SKalle Valo  *	buffer (that is passed in) instead. This saves the memcpy and allows
318e705c121SKalle Valo  *	commands that are bigger than the fixed buffer to be submitted.
319e705c121SKalle Valo  *	Note that a TFD entry after a NOCOPY one cannot be a normal copied one.
320e705c121SKalle Valo  * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this
321e705c121SKalle Valo  *	chunk internally and free it again after the command completes. This
322e705c121SKalle Valo  *	can (currently) be used only once per command.
323e705c121SKalle Valo  *	Note that a TFD entry after a DUP one cannot be a normal copied one.
324e705c121SKalle Valo  */
325e705c121SKalle Valo enum iwl_hcmd_dataflag {
326e705c121SKalle Valo 	IWL_HCMD_DFL_NOCOPY	= BIT(0),
327e705c121SKalle Valo 	IWL_HCMD_DFL_DUP	= BIT(1),
328e705c121SKalle Valo };
329e705c121SKalle Valo 
330e705c121SKalle Valo /**
331e705c121SKalle Valo  * struct iwl_host_cmd - Host command to the uCode
332e705c121SKalle Valo  *
333e705c121SKalle Valo  * @data: array of chunks that composes the data of the host command
334e705c121SKalle Valo  * @resp_pkt: response packet, if %CMD_WANT_SKB was set
335e705c121SKalle Valo  * @_rx_page_order: (internally used to free response packet)
336e705c121SKalle Valo  * @_rx_page_addr: (internally used to free response packet)
337e705c121SKalle Valo  * @flags: can be CMD_*
338e705c121SKalle Valo  * @len: array of the lengths of the chunks in data
339e705c121SKalle Valo  * @dataflags: IWL_HCMD_DFL_*
340e705c121SKalle Valo  * @id: command id of the host command, for wide commands encoding the
341e705c121SKalle Valo  *	version and group as well
342e705c121SKalle Valo  */
343e705c121SKalle Valo struct iwl_host_cmd {
344e705c121SKalle Valo 	const void *data[IWL_MAX_CMD_TBS_PER_TFD];
345e705c121SKalle Valo 	struct iwl_rx_packet *resp_pkt;
346e705c121SKalle Valo 	unsigned long _rx_page_addr;
347e705c121SKalle Valo 	u32 _rx_page_order;
348e705c121SKalle Valo 
349e705c121SKalle Valo 	u32 flags;
350e705c121SKalle Valo 	u32 id;
351e705c121SKalle Valo 	u16 len[IWL_MAX_CMD_TBS_PER_TFD];
352e705c121SKalle Valo 	u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD];
353e705c121SKalle Valo };
354e705c121SKalle Valo 
355e705c121SKalle Valo static inline void iwl_free_resp(struct iwl_host_cmd *cmd)
356e705c121SKalle Valo {
357e705c121SKalle Valo 	free_pages(cmd->_rx_page_addr, cmd->_rx_page_order);
358e705c121SKalle Valo }
359e705c121SKalle Valo 
360e705c121SKalle Valo struct iwl_rx_cmd_buffer {
361e705c121SKalle Valo 	struct page *_page;
362e705c121SKalle Valo 	int _offset;
363e705c121SKalle Valo 	bool _page_stolen;
364e705c121SKalle Valo 	u32 _rx_page_order;
365e705c121SKalle Valo 	unsigned int truesize;
366e705c121SKalle Valo };
367e705c121SKalle Valo 
368e705c121SKalle Valo static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r)
369e705c121SKalle Valo {
370e705c121SKalle Valo 	return (void *)((unsigned long)page_address(r->_page) + r->_offset);
371e705c121SKalle Valo }
372e705c121SKalle Valo 
373e705c121SKalle Valo static inline int rxb_offset(struct iwl_rx_cmd_buffer *r)
374e705c121SKalle Valo {
375e705c121SKalle Valo 	return r->_offset;
376e705c121SKalle Valo }
377e705c121SKalle Valo 
378e705c121SKalle Valo static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r)
379e705c121SKalle Valo {
380e705c121SKalle Valo 	r->_page_stolen = true;
381e705c121SKalle Valo 	get_page(r->_page);
382e705c121SKalle Valo 	return r->_page;
383e705c121SKalle Valo }
384e705c121SKalle Valo 
385e705c121SKalle Valo static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r)
386e705c121SKalle Valo {
387e705c121SKalle Valo 	__free_pages(r->_page, r->_rx_page_order);
388e705c121SKalle Valo }
389e705c121SKalle Valo 
390e705c121SKalle Valo #define MAX_NO_RECLAIM_CMDS	6
391e705c121SKalle Valo 
392e705c121SKalle Valo #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
393e705c121SKalle Valo 
394e705c121SKalle Valo /*
395e705c121SKalle Valo  * Maximum number of HW queues the transport layer
396e705c121SKalle Valo  * currently supports
397e705c121SKalle Valo  */
398e705c121SKalle Valo #define IWL_MAX_HW_QUEUES		32
399e705c121SKalle Valo #define IWL_MAX_TID_COUNT	8
400e705c121SKalle Valo #define IWL_FRAME_LIMIT	64
401e705c121SKalle Valo #define IWL_MAX_RX_HW_QUEUES	16
402e705c121SKalle Valo 
403e705c121SKalle Valo /**
404e705c121SKalle Valo  * enum iwl_wowlan_status - WoWLAN image/device status
405e705c121SKalle Valo  * @IWL_D3_STATUS_ALIVE: firmware is still running after resume
406e705c121SKalle Valo  * @IWL_D3_STATUS_RESET: device was reset while suspended
407e705c121SKalle Valo  */
408e705c121SKalle Valo enum iwl_d3_status {
409e705c121SKalle Valo 	IWL_D3_STATUS_ALIVE,
410e705c121SKalle Valo 	IWL_D3_STATUS_RESET,
411e705c121SKalle Valo };
412e705c121SKalle Valo 
413e705c121SKalle Valo /**
414e705c121SKalle Valo  * enum iwl_trans_status: transport status flags
415e705c121SKalle Valo  * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed
416e705c121SKalle Valo  * @STATUS_DEVICE_ENABLED: APM is enabled
417e705c121SKalle Valo  * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up)
418e705c121SKalle Valo  * @STATUS_INT_ENABLED: interrupts are enabled
419e705c121SKalle Valo  * @STATUS_RFKILL: the HW RFkill switch is in KILL position
420e705c121SKalle Valo  * @STATUS_FW_ERROR: the fw is in error state
421e705c121SKalle Valo  * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands
422e705c121SKalle Valo  *	are sent
423e705c121SKalle Valo  * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent
424e705c121SKalle Valo  * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation
425e705c121SKalle Valo  */
426e705c121SKalle Valo enum iwl_trans_status {
427e705c121SKalle Valo 	STATUS_SYNC_HCMD_ACTIVE,
428e705c121SKalle Valo 	STATUS_DEVICE_ENABLED,
429e705c121SKalle Valo 	STATUS_TPOWER_PMI,
430e705c121SKalle Valo 	STATUS_INT_ENABLED,
431e705c121SKalle Valo 	STATUS_RFKILL,
432e705c121SKalle Valo 	STATUS_FW_ERROR,
433e705c121SKalle Valo 	STATUS_TRANS_GOING_IDLE,
434e705c121SKalle Valo 	STATUS_TRANS_IDLE,
435e705c121SKalle Valo 	STATUS_TRANS_DEAD,
436e705c121SKalle Valo };
437e705c121SKalle Valo 
4386c4fbcbcSEmmanuel Grumbach static inline int
4396c4fbcbcSEmmanuel Grumbach iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size)
4406c4fbcbcSEmmanuel Grumbach {
4416c4fbcbcSEmmanuel Grumbach 	switch (rb_size) {
4426c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_4K:
4436c4fbcbcSEmmanuel Grumbach 		return get_order(4 * 1024);
4446c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_8K:
4456c4fbcbcSEmmanuel Grumbach 		return get_order(8 * 1024);
4466c4fbcbcSEmmanuel Grumbach 	case IWL_AMSDU_12K:
4476c4fbcbcSEmmanuel Grumbach 		return get_order(12 * 1024);
4486c4fbcbcSEmmanuel Grumbach 	default:
4496c4fbcbcSEmmanuel Grumbach 		WARN_ON(1);
4506c4fbcbcSEmmanuel Grumbach 		return -1;
4516c4fbcbcSEmmanuel Grumbach 	}
4526c4fbcbcSEmmanuel Grumbach }
4536c4fbcbcSEmmanuel Grumbach 
45439bdb17eSSharon Dvir struct iwl_hcmd_names {
45539bdb17eSSharon Dvir 	u8 cmd_id;
45639bdb17eSSharon Dvir 	const char *const cmd_name;
45739bdb17eSSharon Dvir };
45839bdb17eSSharon Dvir 
45939bdb17eSSharon Dvir #define HCMD_NAME(x)	\
46039bdb17eSSharon Dvir 	{ .cmd_id = x, .cmd_name = #x }
46139bdb17eSSharon Dvir 
46239bdb17eSSharon Dvir struct iwl_hcmd_arr {
46339bdb17eSSharon Dvir 	const struct iwl_hcmd_names *arr;
46439bdb17eSSharon Dvir 	int size;
46539bdb17eSSharon Dvir };
46639bdb17eSSharon Dvir 
46739bdb17eSSharon Dvir #define HCMD_ARR(x)	\
46839bdb17eSSharon Dvir 	{ .arr = x, .size = ARRAY_SIZE(x) }
46939bdb17eSSharon Dvir 
470e705c121SKalle Valo /**
471e705c121SKalle Valo  * struct iwl_trans_config - transport configuration
472e705c121SKalle Valo  *
473e705c121SKalle Valo  * @op_mode: pointer to the upper layer.
474e705c121SKalle Valo  * @cmd_queue: the index of the command queue.
475e705c121SKalle Valo  *	Must be set before start_fw.
476e705c121SKalle Valo  * @cmd_fifo: the fifo for host commands
477e705c121SKalle Valo  * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue.
478e705c121SKalle Valo  * @no_reclaim_cmds: Some devices erroneously don't set the
479e705c121SKalle Valo  *	SEQ_RX_FRAME bit on some notifications, this is the
480e705c121SKalle Valo  *	list of such notifications to filter. Max length is
481e705c121SKalle Valo  *	%MAX_NO_RECLAIM_CMDS.
482e705c121SKalle Valo  * @n_no_reclaim_cmds: # of commands in list
4836c4fbcbcSEmmanuel Grumbach  * @rx_buf_size: RX buffer size needed for A-MSDUs
484e705c121SKalle Valo  *	if unset 4k will be the RX buffer size
485e705c121SKalle Valo  * @bc_table_dword: set to true if the BC table expects the byte count to be
486e705c121SKalle Valo  *	in DWORD (as opposed to bytes)
487e705c121SKalle Valo  * @scd_set_active: should the transport configure the SCD for HCMD queue
48841837ca9SEmmanuel Grumbach  * @sw_csum_tx: transport should compute the TCP checksum
48939bdb17eSSharon Dvir  * @command_groups: array of command groups, each member is an array of the
49039bdb17eSSharon Dvir  *	commands in the group; for debugging only
49139bdb17eSSharon Dvir  * @command_groups_size: number of command groups, to avoid illegal access
492e705c121SKalle Valo  * @sdio_adma_addr: the default address to set for the ADMA in SDIO mode until
493e705c121SKalle Valo  *	we get the ALIVE from the uCode
49421cb3222SJohannes Berg  * @cb_data_offs: offset inside skb->cb to store transport data at, must have
49521cb3222SJohannes Berg  *	space for at least two pointers
496e705c121SKalle Valo  */
497e705c121SKalle Valo struct iwl_trans_config {
498e705c121SKalle Valo 	struct iwl_op_mode *op_mode;
499e705c121SKalle Valo 
500e705c121SKalle Valo 	u8 cmd_queue;
501e705c121SKalle Valo 	u8 cmd_fifo;
502e705c121SKalle Valo 	unsigned int cmd_q_wdg_timeout;
503e705c121SKalle Valo 	const u8 *no_reclaim_cmds;
504e705c121SKalle Valo 	unsigned int n_no_reclaim_cmds;
505e705c121SKalle Valo 
5066c4fbcbcSEmmanuel Grumbach 	enum iwl_amsdu_size rx_buf_size;
507e705c121SKalle Valo 	bool bc_table_dword;
508e705c121SKalle Valo 	bool scd_set_active;
50941837ca9SEmmanuel Grumbach 	bool sw_csum_tx;
51039bdb17eSSharon Dvir 	const struct iwl_hcmd_arr *command_groups;
51139bdb17eSSharon Dvir 	int command_groups_size;
512e705c121SKalle Valo 
513e705c121SKalle Valo 	u32 sdio_adma_addr;
51421cb3222SJohannes Berg 
51521cb3222SJohannes Berg 	u8 cb_data_offs;
516e705c121SKalle Valo };
517e705c121SKalle Valo 
518e705c121SKalle Valo struct iwl_trans_dump_data {
519e705c121SKalle Valo 	u32 len;
520e705c121SKalle Valo 	u8 data[];
521e705c121SKalle Valo };
522e705c121SKalle Valo 
523e705c121SKalle Valo struct iwl_trans;
524e705c121SKalle Valo 
525e705c121SKalle Valo struct iwl_trans_txq_scd_cfg {
526e705c121SKalle Valo 	u8 fifo;
5272a2e9d10SLiad Kaufman 	u8 sta_id;
528e705c121SKalle Valo 	u8 tid;
529e705c121SKalle Valo 	bool aggregate;
530e705c121SKalle Valo 	int frame_limit;
531e705c121SKalle Valo };
532e705c121SKalle Valo 
533e705c121SKalle Valo /**
534e705c121SKalle Valo  * struct iwl_trans_ops - transport specific operations
535e705c121SKalle Valo  *
536e705c121SKalle Valo  * All the handlers MUST be implemented
537e705c121SKalle Valo  *
538e705c121SKalle Valo  * @start_hw: starts the HW. If low_power is true, the NIC needs to be taken
539e705c121SKalle Valo  *	out of a low power state. From that point on, the HW can send
540e705c121SKalle Valo  *	interrupts. May sleep.
541e705c121SKalle Valo  * @op_mode_leave: Turn off the HW RF kill indication if on
542e705c121SKalle Valo  *	May sleep
543e705c121SKalle Valo  * @start_fw: allocates and inits all the resources for the transport
544e705c121SKalle Valo  *	layer. Also kick a fw image.
545e705c121SKalle Valo  *	May sleep
546e705c121SKalle Valo  * @fw_alive: called when the fw sends alive notification. If the fw provides
547e705c121SKalle Valo  *	the SCD base address in SRAM, then provide it here, or 0 otherwise.
548e705c121SKalle Valo  *	May sleep
549e705c121SKalle Valo  * @stop_device: stops the whole device (embedded CPU put to reset) and stops
550e705c121SKalle Valo  *	the HW. If low_power is true, the NIC will be put in low power state.
551e705c121SKalle Valo  *	From that point on, the HW will be stopped but will still issue an
552e705c121SKalle Valo  *	interrupt if the HW RF kill switch is triggered.
553e705c121SKalle Valo  *	This callback must do the right thing and not crash even if %start_hw()
554e705c121SKalle Valo  *	was called but not &start_fw(). May sleep.
555e705c121SKalle Valo  * @d3_suspend: put the device into the correct mode for WoWLAN during
556e705c121SKalle Valo  *	suspend. This is optional, if not implemented WoWLAN will not be
557e705c121SKalle Valo  *	supported. This callback may sleep.
558e705c121SKalle Valo  * @d3_resume: resume the device after WoWLAN, enabling the opmode to
559e705c121SKalle Valo  *	talk to the WoWLAN image to get its status. This is optional, if not
560e705c121SKalle Valo  *	implemented WoWLAN will not be supported. This callback may sleep.
561e705c121SKalle Valo  * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted.
562e705c121SKalle Valo  *	If RFkill is asserted in the middle of a SYNC host command, it must
563e705c121SKalle Valo  *	return -ERFKILL straight away.
564e705c121SKalle Valo  *	May sleep only if CMD_ASYNC is not set
5653f73b8caSEmmanuel Grumbach  * @tx: send an skb. The transport relies on the op_mode to zero the
5666eb5e529SEmmanuel Grumbach  *	the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all
5676eb5e529SEmmanuel Grumbach  *	the CSUM will be taken care of (TCP CSUM and IP header in case of
5686eb5e529SEmmanuel Grumbach  *	IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP
5696eb5e529SEmmanuel Grumbach  *	header if it is IPv4.
570e705c121SKalle Valo  *	Must be atomic
571e705c121SKalle Valo  * @reclaim: free packet until ssn. Returns a list of freed packets.
572e705c121SKalle Valo  *	Must be atomic
573e705c121SKalle Valo  * @txq_enable: setup a queue. To setup an AC queue, use the
574e705c121SKalle Valo  *	iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before
575e705c121SKalle Valo  *	this one. The op_mode must not configure the HCMD queue. The scheduler
576e705c121SKalle Valo  *	configuration may be %NULL, in which case the hardware will not be
577e705c121SKalle Valo  *	configured. May sleep.
578e705c121SKalle Valo  * @txq_disable: de-configure a Tx queue to send AMPDUs
579e705c121SKalle Valo  *	Must be atomic
58042db09c1SLiad Kaufman  * @txq_set_shared_mode: change Tx queue shared/unshared marking
581e705c121SKalle Valo  * @wait_tx_queue_empty: wait until tx queues are empty. May sleep.
582e705c121SKalle Valo  * @freeze_txq_timer: prevents the timer of the queue from firing until the
583e705c121SKalle Valo  *	queue is set to awake. Must be atomic.
5840cd58eaaSEmmanuel Grumbach  * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note
5850cd58eaaSEmmanuel Grumbach  *	that the transport needs to refcount the calls since this function
5860cd58eaaSEmmanuel Grumbach  *	will be called several times with block = true, and then the queues
5870cd58eaaSEmmanuel Grumbach  *	need to be unblocked only after the same number of calls with
5880cd58eaaSEmmanuel Grumbach  *	block = false.
589e705c121SKalle Valo  * @write8: write a u8 to a register at offset ofs from the BAR
590e705c121SKalle Valo  * @write32: write a u32 to a register at offset ofs from the BAR
591e705c121SKalle Valo  * @read32: read a u32 register at offset ofs from the BAR
592e705c121SKalle Valo  * @read_prph: read a DWORD from a periphery register
593e705c121SKalle Valo  * @write_prph: write a DWORD to a periphery register
594e705c121SKalle Valo  * @read_mem: read device's SRAM in DWORD
595e705c121SKalle Valo  * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory
596e705c121SKalle Valo  *	will be zeroed.
597e705c121SKalle Valo  * @configure: configure parameters required by the transport layer from
598e705c121SKalle Valo  *	the op_mode. May be called several times before start_fw, can't be
599e705c121SKalle Valo  *	called after that.
600e705c121SKalle Valo  * @set_pmi: set the power pmi state
601e705c121SKalle Valo  * @grab_nic_access: wake the NIC to be able to access non-HBUS regs.
602e705c121SKalle Valo  *	Sleeping is not allowed between grab_nic_access and
603e705c121SKalle Valo  *	release_nic_access.
604e705c121SKalle Valo  * @release_nic_access: let the NIC go to sleep. The "flags" parameter
605e705c121SKalle Valo  *	must be the same one that was sent before to the grab_nic_access.
606e705c121SKalle Valo  * @set_bits_mask - set SRAM register according to value and mask.
607e705c121SKalle Valo  * @ref: grab a reference to the transport/FW layers, disallowing
608e705c121SKalle Valo  *	certain low power states
609e705c121SKalle Valo  * @unref: release a reference previously taken with @ref. Note that
610e705c121SKalle Valo  *	initially the reference count is 1, making an initial @unref
611e705c121SKalle Valo  *	necessary to allow low power states.
612e705c121SKalle Valo  * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last
613e705c121SKalle Valo  *	TX'ed commands and similar. The buffer will be vfree'd by the caller.
614e705c121SKalle Valo  *	Note that the transport must fill in the proper file headers.
615e705c121SKalle Valo  */
616e705c121SKalle Valo struct iwl_trans_ops {
617e705c121SKalle Valo 
618e705c121SKalle Valo 	int (*start_hw)(struct iwl_trans *iwl_trans, bool low_power);
619e705c121SKalle Valo 	void (*op_mode_leave)(struct iwl_trans *iwl_trans);
620e705c121SKalle Valo 	int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw,
621e705c121SKalle Valo 			bool run_in_rfkill);
622e705c121SKalle Valo 	int (*update_sf)(struct iwl_trans *trans,
623e705c121SKalle Valo 			 struct iwl_sf_region *st_fwrd_space);
624e705c121SKalle Valo 	void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr);
625e705c121SKalle Valo 	void (*stop_device)(struct iwl_trans *trans, bool low_power);
626e705c121SKalle Valo 
62723ae6128SMatti Gottlieb 	void (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset);
628e705c121SKalle Valo 	int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status,
62923ae6128SMatti Gottlieb 			 bool test, bool reset);
630e705c121SKalle Valo 
631e705c121SKalle Valo 	int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
632e705c121SKalle Valo 
633e705c121SKalle Valo 	int (*tx)(struct iwl_trans *trans, struct sk_buff *skb,
634e705c121SKalle Valo 		  struct iwl_device_cmd *dev_cmd, int queue);
635e705c121SKalle Valo 	void (*reclaim)(struct iwl_trans *trans, int queue, int ssn,
636e705c121SKalle Valo 			struct sk_buff_head *skbs);
637e705c121SKalle Valo 
638e705c121SKalle Valo 	void (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn,
639e705c121SKalle Valo 			   const struct iwl_trans_txq_scd_cfg *cfg,
640e705c121SKalle Valo 			   unsigned int queue_wdg_timeout);
641e705c121SKalle Valo 	void (*txq_disable)(struct iwl_trans *trans, int queue,
642e705c121SKalle Valo 			    bool configure_scd);
643e705c121SKalle Valo 
64442db09c1SLiad Kaufman 	void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id,
64542db09c1SLiad Kaufman 				    bool shared);
64642db09c1SLiad Kaufman 
647e705c121SKalle Valo 	int (*wait_tx_queue_empty)(struct iwl_trans *trans, u32 txq_bm);
648e705c121SKalle Valo 	void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs,
649e705c121SKalle Valo 				 bool freeze);
6500cd58eaaSEmmanuel Grumbach 	void (*block_txq_ptrs)(struct iwl_trans *trans, bool block);
651e705c121SKalle Valo 
652e705c121SKalle Valo 	void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
653e705c121SKalle Valo 	void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
654e705c121SKalle Valo 	u32 (*read32)(struct iwl_trans *trans, u32 ofs);
655e705c121SKalle Valo 	u32 (*read_prph)(struct iwl_trans *trans, u32 ofs);
656e705c121SKalle Valo 	void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val);
657e705c121SKalle Valo 	int (*read_mem)(struct iwl_trans *trans, u32 addr,
658e705c121SKalle Valo 			void *buf, int dwords);
659e705c121SKalle Valo 	int (*write_mem)(struct iwl_trans *trans, u32 addr,
660e705c121SKalle Valo 			 const void *buf, int dwords);
661e705c121SKalle Valo 	void (*configure)(struct iwl_trans *trans,
662e705c121SKalle Valo 			  const struct iwl_trans_config *trans_cfg);
663e705c121SKalle Valo 	void (*set_pmi)(struct iwl_trans *trans, bool state);
66423ba9340SEmmanuel Grumbach 	bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags);
665e705c121SKalle Valo 	void (*release_nic_access)(struct iwl_trans *trans,
666e705c121SKalle Valo 				   unsigned long *flags);
667e705c121SKalle Valo 	void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask,
668e705c121SKalle Valo 			      u32 value);
669e705c121SKalle Valo 	void (*ref)(struct iwl_trans *trans);
670e705c121SKalle Valo 	void (*unref)(struct iwl_trans *trans);
671e705c121SKalle Valo 	int  (*suspend)(struct iwl_trans *trans);
672e705c121SKalle Valo 	void (*resume)(struct iwl_trans *trans);
673e705c121SKalle Valo 
674e705c121SKalle Valo 	struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans,
675a80c7a69SEmmanuel Grumbach 						 const struct iwl_fw_dbg_trigger_tlv
676e705c121SKalle Valo 						 *trigger);
677e705c121SKalle Valo };
678e705c121SKalle Valo 
679e705c121SKalle Valo /**
680e705c121SKalle Valo  * enum iwl_trans_state - state of the transport layer
681e705c121SKalle Valo  *
682e705c121SKalle Valo  * @IWL_TRANS_NO_FW: no fw has sent an alive response
683e705c121SKalle Valo  * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response
684e705c121SKalle Valo  */
685e705c121SKalle Valo enum iwl_trans_state {
686e705c121SKalle Valo 	IWL_TRANS_NO_FW = 0,
687e705c121SKalle Valo 	IWL_TRANS_FW_ALIVE	= 1,
688e705c121SKalle Valo };
689e705c121SKalle Valo 
690e705c121SKalle Valo /**
691b7282643SLuca Coelho  * DOC: Platform power management
692e705c121SKalle Valo  *
693b7282643SLuca Coelho  * There are two types of platform power management: system-wide
694b7282643SLuca Coelho  * (WoWLAN) and runtime.
695b7282643SLuca Coelho  *
696b7282643SLuca Coelho  * In system-wide power management the entire platform goes into a low
697b7282643SLuca Coelho  * power state (e.g. idle or suspend to RAM) at the same time and the
698b7282643SLuca Coelho  * device is configured as a wakeup source for the entire platform.
699b7282643SLuca Coelho  * This is usually triggered by userspace activity (e.g. the user
700b7282643SLuca Coelho  * presses the suspend button or a power management daemon decides to
701b7282643SLuca Coelho  * put the platform in low power mode).  The device's behavior in this
702b7282643SLuca Coelho  * mode is dictated by the wake-on-WLAN configuration.
703b7282643SLuca Coelho  *
704b7282643SLuca Coelho  * In runtime power management, only the devices which are themselves
705b7282643SLuca Coelho  * idle enter a low power state.  This is done at runtime, which means
706b7282643SLuca Coelho  * that the entire system is still running normally.  This mode is
707b7282643SLuca Coelho  * usually triggered automatically by the device driver and requires
708b7282643SLuca Coelho  * the ability to enter and exit the low power modes in a very short
709b7282643SLuca Coelho  * time, so there is not much impact in usability.
710b7282643SLuca Coelho  *
711b7282643SLuca Coelho  * The terms used for the device's behavior are as follows:
712b7282643SLuca Coelho  *
713b7282643SLuca Coelho  *	- D0: the device is fully powered and the host is awake;
714b7282643SLuca Coelho  *	- D3: the device is in low power mode and only reacts to
715b7282643SLuca Coelho  *		specific events (e.g. magic-packet received or scan
716b7282643SLuca Coelho  *		results found);
717b7282643SLuca Coelho  *	- D0I3: the device is in low power mode and reacts to any
718b7282643SLuca Coelho  *		activity (e.g. RX);
719b7282643SLuca Coelho  *
720b7282643SLuca Coelho  * These terms reflect the power modes in the firmware and are not to
721b7282643SLuca Coelho  * be confused with the physical device power state.  The NIC can be
722b7282643SLuca Coelho  * in D0I3 mode even if, for instance, the PCI device is in D3 state.
723e705c121SKalle Valo  */
724b7282643SLuca Coelho 
725b7282643SLuca Coelho /**
726b7282643SLuca Coelho  * enum iwl_plat_pm_mode - platform power management mode
727b7282643SLuca Coelho  *
728b7282643SLuca Coelho  * This enumeration describes the device's platform power management
729b7282643SLuca Coelho  * behavior when in idle mode (i.e. runtime power management) or when
730b7282643SLuca Coelho  * in system-wide suspend (i.e WoWLAN).
731b7282643SLuca Coelho  *
732b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this
733b7282643SLuca Coelho  *	device.  At runtime, this means that nothing happens and the
734b7282643SLuca Coelho  *	device always remains in active.  In system-wide suspend mode,
735b7282643SLuca Coelho  *	it means that the all connections will be closed automatically
736b7282643SLuca Coelho  *	by mac80211 before the platform is suspended.
737b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN).
738b7282643SLuca Coelho  *	For runtime power management, this mode is not officially
739b7282643SLuca Coelho  *	supported.
740b7282643SLuca Coelho  * @IWL_PLAT_PM_MODE_D0I3: the device goes into D0I3 mode.
741b7282643SLuca Coelho  */
742b7282643SLuca Coelho enum iwl_plat_pm_mode {
743b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_DISABLED,
744b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_D3,
745b7282643SLuca Coelho 	IWL_PLAT_PM_MODE_D0I3,
746e705c121SKalle Valo };
747e705c121SKalle Valo 
7484cbb8e50SLuciano Coelho /* Max time to wait for trans to become idle/non-idle on d0i3
7494cbb8e50SLuciano Coelho  * enter/exit (in msecs).
7504cbb8e50SLuciano Coelho  */
7514cbb8e50SLuciano Coelho #define IWL_TRANS_IDLE_TIMEOUT 2000
7524cbb8e50SLuciano Coelho 
753e705c121SKalle Valo /**
754e705c121SKalle Valo  * struct iwl_trans - transport common data
755e705c121SKalle Valo  *
756e705c121SKalle Valo  * @ops - pointer to iwl_trans_ops
757e705c121SKalle Valo  * @op_mode - pointer to the op_mode
758e705c121SKalle Valo  * @cfg - pointer to the configuration
7596f482e37SSara Sharon  * @drv - pointer to iwl_drv
760e705c121SKalle Valo  * @status: a bit-mask of transport status flags
761e705c121SKalle Valo  * @dev - pointer to struct device * that represents the device
762e705c121SKalle Valo  * @max_skb_frags: maximum number of fragments an SKB can have when transmitted.
763e705c121SKalle Valo  *	0 indicates that frag SKBs (NETIF_F_SG) aren't supported.
7641afb0ae4SHaim Dreyfuss  * @hw_rf_id a u32 with the device RF ID
765e705c121SKalle Valo  * @hw_id: a u32 with the ID of the device / sub-device.
766e705c121SKalle Valo  *	Set during transport allocation.
767e705c121SKalle Valo  * @hw_id_str: a string with info about HW ID. Set during transport allocation.
768e705c121SKalle Valo  * @pm_support: set to true in start_hw if link pm is supported
769e705c121SKalle Valo  * @ltr_enabled: set to true if the LTR is enabled
7705b88792cSSara Sharon  * @wide_cmd_header: true when ucode supports wide command header format
771e705c121SKalle Valo  * @num_rx_queues: number of RX queues allocated by the transport;
772e705c121SKalle Valo  *	the transport must set this before calling iwl_drv_start()
773e705c121SKalle Valo  * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only.
774e705c121SKalle Valo  *	The user should use iwl_trans_{alloc,free}_tx_cmd.
775e705c121SKalle Valo  * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before
776e705c121SKalle Valo  *	starting the firmware, used for tracing
777e705c121SKalle Valo  * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the
778e705c121SKalle Valo  *	start of the 802.11 header in the @rx_mpdu_cmd
779e705c121SKalle Valo  * @dflt_pwr_limit: default power limit fetched from the platform (ACPI)
780e705c121SKalle Valo  * @dbg_dest_tlv: points to the destination TLV for debug
781e705c121SKalle Valo  * @dbg_conf_tlv: array of pointers to configuration TLVs for debug
782e705c121SKalle Valo  * @dbg_trigger_tlv: array of pointers to triggers TLVs for debug
783e705c121SKalle Valo  * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
784e705c121SKalle Valo  * @paging_req_addr: The location were the FW will upload / download the pages
785e705c121SKalle Valo  *	from. The address is set by the opmode
786e705c121SKalle Valo  * @paging_db: Pointer to the opmode paging data base, the pointer is set by
787e705c121SKalle Valo  *	the opmode.
788e705c121SKalle Valo  * @paging_download_buf: Buffer used for copying all of the pages before
789e705c121SKalle Valo  *	downloading them to the FW. The buffer is allocated in the opmode
790b7282643SLuca Coelho  * @system_pm_mode: the system-wide power management mode in use.
791b7282643SLuca Coelho  *	This mode is set dynamically, depending on the WoWLAN values
792b7282643SLuca Coelho  *	configured from the userspace at runtime.
793b7282643SLuca Coelho  * @runtime_pm_mode: the runtime power management mode in use.  This
794b7282643SLuca Coelho  *	mode is set during the initialization phase and is not
795b7282643SLuca Coelho  *	supposed to change during runtime.
796e705c121SKalle Valo  */
797e705c121SKalle Valo struct iwl_trans {
798e705c121SKalle Valo 	const struct iwl_trans_ops *ops;
799e705c121SKalle Valo 	struct iwl_op_mode *op_mode;
800e705c121SKalle Valo 	const struct iwl_cfg *cfg;
8016f482e37SSara Sharon 	struct iwl_drv *drv;
802e705c121SKalle Valo 	enum iwl_trans_state state;
803e705c121SKalle Valo 	unsigned long status;
804e705c121SKalle Valo 
805e705c121SKalle Valo 	struct device *dev;
806e705c121SKalle Valo 	u32 max_skb_frags;
807e705c121SKalle Valo 	u32 hw_rev;
8081afb0ae4SHaim Dreyfuss 	u32 hw_rf_id;
809e705c121SKalle Valo 	u32 hw_id;
810e705c121SKalle Valo 	char hw_id_str[52];
811e705c121SKalle Valo 
812e705c121SKalle Valo 	u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size;
813e705c121SKalle Valo 
814e705c121SKalle Valo 	bool pm_support;
815e705c121SKalle Valo 	bool ltr_enabled;
816e705c121SKalle Valo 
81739bdb17eSSharon Dvir 	const struct iwl_hcmd_arr *command_groups;
81839bdb17eSSharon Dvir 	int command_groups_size;
8195b88792cSSara Sharon 	bool wide_cmd_header;
82039bdb17eSSharon Dvir 
821e705c121SKalle Valo 	u8 num_rx_queues;
822e705c121SKalle Valo 
823e705c121SKalle Valo 	/* The following fields are internal only */
824e705c121SKalle Valo 	struct kmem_cache *dev_cmd_pool;
825e705c121SKalle Valo 	char dev_cmd_pool_name[50];
826e705c121SKalle Valo 
827e705c121SKalle Valo 	struct dentry *dbgfs_dir;
828e705c121SKalle Valo 
829e705c121SKalle Valo #ifdef CONFIG_LOCKDEP
830e705c121SKalle Valo 	struct lockdep_map sync_cmd_lockdep_map;
831e705c121SKalle Valo #endif
832e705c121SKalle Valo 
833e705c121SKalle Valo 	u64 dflt_pwr_limit;
834e705c121SKalle Valo 
835e705c121SKalle Valo 	const struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv;
836e705c121SKalle Valo 	const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
837e705c121SKalle Valo 	struct iwl_fw_dbg_trigger_tlv * const *dbg_trigger_tlv;
838e705c121SKalle Valo 	u8 dbg_dest_reg_num;
839e705c121SKalle Valo 
840e705c121SKalle Valo 	/*
841e705c121SKalle Valo 	 * Paging parameters - All of the parameters should be set by the
842e705c121SKalle Valo 	 * opmode when paging is enabled
843e705c121SKalle Valo 	 */
844e705c121SKalle Valo 	u32 paging_req_addr;
845e705c121SKalle Valo 	struct iwl_fw_paging *paging_db;
846e705c121SKalle Valo 	void *paging_download_buf;
847e705c121SKalle Valo 
848b7282643SLuca Coelho 	enum iwl_plat_pm_mode system_pm_mode;
849b7282643SLuca Coelho 	enum iwl_plat_pm_mode runtime_pm_mode;
850863eac30SLuca Coelho 	bool suspending;
851e705c121SKalle Valo 
852e705c121SKalle Valo 	/* pointer to trans specific struct */
853e705c121SKalle Valo 	/*Ensure that this pointer will always be aligned to sizeof pointer */
854e705c121SKalle Valo 	char trans_specific[0] __aligned(sizeof(void *));
855e705c121SKalle Valo };
856e705c121SKalle Valo 
85739bdb17eSSharon Dvir const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id);
85839bdb17eSSharon Dvir int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans);
85939bdb17eSSharon Dvir 
860e705c121SKalle Valo static inline void iwl_trans_configure(struct iwl_trans *trans,
861e705c121SKalle Valo 				       const struct iwl_trans_config *trans_cfg)
862e705c121SKalle Valo {
863e705c121SKalle Valo 	trans->op_mode = trans_cfg->op_mode;
864e705c121SKalle Valo 
865e705c121SKalle Valo 	trans->ops->configure(trans, trans_cfg);
86639bdb17eSSharon Dvir 	WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg));
867e705c121SKalle Valo }
868e705c121SKalle Valo 
869e705c121SKalle Valo static inline int _iwl_trans_start_hw(struct iwl_trans *trans, bool low_power)
870e705c121SKalle Valo {
871e705c121SKalle Valo 	might_sleep();
872e705c121SKalle Valo 
873e705c121SKalle Valo 	return trans->ops->start_hw(trans, low_power);
874e705c121SKalle Valo }
875e705c121SKalle Valo 
876e705c121SKalle Valo static inline int iwl_trans_start_hw(struct iwl_trans *trans)
877e705c121SKalle Valo {
878e705c121SKalle Valo 	return trans->ops->start_hw(trans, true);
879e705c121SKalle Valo }
880e705c121SKalle Valo 
881e705c121SKalle Valo static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans)
882e705c121SKalle Valo {
883e705c121SKalle Valo 	might_sleep();
884e705c121SKalle Valo 
885e705c121SKalle Valo 	if (trans->ops->op_mode_leave)
886e705c121SKalle Valo 		trans->ops->op_mode_leave(trans);
887e705c121SKalle Valo 
888e705c121SKalle Valo 	trans->op_mode = NULL;
889e705c121SKalle Valo 
890e705c121SKalle Valo 	trans->state = IWL_TRANS_NO_FW;
891e705c121SKalle Valo }
892e705c121SKalle Valo 
893e705c121SKalle Valo static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
894e705c121SKalle Valo {
895e705c121SKalle Valo 	might_sleep();
896e705c121SKalle Valo 
897e705c121SKalle Valo 	trans->state = IWL_TRANS_FW_ALIVE;
898e705c121SKalle Valo 
899e705c121SKalle Valo 	trans->ops->fw_alive(trans, scd_addr);
900e705c121SKalle Valo }
901e705c121SKalle Valo 
902e705c121SKalle Valo static inline int iwl_trans_start_fw(struct iwl_trans *trans,
903e705c121SKalle Valo 				     const struct fw_img *fw,
904e705c121SKalle Valo 				     bool run_in_rfkill)
905e705c121SKalle Valo {
906e705c121SKalle Valo 	might_sleep();
907e705c121SKalle Valo 
908e705c121SKalle Valo 	WARN_ON_ONCE(!trans->rx_mpdu_cmd);
909e705c121SKalle Valo 
910e705c121SKalle Valo 	clear_bit(STATUS_FW_ERROR, &trans->status);
911e705c121SKalle Valo 	return trans->ops->start_fw(trans, fw, run_in_rfkill);
912e705c121SKalle Valo }
913e705c121SKalle Valo 
914e705c121SKalle Valo static inline int iwl_trans_update_sf(struct iwl_trans *trans,
915e705c121SKalle Valo 				      struct iwl_sf_region *st_fwrd_space)
916e705c121SKalle Valo {
917e705c121SKalle Valo 	might_sleep();
918e705c121SKalle Valo 
919e705c121SKalle Valo 	if (trans->ops->update_sf)
920e705c121SKalle Valo 		return trans->ops->update_sf(trans, st_fwrd_space);
921e705c121SKalle Valo 
922e705c121SKalle Valo 	return 0;
923e705c121SKalle Valo }
924e705c121SKalle Valo 
925e705c121SKalle Valo static inline void _iwl_trans_stop_device(struct iwl_trans *trans,
926e705c121SKalle Valo 					  bool low_power)
927e705c121SKalle Valo {
928e705c121SKalle Valo 	might_sleep();
929e705c121SKalle Valo 
930e705c121SKalle Valo 	trans->ops->stop_device(trans, low_power);
931e705c121SKalle Valo 
932e705c121SKalle Valo 	trans->state = IWL_TRANS_NO_FW;
933e705c121SKalle Valo }
934e705c121SKalle Valo 
935e705c121SKalle Valo static inline void iwl_trans_stop_device(struct iwl_trans *trans)
936e705c121SKalle Valo {
937e705c121SKalle Valo 	_iwl_trans_stop_device(trans, true);
938e705c121SKalle Valo }
939e705c121SKalle Valo 
94023ae6128SMatti Gottlieb static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test,
94123ae6128SMatti Gottlieb 					bool reset)
942e705c121SKalle Valo {
943e705c121SKalle Valo 	might_sleep();
944e705c121SKalle Valo 	if (trans->ops->d3_suspend)
94523ae6128SMatti Gottlieb 		trans->ops->d3_suspend(trans, test, reset);
946e705c121SKalle Valo }
947e705c121SKalle Valo 
948e705c121SKalle Valo static inline int iwl_trans_d3_resume(struct iwl_trans *trans,
949e705c121SKalle Valo 				      enum iwl_d3_status *status,
95023ae6128SMatti Gottlieb 				      bool test, bool reset)
951e705c121SKalle Valo {
952e705c121SKalle Valo 	might_sleep();
953e705c121SKalle Valo 	if (!trans->ops->d3_resume)
954e705c121SKalle Valo 		return 0;
955e705c121SKalle Valo 
95623ae6128SMatti Gottlieb 	return trans->ops->d3_resume(trans, status, test, reset);
957e705c121SKalle Valo }
958e705c121SKalle Valo 
959e705c121SKalle Valo static inline void iwl_trans_ref(struct iwl_trans *trans)
960e705c121SKalle Valo {
961e705c121SKalle Valo 	if (trans->ops->ref)
962e705c121SKalle Valo 		trans->ops->ref(trans);
963e705c121SKalle Valo }
964e705c121SKalle Valo 
965e705c121SKalle Valo static inline void iwl_trans_unref(struct iwl_trans *trans)
966e705c121SKalle Valo {
967e705c121SKalle Valo 	if (trans->ops->unref)
968e705c121SKalle Valo 		trans->ops->unref(trans);
969e705c121SKalle Valo }
970e705c121SKalle Valo 
971e705c121SKalle Valo static inline int iwl_trans_suspend(struct iwl_trans *trans)
972e705c121SKalle Valo {
973e705c121SKalle Valo 	if (!trans->ops->suspend)
974e705c121SKalle Valo 		return 0;
975e705c121SKalle Valo 
976e705c121SKalle Valo 	return trans->ops->suspend(trans);
977e705c121SKalle Valo }
978e705c121SKalle Valo 
979e705c121SKalle Valo static inline void iwl_trans_resume(struct iwl_trans *trans)
980e705c121SKalle Valo {
981e705c121SKalle Valo 	if (trans->ops->resume)
982e705c121SKalle Valo 		trans->ops->resume(trans);
983e705c121SKalle Valo }
984e705c121SKalle Valo 
985e705c121SKalle Valo static inline struct iwl_trans_dump_data *
986e705c121SKalle Valo iwl_trans_dump_data(struct iwl_trans *trans,
987a80c7a69SEmmanuel Grumbach 		    const struct iwl_fw_dbg_trigger_tlv *trigger)
988e705c121SKalle Valo {
989e705c121SKalle Valo 	if (!trans->ops->dump_data)
990e705c121SKalle Valo 		return NULL;
991e705c121SKalle Valo 	return trans->ops->dump_data(trans, trigger);
992e705c121SKalle Valo }
993e705c121SKalle Valo 
994e705c121SKalle Valo static inline struct iwl_device_cmd *
995e705c121SKalle Valo iwl_trans_alloc_tx_cmd(struct iwl_trans *trans)
996e705c121SKalle Valo {
9971ea423b0SLuca Coelho 	struct iwl_device_cmd *dev_cmd_ptr =
9981ea423b0SLuca Coelho 		kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC);
999e705c121SKalle Valo 
1000e705c121SKalle Valo 	if (unlikely(dev_cmd_ptr == NULL))
1001e705c121SKalle Valo 		return NULL;
1002e705c121SKalle Valo 
10031ea423b0SLuca Coelho 	return dev_cmd_ptr;
1004e705c121SKalle Valo }
1005e705c121SKalle Valo 
100692fe8343SEmmanuel Grumbach int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
100792fe8343SEmmanuel Grumbach 
1008e705c121SKalle Valo static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans,
1009e705c121SKalle Valo 					 struct iwl_device_cmd *dev_cmd)
1010e705c121SKalle Valo {
10111ea423b0SLuca Coelho 	kmem_cache_free(trans->dev_cmd_pool, dev_cmd);
1012e705c121SKalle Valo }
1013e705c121SKalle Valo 
1014e705c121SKalle Valo static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
1015e705c121SKalle Valo 			       struct iwl_device_cmd *dev_cmd, int queue)
1016e705c121SKalle Valo {
1017e705c121SKalle Valo 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
1018e705c121SKalle Valo 		return -EIO;
1019e705c121SKalle Valo 
1020e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1021e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1022e5d15cb5SEliad Peller 		return -EIO;
1023e5d15cb5SEliad Peller 	}
1024e705c121SKalle Valo 
1025e705c121SKalle Valo 	return trans->ops->tx(trans, skb, dev_cmd, queue);
1026e705c121SKalle Valo }
1027e705c121SKalle Valo 
1028e705c121SKalle Valo static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue,
1029e705c121SKalle Valo 				     int ssn, struct sk_buff_head *skbs)
1030e705c121SKalle Valo {
1031e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1032e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1033e5d15cb5SEliad Peller 		return;
1034e5d15cb5SEliad Peller 	}
1035e705c121SKalle Valo 
1036e705c121SKalle Valo 	trans->ops->reclaim(trans, queue, ssn, skbs);
1037e705c121SKalle Valo }
1038e705c121SKalle Valo 
1039e705c121SKalle Valo static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
1040e705c121SKalle Valo 					 bool configure_scd)
1041e705c121SKalle Valo {
1042e705c121SKalle Valo 	trans->ops->txq_disable(trans, queue, configure_scd);
1043e705c121SKalle Valo }
1044e705c121SKalle Valo 
1045e705c121SKalle Valo static inline void
1046e705c121SKalle Valo iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
1047e705c121SKalle Valo 			 const struct iwl_trans_txq_scd_cfg *cfg,
1048e705c121SKalle Valo 			 unsigned int queue_wdg_timeout)
1049e705c121SKalle Valo {
1050e705c121SKalle Valo 	might_sleep();
1051e705c121SKalle Valo 
1052e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1053e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1054e5d15cb5SEliad Peller 		return;
1055e5d15cb5SEliad Peller 	}
1056e705c121SKalle Valo 
1057e705c121SKalle Valo 	trans->ops->txq_enable(trans, queue, ssn, cfg, queue_wdg_timeout);
1058e705c121SKalle Valo }
1059e705c121SKalle Valo 
106042db09c1SLiad Kaufman static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
106142db09c1SLiad Kaufman 						 int queue, bool shared_mode)
106242db09c1SLiad Kaufman {
106342db09c1SLiad Kaufman 	if (trans->ops->txq_set_shared_mode)
106442db09c1SLiad Kaufman 		trans->ops->txq_set_shared_mode(trans, queue, shared_mode);
106542db09c1SLiad Kaufman }
106642db09c1SLiad Kaufman 
1067e705c121SKalle Valo static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue,
1068e705c121SKalle Valo 					int fifo, int sta_id, int tid,
1069e705c121SKalle Valo 					int frame_limit, u16 ssn,
1070e705c121SKalle Valo 					unsigned int queue_wdg_timeout)
1071e705c121SKalle Valo {
1072e705c121SKalle Valo 	struct iwl_trans_txq_scd_cfg cfg = {
1073e705c121SKalle Valo 		.fifo = fifo,
1074e705c121SKalle Valo 		.sta_id = sta_id,
1075e705c121SKalle Valo 		.tid = tid,
1076e705c121SKalle Valo 		.frame_limit = frame_limit,
1077e705c121SKalle Valo 		.aggregate = sta_id >= 0,
1078e705c121SKalle Valo 	};
1079e705c121SKalle Valo 
1080e705c121SKalle Valo 	iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout);
1081e705c121SKalle Valo }
1082e705c121SKalle Valo 
1083e705c121SKalle Valo static inline
1084e705c121SKalle Valo void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo,
1085e705c121SKalle Valo 			     unsigned int queue_wdg_timeout)
1086e705c121SKalle Valo {
1087e705c121SKalle Valo 	struct iwl_trans_txq_scd_cfg cfg = {
1088e705c121SKalle Valo 		.fifo = fifo,
1089e705c121SKalle Valo 		.sta_id = -1,
1090e705c121SKalle Valo 		.tid = IWL_MAX_TID_COUNT,
1091e705c121SKalle Valo 		.frame_limit = IWL_FRAME_LIMIT,
1092e705c121SKalle Valo 		.aggregate = false,
1093e705c121SKalle Valo 	};
1094e705c121SKalle Valo 
1095e705c121SKalle Valo 	iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout);
1096e705c121SKalle Valo }
1097e705c121SKalle Valo 
1098e705c121SKalle Valo static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
1099e705c121SKalle Valo 					      unsigned long txqs,
1100e705c121SKalle Valo 					      bool freeze)
1101e705c121SKalle Valo {
1102e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1103e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1104e5d15cb5SEliad Peller 		return;
1105e5d15cb5SEliad Peller 	}
1106e705c121SKalle Valo 
1107e705c121SKalle Valo 	if (trans->ops->freeze_txq_timer)
1108e705c121SKalle Valo 		trans->ops->freeze_txq_timer(trans, txqs, freeze);
1109e705c121SKalle Valo }
1110e705c121SKalle Valo 
11110cd58eaaSEmmanuel Grumbach static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans,
11120cd58eaaSEmmanuel Grumbach 					    bool block)
11130cd58eaaSEmmanuel Grumbach {
1114e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
11150cd58eaaSEmmanuel Grumbach 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1116e5d15cb5SEliad Peller 		return;
1117e5d15cb5SEliad Peller 	}
11180cd58eaaSEmmanuel Grumbach 
11190cd58eaaSEmmanuel Grumbach 	if (trans->ops->block_txq_ptrs)
11200cd58eaaSEmmanuel Grumbach 		trans->ops->block_txq_ptrs(trans, block);
11210cd58eaaSEmmanuel Grumbach }
11220cd58eaaSEmmanuel Grumbach 
1123e705c121SKalle Valo static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans,
1124e705c121SKalle Valo 						u32 txqs)
1125e705c121SKalle Valo {
1126e5d15cb5SEliad Peller 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1127e705c121SKalle Valo 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1128e5d15cb5SEliad Peller 		return -EIO;
1129e5d15cb5SEliad Peller 	}
1130e705c121SKalle Valo 
1131e705c121SKalle Valo 	return trans->ops->wait_tx_queue_empty(trans, txqs);
1132e705c121SKalle Valo }
1133e705c121SKalle Valo 
1134e705c121SKalle Valo static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
1135e705c121SKalle Valo {
1136e705c121SKalle Valo 	trans->ops->write8(trans, ofs, val);
1137e705c121SKalle Valo }
1138e705c121SKalle Valo 
1139e705c121SKalle Valo static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
1140e705c121SKalle Valo {
1141e705c121SKalle Valo 	trans->ops->write32(trans, ofs, val);
1142e705c121SKalle Valo }
1143e705c121SKalle Valo 
1144e705c121SKalle Valo static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
1145e705c121SKalle Valo {
1146e705c121SKalle Valo 	return trans->ops->read32(trans, ofs);
1147e705c121SKalle Valo }
1148e705c121SKalle Valo 
1149e705c121SKalle Valo static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
1150e705c121SKalle Valo {
1151e705c121SKalle Valo 	return trans->ops->read_prph(trans, ofs);
1152e705c121SKalle Valo }
1153e705c121SKalle Valo 
1154e705c121SKalle Valo static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs,
1155e705c121SKalle Valo 					u32 val)
1156e705c121SKalle Valo {
1157e705c121SKalle Valo 	return trans->ops->write_prph(trans, ofs, val);
1158e705c121SKalle Valo }
1159e705c121SKalle Valo 
1160e705c121SKalle Valo static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
1161e705c121SKalle Valo 				     void *buf, int dwords)
1162e705c121SKalle Valo {
1163e705c121SKalle Valo 	return trans->ops->read_mem(trans, addr, buf, dwords);
1164e705c121SKalle Valo }
1165e705c121SKalle Valo 
1166e705c121SKalle Valo #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize)		      \
1167e705c121SKalle Valo 	do {								      \
1168e705c121SKalle Valo 		if (__builtin_constant_p(bufsize))			      \
1169e705c121SKalle Valo 			BUILD_BUG_ON((bufsize) % sizeof(u32));		      \
1170e705c121SKalle Valo 		iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\
1171e705c121SKalle Valo 	} while (0)
1172e705c121SKalle Valo 
1173e705c121SKalle Valo static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr)
1174e705c121SKalle Valo {
1175e705c121SKalle Valo 	u32 value;
1176e705c121SKalle Valo 
1177e705c121SKalle Valo 	if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1)))
1178e705c121SKalle Valo 		return 0xa5a5a5a5;
1179e705c121SKalle Valo 
1180e705c121SKalle Valo 	return value;
1181e705c121SKalle Valo }
1182e705c121SKalle Valo 
1183e705c121SKalle Valo static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
1184e705c121SKalle Valo 				      const void *buf, int dwords)
1185e705c121SKalle Valo {
1186e705c121SKalle Valo 	return trans->ops->write_mem(trans, addr, buf, dwords);
1187e705c121SKalle Valo }
1188e705c121SKalle Valo 
1189e705c121SKalle Valo static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr,
1190e705c121SKalle Valo 					u32 val)
1191e705c121SKalle Valo {
1192e705c121SKalle Valo 	return iwl_trans_write_mem(trans, addr, &val, 1);
1193e705c121SKalle Valo }
1194e705c121SKalle Valo 
1195e705c121SKalle Valo static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
1196e705c121SKalle Valo {
1197e705c121SKalle Valo 	if (trans->ops->set_pmi)
1198e705c121SKalle Valo 		trans->ops->set_pmi(trans, state);
1199e705c121SKalle Valo }
1200e705c121SKalle Valo 
1201e705c121SKalle Valo static inline void
1202e705c121SKalle Valo iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
1203e705c121SKalle Valo {
1204e705c121SKalle Valo 	trans->ops->set_bits_mask(trans, reg, mask, value);
1205e705c121SKalle Valo }
1206e705c121SKalle Valo 
120723ba9340SEmmanuel Grumbach #define iwl_trans_grab_nic_access(trans, flags)	\
1208e705c121SKalle Valo 	__cond_lock(nic_access,				\
120923ba9340SEmmanuel Grumbach 		    likely((trans)->ops->grab_nic_access(trans, flags)))
1210e705c121SKalle Valo 
1211e705c121SKalle Valo static inline void __releases(nic_access)
1212e705c121SKalle Valo iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags)
1213e705c121SKalle Valo {
1214e705c121SKalle Valo 	trans->ops->release_nic_access(trans, flags);
1215e705c121SKalle Valo 	__release(nic_access);
1216e705c121SKalle Valo }
1217e705c121SKalle Valo 
1218e705c121SKalle Valo static inline void iwl_trans_fw_error(struct iwl_trans *trans)
1219e705c121SKalle Valo {
1220e705c121SKalle Valo 	if (WARN_ON_ONCE(!trans->op_mode))
1221e705c121SKalle Valo 		return;
1222e705c121SKalle Valo 
1223e705c121SKalle Valo 	/* prevent double restarts due to the same erroneous FW */
1224e705c121SKalle Valo 	if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status))
1225e705c121SKalle Valo 		iwl_op_mode_nic_error(trans->op_mode);
1226e705c121SKalle Valo }
1227e705c121SKalle Valo 
1228e705c121SKalle Valo /*****************************************************
1229e705c121SKalle Valo  * transport helper functions
1230e705c121SKalle Valo  *****************************************************/
1231e705c121SKalle Valo struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
1232e705c121SKalle Valo 				  struct device *dev,
1233e705c121SKalle Valo 				  const struct iwl_cfg *cfg,
12341ea423b0SLuca Coelho 				  const struct iwl_trans_ops *ops);
1235e705c121SKalle Valo void iwl_trans_free(struct iwl_trans *trans);
1236e705c121SKalle Valo 
1237e705c121SKalle Valo /*****************************************************
1238e705c121SKalle Valo * driver (transport) register/unregister functions
1239e705c121SKalle Valo ******************************************************/
1240e705c121SKalle Valo int __must_check iwl_pci_register_driver(void);
1241e705c121SKalle Valo void iwl_pci_unregister_driver(void);
1242e705c121SKalle Valo 
1243e705c121SKalle Valo #endif /* __iwl_trans_h__ */
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