1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of version 2 of the GNU General Public License as
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15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
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19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24  * USA
25  *
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29  * Contact Information:
30  *  Intel Linux Wireless <linuxwifi@intel.com>
31  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32  *
33  * BSD LICENSE
34  *
35  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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52  *    from this software without specific prior written permission.
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54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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65  *****************************************************************************/
66 #include <linux/types.h>
67 #include <linux/slab.h>
68 #include <linux/export.h>
69 #include <linux/etherdevice.h>
70 #include <linux/pci.h>
71 
72 #include "iwl-drv.h"
73 #include "iwl-modparams.h"
74 #include "iwl-nvm-parse.h"
75 #include "iwl-prph.h"
76 #include "iwl-io.h"
77 #include "iwl-csr.h"
78 #include "fw/acpi.h"
79 
80 /* NVM offsets (in words) definitions */
81 enum nvm_offsets {
82 	/* NVM HW-Section offset (in words) definitions */
83 	SUBSYSTEM_ID = 0x0A,
84 	HW_ADDR = 0x15,
85 
86 	/* NVM SW-Section offset (in words) definitions */
87 	NVM_SW_SECTION = 0x1C0,
88 	NVM_VERSION = 0,
89 	RADIO_CFG = 1,
90 	SKU = 2,
91 	N_HW_ADDRS = 3,
92 	NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
93 
94 	/* NVM calibration section offset (in words) definitions */
95 	NVM_CALIB_SECTION = 0x2B8,
96 	XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
97 
98 	/* NVM REGULATORY -Section offset (in words) definitions */
99 	NVM_CHANNELS_SDP = 0,
100 };
101 
102 enum ext_nvm_offsets {
103 	/* NVM HW-Section offset (in words) definitions */
104 	MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
105 
106 	/* NVM SW-Section offset (in words) definitions */
107 	NVM_VERSION_EXT_NVM = 0,
108 	RADIO_CFG_FAMILY_EXT_NVM = 0,
109 	SKU_FAMILY_8000 = 2,
110 	N_HW_ADDRS_FAMILY_8000 = 3,
111 
112 	/* NVM REGULATORY -Section offset (in words) definitions */
113 	NVM_CHANNELS_EXTENDED = 0,
114 	NVM_LAR_OFFSET_OLD = 0x4C7,
115 	NVM_LAR_OFFSET = 0x507,
116 	NVM_LAR_ENABLED = 0x7,
117 };
118 
119 /* SKU Capabilities (actual values from NVM definition) */
120 enum nvm_sku_bits {
121 	NVM_SKU_CAP_BAND_24GHZ		= BIT(0),
122 	NVM_SKU_CAP_BAND_52GHZ		= BIT(1),
123 	NVM_SKU_CAP_11N_ENABLE		= BIT(2),
124 	NVM_SKU_CAP_11AC_ENABLE		= BIT(3),
125 	NVM_SKU_CAP_MIMO_DISABLE	= BIT(5),
126 };
127 
128 /*
129  * These are the channel numbers in the order that they are stored in the NVM
130  */
131 static const u8 iwl_nvm_channels[] = {
132 	/* 2.4 GHz */
133 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
134 	/* 5 GHz */
135 	36, 40, 44 , 48, 52, 56, 60, 64,
136 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
137 	149, 153, 157, 161, 165
138 };
139 
140 static const u8 iwl_ext_nvm_channels[] = {
141 	/* 2.4 GHz */
142 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
143 	/* 5 GHz */
144 	36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
145 	96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
146 	149, 153, 157, 161, 165, 169, 173, 177, 181
147 };
148 
149 #define IWL_NUM_CHANNELS		ARRAY_SIZE(iwl_nvm_channels)
150 #define IWL_NUM_CHANNELS_EXT	ARRAY_SIZE(iwl_ext_nvm_channels)
151 #define NUM_2GHZ_CHANNELS		14
152 #define NUM_2GHZ_CHANNELS_EXT	14
153 #define FIRST_2GHZ_HT_MINUS		5
154 #define LAST_2GHZ_HT_PLUS		9
155 #define LAST_5GHZ_HT			165
156 #define LAST_5GHZ_HT_FAMILY_8000	181
157 #define N_HW_ADDR_MASK			0xF
158 
159 /* rate data (static) */
160 static struct ieee80211_rate iwl_cfg80211_rates[] = {
161 	{ .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
162 	{ .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
163 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
164 	{ .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
165 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
166 	{ .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
167 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
168 	{ .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
169 	{ .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
170 	{ .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
171 	{ .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
172 	{ .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
173 	{ .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
174 	{ .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
175 	{ .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
176 };
177 #define RATES_24_OFFS	0
178 #define N_RATES_24	ARRAY_SIZE(iwl_cfg80211_rates)
179 #define RATES_52_OFFS	4
180 #define N_RATES_52	(N_RATES_24 - RATES_52_OFFS)
181 
182 /**
183  * enum iwl_nvm_channel_flags - channel flags in NVM
184  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
185  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
186  * @NVM_CHANNEL_ACTIVE: active scanning allowed
187  * @NVM_CHANNEL_RADAR: radar detection required
188  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
189  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
190  *	on same channel on 2.4 or same UNII band on 5.2
191  * @NVM_CHANNEL_UNIFORM: uniform spreading required
192  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
193  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
194  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
195  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
196  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
197  */
198 enum iwl_nvm_channel_flags {
199 	NVM_CHANNEL_VALID		= BIT(0),
200 	NVM_CHANNEL_IBSS		= BIT(1),
201 	NVM_CHANNEL_ACTIVE		= BIT(3),
202 	NVM_CHANNEL_RADAR		= BIT(4),
203 	NVM_CHANNEL_INDOOR_ONLY		= BIT(5),
204 	NVM_CHANNEL_GO_CONCURRENT	= BIT(6),
205 	NVM_CHANNEL_UNIFORM		= BIT(7),
206 	NVM_CHANNEL_20MHZ		= BIT(8),
207 	NVM_CHANNEL_40MHZ		= BIT(9),
208 	NVM_CHANNEL_80MHZ		= BIT(10),
209 	NVM_CHANNEL_160MHZ		= BIT(11),
210 	NVM_CHANNEL_DC_HIGH		= BIT(12),
211 };
212 
213 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
214 					       int chan, u16 flags)
215 {
216 #define CHECK_AND_PRINT_I(x)	\
217 	((flags & NVM_CHANNEL_##x) ? " " #x : "")
218 
219 	if (!(flags & NVM_CHANNEL_VALID)) {
220 		IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
221 			      chan, flags);
222 		return;
223 	}
224 
225 	/* Note: already can print up to 101 characters, 110 is the limit! */
226 	IWL_DEBUG_DEV(dev, level,
227 		      "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
228 		      chan, flags,
229 		      CHECK_AND_PRINT_I(VALID),
230 		      CHECK_AND_PRINT_I(IBSS),
231 		      CHECK_AND_PRINT_I(ACTIVE),
232 		      CHECK_AND_PRINT_I(RADAR),
233 		      CHECK_AND_PRINT_I(INDOOR_ONLY),
234 		      CHECK_AND_PRINT_I(GO_CONCURRENT),
235 		      CHECK_AND_PRINT_I(UNIFORM),
236 		      CHECK_AND_PRINT_I(20MHZ),
237 		      CHECK_AND_PRINT_I(40MHZ),
238 		      CHECK_AND_PRINT_I(80MHZ),
239 		      CHECK_AND_PRINT_I(160MHZ),
240 		      CHECK_AND_PRINT_I(DC_HIGH));
241 #undef CHECK_AND_PRINT_I
242 }
243 
244 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
245 				 u16 nvm_flags, const struct iwl_cfg *cfg)
246 {
247 	u32 flags = IEEE80211_CHAN_NO_HT40;
248 	u32 last_5ghz_ht = LAST_5GHZ_HT;
249 
250 	if (cfg->nvm_type == IWL_NVM_EXT)
251 		last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
252 
253 	if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
254 		if (ch_num <= LAST_2GHZ_HT_PLUS)
255 			flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
256 		if (ch_num >= FIRST_2GHZ_HT_MINUS)
257 			flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
258 	} else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
259 		if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
260 			flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
261 		else
262 			flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
263 	}
264 	if (!(nvm_flags & NVM_CHANNEL_80MHZ))
265 		flags |= IEEE80211_CHAN_NO_80MHZ;
266 	if (!(nvm_flags & NVM_CHANNEL_160MHZ))
267 		flags |= IEEE80211_CHAN_NO_160MHZ;
268 
269 	if (!(nvm_flags & NVM_CHANNEL_IBSS))
270 		flags |= IEEE80211_CHAN_NO_IR;
271 
272 	if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
273 		flags |= IEEE80211_CHAN_NO_IR;
274 
275 	if (nvm_flags & NVM_CHANNEL_RADAR)
276 		flags |= IEEE80211_CHAN_RADAR;
277 
278 	if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
279 		flags |= IEEE80211_CHAN_INDOOR_ONLY;
280 
281 	/* Set the GO concurrent flag only in case that NO_IR is set.
282 	 * Otherwise it is meaningless
283 	 */
284 	if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
285 	    (flags & IEEE80211_CHAN_NO_IR))
286 		flags |= IEEE80211_CHAN_IR_CONCURRENT;
287 
288 	return flags;
289 }
290 
291 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
292 				struct iwl_nvm_data *data,
293 				const __le16 * const nvm_ch_flags,
294 				bool lar_supported, bool no_wide_in_5ghz)
295 {
296 	int ch_idx;
297 	int n_channels = 0;
298 	struct ieee80211_channel *channel;
299 	u16 ch_flags;
300 	int num_of_ch, num_2ghz_channels;
301 	const u8 *nvm_chan;
302 
303 	if (cfg->nvm_type != IWL_NVM_EXT) {
304 		num_of_ch = IWL_NUM_CHANNELS;
305 		nvm_chan = &iwl_nvm_channels[0];
306 		num_2ghz_channels = NUM_2GHZ_CHANNELS;
307 	} else {
308 		num_of_ch = IWL_NUM_CHANNELS_EXT;
309 		nvm_chan = &iwl_ext_nvm_channels[0];
310 		num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT;
311 	}
312 
313 	for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
314 		bool is_5ghz = (ch_idx >= num_2ghz_channels);
315 
316 		ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
317 
318 		if (is_5ghz && !data->sku_cap_band_52GHz_enable)
319 			continue;
320 
321 		/* workaround to disable wide channels in 5GHz */
322 		if (no_wide_in_5ghz && is_5ghz) {
323 			ch_flags &= ~(NVM_CHANNEL_40MHZ |
324 				     NVM_CHANNEL_80MHZ |
325 				     NVM_CHANNEL_160MHZ);
326 		}
327 
328 		if (ch_flags & NVM_CHANNEL_160MHZ)
329 			data->vht160_supported = true;
330 
331 		if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
332 			/*
333 			 * Channels might become valid later if lar is
334 			 * supported, hence we still want to add them to
335 			 * the list of supported channels to cfg80211.
336 			 */
337 			iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
338 						    nvm_chan[ch_idx], ch_flags);
339 			continue;
340 		}
341 
342 		channel = &data->channels[n_channels];
343 		n_channels++;
344 
345 		channel->hw_value = nvm_chan[ch_idx];
346 		channel->band = is_5ghz ?
347 				NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
348 		channel->center_freq =
349 			ieee80211_channel_to_frequency(
350 				channel->hw_value, channel->band);
351 
352 		/* Initialize regulatory-based run-time data */
353 
354 		/*
355 		 * Default value - highest tx power value.  max_power
356 		 * is not used in mvm, and is used for backwards compatibility
357 		 */
358 		channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
359 
360 		/* don't put limitations in case we're using LAR */
361 		if (!lar_supported)
362 			channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
363 							       ch_idx, is_5ghz,
364 							       ch_flags, cfg);
365 		else
366 			channel->flags = 0;
367 
368 		iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
369 					    channel->hw_value, ch_flags);
370 		IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
371 				 channel->hw_value, channel->max_power);
372 	}
373 
374 	return n_channels;
375 }
376 
377 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
378 				  struct iwl_nvm_data *data,
379 				  struct ieee80211_sta_vht_cap *vht_cap,
380 				  u8 tx_chains, u8 rx_chains)
381 {
382 	int num_rx_ants = num_of_ant(rx_chains);
383 	int num_tx_ants = num_of_ant(tx_chains);
384 	unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
385 					   IEEE80211_VHT_MAX_AMPDU_1024K);
386 
387 	vht_cap->vht_supported = true;
388 
389 	vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
390 		       IEEE80211_VHT_CAP_RXSTBC_1 |
391 		       IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
392 		       3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
393 		       max_ampdu_exponent <<
394 		       IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
395 
396 	if (data->vht160_supported)
397 		vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
398 				IEEE80211_VHT_CAP_SHORT_GI_160;
399 
400 	if (cfg->vht_mu_mimo_supported)
401 		vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
402 
403 	if (cfg->ht_params->ldpc)
404 		vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
405 
406 	if (data->sku_cap_mimo_disabled) {
407 		num_rx_ants = 1;
408 		num_tx_ants = 1;
409 	}
410 
411 	if (num_tx_ants > 1)
412 		vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
413 	else
414 		vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
415 
416 	switch (iwlwifi_mod_params.amsdu_size) {
417 	case IWL_AMSDU_DEF:
418 		if (cfg->mq_rx_supported)
419 			vht_cap->cap |=
420 				IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
421 		else
422 			vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
423 		break;
424 	case IWL_AMSDU_4K:
425 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
426 		break;
427 	case IWL_AMSDU_8K:
428 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
429 		break;
430 	case IWL_AMSDU_12K:
431 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
432 		break;
433 	default:
434 		break;
435 	}
436 
437 	vht_cap->vht_mcs.rx_mcs_map =
438 		cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
439 			    IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
440 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
441 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
442 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
443 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
444 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
445 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
446 
447 	if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
448 		vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
449 		/* this works because NOT_SUPPORTED == 3 */
450 		vht_cap->vht_mcs.rx_mcs_map |=
451 			cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
452 	}
453 
454 	vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
455 }
456 
457 void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
458 		     struct iwl_nvm_data *data, const __le16 *nvm_ch_flags,
459 		     u8 tx_chains, u8 rx_chains, bool lar_supported,
460 		     bool no_wide_in_5ghz)
461 {
462 	int n_channels;
463 	int n_used = 0;
464 	struct ieee80211_supported_band *sband;
465 
466 	n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
467 					  lar_supported, no_wide_in_5ghz);
468 	sband = &data->bands[NL80211_BAND_2GHZ];
469 	sband->band = NL80211_BAND_2GHZ;
470 	sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
471 	sband->n_bitrates = N_RATES_24;
472 	n_used += iwl_init_sband_channels(data, sband, n_channels,
473 					  NL80211_BAND_2GHZ);
474 	iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_2GHZ,
475 			     tx_chains, rx_chains);
476 
477 	sband = &data->bands[NL80211_BAND_5GHZ];
478 	sband->band = NL80211_BAND_5GHZ;
479 	sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
480 	sband->n_bitrates = N_RATES_52;
481 	n_used += iwl_init_sband_channels(data, sband, n_channels,
482 					  NL80211_BAND_5GHZ);
483 	iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_5GHZ,
484 			     tx_chains, rx_chains);
485 	if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
486 		iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
487 				      tx_chains, rx_chains);
488 
489 	if (n_channels != n_used)
490 		IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
491 			    n_used, n_channels);
492 }
493 IWL_EXPORT_SYMBOL(iwl_init_sbands);
494 
495 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
496 		       const __le16 *phy_sku)
497 {
498 	if (cfg->nvm_type != IWL_NVM_EXT)
499 		return le16_to_cpup(nvm_sw + SKU);
500 
501 	return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
502 }
503 
504 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
505 {
506 	if (cfg->nvm_type != IWL_NVM_EXT)
507 		return le16_to_cpup(nvm_sw + NVM_VERSION);
508 	else
509 		return le32_to_cpup((__le32 *)(nvm_sw +
510 					       NVM_VERSION_EXT_NVM));
511 }
512 
513 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
514 			     const __le16 *phy_sku)
515 {
516 	if (cfg->nvm_type != IWL_NVM_EXT)
517 		return le16_to_cpup(nvm_sw + RADIO_CFG);
518 
519 	return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
520 
521 }
522 
523 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
524 {
525 	int n_hw_addr;
526 
527 	if (cfg->nvm_type != IWL_NVM_EXT)
528 		return le16_to_cpup(nvm_sw + N_HW_ADDRS);
529 
530 	n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
531 
532 	return n_hw_addr & N_HW_ADDR_MASK;
533 }
534 
535 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
536 			      struct iwl_nvm_data *data,
537 			      u32 radio_cfg)
538 {
539 	if (cfg->nvm_type != IWL_NVM_EXT) {
540 		data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
541 		data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
542 		data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
543 		data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
544 		return;
545 	}
546 
547 	/* set the radio configuration for family 8000 */
548 	data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
549 	data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
550 	data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
551 	data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
552 	data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
553 	data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
554 }
555 
556 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
557 {
558 	const u8 *hw_addr;
559 
560 	hw_addr = (const u8 *)&mac_addr0;
561 	dest[0] = hw_addr[3];
562 	dest[1] = hw_addr[2];
563 	dest[2] = hw_addr[1];
564 	dest[3] = hw_addr[0];
565 
566 	hw_addr = (const u8 *)&mac_addr1;
567 	dest[4] = hw_addr[1];
568 	dest[5] = hw_addr[0];
569 }
570 
571 void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
572 				 struct iwl_nvm_data *data)
573 {
574 	__le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
575 	__le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
576 
577 	iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
578 	/*
579 	 * If the OEM fused a valid address, use it instead of the one in the
580 	 * OTP
581 	 */
582 	if (is_valid_ether_addr(data->hw_addr))
583 		return;
584 
585 	mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
586 	mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
587 
588 	iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
589 }
590 IWL_EXPORT_SYMBOL(iwl_set_hw_address_from_csr);
591 
592 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
593 					   const struct iwl_cfg *cfg,
594 					   struct iwl_nvm_data *data,
595 					   const __le16 *mac_override,
596 					   const __be16 *nvm_hw)
597 {
598 	const u8 *hw_addr;
599 
600 	if (mac_override) {
601 		static const u8 reserved_mac[] = {
602 			0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
603 		};
604 
605 		hw_addr = (const u8 *)(mac_override +
606 				 MAC_ADDRESS_OVERRIDE_EXT_NVM);
607 
608 		/*
609 		 * Store the MAC address from MAO section.
610 		 * No byte swapping is required in MAO section
611 		 */
612 		memcpy(data->hw_addr, hw_addr, ETH_ALEN);
613 
614 		/*
615 		 * Force the use of the OTP MAC address in case of reserved MAC
616 		 * address in the NVM, or if address is given but invalid.
617 		 */
618 		if (is_valid_ether_addr(data->hw_addr) &&
619 		    memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
620 			return;
621 
622 		IWL_ERR(trans,
623 			"mac address from nvm override section is not valid\n");
624 	}
625 
626 	if (nvm_hw) {
627 		/* read the mac address from WFMP registers */
628 		__le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
629 						WFMP_MAC_ADDR_0));
630 		__le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
631 						WFMP_MAC_ADDR_1));
632 
633 		iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
634 
635 		return;
636 	}
637 
638 	IWL_ERR(trans, "mac address is not found\n");
639 }
640 
641 static int iwl_set_hw_address(struct iwl_trans *trans,
642 			      const struct iwl_cfg *cfg,
643 			      struct iwl_nvm_data *data, const __be16 *nvm_hw,
644 			      const __le16 *mac_override)
645 {
646 	if (cfg->mac_addr_from_csr) {
647 		iwl_set_hw_address_from_csr(trans, data);
648 	} else if (cfg->nvm_type != IWL_NVM_EXT) {
649 		const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
650 
651 		/* The byte order is little endian 16 bit, meaning 214365 */
652 		data->hw_addr[0] = hw_addr[1];
653 		data->hw_addr[1] = hw_addr[0];
654 		data->hw_addr[2] = hw_addr[3];
655 		data->hw_addr[3] = hw_addr[2];
656 		data->hw_addr[4] = hw_addr[5];
657 		data->hw_addr[5] = hw_addr[4];
658 	} else {
659 		iwl_set_hw_address_family_8000(trans, cfg, data,
660 					       mac_override, nvm_hw);
661 	}
662 
663 	if (!is_valid_ether_addr(data->hw_addr)) {
664 		IWL_ERR(trans, "no valid mac address was found\n");
665 		return -EINVAL;
666 	}
667 
668 	IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
669 
670 	return 0;
671 }
672 
673 static bool
674 iwl_nvm_no_wide_in_5ghz(struct device *dev, const struct iwl_cfg *cfg,
675 			const __be16 *nvm_hw)
676 {
677 	/*
678 	 * Workaround a bug in Indonesia SKUs where the regulatory in
679 	 * some 7000-family OTPs erroneously allow wide channels in
680 	 * 5GHz.  To check for Indonesia, we take the SKU value from
681 	 * bits 1-4 in the subsystem ID and check if it is either 5 or
682 	 * 9.  In those cases, we need to force-disable wide channels
683 	 * in 5GHz otherwise the FW will throw a sysassert when we try
684 	 * to use them.
685 	 */
686 	if (cfg->device_family == IWL_DEVICE_FAMILY_7000) {
687 		/*
688 		 * Unlike the other sections in the NVM, the hw
689 		 * section uses big-endian.
690 		 */
691 		u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
692 		u8 sku = (subsystem_id & 0x1e) >> 1;
693 
694 		if (sku == 5 || sku == 9) {
695 			IWL_DEBUG_EEPROM(dev,
696 					 "disabling wide channels in 5GHz (0x%0x %d)\n",
697 					 subsystem_id, sku);
698 			return true;
699 		}
700 	}
701 
702 	return false;
703 }
704 
705 struct iwl_nvm_data *
706 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
707 		   const __be16 *nvm_hw, const __le16 *nvm_sw,
708 		   const __le16 *nvm_calib, const __le16 *regulatory,
709 		   const __le16 *mac_override, const __le16 *phy_sku,
710 		   u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
711 {
712 	struct device *dev = trans->dev;
713 	struct iwl_nvm_data *data;
714 	bool lar_enabled;
715 	bool no_wide_in_5ghz = iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw);
716 	u32 sku, radio_cfg;
717 	u16 lar_config;
718 	const __le16 *ch_section;
719 
720 	if (cfg->nvm_type != IWL_NVM_EXT)
721 		data = kzalloc(sizeof(*data) +
722 			       sizeof(struct ieee80211_channel) *
723 			       IWL_NUM_CHANNELS,
724 			       GFP_KERNEL);
725 	else
726 		data = kzalloc(sizeof(*data) +
727 			       sizeof(struct ieee80211_channel) *
728 			       IWL_NUM_CHANNELS_EXT,
729 			       GFP_KERNEL);
730 	if (!data)
731 		return NULL;
732 
733 	data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
734 
735 	radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
736 	iwl_set_radio_cfg(cfg, data, radio_cfg);
737 	if (data->valid_tx_ant)
738 		tx_chains &= data->valid_tx_ant;
739 	if (data->valid_rx_ant)
740 		rx_chains &= data->valid_rx_ant;
741 
742 	sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
743 	data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
744 	data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
745 	data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
746 	if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
747 		data->sku_cap_11n_enable = false;
748 	data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
749 				    (sku & NVM_SKU_CAP_11AC_ENABLE);
750 	data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
751 
752 	data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
753 
754 	if (cfg->nvm_type != IWL_NVM_EXT) {
755 		/* Checking for required sections */
756 		if (!nvm_calib) {
757 			IWL_ERR(trans,
758 				"Can't parse empty Calib NVM sections\n");
759 			kfree(data);
760 			return NULL;
761 		}
762 
763 		ch_section = cfg->nvm_type == IWL_NVM_SDP ?
764 			     &regulatory[NVM_CHANNELS_SDP] :
765 			     &nvm_sw[NVM_CHANNELS];
766 
767 		/* in family 8000 Xtal calibration values moved to OTP */
768 		data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
769 		data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
770 		lar_enabled = true;
771 	} else {
772 		u16 lar_offset = data->nvm_version < 0xE39 ?
773 				 NVM_LAR_OFFSET_OLD :
774 				 NVM_LAR_OFFSET;
775 
776 		lar_config = le16_to_cpup(regulatory + lar_offset);
777 		data->lar_enabled = !!(lar_config &
778 				       NVM_LAR_ENABLED);
779 		lar_enabled = data->lar_enabled;
780 		ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
781 	}
782 
783 	/* If no valid mac address was found - bail out */
784 	if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
785 		kfree(data);
786 		return NULL;
787 	}
788 
789 	iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
790 			lar_fw_supported && lar_enabled, no_wide_in_5ghz);
791 	data->calib_version = 255;
792 
793 	return data;
794 }
795 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
796 
797 static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
798 				       int ch_idx, u16 nvm_flags,
799 				       const struct iwl_cfg *cfg)
800 {
801 	u32 flags = NL80211_RRF_NO_HT40;
802 	u32 last_5ghz_ht = LAST_5GHZ_HT;
803 
804 	if (cfg->nvm_type == IWL_NVM_EXT)
805 		last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
806 
807 	if (ch_idx < NUM_2GHZ_CHANNELS &&
808 	    (nvm_flags & NVM_CHANNEL_40MHZ)) {
809 		if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
810 			flags &= ~NL80211_RRF_NO_HT40PLUS;
811 		if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
812 			flags &= ~NL80211_RRF_NO_HT40MINUS;
813 	} else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
814 		   (nvm_flags & NVM_CHANNEL_40MHZ)) {
815 		if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
816 			flags &= ~NL80211_RRF_NO_HT40PLUS;
817 		else
818 			flags &= ~NL80211_RRF_NO_HT40MINUS;
819 	}
820 
821 	if (!(nvm_flags & NVM_CHANNEL_80MHZ))
822 		flags |= NL80211_RRF_NO_80MHZ;
823 	if (!(nvm_flags & NVM_CHANNEL_160MHZ))
824 		flags |= NL80211_RRF_NO_160MHZ;
825 
826 	if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
827 		flags |= NL80211_RRF_NO_IR;
828 
829 	if (nvm_flags & NVM_CHANNEL_RADAR)
830 		flags |= NL80211_RRF_DFS;
831 
832 	if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
833 		flags |= NL80211_RRF_NO_OUTDOOR;
834 
835 	/* Set the GO concurrent flag only in case that NO_IR is set.
836 	 * Otherwise it is meaningless
837 	 */
838 	if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
839 	    (flags & NL80211_RRF_NO_IR))
840 		flags |= NL80211_RRF_GO_CONCURRENT;
841 
842 	return flags;
843 }
844 
845 struct ieee80211_regdomain *
846 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
847 		       int num_of_ch, __le32 *channels, u16 fw_mcc)
848 {
849 	int ch_idx;
850 	u16 ch_flags;
851 	u32 reg_rule_flags, prev_reg_rule_flags = 0;
852 	const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
853 			     iwl_ext_nvm_channels : iwl_nvm_channels;
854 	struct ieee80211_regdomain *regd;
855 	int size_of_regd;
856 	struct ieee80211_reg_rule *rule;
857 	enum nl80211_band band;
858 	int center_freq, prev_center_freq = 0;
859 	int valid_rules = 0;
860 	bool new_rule;
861 	int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
862 			 IWL_NUM_CHANNELS_EXT : IWL_NUM_CHANNELS;
863 
864 	if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
865 		return ERR_PTR(-EINVAL);
866 
867 	if (WARN_ON(num_of_ch > max_num_ch))
868 		num_of_ch = max_num_ch;
869 
870 	IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
871 		      num_of_ch);
872 
873 	/* build a regdomain rule for every valid channel */
874 	size_of_regd =
875 		sizeof(struct ieee80211_regdomain) +
876 		num_of_ch * sizeof(struct ieee80211_reg_rule);
877 
878 	regd = kzalloc(size_of_regd, GFP_KERNEL);
879 	if (!regd)
880 		return ERR_PTR(-ENOMEM);
881 
882 	for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
883 		ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
884 		band = (ch_idx < NUM_2GHZ_CHANNELS) ?
885 		       NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
886 		center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
887 							     band);
888 		new_rule = false;
889 
890 		if (!(ch_flags & NVM_CHANNEL_VALID)) {
891 			iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
892 						    nvm_chan[ch_idx], ch_flags);
893 			continue;
894 		}
895 
896 		reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
897 							     ch_flags, cfg);
898 
899 		/* we can't continue the same rule */
900 		if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
901 		    center_freq - prev_center_freq > 20) {
902 			valid_rules++;
903 			new_rule = true;
904 		}
905 
906 		rule = &regd->reg_rules[valid_rules - 1];
907 
908 		if (new_rule)
909 			rule->freq_range.start_freq_khz =
910 						MHZ_TO_KHZ(center_freq - 10);
911 
912 		rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
913 
914 		/* this doesn't matter - not used by FW */
915 		rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
916 		rule->power_rule.max_eirp =
917 			DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
918 
919 		rule->flags = reg_rule_flags;
920 
921 		/* rely on auto-calculation to merge BW of contiguous chans */
922 		rule->flags |= NL80211_RRF_AUTO_BW;
923 		rule->freq_range.max_bandwidth_khz = 0;
924 
925 		prev_center_freq = center_freq;
926 		prev_reg_rule_flags = reg_rule_flags;
927 
928 		iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
929 					    nvm_chan[ch_idx], ch_flags);
930 	}
931 
932 	regd->n_reg_rules = valid_rules;
933 
934 	/* set alpha2 from FW. */
935 	regd->alpha2[0] = fw_mcc >> 8;
936 	regd->alpha2[1] = fw_mcc & 0xff;
937 
938 	return regd;
939 }
940 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
941