1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of version 2 of the GNU General Public License as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
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19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24  * USA
25  *
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30  *  Intel Linux Wireless <linuxwifi@intel.com>
31  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32  *
33  * BSD LICENSE
34  *
35  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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52  *    from this software without specific prior written permission.
53  *
54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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60  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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65  *****************************************************************************/
66 #include <linux/types.h>
67 #include <linux/slab.h>
68 #include <linux/export.h>
69 #include <linux/etherdevice.h>
70 #include <linux/pci.h>
71 #include <linux/acpi.h>
72 #include "iwl-drv.h"
73 #include "iwl-modparams.h"
74 #include "iwl-nvm-parse.h"
75 #include "iwl-prph.h"
76 #include "iwl-io.h"
77 #include "iwl-csr.h"
78 
79 /* NVM offsets (in words) definitions */
80 enum nvm_offsets {
81 	/* NVM HW-Section offset (in words) definitions */
82 	SUBSYSTEM_ID = 0x0A,
83 	HW_ADDR = 0x15,
84 
85 	/* NVM SW-Section offset (in words) definitions */
86 	NVM_SW_SECTION = 0x1C0,
87 	NVM_VERSION = 0,
88 	RADIO_CFG = 1,
89 	SKU = 2,
90 	N_HW_ADDRS = 3,
91 	NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
92 
93 	/* NVM calibration section offset (in words) definitions */
94 	NVM_CALIB_SECTION = 0x2B8,
95 	XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
96 
97 	/* NVM REGULATORY -Section offset (in words) definitions */
98 	NVM_CHANNELS_SDP = 0,
99 };
100 
101 enum ext_nvm_offsets {
102 	/* NVM HW-Section offset (in words) definitions */
103 	MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
104 
105 	/* NVM SW-Section offset (in words) definitions */
106 	NVM_VERSION_EXT_NVM = 0,
107 	RADIO_CFG_FAMILY_EXT_NVM = 0,
108 	SKU_FAMILY_8000 = 2,
109 	N_HW_ADDRS_FAMILY_8000 = 3,
110 
111 	/* NVM REGULATORY -Section offset (in words) definitions */
112 	NVM_CHANNELS_EXTENDED = 0,
113 	NVM_LAR_OFFSET_OLD = 0x4C7,
114 	NVM_LAR_OFFSET = 0x507,
115 	NVM_LAR_ENABLED = 0x7,
116 };
117 
118 /* SKU Capabilities (actual values from NVM definition) */
119 enum nvm_sku_bits {
120 	NVM_SKU_CAP_BAND_24GHZ		= BIT(0),
121 	NVM_SKU_CAP_BAND_52GHZ		= BIT(1),
122 	NVM_SKU_CAP_11N_ENABLE		= BIT(2),
123 	NVM_SKU_CAP_11AC_ENABLE		= BIT(3),
124 	NVM_SKU_CAP_MIMO_DISABLE	= BIT(5),
125 };
126 
127 /*
128  * These are the channel numbers in the order that they are stored in the NVM
129  */
130 static const u8 iwl_nvm_channels[] = {
131 	/* 2.4 GHz */
132 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
133 	/* 5 GHz */
134 	36, 40, 44 , 48, 52, 56, 60, 64,
135 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
136 	149, 153, 157, 161, 165
137 };
138 
139 static const u8 iwl_ext_nvm_channels[] = {
140 	/* 2.4 GHz */
141 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
142 	/* 5 GHz */
143 	36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
144 	96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
145 	149, 153, 157, 161, 165, 169, 173, 177, 181
146 };
147 
148 #define IWL_NUM_CHANNELS		ARRAY_SIZE(iwl_nvm_channels)
149 #define IWL_NUM_CHANNELS_EXT	ARRAY_SIZE(iwl_ext_nvm_channels)
150 #define NUM_2GHZ_CHANNELS		14
151 #define NUM_2GHZ_CHANNELS_EXT	14
152 #define FIRST_2GHZ_HT_MINUS		5
153 #define LAST_2GHZ_HT_PLUS		9
154 #define LAST_5GHZ_HT			165
155 #define LAST_5GHZ_HT_FAMILY_8000	181
156 #define N_HW_ADDR_MASK			0xF
157 
158 /* rate data (static) */
159 static struct ieee80211_rate iwl_cfg80211_rates[] = {
160 	{ .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
161 	{ .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
162 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
163 	{ .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
164 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
165 	{ .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
166 	  .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
167 	{ .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
168 	{ .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
169 	{ .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
170 	{ .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
171 	{ .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
172 	{ .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
173 	{ .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
174 	{ .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
175 };
176 #define RATES_24_OFFS	0
177 #define N_RATES_24	ARRAY_SIZE(iwl_cfg80211_rates)
178 #define RATES_52_OFFS	4
179 #define N_RATES_52	(N_RATES_24 - RATES_52_OFFS)
180 
181 /**
182  * enum iwl_nvm_channel_flags - channel flags in NVM
183  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
184  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
185  * @NVM_CHANNEL_ACTIVE: active scanning allowed
186  * @NVM_CHANNEL_RADAR: radar detection required
187  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
188  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
189  *	on same channel on 2.4 or same UNII band on 5.2
190  * @NVM_CHANNEL_UNIFORM: uniform spreading required
191  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
192  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
193  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
194  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
195  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
196  */
197 enum iwl_nvm_channel_flags {
198 	NVM_CHANNEL_VALID		= BIT(0),
199 	NVM_CHANNEL_IBSS		= BIT(1),
200 	NVM_CHANNEL_ACTIVE		= BIT(3),
201 	NVM_CHANNEL_RADAR		= BIT(4),
202 	NVM_CHANNEL_INDOOR_ONLY		= BIT(5),
203 	NVM_CHANNEL_GO_CONCURRENT	= BIT(6),
204 	NVM_CHANNEL_UNIFORM		= BIT(7),
205 	NVM_CHANNEL_20MHZ		= BIT(8),
206 	NVM_CHANNEL_40MHZ		= BIT(9),
207 	NVM_CHANNEL_80MHZ		= BIT(10),
208 	NVM_CHANNEL_160MHZ		= BIT(11),
209 	NVM_CHANNEL_DC_HIGH		= BIT(12),
210 };
211 
212 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
213 					       int chan, u16 flags)
214 {
215 #define CHECK_AND_PRINT_I(x)	\
216 	((flags & NVM_CHANNEL_##x) ? " " #x : "")
217 
218 	if (!(flags & NVM_CHANNEL_VALID)) {
219 		IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
220 			      chan, flags);
221 		return;
222 	}
223 
224 	/* Note: already can print up to 101 characters, 110 is the limit! */
225 	IWL_DEBUG_DEV(dev, level,
226 		      "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
227 		      chan, flags,
228 		      CHECK_AND_PRINT_I(VALID),
229 		      CHECK_AND_PRINT_I(IBSS),
230 		      CHECK_AND_PRINT_I(ACTIVE),
231 		      CHECK_AND_PRINT_I(RADAR),
232 		      CHECK_AND_PRINT_I(INDOOR_ONLY),
233 		      CHECK_AND_PRINT_I(GO_CONCURRENT),
234 		      CHECK_AND_PRINT_I(UNIFORM),
235 		      CHECK_AND_PRINT_I(20MHZ),
236 		      CHECK_AND_PRINT_I(40MHZ),
237 		      CHECK_AND_PRINT_I(80MHZ),
238 		      CHECK_AND_PRINT_I(160MHZ),
239 		      CHECK_AND_PRINT_I(DC_HIGH));
240 #undef CHECK_AND_PRINT_I
241 }
242 
243 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
244 				 u16 nvm_flags, const struct iwl_cfg *cfg)
245 {
246 	u32 flags = IEEE80211_CHAN_NO_HT40;
247 	u32 last_5ghz_ht = LAST_5GHZ_HT;
248 
249 	if (cfg->nvm_type == IWL_NVM_EXT)
250 		last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
251 
252 	if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
253 		if (ch_num <= LAST_2GHZ_HT_PLUS)
254 			flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
255 		if (ch_num >= FIRST_2GHZ_HT_MINUS)
256 			flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
257 	} else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
258 		if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
259 			flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
260 		else
261 			flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
262 	}
263 	if (!(nvm_flags & NVM_CHANNEL_80MHZ))
264 		flags |= IEEE80211_CHAN_NO_80MHZ;
265 	if (!(nvm_flags & NVM_CHANNEL_160MHZ))
266 		flags |= IEEE80211_CHAN_NO_160MHZ;
267 
268 	if (!(nvm_flags & NVM_CHANNEL_IBSS))
269 		flags |= IEEE80211_CHAN_NO_IR;
270 
271 	if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
272 		flags |= IEEE80211_CHAN_NO_IR;
273 
274 	if (nvm_flags & NVM_CHANNEL_RADAR)
275 		flags |= IEEE80211_CHAN_RADAR;
276 
277 	if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
278 		flags |= IEEE80211_CHAN_INDOOR_ONLY;
279 
280 	/* Set the GO concurrent flag only in case that NO_IR is set.
281 	 * Otherwise it is meaningless
282 	 */
283 	if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
284 	    (flags & IEEE80211_CHAN_NO_IR))
285 		flags |= IEEE80211_CHAN_IR_CONCURRENT;
286 
287 	return flags;
288 }
289 
290 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
291 				struct iwl_nvm_data *data,
292 				const __le16 * const nvm_ch_flags,
293 				bool lar_supported, bool no_wide_in_5ghz)
294 {
295 	int ch_idx;
296 	int n_channels = 0;
297 	struct ieee80211_channel *channel;
298 	u16 ch_flags;
299 	int num_of_ch, num_2ghz_channels;
300 	const u8 *nvm_chan;
301 
302 	if (cfg->nvm_type != IWL_NVM_EXT) {
303 		num_of_ch = IWL_NUM_CHANNELS;
304 		nvm_chan = &iwl_nvm_channels[0];
305 		num_2ghz_channels = NUM_2GHZ_CHANNELS;
306 	} else {
307 		num_of_ch = IWL_NUM_CHANNELS_EXT;
308 		nvm_chan = &iwl_ext_nvm_channels[0];
309 		num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT;
310 	}
311 
312 	for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
313 		bool is_5ghz = (ch_idx >= num_2ghz_channels);
314 
315 		ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
316 
317 		if (is_5ghz && !data->sku_cap_band_52GHz_enable)
318 			continue;
319 
320 		/* workaround to disable wide channels in 5GHz */
321 		if (no_wide_in_5ghz && is_5ghz) {
322 			ch_flags &= ~(NVM_CHANNEL_40MHZ |
323 				     NVM_CHANNEL_80MHZ |
324 				     NVM_CHANNEL_160MHZ);
325 		}
326 
327 		if (ch_flags & NVM_CHANNEL_160MHZ)
328 			data->vht160_supported = true;
329 
330 		if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
331 			/*
332 			 * Channels might become valid later if lar is
333 			 * supported, hence we still want to add them to
334 			 * the list of supported channels to cfg80211.
335 			 */
336 			iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
337 						    nvm_chan[ch_idx], ch_flags);
338 			continue;
339 		}
340 
341 		channel = &data->channels[n_channels];
342 		n_channels++;
343 
344 		channel->hw_value = nvm_chan[ch_idx];
345 		channel->band = is_5ghz ?
346 				NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
347 		channel->center_freq =
348 			ieee80211_channel_to_frequency(
349 				channel->hw_value, channel->band);
350 
351 		/* Initialize regulatory-based run-time data */
352 
353 		/*
354 		 * Default value - highest tx power value.  max_power
355 		 * is not used in mvm, and is used for backwards compatibility
356 		 */
357 		channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
358 
359 		/* don't put limitations in case we're using LAR */
360 		if (!lar_supported)
361 			channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
362 							       ch_idx, is_5ghz,
363 							       ch_flags, cfg);
364 		else
365 			channel->flags = 0;
366 
367 		iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
368 					    channel->hw_value, ch_flags);
369 		IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
370 				 channel->hw_value, channel->max_power);
371 	}
372 
373 	return n_channels;
374 }
375 
376 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
377 				  struct iwl_nvm_data *data,
378 				  struct ieee80211_sta_vht_cap *vht_cap,
379 				  u8 tx_chains, u8 rx_chains)
380 {
381 	int num_rx_ants = num_of_ant(rx_chains);
382 	int num_tx_ants = num_of_ant(tx_chains);
383 	unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
384 					   IEEE80211_VHT_MAX_AMPDU_1024K);
385 
386 	vht_cap->vht_supported = true;
387 
388 	vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
389 		       IEEE80211_VHT_CAP_RXSTBC_1 |
390 		       IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
391 		       3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
392 		       max_ampdu_exponent <<
393 		       IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
394 
395 	if (data->vht160_supported)
396 		vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
397 				IEEE80211_VHT_CAP_SHORT_GI_160;
398 
399 	if (cfg->vht_mu_mimo_supported)
400 		vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
401 
402 	if (cfg->ht_params->ldpc)
403 		vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
404 
405 	if (data->sku_cap_mimo_disabled) {
406 		num_rx_ants = 1;
407 		num_tx_ants = 1;
408 	}
409 
410 	if (num_tx_ants > 1)
411 		vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
412 	else
413 		vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
414 
415 	switch (iwlwifi_mod_params.amsdu_size) {
416 	case IWL_AMSDU_DEF:
417 		if (cfg->mq_rx_supported)
418 			vht_cap->cap |=
419 				IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
420 		else
421 			vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
422 		break;
423 	case IWL_AMSDU_4K:
424 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
425 		break;
426 	case IWL_AMSDU_8K:
427 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
428 		break;
429 	case IWL_AMSDU_12K:
430 		vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
431 		break;
432 	default:
433 		break;
434 	}
435 
436 	vht_cap->vht_mcs.rx_mcs_map =
437 		cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
438 			    IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
439 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
440 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
441 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
442 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
443 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
444 			    IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
445 
446 	if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
447 		vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
448 		/* this works because NOT_SUPPORTED == 3 */
449 		vht_cap->vht_mcs.rx_mcs_map |=
450 			cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
451 	}
452 
453 	vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
454 }
455 
456 void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
457 		     struct iwl_nvm_data *data, const __le16 *nvm_ch_flags,
458 		     u8 tx_chains, u8 rx_chains, bool lar_supported,
459 		     bool no_wide_in_5ghz)
460 {
461 	int n_channels;
462 	int n_used = 0;
463 	struct ieee80211_supported_band *sband;
464 
465 	n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
466 					  lar_supported, no_wide_in_5ghz);
467 	sband = &data->bands[NL80211_BAND_2GHZ];
468 	sband->band = NL80211_BAND_2GHZ;
469 	sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
470 	sband->n_bitrates = N_RATES_24;
471 	n_used += iwl_init_sband_channels(data, sband, n_channels,
472 					  NL80211_BAND_2GHZ);
473 	iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_2GHZ,
474 			     tx_chains, rx_chains);
475 
476 	sband = &data->bands[NL80211_BAND_5GHZ];
477 	sband->band = NL80211_BAND_5GHZ;
478 	sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
479 	sband->n_bitrates = N_RATES_52;
480 	n_used += iwl_init_sband_channels(data, sband, n_channels,
481 					  NL80211_BAND_5GHZ);
482 	iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_5GHZ,
483 			     tx_chains, rx_chains);
484 	if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
485 		iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
486 				      tx_chains, rx_chains);
487 
488 	if (n_channels != n_used)
489 		IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
490 			    n_used, n_channels);
491 }
492 IWL_EXPORT_SYMBOL(iwl_init_sbands);
493 
494 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
495 		       const __le16 *phy_sku)
496 {
497 	if (cfg->nvm_type != IWL_NVM_EXT)
498 		return le16_to_cpup(nvm_sw + SKU);
499 
500 	return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
501 }
502 
503 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
504 {
505 	if (cfg->nvm_type != IWL_NVM_EXT)
506 		return le16_to_cpup(nvm_sw + NVM_VERSION);
507 	else
508 		return le32_to_cpup((__le32 *)(nvm_sw +
509 					       NVM_VERSION_EXT_NVM));
510 }
511 
512 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
513 			     const __le16 *phy_sku)
514 {
515 	if (cfg->nvm_type != IWL_NVM_EXT)
516 		return le16_to_cpup(nvm_sw + RADIO_CFG);
517 
518 	return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
519 
520 }
521 
522 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
523 {
524 	int n_hw_addr;
525 
526 	if (cfg->nvm_type != IWL_NVM_EXT)
527 		return le16_to_cpup(nvm_sw + N_HW_ADDRS);
528 
529 	n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
530 
531 	return n_hw_addr & N_HW_ADDR_MASK;
532 }
533 
534 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
535 			      struct iwl_nvm_data *data,
536 			      u32 radio_cfg)
537 {
538 	if (cfg->nvm_type != IWL_NVM_EXT) {
539 		data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
540 		data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
541 		data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
542 		data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
543 		return;
544 	}
545 
546 	/* set the radio configuration for family 8000 */
547 	data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
548 	data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
549 	data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
550 	data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
551 	data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
552 	data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
553 }
554 
555 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
556 {
557 	const u8 *hw_addr;
558 
559 	hw_addr = (const u8 *)&mac_addr0;
560 	dest[0] = hw_addr[3];
561 	dest[1] = hw_addr[2];
562 	dest[2] = hw_addr[1];
563 	dest[3] = hw_addr[0];
564 
565 	hw_addr = (const u8 *)&mac_addr1;
566 	dest[4] = hw_addr[1];
567 	dest[5] = hw_addr[0];
568 }
569 
570 void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
571 				 struct iwl_nvm_data *data)
572 {
573 	__le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
574 	__le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
575 
576 	iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
577 	/*
578 	 * If the OEM fused a valid address, use it instead of the one in the
579 	 * OTP
580 	 */
581 	if (is_valid_ether_addr(data->hw_addr))
582 		return;
583 
584 	mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
585 	mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
586 
587 	iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
588 }
589 IWL_EXPORT_SYMBOL(iwl_set_hw_address_from_csr);
590 
591 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
592 					   const struct iwl_cfg *cfg,
593 					   struct iwl_nvm_data *data,
594 					   const __le16 *mac_override,
595 					   const __be16 *nvm_hw)
596 {
597 	const u8 *hw_addr;
598 
599 	if (mac_override) {
600 		static const u8 reserved_mac[] = {
601 			0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
602 		};
603 
604 		hw_addr = (const u8 *)(mac_override +
605 				 MAC_ADDRESS_OVERRIDE_EXT_NVM);
606 
607 		/*
608 		 * Store the MAC address from MAO section.
609 		 * No byte swapping is required in MAO section
610 		 */
611 		memcpy(data->hw_addr, hw_addr, ETH_ALEN);
612 
613 		/*
614 		 * Force the use of the OTP MAC address in case of reserved MAC
615 		 * address in the NVM, or if address is given but invalid.
616 		 */
617 		if (is_valid_ether_addr(data->hw_addr) &&
618 		    memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
619 			return;
620 
621 		IWL_ERR(trans,
622 			"mac address from nvm override section is not valid\n");
623 	}
624 
625 	if (nvm_hw) {
626 		/* read the mac address from WFMP registers */
627 		__le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
628 						WFMP_MAC_ADDR_0));
629 		__le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
630 						WFMP_MAC_ADDR_1));
631 
632 		iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
633 
634 		return;
635 	}
636 
637 	IWL_ERR(trans, "mac address is not found\n");
638 }
639 
640 static int iwl_set_hw_address(struct iwl_trans *trans,
641 			      const struct iwl_cfg *cfg,
642 			      struct iwl_nvm_data *data, const __be16 *nvm_hw,
643 			      const __le16 *mac_override)
644 {
645 	if (cfg->mac_addr_from_csr) {
646 		iwl_set_hw_address_from_csr(trans, data);
647 	} else if (cfg->nvm_type != IWL_NVM_EXT) {
648 		const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
649 
650 		/* The byte order is little endian 16 bit, meaning 214365 */
651 		data->hw_addr[0] = hw_addr[1];
652 		data->hw_addr[1] = hw_addr[0];
653 		data->hw_addr[2] = hw_addr[3];
654 		data->hw_addr[3] = hw_addr[2];
655 		data->hw_addr[4] = hw_addr[5];
656 		data->hw_addr[5] = hw_addr[4];
657 	} else {
658 		iwl_set_hw_address_family_8000(trans, cfg, data,
659 					       mac_override, nvm_hw);
660 	}
661 
662 	if (!is_valid_ether_addr(data->hw_addr)) {
663 		IWL_ERR(trans, "no valid mac address was found\n");
664 		return -EINVAL;
665 	}
666 
667 	IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr);
668 
669 	return 0;
670 }
671 
672 static bool
673 iwl_nvm_no_wide_in_5ghz(struct device *dev, const struct iwl_cfg *cfg,
674 			const __be16 *nvm_hw)
675 {
676 	/*
677 	 * Workaround a bug in Indonesia SKUs where the regulatory in
678 	 * some 7000-family OTPs erroneously allow wide channels in
679 	 * 5GHz.  To check for Indonesia, we take the SKU value from
680 	 * bits 1-4 in the subsystem ID and check if it is either 5 or
681 	 * 9.  In those cases, we need to force-disable wide channels
682 	 * in 5GHz otherwise the FW will throw a sysassert when we try
683 	 * to use them.
684 	 */
685 	if (cfg->device_family == IWL_DEVICE_FAMILY_7000) {
686 		/*
687 		 * Unlike the other sections in the NVM, the hw
688 		 * section uses big-endian.
689 		 */
690 		u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
691 		u8 sku = (subsystem_id & 0x1e) >> 1;
692 
693 		if (sku == 5 || sku == 9) {
694 			IWL_DEBUG_EEPROM(dev,
695 					 "disabling wide channels in 5GHz (0x%0x %d)\n",
696 					 subsystem_id, sku);
697 			return true;
698 		}
699 	}
700 
701 	return false;
702 }
703 
704 struct iwl_nvm_data *
705 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
706 		   const __be16 *nvm_hw, const __le16 *nvm_sw,
707 		   const __le16 *nvm_calib, const __le16 *regulatory,
708 		   const __le16 *mac_override, const __le16 *phy_sku,
709 		   u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
710 {
711 	struct device *dev = trans->dev;
712 	struct iwl_nvm_data *data;
713 	bool lar_enabled;
714 	bool no_wide_in_5ghz = iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw);
715 	u32 sku, radio_cfg;
716 	u16 lar_config;
717 	const __le16 *ch_section;
718 
719 	if (cfg->nvm_type != IWL_NVM_EXT)
720 		data = kzalloc(sizeof(*data) +
721 			       sizeof(struct ieee80211_channel) *
722 			       IWL_NUM_CHANNELS,
723 			       GFP_KERNEL);
724 	else
725 		data = kzalloc(sizeof(*data) +
726 			       sizeof(struct ieee80211_channel) *
727 			       IWL_NUM_CHANNELS_EXT,
728 			       GFP_KERNEL);
729 	if (!data)
730 		return NULL;
731 
732 	data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
733 
734 	radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
735 	iwl_set_radio_cfg(cfg, data, radio_cfg);
736 	if (data->valid_tx_ant)
737 		tx_chains &= data->valid_tx_ant;
738 	if (data->valid_rx_ant)
739 		rx_chains &= data->valid_rx_ant;
740 
741 	sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
742 	data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
743 	data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
744 	data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
745 	if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
746 		data->sku_cap_11n_enable = false;
747 	data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
748 				    (sku & NVM_SKU_CAP_11AC_ENABLE);
749 	data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
750 
751 	data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
752 
753 	if (cfg->nvm_type != IWL_NVM_EXT) {
754 		/* Checking for required sections */
755 		if (!nvm_calib) {
756 			IWL_ERR(trans,
757 				"Can't parse empty Calib NVM sections\n");
758 			kfree(data);
759 			return NULL;
760 		}
761 
762 		ch_section = cfg->nvm_type == IWL_NVM_SDP ?
763 			     &regulatory[NVM_CHANNELS_SDP] :
764 			     &nvm_sw[NVM_CHANNELS];
765 
766 		/* in family 8000 Xtal calibration values moved to OTP */
767 		data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
768 		data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
769 		lar_enabled = true;
770 	} else {
771 		u16 lar_offset = data->nvm_version < 0xE39 ?
772 				 NVM_LAR_OFFSET_OLD :
773 				 NVM_LAR_OFFSET;
774 
775 		lar_config = le16_to_cpup(regulatory + lar_offset);
776 		data->lar_enabled = !!(lar_config &
777 				       NVM_LAR_ENABLED);
778 		lar_enabled = data->lar_enabled;
779 		ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
780 	}
781 
782 	/* If no valid mac address was found - bail out */
783 	if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
784 		kfree(data);
785 		return NULL;
786 	}
787 
788 	iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
789 			lar_fw_supported && lar_enabled, no_wide_in_5ghz);
790 	data->calib_version = 255;
791 
792 	return data;
793 }
794 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
795 
796 static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
797 				       int ch_idx, u16 nvm_flags,
798 				       const struct iwl_cfg *cfg)
799 {
800 	u32 flags = NL80211_RRF_NO_HT40;
801 	u32 last_5ghz_ht = LAST_5GHZ_HT;
802 
803 	if (cfg->nvm_type == IWL_NVM_EXT)
804 		last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
805 
806 	if (ch_idx < NUM_2GHZ_CHANNELS &&
807 	    (nvm_flags & NVM_CHANNEL_40MHZ)) {
808 		if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
809 			flags &= ~NL80211_RRF_NO_HT40PLUS;
810 		if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
811 			flags &= ~NL80211_RRF_NO_HT40MINUS;
812 	} else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
813 		   (nvm_flags & NVM_CHANNEL_40MHZ)) {
814 		if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
815 			flags &= ~NL80211_RRF_NO_HT40PLUS;
816 		else
817 			flags &= ~NL80211_RRF_NO_HT40MINUS;
818 	}
819 
820 	if (!(nvm_flags & NVM_CHANNEL_80MHZ))
821 		flags |= NL80211_RRF_NO_80MHZ;
822 	if (!(nvm_flags & NVM_CHANNEL_160MHZ))
823 		flags |= NL80211_RRF_NO_160MHZ;
824 
825 	if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
826 		flags |= NL80211_RRF_NO_IR;
827 
828 	if (nvm_flags & NVM_CHANNEL_RADAR)
829 		flags |= NL80211_RRF_DFS;
830 
831 	if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
832 		flags |= NL80211_RRF_NO_OUTDOOR;
833 
834 	/* Set the GO concurrent flag only in case that NO_IR is set.
835 	 * Otherwise it is meaningless
836 	 */
837 	if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
838 	    (flags & NL80211_RRF_NO_IR))
839 		flags |= NL80211_RRF_GO_CONCURRENT;
840 
841 	return flags;
842 }
843 
844 struct ieee80211_regdomain *
845 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
846 		       int num_of_ch, __le32 *channels, u16 fw_mcc)
847 {
848 	int ch_idx;
849 	u16 ch_flags;
850 	u32 reg_rule_flags, prev_reg_rule_flags = 0;
851 	const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
852 			     iwl_ext_nvm_channels : iwl_nvm_channels;
853 	struct ieee80211_regdomain *regd;
854 	int size_of_regd;
855 	struct ieee80211_reg_rule *rule;
856 	enum nl80211_band band;
857 	int center_freq, prev_center_freq = 0;
858 	int valid_rules = 0;
859 	bool new_rule;
860 	int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
861 			 IWL_NUM_CHANNELS_EXT : IWL_NUM_CHANNELS;
862 
863 	if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
864 		return ERR_PTR(-EINVAL);
865 
866 	if (WARN_ON(num_of_ch > max_num_ch))
867 		num_of_ch = max_num_ch;
868 
869 	IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
870 		      num_of_ch);
871 
872 	/* build a regdomain rule for every valid channel */
873 	size_of_regd =
874 		sizeof(struct ieee80211_regdomain) +
875 		num_of_ch * sizeof(struct ieee80211_reg_rule);
876 
877 	regd = kzalloc(size_of_regd, GFP_KERNEL);
878 	if (!regd)
879 		return ERR_PTR(-ENOMEM);
880 
881 	for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
882 		ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
883 		band = (ch_idx < NUM_2GHZ_CHANNELS) ?
884 		       NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
885 		center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
886 							     band);
887 		new_rule = false;
888 
889 		if (!(ch_flags & NVM_CHANNEL_VALID)) {
890 			iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
891 						    nvm_chan[ch_idx], ch_flags);
892 			continue;
893 		}
894 
895 		reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
896 							     ch_flags, cfg);
897 
898 		/* we can't continue the same rule */
899 		if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
900 		    center_freq - prev_center_freq > 20) {
901 			valid_rules++;
902 			new_rule = true;
903 		}
904 
905 		rule = &regd->reg_rules[valid_rules - 1];
906 
907 		if (new_rule)
908 			rule->freq_range.start_freq_khz =
909 						MHZ_TO_KHZ(center_freq - 10);
910 
911 		rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
912 
913 		/* this doesn't matter - not used by FW */
914 		rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
915 		rule->power_rule.max_eirp =
916 			DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
917 
918 		rule->flags = reg_rule_flags;
919 
920 		/* rely on auto-calculation to merge BW of contiguous chans */
921 		rule->flags |= NL80211_RRF_AUTO_BW;
922 		rule->freq_range.max_bandwidth_khz = 0;
923 
924 		prev_center_freq = center_freq;
925 		prev_reg_rule_flags = reg_rule_flags;
926 
927 		iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
928 					    nvm_chan[ch_idx], ch_flags);
929 	}
930 
931 	regd->n_reg_rules = valid_rules;
932 
933 	/* set alpha2 from FW. */
934 	regd->alpha2[0] = fw_mcc >> 8;
935 	regd->alpha2[1] = fw_mcc & 0xff;
936 
937 	return regd;
938 }
939 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
940 
941 #ifdef CONFIG_ACPI
942 #define WRDD_METHOD		"WRDD"
943 #define WRDD_WIFI		(0x07)
944 #define WRDD_WIGIG		(0x10)
945 
946 static u32 iwl_wrdd_get_mcc(struct device *dev, union acpi_object *wrdd)
947 {
948 	union acpi_object *mcc_pkg, *domain_type, *mcc_value;
949 	u32 i;
950 
951 	if (wrdd->type != ACPI_TYPE_PACKAGE ||
952 	    wrdd->package.count < 2 ||
953 	    wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
954 	    wrdd->package.elements[0].integer.value != 0) {
955 		IWL_DEBUG_EEPROM(dev, "Unsupported wrdd structure\n");
956 		return 0;
957 	}
958 
959 	for (i = 1 ; i < wrdd->package.count ; ++i) {
960 		mcc_pkg = &wrdd->package.elements[i];
961 
962 		if (mcc_pkg->type != ACPI_TYPE_PACKAGE ||
963 		    mcc_pkg->package.count < 2 ||
964 		    mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
965 		    mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
966 			mcc_pkg = NULL;
967 			continue;
968 		}
969 
970 		domain_type = &mcc_pkg->package.elements[0];
971 		if (domain_type->integer.value == WRDD_WIFI)
972 			break;
973 
974 		mcc_pkg = NULL;
975 	}
976 
977 	if (mcc_pkg) {
978 		mcc_value = &mcc_pkg->package.elements[1];
979 		return mcc_value->integer.value;
980 	}
981 
982 	return 0;
983 }
984 
985 int iwl_get_bios_mcc(struct device *dev, char *mcc)
986 {
987 	acpi_handle root_handle;
988 	acpi_handle handle;
989 	struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
990 	acpi_status status;
991 	u32 mcc_val;
992 
993 	root_handle = ACPI_HANDLE(dev);
994 	if (!root_handle) {
995 		IWL_DEBUG_EEPROM(dev,
996 				 "Could not retrieve root port ACPI handle\n");
997 		return -ENOENT;
998 	}
999 
1000 	/* Get the method's handle */
1001 	status = acpi_get_handle(root_handle, (acpi_string)WRDD_METHOD,
1002 				 &handle);
1003 	if (ACPI_FAILURE(status)) {
1004 		IWL_DEBUG_EEPROM(dev, "WRD method not found\n");
1005 		return -ENOENT;
1006 	}
1007 
1008 	/* Call WRDD with no arguments */
1009 	status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
1010 	if (ACPI_FAILURE(status)) {
1011 		IWL_DEBUG_EEPROM(dev, "WRDC invocation failed (0x%x)\n",
1012 				 status);
1013 		return -ENOENT;
1014 	}
1015 
1016 	mcc_val = iwl_wrdd_get_mcc(dev, wrdd.pointer);
1017 	kfree(wrdd.pointer);
1018 	if (!mcc_val)
1019 		return -ENOENT;
1020 
1021 	mcc[0] = (mcc_val >> 8) & 0xff;
1022 	mcc[1] = mcc_val & 0xff;
1023 	mcc[2] = '\0';
1024 	return 0;
1025 }
1026 IWL_EXPORT_SYMBOL(iwl_get_bios_mcc);
1027 #endif
1028