1e705c121SKalle Valo /****************************************************************************** 2e705c121SKalle Valo * 3e705c121SKalle Valo * This file is provided under a dual BSD/GPLv2 license. When using or 4e705c121SKalle Valo * redistributing this file, you may do so under either license. 5e705c121SKalle Valo * 6e705c121SKalle Valo * GPL LICENSE SUMMARY 7e705c121SKalle Valo * 8e705c121SKalle Valo * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. 9a8cbb46fSGolan Ben Ami * Copyright(c) 2018 Intel Corporation 10e705c121SKalle Valo * 11e705c121SKalle Valo * This program is free software; you can redistribute it and/or modify 12e705c121SKalle Valo * it under the terms of version 2 of the GNU General Public License as 13e705c121SKalle Valo * published by the Free Software Foundation. 14e705c121SKalle Valo * 15e705c121SKalle Valo * This program is distributed in the hope that it will be useful, but 16e705c121SKalle Valo * WITHOUT ANY WARRANTY; without even the implied warranty of 17e705c121SKalle Valo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18e705c121SKalle Valo * General Public License for more details. 19e705c121SKalle Valo * 20e705c121SKalle Valo * The full GNU General Public License is included in this distribution 21e705c121SKalle Valo * in the file called COPYING. 22e705c121SKalle Valo * 23e705c121SKalle Valo * Contact Information: 24d01c5366SEmmanuel Grumbach * Intel Linux Wireless <linuxwifi@intel.com> 25e705c121SKalle Valo * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26e705c121SKalle Valo * 27e705c121SKalle Valo * BSD LICENSE 28e705c121SKalle Valo * 29e705c121SKalle Valo * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 30a8cbb46fSGolan Ben Ami * Copyright(c) 2018 Intel Corporation 31e705c121SKalle Valo * All rights reserved. 32e705c121SKalle Valo * 33e705c121SKalle Valo * Redistribution and use in source and binary forms, with or without 34e705c121SKalle Valo * modification, are permitted provided that the following conditions 35e705c121SKalle Valo * are met: 36e705c121SKalle Valo * 37e705c121SKalle Valo * * Redistributions of source code must retain the above copyright 38e705c121SKalle Valo * notice, this list of conditions and the following disclaimer. 39e705c121SKalle Valo * * Redistributions in binary form must reproduce the above copyright 40e705c121SKalle Valo * notice, this list of conditions and the following disclaimer in 41e705c121SKalle Valo * the documentation and/or other materials provided with the 42e705c121SKalle Valo * distribution. 43e705c121SKalle Valo * * Neither the name Intel Corporation nor the names of its 44e705c121SKalle Valo * contributors may be used to endorse or promote products derived 45e705c121SKalle Valo * from this software without specific prior written permission. 46e705c121SKalle Valo * 47e705c121SKalle Valo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 48e705c121SKalle Valo * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 49e705c121SKalle Valo * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 50e705c121SKalle Valo * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 51e705c121SKalle Valo * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 52e705c121SKalle Valo * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 53e705c121SKalle Valo * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54e705c121SKalle Valo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55e705c121SKalle Valo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56e705c121SKalle Valo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 57e705c121SKalle Valo * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58e705c121SKalle Valo *****************************************************************************/ 59e705c121SKalle Valo #include <linux/types.h> 60e705c121SKalle Valo #include <linux/slab.h> 61e705c121SKalle Valo #include <linux/export.h> 62e705c121SKalle Valo 63e705c121SKalle Valo #include "iwl-drv.h" 64e705c121SKalle Valo #include "iwl-debug.h" 65e705c121SKalle Valo #include "iwl-eeprom-read.h" 66e705c121SKalle Valo #include "iwl-io.h" 67e705c121SKalle Valo #include "iwl-prph.h" 68e705c121SKalle Valo #include "iwl-csr.h" 69e705c121SKalle Valo 70e705c121SKalle Valo /* 71e705c121SKalle Valo * EEPROM access time values: 72e705c121SKalle Valo * 73e705c121SKalle Valo * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG. 74e705c121SKalle Valo * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1). 75e705c121SKalle Valo * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. 76e705c121SKalle Valo * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. 77e705c121SKalle Valo */ 78e705c121SKalle Valo #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ 79e705c121SKalle Valo 80e705c121SKalle Valo #define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */ 81e705c121SKalle Valo #define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 82e705c121SKalle Valo 83e705c121SKalle Valo 84e705c121SKalle Valo /* 85e705c121SKalle Valo * The device's EEPROM semaphore prevents conflicts between driver and uCode 86e705c121SKalle Valo * when accessing the EEPROM; each access is a series of pulses to/from the 87e705c121SKalle Valo * EEPROM chip, not a single event, so even reads could conflict if they 88e705c121SKalle Valo * weren't arbitrated by the semaphore. 89e705c121SKalle Valo */ 90e705c121SKalle Valo 91e705c121SKalle Valo #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 92e705c121SKalle Valo #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 93e705c121SKalle Valo 94e705c121SKalle Valo static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans) 95e705c121SKalle Valo { 96e705c121SKalle Valo u16 count; 97e705c121SKalle Valo int ret; 98e705c121SKalle Valo 99e705c121SKalle Valo for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { 100e705c121SKalle Valo /* Request semaphore */ 101e705c121SKalle Valo iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, 102e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 103e705c121SKalle Valo 104e705c121SKalle Valo /* See if we got it */ 105e705c121SKalle Valo ret = iwl_poll_bit(trans, CSR_HW_IF_CONFIG_REG, 106e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 107e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 108e705c121SKalle Valo EEPROM_SEM_TIMEOUT); 109e705c121SKalle Valo if (ret >= 0) { 110e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, 111e705c121SKalle Valo "Acquired semaphore after %d tries.\n", 112e705c121SKalle Valo count+1); 113e705c121SKalle Valo return ret; 114e705c121SKalle Valo } 115e705c121SKalle Valo } 116e705c121SKalle Valo 117e705c121SKalle Valo return ret; 118e705c121SKalle Valo } 119e705c121SKalle Valo 120e705c121SKalle Valo static void iwl_eeprom_release_semaphore(struct iwl_trans *trans) 121e705c121SKalle Valo { 122e705c121SKalle Valo iwl_clear_bit(trans, CSR_HW_IF_CONFIG_REG, 123e705c121SKalle Valo CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 124e705c121SKalle Valo } 125e705c121SKalle Valo 126e705c121SKalle Valo static int iwl_eeprom_verify_signature(struct iwl_trans *trans, bool nvm_is_otp) 127e705c121SKalle Valo { 128e705c121SKalle Valo u32 gp = iwl_read32(trans, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK; 129e705c121SKalle Valo 130e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, "EEPROM signature=0x%08x\n", gp); 131e705c121SKalle Valo 132e705c121SKalle Valo switch (gp) { 133e705c121SKalle Valo case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP: 134e705c121SKalle Valo if (!nvm_is_otp) { 135e705c121SKalle Valo IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n", 136e705c121SKalle Valo gp); 137e705c121SKalle Valo return -ENOENT; 138e705c121SKalle Valo } 139e705c121SKalle Valo return 0; 140e705c121SKalle Valo case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K: 141e705c121SKalle Valo case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K: 142e705c121SKalle Valo if (nvm_is_otp) { 143e705c121SKalle Valo IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp); 144e705c121SKalle Valo return -ENOENT; 145e705c121SKalle Valo } 146e705c121SKalle Valo return 0; 147e705c121SKalle Valo case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP: 148e705c121SKalle Valo default: 149e705c121SKalle Valo IWL_ERR(trans, 150e705c121SKalle Valo "bad EEPROM/OTP signature, type=%s, EEPROM_GP=0x%08x\n", 151e705c121SKalle Valo nvm_is_otp ? "OTP" : "EEPROM", gp); 152e705c121SKalle Valo return -ENOENT; 153e705c121SKalle Valo } 154e705c121SKalle Valo } 155e705c121SKalle Valo 156e705c121SKalle Valo /****************************************************************************** 157e705c121SKalle Valo * 158e705c121SKalle Valo * OTP related functions 159e705c121SKalle Valo * 160e705c121SKalle Valo ******************************************************************************/ 161e705c121SKalle Valo 162e705c121SKalle Valo static void iwl_set_otp_access_absolute(struct iwl_trans *trans) 163e705c121SKalle Valo { 164e705c121SKalle Valo iwl_read32(trans, CSR_OTP_GP_REG); 165e705c121SKalle Valo 166e705c121SKalle Valo iwl_clear_bit(trans, CSR_OTP_GP_REG, 167e705c121SKalle Valo CSR_OTP_GP_REG_OTP_ACCESS_MODE); 168e705c121SKalle Valo } 169e705c121SKalle Valo 170e705c121SKalle Valo static int iwl_nvm_is_otp(struct iwl_trans *trans) 171e705c121SKalle Valo { 172e705c121SKalle Valo u32 otpgp; 173e705c121SKalle Valo 174e705c121SKalle Valo /* OTP only valid for CP/PP and after */ 175e705c121SKalle Valo switch (trans->hw_rev & CSR_HW_REV_TYPE_MSK) { 176e705c121SKalle Valo case CSR_HW_REV_TYPE_NONE: 177e705c121SKalle Valo IWL_ERR(trans, "Unknown hardware type\n"); 178e705c121SKalle Valo return -EIO; 179e705c121SKalle Valo case CSR_HW_REV_TYPE_5300: 180e705c121SKalle Valo case CSR_HW_REV_TYPE_5350: 181e705c121SKalle Valo case CSR_HW_REV_TYPE_5100: 182e705c121SKalle Valo case CSR_HW_REV_TYPE_5150: 183e705c121SKalle Valo return 0; 184e705c121SKalle Valo default: 185e705c121SKalle Valo otpgp = iwl_read32(trans, CSR_OTP_GP_REG); 186e705c121SKalle Valo if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT) 187e705c121SKalle Valo return 1; 188e705c121SKalle Valo return 0; 189e705c121SKalle Valo } 190e705c121SKalle Valo } 191e705c121SKalle Valo 192e705c121SKalle Valo static int iwl_init_otp_access(struct iwl_trans *trans) 193e705c121SKalle Valo { 194e705c121SKalle Valo int ret; 195e705c121SKalle Valo 196c96b5eecSJohannes Berg ret = iwl_finish_nic_init(trans); 197c96b5eecSJohannes Berg if (ret) 198c96b5eecSJohannes Berg return ret; 199e705c121SKalle Valo 200e705c121SKalle Valo iwl_set_bits_prph(trans, APMG_PS_CTRL_REG, 201e705c121SKalle Valo APMG_PS_CTRL_VAL_RESET_REQ); 202e705c121SKalle Valo udelay(5); 203e705c121SKalle Valo iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG, 204e705c121SKalle Valo APMG_PS_CTRL_VAL_RESET_REQ); 205e705c121SKalle Valo 206e705c121SKalle Valo /* 207e705c121SKalle Valo * CSR auto clock gate disable bit - 208e705c121SKalle Valo * this is only applicable for HW with OTP shadow RAM 209e705c121SKalle Valo */ 210e705c121SKalle Valo if (trans->cfg->base_params->shadow_ram_support) 211e705c121SKalle Valo iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, 212e705c121SKalle Valo CSR_RESET_LINK_PWR_MGMT_DISABLED); 213c96b5eecSJohannes Berg 214c96b5eecSJohannes Berg return 0; 215e705c121SKalle Valo } 216e705c121SKalle Valo 217e705c121SKalle Valo static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr, 218e705c121SKalle Valo __le16 *eeprom_data) 219e705c121SKalle Valo { 220e705c121SKalle Valo int ret = 0; 221e705c121SKalle Valo u32 r; 222e705c121SKalle Valo u32 otpgp; 223e705c121SKalle Valo 224e705c121SKalle Valo iwl_write32(trans, CSR_EEPROM_REG, 225e705c121SKalle Valo CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 226e705c121SKalle Valo ret = iwl_poll_bit(trans, CSR_EEPROM_REG, 227e705c121SKalle Valo CSR_EEPROM_REG_READ_VALID_MSK, 228e705c121SKalle Valo CSR_EEPROM_REG_READ_VALID_MSK, 229e705c121SKalle Valo IWL_EEPROM_ACCESS_TIMEOUT); 230e705c121SKalle Valo if (ret < 0) { 231e705c121SKalle Valo IWL_ERR(trans, "Time out reading OTP[%d]\n", addr); 232e705c121SKalle Valo return ret; 233e705c121SKalle Valo } 234e705c121SKalle Valo r = iwl_read32(trans, CSR_EEPROM_REG); 235e705c121SKalle Valo /* check for ECC errors: */ 236e705c121SKalle Valo otpgp = iwl_read32(trans, CSR_OTP_GP_REG); 237e705c121SKalle Valo if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) { 238e705c121SKalle Valo /* stop in this case */ 239e705c121SKalle Valo /* set the uncorrectable OTP ECC bit for acknowledgment */ 240e705c121SKalle Valo iwl_set_bit(trans, CSR_OTP_GP_REG, 241e705c121SKalle Valo CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); 242e705c121SKalle Valo IWL_ERR(trans, "Uncorrectable OTP ECC error, abort OTP read\n"); 243e705c121SKalle Valo return -EINVAL; 244e705c121SKalle Valo } 245e705c121SKalle Valo if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) { 246e705c121SKalle Valo /* continue in this case */ 247e705c121SKalle Valo /* set the correctable OTP ECC bit for acknowledgment */ 248e705c121SKalle Valo iwl_set_bit(trans, CSR_OTP_GP_REG, 249e705c121SKalle Valo CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK); 250e705c121SKalle Valo IWL_ERR(trans, "Correctable OTP ECC error, continue read\n"); 251e705c121SKalle Valo } 252e705c121SKalle Valo *eeprom_data = cpu_to_le16(r >> 16); 253e705c121SKalle Valo return 0; 254e705c121SKalle Valo } 255e705c121SKalle Valo 256e705c121SKalle Valo /* 257e705c121SKalle Valo * iwl_is_otp_empty: check for empty OTP 258e705c121SKalle Valo */ 259e705c121SKalle Valo static bool iwl_is_otp_empty(struct iwl_trans *trans) 260e705c121SKalle Valo { 261e705c121SKalle Valo u16 next_link_addr = 0; 262e705c121SKalle Valo __le16 link_value; 263e705c121SKalle Valo bool is_empty = false; 264e705c121SKalle Valo 265e705c121SKalle Valo /* locate the beginning of OTP link list */ 266e705c121SKalle Valo if (!iwl_read_otp_word(trans, next_link_addr, &link_value)) { 267e705c121SKalle Valo if (!link_value) { 268e705c121SKalle Valo IWL_ERR(trans, "OTP is empty\n"); 269e705c121SKalle Valo is_empty = true; 270e705c121SKalle Valo } 271e705c121SKalle Valo } else { 272e705c121SKalle Valo IWL_ERR(trans, "Unable to read first block of OTP list.\n"); 273e705c121SKalle Valo is_empty = true; 274e705c121SKalle Valo } 275e705c121SKalle Valo 276e705c121SKalle Valo return is_empty; 277e705c121SKalle Valo } 278e705c121SKalle Valo 279e705c121SKalle Valo 280e705c121SKalle Valo /* 281e705c121SKalle Valo * iwl_find_otp_image: find EEPROM image in OTP 282e705c121SKalle Valo * finding the OTP block that contains the EEPROM image. 283e705c121SKalle Valo * the last valid block on the link list (the block _before_ the last block) 284e705c121SKalle Valo * is the block we should read and used to configure the device. 285e705c121SKalle Valo * If all the available OTP blocks are full, the last block will be the block 286e705c121SKalle Valo * we should read and used to configure the device. 287e705c121SKalle Valo * only perform this operation if shadow RAM is disabled 288e705c121SKalle Valo */ 289e705c121SKalle Valo static int iwl_find_otp_image(struct iwl_trans *trans, 290e705c121SKalle Valo u16 *validblockaddr) 291e705c121SKalle Valo { 292e705c121SKalle Valo u16 next_link_addr = 0, valid_addr; 293e705c121SKalle Valo __le16 link_value = 0; 294e705c121SKalle Valo int usedblocks = 0; 295e705c121SKalle Valo 296e705c121SKalle Valo /* set addressing mode to absolute to traverse the link list */ 297e705c121SKalle Valo iwl_set_otp_access_absolute(trans); 298e705c121SKalle Valo 299e705c121SKalle Valo /* checking for empty OTP or error */ 300e705c121SKalle Valo if (iwl_is_otp_empty(trans)) 301e705c121SKalle Valo return -EINVAL; 302e705c121SKalle Valo 303e705c121SKalle Valo /* 304e705c121SKalle Valo * start traverse link list 305e705c121SKalle Valo * until reach the max number of OTP blocks 306e705c121SKalle Valo * different devices have different number of OTP blocks 307e705c121SKalle Valo */ 308e705c121SKalle Valo do { 309e705c121SKalle Valo /* save current valid block address 310e705c121SKalle Valo * check for more block on the link list 311e705c121SKalle Valo */ 312e705c121SKalle Valo valid_addr = next_link_addr; 313e705c121SKalle Valo next_link_addr = le16_to_cpu(link_value) * sizeof(u16); 314e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, "OTP blocks %d addr 0x%x\n", 315e705c121SKalle Valo usedblocks, next_link_addr); 316e705c121SKalle Valo if (iwl_read_otp_word(trans, next_link_addr, &link_value)) 317e705c121SKalle Valo return -EINVAL; 318e705c121SKalle Valo if (!link_value) { 319e705c121SKalle Valo /* 320e705c121SKalle Valo * reach the end of link list, return success and 321e705c121SKalle Valo * set address point to the starting address 322e705c121SKalle Valo * of the image 323e705c121SKalle Valo */ 324e705c121SKalle Valo *validblockaddr = valid_addr; 325e705c121SKalle Valo /* skip first 2 bytes (link list pointer) */ 326e705c121SKalle Valo *validblockaddr += 2; 327e705c121SKalle Valo return 0; 328e705c121SKalle Valo } 329e705c121SKalle Valo /* more in the link list, continue */ 330e705c121SKalle Valo usedblocks++; 331e705c121SKalle Valo } while (usedblocks <= trans->cfg->base_params->max_ll_items); 332e705c121SKalle Valo 333e705c121SKalle Valo /* OTP has no valid blocks */ 334e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, "OTP has no valid blocks\n"); 335e705c121SKalle Valo return -EINVAL; 336e705c121SKalle Valo } 337e705c121SKalle Valo 338e705c121SKalle Valo /** 339e705c121SKalle Valo * iwl_read_eeprom - read EEPROM contents 340e705c121SKalle Valo * 341e705c121SKalle Valo * Load the EEPROM contents from adapter and return it 342e705c121SKalle Valo * and its size. 343e705c121SKalle Valo * 344e705c121SKalle Valo * NOTE: This routine uses the non-debug IO access functions. 345e705c121SKalle Valo */ 346e705c121SKalle Valo int iwl_read_eeprom(struct iwl_trans *trans, u8 **eeprom, size_t *eeprom_size) 347e705c121SKalle Valo { 348e705c121SKalle Valo __le16 *e; 349e705c121SKalle Valo u32 gp = iwl_read32(trans, CSR_EEPROM_GP); 350e705c121SKalle Valo int sz; 351e705c121SKalle Valo int ret; 352e705c121SKalle Valo u16 addr; 353e705c121SKalle Valo u16 validblockaddr = 0; 354e705c121SKalle Valo u16 cache_addr = 0; 355e705c121SKalle Valo int nvm_is_otp; 356e705c121SKalle Valo 357e705c121SKalle Valo if (!eeprom || !eeprom_size) 358e705c121SKalle Valo return -EINVAL; 359e705c121SKalle Valo 360e705c121SKalle Valo nvm_is_otp = iwl_nvm_is_otp(trans); 361e705c121SKalle Valo if (nvm_is_otp < 0) 362e705c121SKalle Valo return nvm_is_otp; 363e705c121SKalle Valo 364e705c121SKalle Valo sz = trans->cfg->base_params->eeprom_size; 365e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, "NVM size = %d\n", sz); 366e705c121SKalle Valo 367e705c121SKalle Valo e = kmalloc(sz, GFP_KERNEL); 368e705c121SKalle Valo if (!e) 369e705c121SKalle Valo return -ENOMEM; 370e705c121SKalle Valo 371e705c121SKalle Valo ret = iwl_eeprom_verify_signature(trans, nvm_is_otp); 372e705c121SKalle Valo if (ret < 0) { 373e705c121SKalle Valo IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp); 374e705c121SKalle Valo goto err_free; 375e705c121SKalle Valo } 376e705c121SKalle Valo 377e705c121SKalle Valo /* Make sure driver (instead of uCode) is allowed to read EEPROM */ 378e705c121SKalle Valo ret = iwl_eeprom_acquire_semaphore(trans); 379e705c121SKalle Valo if (ret < 0) { 380e705c121SKalle Valo IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n"); 381e705c121SKalle Valo goto err_free; 382e705c121SKalle Valo } 383e705c121SKalle Valo 384e705c121SKalle Valo if (nvm_is_otp) { 385e705c121SKalle Valo ret = iwl_init_otp_access(trans); 386e705c121SKalle Valo if (ret) { 387e705c121SKalle Valo IWL_ERR(trans, "Failed to initialize OTP access.\n"); 388e705c121SKalle Valo goto err_unlock; 389e705c121SKalle Valo } 390e705c121SKalle Valo 391e705c121SKalle Valo iwl_write32(trans, CSR_EEPROM_GP, 392e705c121SKalle Valo iwl_read32(trans, CSR_EEPROM_GP) & 393e705c121SKalle Valo ~CSR_EEPROM_GP_IF_OWNER_MSK); 394e705c121SKalle Valo 395e705c121SKalle Valo iwl_set_bit(trans, CSR_OTP_GP_REG, 396e705c121SKalle Valo CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | 397e705c121SKalle Valo CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); 398e705c121SKalle Valo /* traversing the linked list if no shadow ram supported */ 399e705c121SKalle Valo if (!trans->cfg->base_params->shadow_ram_support) { 400e705c121SKalle Valo ret = iwl_find_otp_image(trans, &validblockaddr); 401e705c121SKalle Valo if (ret) 402e705c121SKalle Valo goto err_unlock; 403e705c121SKalle Valo } 404e705c121SKalle Valo for (addr = validblockaddr; addr < validblockaddr + sz; 405e705c121SKalle Valo addr += sizeof(u16)) { 406e705c121SKalle Valo __le16 eeprom_data; 407e705c121SKalle Valo 408e705c121SKalle Valo ret = iwl_read_otp_word(trans, addr, &eeprom_data); 409e705c121SKalle Valo if (ret) 410e705c121SKalle Valo goto err_unlock; 411e705c121SKalle Valo e[cache_addr / 2] = eeprom_data; 412e705c121SKalle Valo cache_addr += sizeof(u16); 413e705c121SKalle Valo } 414e705c121SKalle Valo } else { 415e705c121SKalle Valo /* eeprom is an array of 16bit values */ 416e705c121SKalle Valo for (addr = 0; addr < sz; addr += sizeof(u16)) { 417e705c121SKalle Valo u32 r; 418e705c121SKalle Valo 419e705c121SKalle Valo iwl_write32(trans, CSR_EEPROM_REG, 420e705c121SKalle Valo CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 421e705c121SKalle Valo 422e705c121SKalle Valo ret = iwl_poll_bit(trans, CSR_EEPROM_REG, 423e705c121SKalle Valo CSR_EEPROM_REG_READ_VALID_MSK, 424e705c121SKalle Valo CSR_EEPROM_REG_READ_VALID_MSK, 425e705c121SKalle Valo IWL_EEPROM_ACCESS_TIMEOUT); 426e705c121SKalle Valo if (ret < 0) { 427e705c121SKalle Valo IWL_ERR(trans, 428e705c121SKalle Valo "Time out reading EEPROM[%d]\n", addr); 429e705c121SKalle Valo goto err_unlock; 430e705c121SKalle Valo } 431e705c121SKalle Valo r = iwl_read32(trans, CSR_EEPROM_REG); 432e705c121SKalle Valo e[addr / 2] = cpu_to_le16(r >> 16); 433e705c121SKalle Valo } 434e705c121SKalle Valo } 435e705c121SKalle Valo 436e705c121SKalle Valo IWL_DEBUG_EEPROM(trans->dev, "NVM Type: %s\n", 437e705c121SKalle Valo nvm_is_otp ? "OTP" : "EEPROM"); 438e705c121SKalle Valo 439e705c121SKalle Valo iwl_eeprom_release_semaphore(trans); 440e705c121SKalle Valo 441e705c121SKalle Valo *eeprom_size = sz; 442e705c121SKalle Valo *eeprom = (u8 *)e; 443e705c121SKalle Valo return 0; 444e705c121SKalle Valo 445e705c121SKalle Valo err_unlock: 446e705c121SKalle Valo iwl_eeprom_release_semaphore(trans); 447e705c121SKalle Valo err_free: 448e705c121SKalle Valo kfree(e); 449e705c121SKalle Valo 450e705c121SKalle Valo return ret; 451e705c121SKalle Valo } 452e705c121SKalle Valo IWL_EXPORT_SYMBOL(iwl_read_eeprom); 453