1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2005-2014, 2018-2019 Intel Corporation 4 * Copyright (C) 2015 Intel Mobile Communications GmbH 5 */ 6 #include <linux/types.h> 7 #include <linux/slab.h> 8 #include <linux/export.h> 9 #include "iwl-drv.h" 10 #include "iwl-modparams.h" 11 #include "iwl-eeprom-parse.h" 12 13 /* EEPROM offset definitions */ 14 15 /* indirect access definitions */ 16 #define ADDRESS_MSK 0x0000FFFF 17 #define INDIRECT_TYPE_MSK 0x000F0000 18 #define INDIRECT_HOST 0x00010000 19 #define INDIRECT_GENERAL 0x00020000 20 #define INDIRECT_REGULATORY 0x00030000 21 #define INDIRECT_CALIBRATION 0x00040000 22 #define INDIRECT_PROCESS_ADJST 0x00050000 23 #define INDIRECT_OTHERS 0x00060000 24 #define INDIRECT_TXP_LIMIT 0x00070000 25 #define INDIRECT_TXP_LIMIT_SIZE 0x00080000 26 #define INDIRECT_ADDRESS 0x00100000 27 28 /* corresponding link offsets in EEPROM */ 29 #define EEPROM_LINK_HOST (2*0x64) 30 #define EEPROM_LINK_GENERAL (2*0x65) 31 #define EEPROM_LINK_REGULATORY (2*0x66) 32 #define EEPROM_LINK_CALIBRATION (2*0x67) 33 #define EEPROM_LINK_PROCESS_ADJST (2*0x68) 34 #define EEPROM_LINK_OTHERS (2*0x69) 35 #define EEPROM_LINK_TXP_LIMIT (2*0x6a) 36 #define EEPROM_LINK_TXP_LIMIT_SIZE (2*0x6b) 37 38 /* General */ 39 #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ 40 #define EEPROM_SUBSYSTEM_ID (2*0x0A) /* 2 bytes */ 41 #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ 42 #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ 43 #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ 44 #define EEPROM_VERSION (2*0x44) /* 2 bytes */ 45 #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */ 46 #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ 47 #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ 48 #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ 49 50 /* calibration */ 51 struct iwl_eeprom_calib_hdr { 52 u8 version; 53 u8 pa_type; 54 __le16 voltage; 55 } __packed; 56 57 #define EEPROM_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION) 58 #define EEPROM_XTAL ((2*0x128) | EEPROM_CALIB_ALL) 59 60 /* temperature */ 61 #define EEPROM_KELVIN_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL) 62 #define EEPROM_RAW_TEMPERATURE ((2*0x12B) | EEPROM_CALIB_ALL) 63 64 /* SKU Capabilities (actual values from EEPROM definition) */ 65 enum eeprom_sku_bits { 66 EEPROM_SKU_CAP_BAND_24GHZ = BIT(4), 67 EEPROM_SKU_CAP_BAND_52GHZ = BIT(5), 68 EEPROM_SKU_CAP_11N_ENABLE = BIT(6), 69 EEPROM_SKU_CAP_AMT_ENABLE = BIT(7), 70 EEPROM_SKU_CAP_IPAN_ENABLE = BIT(8) 71 }; 72 73 /* radio config bits (actual values from EEPROM definition) */ 74 #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ 75 #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 76 #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 77 #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ 78 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ 79 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ 80 81 82 /* 83 * EEPROM bands 84 * These are the channel numbers from each band in the order 85 * that they are stored in the EEPROM band information. Note 86 * that EEPROM bands aren't the same as mac80211 bands, and 87 * there are even special "ht40 bands" in the EEPROM. 88 */ 89 static const u8 iwl_eeprom_band_1[14] = { /* 2.4 GHz */ 90 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 91 }; 92 93 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */ 94 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 95 }; 96 97 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */ 98 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 99 }; 100 101 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */ 102 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 103 }; 104 105 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */ 106 145, 149, 153, 157, 161, 165 107 }; 108 109 static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */ 110 1, 2, 3, 4, 5, 6, 7 111 }; 112 113 static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */ 114 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 115 }; 116 117 #define IWL_NUM_CHANNELS (ARRAY_SIZE(iwl_eeprom_band_1) + \ 118 ARRAY_SIZE(iwl_eeprom_band_2) + \ 119 ARRAY_SIZE(iwl_eeprom_band_3) + \ 120 ARRAY_SIZE(iwl_eeprom_band_4) + \ 121 ARRAY_SIZE(iwl_eeprom_band_5)) 122 123 /* rate data (static) */ 124 static struct ieee80211_rate iwl_cfg80211_rates[] = { 125 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, }, 126 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1, 127 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 128 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2, 129 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 130 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3, 131 .flags = IEEE80211_RATE_SHORT_PREAMBLE, }, 132 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, }, 133 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, }, 134 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, }, 135 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, }, 136 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, }, 137 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, }, 138 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, }, 139 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, }, 140 }; 141 #define RATES_24_OFFS 0 142 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates) 143 #define RATES_52_OFFS 4 144 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS) 145 146 /* EEPROM reading functions */ 147 148 static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset) 149 { 150 if (WARN_ON(offset + sizeof(u16) > eeprom_size)) 151 return 0; 152 return le16_to_cpup((__le16 *)(eeprom + offset)); 153 } 154 155 static u32 eeprom_indirect_address(const u8 *eeprom, size_t eeprom_size, 156 u32 address) 157 { 158 u16 offset = 0; 159 160 if ((address & INDIRECT_ADDRESS) == 0) 161 return address; 162 163 switch (address & INDIRECT_TYPE_MSK) { 164 case INDIRECT_HOST: 165 offset = iwl_eeprom_query16(eeprom, eeprom_size, 166 EEPROM_LINK_HOST); 167 break; 168 case INDIRECT_GENERAL: 169 offset = iwl_eeprom_query16(eeprom, eeprom_size, 170 EEPROM_LINK_GENERAL); 171 break; 172 case INDIRECT_REGULATORY: 173 offset = iwl_eeprom_query16(eeprom, eeprom_size, 174 EEPROM_LINK_REGULATORY); 175 break; 176 case INDIRECT_TXP_LIMIT: 177 offset = iwl_eeprom_query16(eeprom, eeprom_size, 178 EEPROM_LINK_TXP_LIMIT); 179 break; 180 case INDIRECT_TXP_LIMIT_SIZE: 181 offset = iwl_eeprom_query16(eeprom, eeprom_size, 182 EEPROM_LINK_TXP_LIMIT_SIZE); 183 break; 184 case INDIRECT_CALIBRATION: 185 offset = iwl_eeprom_query16(eeprom, eeprom_size, 186 EEPROM_LINK_CALIBRATION); 187 break; 188 case INDIRECT_PROCESS_ADJST: 189 offset = iwl_eeprom_query16(eeprom, eeprom_size, 190 EEPROM_LINK_PROCESS_ADJST); 191 break; 192 case INDIRECT_OTHERS: 193 offset = iwl_eeprom_query16(eeprom, eeprom_size, 194 EEPROM_LINK_OTHERS); 195 break; 196 default: 197 WARN_ON(1); 198 break; 199 } 200 201 /* translate the offset from words to byte */ 202 return (address & ADDRESS_MSK) + (offset << 1); 203 } 204 205 static const u8 *iwl_eeprom_query_addr(const u8 *eeprom, size_t eeprom_size, 206 u32 offset) 207 { 208 u32 address = eeprom_indirect_address(eeprom, eeprom_size, offset); 209 210 if (WARN_ON(address >= eeprom_size)) 211 return NULL; 212 213 return &eeprom[address]; 214 } 215 216 static int iwl_eeprom_read_calib(const u8 *eeprom, size_t eeprom_size, 217 struct iwl_nvm_data *data) 218 { 219 struct iwl_eeprom_calib_hdr *hdr; 220 221 hdr = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, 222 EEPROM_CALIB_ALL); 223 if (!hdr) 224 return -ENODATA; 225 data->calib_version = hdr->version; 226 data->calib_voltage = hdr->voltage; 227 228 return 0; 229 } 230 231 /** 232 * enum iwl_eeprom_channel_flags - channel flags in EEPROM 233 * @EEPROM_CHANNEL_VALID: channel is usable for this SKU/geo 234 * @EEPROM_CHANNEL_IBSS: usable as an IBSS channel 235 * @EEPROM_CHANNEL_ACTIVE: active scanning allowed 236 * @EEPROM_CHANNEL_RADAR: radar detection required 237 * @EEPROM_CHANNEL_WIDE: 20 MHz channel okay (?) 238 * @EEPROM_CHANNEL_DFS: dynamic freq selection candidate 239 */ 240 enum iwl_eeprom_channel_flags { 241 EEPROM_CHANNEL_VALID = BIT(0), 242 EEPROM_CHANNEL_IBSS = BIT(1), 243 EEPROM_CHANNEL_ACTIVE = BIT(3), 244 EEPROM_CHANNEL_RADAR = BIT(4), 245 EEPROM_CHANNEL_WIDE = BIT(5), 246 EEPROM_CHANNEL_DFS = BIT(7), 247 }; 248 249 /** 250 * struct iwl_eeprom_channel - EEPROM channel data 251 * @flags: %EEPROM_CHANNEL_* flags 252 * @max_power_avg: max power (in dBm) on this channel, at most 31 dBm 253 */ 254 struct iwl_eeprom_channel { 255 u8 flags; 256 s8 max_power_avg; 257 } __packed; 258 259 260 enum iwl_eeprom_enhanced_txpwr_flags { 261 IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0), 262 IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1), 263 IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2), 264 IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3), 265 IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4), 266 IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5), 267 IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6), 268 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7), 269 }; 270 271 /** 272 * struct iwl_eeprom_enhanced_txpwr 273 * @flags: entry flags 274 * @channel: channel number 275 * @chain_a_max: chain a max power in 1/2 dBm 276 * @chain_b_max: chain b max power in 1/2 dBm 277 * @chain_c_max: chain c max power in 1/2 dBm 278 * @delta_20_in_40: 20-in-40 deltas (hi/lo) 279 * @mimo2_max: mimo2 max power in 1/2 dBm 280 * @mimo3_max: mimo3 max power in 1/2 dBm 281 * 282 * This structure presents the enhanced regulatory tx power limit layout 283 * in an EEPROM image. 284 */ 285 struct iwl_eeprom_enhanced_txpwr { 286 u8 flags; 287 u8 channel; 288 s8 chain_a_max; 289 s8 chain_b_max; 290 s8 chain_c_max; 291 u8 delta_20_in_40; 292 s8 mimo2_max; 293 s8 mimo3_max; 294 } __packed; 295 296 static s8 iwl_get_max_txpwr_half_dbm(const struct iwl_nvm_data *data, 297 struct iwl_eeprom_enhanced_txpwr *txp) 298 { 299 s8 result = 0; /* (.5 dBm) */ 300 301 /* Take the highest tx power from any valid chains */ 302 if (data->valid_tx_ant & ANT_A && txp->chain_a_max > result) 303 result = txp->chain_a_max; 304 305 if (data->valid_tx_ant & ANT_B && txp->chain_b_max > result) 306 result = txp->chain_b_max; 307 308 if (data->valid_tx_ant & ANT_C && txp->chain_c_max > result) 309 result = txp->chain_c_max; 310 311 if ((data->valid_tx_ant == ANT_AB || 312 data->valid_tx_ant == ANT_BC || 313 data->valid_tx_ant == ANT_AC) && txp->mimo2_max > result) 314 result = txp->mimo2_max; 315 316 if (data->valid_tx_ant == ANT_ABC && txp->mimo3_max > result) 317 result = txp->mimo3_max; 318 319 return result; 320 } 321 322 #define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT) 323 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr) 324 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE) 325 326 #define TXP_CHECK_AND_PRINT(x) \ 327 ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) ? # x " " : "") 328 329 static void 330 iwl_eeprom_enh_txp_read_element(struct iwl_nvm_data *data, 331 struct iwl_eeprom_enhanced_txpwr *txp, 332 int n_channels, s8 max_txpower_avg) 333 { 334 int ch_idx; 335 enum nl80211_band band; 336 337 band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ? 338 NL80211_BAND_5GHZ : NL80211_BAND_2GHZ; 339 340 for (ch_idx = 0; ch_idx < n_channels; ch_idx++) { 341 struct ieee80211_channel *chan = &data->channels[ch_idx]; 342 343 /* update matching channel or from common data only */ 344 if (txp->channel != 0 && chan->hw_value != txp->channel) 345 continue; 346 347 /* update matching band only */ 348 if (band != chan->band) 349 continue; 350 351 if (chan->max_power < max_txpower_avg && 352 !(txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ)) 353 chan->max_power = max_txpower_avg; 354 } 355 } 356 357 static void iwl_eeprom_enhanced_txpower(struct device *dev, 358 struct iwl_nvm_data *data, 359 const u8 *eeprom, size_t eeprom_size, 360 int n_channels) 361 { 362 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp; 363 int idx, entries; 364 __le16 *txp_len; 365 s8 max_txp_avg_halfdbm; 366 367 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8); 368 369 /* the length is in 16-bit words, but we want entries */ 370 txp_len = (__le16 *)iwl_eeprom_query_addr(eeprom, eeprom_size, 371 EEPROM_TXP_SZ_OFFS); 372 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN; 373 374 txp_array = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, 375 EEPROM_TXP_OFFS); 376 377 for (idx = 0; idx < entries; idx++) { 378 txp = &txp_array[idx]; 379 /* skip invalid entries */ 380 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID)) 381 continue; 382 383 IWL_DEBUG_EEPROM(dev, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n", 384 (txp->channel && (txp->flags & 385 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ? 386 "Common " : (txp->channel) ? 387 "Channel" : "Common", 388 (txp->channel), 389 TXP_CHECK_AND_PRINT(VALID), 390 TXP_CHECK_AND_PRINT(BAND_52G), 391 TXP_CHECK_AND_PRINT(OFDM), 392 TXP_CHECK_AND_PRINT(40MHZ), 393 TXP_CHECK_AND_PRINT(HT_AP), 394 TXP_CHECK_AND_PRINT(RES1), 395 TXP_CHECK_AND_PRINT(RES2), 396 TXP_CHECK_AND_PRINT(COMMON_TYPE), 397 txp->flags); 398 IWL_DEBUG_EEPROM(dev, 399 "\t\t chain_A: %d chain_B: %d chain_C: %d\n", 400 txp->chain_a_max, txp->chain_b_max, 401 txp->chain_c_max); 402 IWL_DEBUG_EEPROM(dev, 403 "\t\t MIMO2: %d MIMO3: %d High 20_on_40: 0x%02x Low 20_on_40: 0x%02x\n", 404 txp->mimo2_max, txp->mimo3_max, 405 ((txp->delta_20_in_40 & 0xf0) >> 4), 406 (txp->delta_20_in_40 & 0x0f)); 407 408 max_txp_avg_halfdbm = iwl_get_max_txpwr_half_dbm(data, txp); 409 410 iwl_eeprom_enh_txp_read_element(data, txp, n_channels, 411 DIV_ROUND_UP(max_txp_avg_halfdbm, 2)); 412 413 if (max_txp_avg_halfdbm > data->max_tx_pwr_half_dbm) 414 data->max_tx_pwr_half_dbm = max_txp_avg_halfdbm; 415 } 416 } 417 418 static void iwl_init_band_reference(const struct iwl_cfg *cfg, 419 const u8 *eeprom, size_t eeprom_size, 420 int eeprom_band, int *eeprom_ch_count, 421 const struct iwl_eeprom_channel **ch_info, 422 const u8 **eeprom_ch_array) 423 { 424 u32 offset = cfg->eeprom_params->regulatory_bands[eeprom_band - 1]; 425 426 offset |= INDIRECT_ADDRESS | INDIRECT_REGULATORY; 427 428 *ch_info = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, offset); 429 430 switch (eeprom_band) { 431 case 1: /* 2.4GHz band */ 432 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1); 433 *eeprom_ch_array = iwl_eeprom_band_1; 434 break; 435 case 2: /* 4.9GHz band */ 436 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2); 437 *eeprom_ch_array = iwl_eeprom_band_2; 438 break; 439 case 3: /* 5.2GHz band */ 440 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3); 441 *eeprom_ch_array = iwl_eeprom_band_3; 442 break; 443 case 4: /* 5.5GHz band */ 444 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4); 445 *eeprom_ch_array = iwl_eeprom_band_4; 446 break; 447 case 5: /* 5.7GHz band */ 448 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5); 449 *eeprom_ch_array = iwl_eeprom_band_5; 450 break; 451 case 6: /* 2.4GHz ht40 channels */ 452 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6); 453 *eeprom_ch_array = iwl_eeprom_band_6; 454 break; 455 case 7: /* 5 GHz ht40 channels */ 456 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7); 457 *eeprom_ch_array = iwl_eeprom_band_7; 458 break; 459 default: 460 *eeprom_ch_count = 0; 461 *eeprom_ch_array = NULL; 462 WARN_ON(1); 463 } 464 } 465 466 #define CHECK_AND_PRINT(x) \ 467 ((eeprom_ch->flags & EEPROM_CHANNEL_##x) ? # x " " : "") 468 469 static void iwl_mod_ht40_chan_info(struct device *dev, 470 struct iwl_nvm_data *data, int n_channels, 471 enum nl80211_band band, u16 channel, 472 const struct iwl_eeprom_channel *eeprom_ch, 473 u8 clear_ht40_extension_channel) 474 { 475 struct ieee80211_channel *chan = NULL; 476 int i; 477 478 for (i = 0; i < n_channels; i++) { 479 if (data->channels[i].band != band) 480 continue; 481 if (data->channels[i].hw_value != channel) 482 continue; 483 chan = &data->channels[i]; 484 break; 485 } 486 487 if (!chan) 488 return; 489 490 IWL_DEBUG_EEPROM(dev, 491 "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n", 492 channel, 493 band == NL80211_BAND_5GHZ ? "5.2" : "2.4", 494 CHECK_AND_PRINT(IBSS), 495 CHECK_AND_PRINT(ACTIVE), 496 CHECK_AND_PRINT(RADAR), 497 CHECK_AND_PRINT(WIDE), 498 CHECK_AND_PRINT(DFS), 499 eeprom_ch->flags, 500 eeprom_ch->max_power_avg, 501 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) && 502 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" 503 : "not "); 504 505 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID) 506 chan->flags &= ~clear_ht40_extension_channel; 507 } 508 509 #define CHECK_AND_PRINT_I(x) \ 510 ((eeprom_ch_info[ch_idx].flags & EEPROM_CHANNEL_##x) ? # x " " : "") 511 512 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg, 513 struct iwl_nvm_data *data, 514 const u8 *eeprom, size_t eeprom_size) 515 { 516 int band, ch_idx; 517 const struct iwl_eeprom_channel *eeprom_ch_info; 518 const u8 *eeprom_ch_array; 519 int eeprom_ch_count; 520 int n_channels = 0; 521 522 /* 523 * Loop through the 5 EEPROM bands and add them to the parse list 524 */ 525 for (band = 1; band <= 5; band++) { 526 struct ieee80211_channel *channel; 527 528 iwl_init_band_reference(cfg, eeprom, eeprom_size, band, 529 &eeprom_ch_count, &eeprom_ch_info, 530 &eeprom_ch_array); 531 532 /* Loop through each band adding each of the channels */ 533 for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) { 534 const struct iwl_eeprom_channel *eeprom_ch; 535 536 eeprom_ch = &eeprom_ch_info[ch_idx]; 537 538 if (!(eeprom_ch->flags & EEPROM_CHANNEL_VALID)) { 539 IWL_DEBUG_EEPROM(dev, 540 "Ch. %d Flags %x [%sGHz] - No traffic\n", 541 eeprom_ch_array[ch_idx], 542 eeprom_ch_info[ch_idx].flags, 543 (band != 1) ? "5.2" : "2.4"); 544 continue; 545 } 546 547 channel = &data->channels[n_channels]; 548 n_channels++; 549 550 channel->hw_value = eeprom_ch_array[ch_idx]; 551 channel->band = (band == 1) ? NL80211_BAND_2GHZ 552 : NL80211_BAND_5GHZ; 553 channel->center_freq = 554 ieee80211_channel_to_frequency( 555 channel->hw_value, channel->band); 556 557 /* set no-HT40, will enable as appropriate later */ 558 channel->flags = IEEE80211_CHAN_NO_HT40; 559 560 if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS)) 561 channel->flags |= IEEE80211_CHAN_NO_IR; 562 563 if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE)) 564 channel->flags |= IEEE80211_CHAN_NO_IR; 565 566 if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR) 567 channel->flags |= IEEE80211_CHAN_RADAR; 568 569 /* Initialize regulatory-based run-time data */ 570 channel->max_power = 571 eeprom_ch_info[ch_idx].max_power_avg; 572 IWL_DEBUG_EEPROM(dev, 573 "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n", 574 channel->hw_value, 575 (band != 1) ? "5.2" : "2.4", 576 CHECK_AND_PRINT_I(VALID), 577 CHECK_AND_PRINT_I(IBSS), 578 CHECK_AND_PRINT_I(ACTIVE), 579 CHECK_AND_PRINT_I(RADAR), 580 CHECK_AND_PRINT_I(WIDE), 581 CHECK_AND_PRINT_I(DFS), 582 eeprom_ch_info[ch_idx].flags, 583 eeprom_ch_info[ch_idx].max_power_avg, 584 ((eeprom_ch_info[ch_idx].flags & 585 EEPROM_CHANNEL_IBSS) && 586 !(eeprom_ch_info[ch_idx].flags & 587 EEPROM_CHANNEL_RADAR)) 588 ? "" : "not "); 589 } 590 } 591 592 if (cfg->eeprom_params->enhanced_txpower) { 593 /* 594 * for newer device (6000 series and up) 595 * EEPROM contain enhanced tx power information 596 * driver need to process addition information 597 * to determine the max channel tx power limits 598 */ 599 iwl_eeprom_enhanced_txpower(dev, data, eeprom, eeprom_size, 600 n_channels); 601 } else { 602 /* All others use data from channel map */ 603 int i; 604 605 data->max_tx_pwr_half_dbm = -128; 606 607 for (i = 0; i < n_channels; i++) 608 data->max_tx_pwr_half_dbm = 609 max_t(s8, data->max_tx_pwr_half_dbm, 610 data->channels[i].max_power * 2); 611 } 612 613 /* Check if we do have HT40 channels */ 614 if (cfg->eeprom_params->regulatory_bands[5] == 615 EEPROM_REGULATORY_BAND_NO_HT40 && 616 cfg->eeprom_params->regulatory_bands[6] == 617 EEPROM_REGULATORY_BAND_NO_HT40) 618 return n_channels; 619 620 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */ 621 for (band = 6; band <= 7; band++) { 622 enum nl80211_band ieeeband; 623 624 iwl_init_band_reference(cfg, eeprom, eeprom_size, band, 625 &eeprom_ch_count, &eeprom_ch_info, 626 &eeprom_ch_array); 627 628 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */ 629 ieeeband = (band == 6) ? NL80211_BAND_2GHZ 630 : NL80211_BAND_5GHZ; 631 632 /* Loop through each band adding each of the channels */ 633 for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) { 634 /* Set up driver's info for lower half */ 635 iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband, 636 eeprom_ch_array[ch_idx], 637 &eeprom_ch_info[ch_idx], 638 IEEE80211_CHAN_NO_HT40PLUS); 639 640 /* Set up driver's info for upper half */ 641 iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband, 642 eeprom_ch_array[ch_idx] + 4, 643 &eeprom_ch_info[ch_idx], 644 IEEE80211_CHAN_NO_HT40MINUS); 645 } 646 } 647 648 return n_channels; 649 } 650 651 int iwl_init_sband_channels(struct iwl_nvm_data *data, 652 struct ieee80211_supported_band *sband, 653 int n_channels, enum nl80211_band band) 654 { 655 struct ieee80211_channel *chan = &data->channels[0]; 656 int n = 0, idx = 0; 657 658 while (idx < n_channels && chan->band != band) 659 chan = &data->channels[++idx]; 660 661 sband->channels = &data->channels[idx]; 662 663 while (idx < n_channels && chan->band == band) { 664 chan = &data->channels[++idx]; 665 n++; 666 } 667 668 sband->n_channels = n; 669 670 return n; 671 } 672 673 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ 674 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ 675 676 void iwl_init_ht_hw_capab(struct iwl_trans *trans, 677 struct iwl_nvm_data *data, 678 struct ieee80211_sta_ht_cap *ht_info, 679 enum nl80211_band band, 680 u8 tx_chains, u8 rx_chains) 681 { 682 const struct iwl_cfg *cfg = trans->cfg; 683 int max_bit_rate = 0; 684 685 tx_chains = hweight8(tx_chains); 686 if (cfg->rx_with_siso_diversity) 687 rx_chains = 1; 688 else 689 rx_chains = hweight8(rx_chains); 690 691 if (!(data->sku_cap_11n_enable) || 692 (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) || 693 !cfg->ht_params) { 694 ht_info->ht_supported = false; 695 return; 696 } 697 698 if (data->sku_cap_mimo_disabled) 699 rx_chains = 1; 700 701 ht_info->ht_supported = true; 702 ht_info->cap = IEEE80211_HT_CAP_DSSSCCK40; 703 704 if (cfg->ht_params->stbc) { 705 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 706 707 if (tx_chains > 1) 708 ht_info->cap |= IEEE80211_HT_CAP_TX_STBC; 709 } 710 711 if (cfg->ht_params->ldpc) 712 ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING; 713 714 if ((trans->trans_cfg->mq_rx_supported && 715 iwlwifi_mod_params.amsdu_size == IWL_AMSDU_DEF) || 716 iwlwifi_mod_params.amsdu_size >= IWL_AMSDU_8K) 717 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU; 718 719 ht_info->ampdu_factor = cfg->max_ht_ampdu_exponent; 720 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_4; 721 722 ht_info->mcs.rx_mask[0] = 0xFF; 723 if (rx_chains >= 2) 724 ht_info->mcs.rx_mask[1] = 0xFF; 725 if (rx_chains >= 3) 726 ht_info->mcs.rx_mask[2] = 0xFF; 727 728 if (cfg->ht_params->ht_greenfield_support) 729 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD; 730 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 731 732 max_bit_rate = MAX_BIT_RATE_20_MHZ; 733 734 if (cfg->ht_params->ht40_bands & BIT(band)) { 735 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; 736 ht_info->cap |= IEEE80211_HT_CAP_SGI_40; 737 max_bit_rate = MAX_BIT_RATE_40_MHZ; 738 } 739 740 /* Highest supported Rx data rate */ 741 max_bit_rate *= rx_chains; 742 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK); 743 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate); 744 745 /* Tx MCS capabilities */ 746 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 747 if (tx_chains != rx_chains) { 748 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 749 ht_info->mcs.tx_params |= ((tx_chains - 1) << 750 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); 751 } 752 } 753 754 static void iwl_init_sbands(struct iwl_trans *trans, const struct iwl_cfg *cfg, 755 struct iwl_nvm_data *data, 756 const u8 *eeprom, size_t eeprom_size) 757 { 758 struct device *dev = trans->dev; 759 int n_channels = iwl_init_channel_map(dev, cfg, data, 760 eeprom, eeprom_size); 761 int n_used = 0; 762 struct ieee80211_supported_band *sband; 763 764 sband = &data->bands[NL80211_BAND_2GHZ]; 765 sband->band = NL80211_BAND_2GHZ; 766 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS]; 767 sband->n_bitrates = N_RATES_24; 768 n_used += iwl_init_sband_channels(data, sband, n_channels, 769 NL80211_BAND_2GHZ); 770 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ, 771 data->valid_tx_ant, data->valid_rx_ant); 772 773 sband = &data->bands[NL80211_BAND_5GHZ]; 774 sband->band = NL80211_BAND_5GHZ; 775 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS]; 776 sband->n_bitrates = N_RATES_52; 777 n_used += iwl_init_sband_channels(data, sband, n_channels, 778 NL80211_BAND_5GHZ); 779 iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ, 780 data->valid_tx_ant, data->valid_rx_ant); 781 782 if (n_channels != n_used) 783 IWL_ERR_DEV(dev, "EEPROM: used only %d of %d channels\n", 784 n_used, n_channels); 785 } 786 787 /* EEPROM data functions */ 788 789 struct iwl_nvm_data * 790 iwl_parse_eeprom_data(struct iwl_trans *trans, const struct iwl_cfg *cfg, 791 const u8 *eeprom, size_t eeprom_size) 792 { 793 struct iwl_nvm_data *data; 794 struct device *dev = trans->dev; 795 const void *tmp; 796 u16 radio_cfg, sku; 797 798 if (WARN_ON(!cfg || !cfg->eeprom_params)) 799 return NULL; 800 801 data = kzalloc(struct_size(data, channels, IWL_NUM_CHANNELS), 802 GFP_KERNEL); 803 if (!data) 804 return NULL; 805 806 /* get MAC address(es) */ 807 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_MAC_ADDRESS); 808 if (!tmp) 809 goto err_free; 810 memcpy(data->hw_addr, tmp, ETH_ALEN); 811 data->n_hw_addrs = iwl_eeprom_query16(eeprom, eeprom_size, 812 EEPROM_NUM_MAC_ADDRESS); 813 814 if (iwl_eeprom_read_calib(eeprom, eeprom_size, data)) 815 goto err_free; 816 817 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_XTAL); 818 if (!tmp) 819 goto err_free; 820 memcpy(data->xtal_calib, tmp, sizeof(data->xtal_calib)); 821 822 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, 823 EEPROM_RAW_TEMPERATURE); 824 if (!tmp) 825 goto err_free; 826 data->raw_temperature = *(__le16 *)tmp; 827 828 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, 829 EEPROM_KELVIN_TEMPERATURE); 830 if (!tmp) 831 goto err_free; 832 data->kelvin_temperature = *(__le16 *)tmp; 833 data->kelvin_voltage = *((__le16 *)tmp + 1); 834 835 radio_cfg = iwl_eeprom_query16(eeprom, eeprom_size, 836 EEPROM_RADIO_CONFIG); 837 data->radio_cfg_dash = EEPROM_RF_CFG_DASH_MSK(radio_cfg); 838 data->radio_cfg_pnum = EEPROM_RF_CFG_PNUM_MSK(radio_cfg); 839 data->radio_cfg_step = EEPROM_RF_CFG_STEP_MSK(radio_cfg); 840 data->radio_cfg_type = EEPROM_RF_CFG_TYPE_MSK(radio_cfg); 841 data->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg); 842 data->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg); 843 844 sku = iwl_eeprom_query16(eeprom, eeprom_size, 845 EEPROM_SKU_CAP); 846 data->sku_cap_11n_enable = sku & EEPROM_SKU_CAP_11N_ENABLE; 847 data->sku_cap_amt_enable = sku & EEPROM_SKU_CAP_AMT_ENABLE; 848 data->sku_cap_band_24ghz_enable = sku & EEPROM_SKU_CAP_BAND_24GHZ; 849 data->sku_cap_band_52ghz_enable = sku & EEPROM_SKU_CAP_BAND_52GHZ; 850 data->sku_cap_ipan_enable = sku & EEPROM_SKU_CAP_IPAN_ENABLE; 851 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) 852 data->sku_cap_11n_enable = false; 853 854 data->nvm_version = iwl_eeprom_query16(eeprom, eeprom_size, 855 EEPROM_VERSION); 856 857 /* check overrides (some devices have wrong EEPROM) */ 858 if (cfg->valid_tx_ant) 859 data->valid_tx_ant = cfg->valid_tx_ant; 860 if (cfg->valid_rx_ant) 861 data->valid_rx_ant = cfg->valid_rx_ant; 862 863 if (!data->valid_tx_ant || !data->valid_rx_ant) { 864 IWL_ERR_DEV(dev, "invalid antennas (0x%x, 0x%x)\n", 865 data->valid_tx_ant, data->valid_rx_ant); 866 goto err_free; 867 } 868 869 iwl_init_sbands(trans, cfg, data, eeprom, eeprom_size); 870 871 return data; 872 err_free: 873 kfree(data); 874 return NULL; 875 } 876 IWL_EXPORT_SYMBOL(iwl_parse_eeprom_data); 877