1eda50cdeSSara Sharon /****************************************************************************** 2eda50cdeSSara Sharon * 3eda50cdeSSara Sharon * This file is provided under a dual BSD/GPLv2 license. When using or 4eda50cdeSSara Sharon * redistributing this file, you may do so under either license. 5eda50cdeSSara Sharon * 6eda50cdeSSara Sharon * GPL LICENSE SUMMARY 7eda50cdeSSara Sharon * 8eda50cdeSSara Sharon * Copyright(c) 2017 Intel Deutschland GmbH 9eda50cdeSSara Sharon * 10eda50cdeSSara Sharon * This program is free software; you can redistribute it and/or modify 11eda50cdeSSara Sharon * it under the terms of version 2 of the GNU General Public License as 12eda50cdeSSara Sharon * published by the Free Software Foundation. 13eda50cdeSSara Sharon * 14eda50cdeSSara Sharon * This program is distributed in the hope that it will be useful, but 15eda50cdeSSara Sharon * WITHOUT ANY WARRANTY; without even the implied warranty of 16eda50cdeSSara Sharon * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17eda50cdeSSara Sharon * General Public License for more details. 18eda50cdeSSara Sharon * 19eda50cdeSSara Sharon * BSD LICENSE 20eda50cdeSSara Sharon * 21eda50cdeSSara Sharon * Copyright(c) 2017 Intel Deutschland GmbH 22eda50cdeSSara Sharon * All rights reserved. 23eda50cdeSSara Sharon * 24eda50cdeSSara Sharon * Redistribution and use in source and binary forms, with or without 25eda50cdeSSara Sharon * modification, are permitted provided that the following conditions 26eda50cdeSSara Sharon * are met: 27eda50cdeSSara Sharon * 28eda50cdeSSara Sharon * * Redistributions of source code must retain the above copyright 29eda50cdeSSara Sharon * notice, this list of conditions and the following disclaimer. 30eda50cdeSSara Sharon * * Redistributions in binary form must reproduce the above copyright 31eda50cdeSSara Sharon * notice, this list of conditions and the following disclaimer in 32eda50cdeSSara Sharon * the documentation and/or other materials provided with the 33eda50cdeSSara Sharon * distribution. 34eda50cdeSSara Sharon * * Neither the name Intel Corporation nor the names of its 35eda50cdeSSara Sharon * contributors may be used to endorse or promote products derived 36eda50cdeSSara Sharon * from this software without specific prior written permission. 37eda50cdeSSara Sharon * 38eda50cdeSSara Sharon * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 39eda50cdeSSara Sharon * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 40eda50cdeSSara Sharon * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 41eda50cdeSSara Sharon * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 42eda50cdeSSara Sharon * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 43eda50cdeSSara Sharon * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 44eda50cdeSSara Sharon * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 45eda50cdeSSara Sharon * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 46eda50cdeSSara Sharon * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 47eda50cdeSSara Sharon * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 48eda50cdeSSara Sharon * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 49eda50cdeSSara Sharon * 50eda50cdeSSara Sharon *****************************************************************************/ 51eda50cdeSSara Sharon 52eda50cdeSSara Sharon #ifndef __iwl_context_info_file_h__ 53eda50cdeSSara Sharon #define __iwl_context_info_file_h__ 54eda50cdeSSara Sharon 55eda50cdeSSara Sharon /* maximmum number of DRAM map entries supported by FW */ 56eda50cdeSSara Sharon #define IWL_MAX_DRAM_ENTRY 64 57eda50cdeSSara Sharon #define CSR_CTXT_INFO_BA 0x40 58eda50cdeSSara Sharon 59eda50cdeSSara Sharon /** 60eda50cdeSSara Sharon * enum iwl_context_info_flags - Context information control flags 61eda50cdeSSara Sharon * @IWL_CTXT_INFO_AUTO_FUNC_INIT: If set, FW will not wait before interrupting 62eda50cdeSSara Sharon * the init done for driver command that configures several system modes 63eda50cdeSSara Sharon * @IWL_CTXT_INFO_EARLY_DEBUG: enable early debug 64eda50cdeSSara Sharon * @IWL_CTXT_INFO_ENABLE_CDMP: enable core dump 65eda50cdeSSara Sharon * @IWL_CTXT_INFO_RB_SIZE_4K: Use 4K RB size (the default is 2K) 66eda50cdeSSara Sharon * @IWL_CTXT_INFO_RB_CB_SIZE_POS: position of the RBD Cyclic Buffer Size 67eda50cdeSSara Sharon * exponent, the actual size is 2**value, valid sizes are 8-2048. 68eda50cdeSSara Sharon * The value is four bits long. Maximum valid exponent is 12 69eda50cdeSSara Sharon * @IWL_CTXT_INFO_TFD_FORMAT_LONG: use long TFD Format (the 70eda50cdeSSara Sharon * default is short format - not supported by the driver) 71eda50cdeSSara Sharon */ 72eda50cdeSSara Sharon enum iwl_context_info_flags { 73eda50cdeSSara Sharon IWL_CTXT_INFO_AUTO_FUNC_INIT = BIT(0), 74eda50cdeSSara Sharon IWL_CTXT_INFO_EARLY_DEBUG = BIT(1), 75eda50cdeSSara Sharon IWL_CTXT_INFO_ENABLE_CDMP = BIT(2), 76eda50cdeSSara Sharon IWL_CTXT_INFO_RB_SIZE_4K = BIT(3), 77eda50cdeSSara Sharon IWL_CTXT_INFO_RB_CB_SIZE_POS = 4, 78eda50cdeSSara Sharon IWL_CTXT_INFO_TFD_FORMAT_LONG = BIT(8), 79eda50cdeSSara Sharon }; 80eda50cdeSSara Sharon 81eda50cdeSSara Sharon /* 82eda50cdeSSara Sharon * struct iwl_context_info_version - version structure 83eda50cdeSSara Sharon * @mac_id: SKU and revision id 84eda50cdeSSara Sharon * @version: context information version id 85eda50cdeSSara Sharon * @size: the size of the context information in DWs 86eda50cdeSSara Sharon */ 87eda50cdeSSara Sharon struct iwl_context_info_version { 88eda50cdeSSara Sharon __le16 mac_id; 89eda50cdeSSara Sharon __le16 version; 90eda50cdeSSara Sharon __le16 size; 91eda50cdeSSara Sharon __le16 reserved; 92eda50cdeSSara Sharon } __packed; 93eda50cdeSSara Sharon 94eda50cdeSSara Sharon /* 95eda50cdeSSara Sharon * struct iwl_context_info_control - version structure 96eda50cdeSSara Sharon * @control_flags: context information flags see &enum iwl_context_info_flags 97eda50cdeSSara Sharon */ 98eda50cdeSSara Sharon struct iwl_context_info_control { 99eda50cdeSSara Sharon __le32 control_flags; 100eda50cdeSSara Sharon __le32 reserved; 101eda50cdeSSara Sharon } __packed; 102eda50cdeSSara Sharon 103eda50cdeSSara Sharon /* 104eda50cdeSSara Sharon * struct iwl_context_info_dram - images DRAM map 105eda50cdeSSara Sharon * each entry in the map represents a DRAM chunk of up to 32 KB 106eda50cdeSSara Sharon * @umac_img: UMAC image DRAM map 107eda50cdeSSara Sharon * @lmac_img: LMAC image DRAM map 108eda50cdeSSara Sharon * @virtual_img: paged image DRAM map 109eda50cdeSSara Sharon */ 110eda50cdeSSara Sharon struct iwl_context_info_dram { 111eda50cdeSSara Sharon __le64 umac_img[IWL_MAX_DRAM_ENTRY]; 112eda50cdeSSara Sharon __le64 lmac_img[IWL_MAX_DRAM_ENTRY]; 113eda50cdeSSara Sharon __le64 virtual_img[IWL_MAX_DRAM_ENTRY]; 114eda50cdeSSara Sharon } __packed; 115eda50cdeSSara Sharon 116eda50cdeSSara Sharon /* 117eda50cdeSSara Sharon * struct iwl_context_info_rbd_cfg - RBDs configuration 118eda50cdeSSara Sharon * @free_rbd_addr: default queue free RB CB base address 119eda50cdeSSara Sharon * @used_rbd_addr: default queue used RB CB base address 120eda50cdeSSara Sharon * @status_wr_ptr: default queue used RB status write pointer 121eda50cdeSSara Sharon */ 122eda50cdeSSara Sharon struct iwl_context_info_rbd_cfg { 123eda50cdeSSara Sharon __le64 free_rbd_addr; 124eda50cdeSSara Sharon __le64 used_rbd_addr; 125eda50cdeSSara Sharon __le64 status_wr_ptr; 126eda50cdeSSara Sharon } __packed; 127eda50cdeSSara Sharon 128eda50cdeSSara Sharon /* 129eda50cdeSSara Sharon * struct iwl_context_info_hcmd_cfg - command queue configuration 130eda50cdeSSara Sharon * @cmd_queue_addr: address of command queue 131eda50cdeSSara Sharon * @cmd_queue_size: number of entries 132eda50cdeSSara Sharon */ 133eda50cdeSSara Sharon struct iwl_context_info_hcmd_cfg { 134eda50cdeSSara Sharon __le64 cmd_queue_addr; 135eda50cdeSSara Sharon u8 cmd_queue_size; 136eda50cdeSSara Sharon u8 reserved[7]; 137eda50cdeSSara Sharon } __packed; 138eda50cdeSSara Sharon 139eda50cdeSSara Sharon /* 140eda50cdeSSara Sharon * struct iwl_context_info_dump_cfg - Core Dump configuration 141eda50cdeSSara Sharon * @core_dump_addr: core dump (debug DRAM address) start address 142eda50cdeSSara Sharon * @core_dump_size: size, in DWs 143eda50cdeSSara Sharon */ 144eda50cdeSSara Sharon struct iwl_context_info_dump_cfg { 145eda50cdeSSara Sharon __le64 core_dump_addr; 146eda50cdeSSara Sharon __le32 core_dump_size; 147eda50cdeSSara Sharon __le32 reserved; 148eda50cdeSSara Sharon } __packed; 149eda50cdeSSara Sharon 150eda50cdeSSara Sharon /* 151eda50cdeSSara Sharon * struct iwl_context_info_pnvm_cfg - platform NVM data configuration 152eda50cdeSSara Sharon * @platform_nvm_addr: Platform NVM data start address 153eda50cdeSSara Sharon * @platform_nvm_size: size in DWs 154eda50cdeSSara Sharon */ 155eda50cdeSSara Sharon struct iwl_context_info_pnvm_cfg { 156eda50cdeSSara Sharon __le64 platform_nvm_addr; 157eda50cdeSSara Sharon __le32 platform_nvm_size; 158eda50cdeSSara Sharon __le32 reserved; 159eda50cdeSSara Sharon } __packed; 160eda50cdeSSara Sharon 161eda50cdeSSara Sharon /* 162eda50cdeSSara Sharon * struct iwl_context_info_early_dbg_cfg - early debug configuration for 163eda50cdeSSara Sharon * dumping DRAM addresses 164eda50cdeSSara Sharon * @early_debug_addr: early debug start address 165eda50cdeSSara Sharon * @early_debug_size: size in DWs 166eda50cdeSSara Sharon */ 167eda50cdeSSara Sharon struct iwl_context_info_early_dbg_cfg { 168eda50cdeSSara Sharon __le64 early_debug_addr; 169eda50cdeSSara Sharon __le32 early_debug_size; 170eda50cdeSSara Sharon __le32 reserved; 171eda50cdeSSara Sharon } __packed; 172eda50cdeSSara Sharon 173eda50cdeSSara Sharon /* 174eda50cdeSSara Sharon * struct iwl_context_info - device INIT configuration 175eda50cdeSSara Sharon * @version: version information of context info and HW 176eda50cdeSSara Sharon * @control: control flags of FH configurations 177eda50cdeSSara Sharon * @rbd_cfg: default RX queue configuration 178eda50cdeSSara Sharon * @hcmd_cfg: command queue configuration 179eda50cdeSSara Sharon * @dump_cfg: core dump data 180eda50cdeSSara Sharon * @edbg_cfg: early debug configuration 181eda50cdeSSara Sharon * @pnvm_cfg: platform nvm configuration 182eda50cdeSSara Sharon * @dram: firmware image addresses in DRAM 183eda50cdeSSara Sharon */ 184eda50cdeSSara Sharon struct iwl_context_info { 185eda50cdeSSara Sharon struct iwl_context_info_version version; 186eda50cdeSSara Sharon struct iwl_context_info_control control; 187eda50cdeSSara Sharon __le64 reserved0; 188eda50cdeSSara Sharon struct iwl_context_info_rbd_cfg rbd_cfg; 189eda50cdeSSara Sharon struct iwl_context_info_hcmd_cfg hcmd_cfg; 190eda50cdeSSara Sharon __le32 reserved1[4]; 191eda50cdeSSara Sharon struct iwl_context_info_dump_cfg dump_cfg; 192eda50cdeSSara Sharon struct iwl_context_info_early_dbg_cfg edbg_cfg; 193eda50cdeSSara Sharon struct iwl_context_info_pnvm_cfg pnvm_cfg; 194eda50cdeSSara Sharon __le32 reserved2[16]; 195eda50cdeSSara Sharon struct iwl_context_info_dram dram; 196eda50cdeSSara Sharon __le32 reserved3[16]; 197eda50cdeSSara Sharon } __packed; 198eda50cdeSSara Sharon 199eda50cdeSSara Sharon int iwl_pcie_ctxt_info_init(struct iwl_trans *trans, const struct fw_img *fw); 200eda50cdeSSara Sharon void iwl_pcie_ctxt_info_free(struct iwl_trans *trans); 201eda50cdeSSara Sharon void iwl_pcie_ctxt_info_free_paging(struct iwl_trans *trans); 202eda50cdeSSara Sharon 203eda50cdeSSara Sharon #endif /* __iwl_context_info_file_h__ */ 204