1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH 10 * Copyright(c) 2018 - 2019 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <linuxwifi@intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 * BSD LICENSE 29 * 30 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 31 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH 32 * Copyright(c) 2018 - 2019 Intel Corporation 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 39 * * Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * * Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * * Neither the name Intel Corporation nor the names of its 46 * contributors may be used to endorse or promote products derived 47 * from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * 61 *****************************************************************************/ 62 #ifndef __IWL_CONFIG_H__ 63 #define __IWL_CONFIG_H__ 64 65 #include <linux/types.h> 66 #include <linux/netdevice.h> 67 #include <linux/ieee80211.h> 68 #include <linux/nl80211.h> 69 #include "iwl-csr.h" 70 71 enum iwl_device_family { 72 IWL_DEVICE_FAMILY_UNDEFINED, 73 IWL_DEVICE_FAMILY_1000, 74 IWL_DEVICE_FAMILY_100, 75 IWL_DEVICE_FAMILY_2000, 76 IWL_DEVICE_FAMILY_2030, 77 IWL_DEVICE_FAMILY_105, 78 IWL_DEVICE_FAMILY_135, 79 IWL_DEVICE_FAMILY_5000, 80 IWL_DEVICE_FAMILY_5150, 81 IWL_DEVICE_FAMILY_6000, 82 IWL_DEVICE_FAMILY_6000i, 83 IWL_DEVICE_FAMILY_6005, 84 IWL_DEVICE_FAMILY_6030, 85 IWL_DEVICE_FAMILY_6050, 86 IWL_DEVICE_FAMILY_6150, 87 IWL_DEVICE_FAMILY_7000, 88 IWL_DEVICE_FAMILY_8000, 89 IWL_DEVICE_FAMILY_9000, 90 IWL_DEVICE_FAMILY_22000, 91 IWL_DEVICE_FAMILY_AX210, 92 }; 93 94 /* 95 * LED mode 96 * IWL_LED_DEFAULT: use device default 97 * IWL_LED_RF_STATE: turn LED on/off based on RF state 98 * LED ON = RF ON 99 * LED OFF = RF OFF 100 * IWL_LED_BLINK: adjust led blink rate based on blink table 101 * IWL_LED_DISABLE: led disabled 102 */ 103 enum iwl_led_mode { 104 IWL_LED_DEFAULT, 105 IWL_LED_RF_STATE, 106 IWL_LED_BLINK, 107 IWL_LED_DISABLE, 108 }; 109 110 /** 111 * enum iwl_nvm_type - nvm formats 112 * @IWL_NVM: the regular format 113 * @IWL_NVM_EXT: extended NVM format 114 * @IWL_NVM_SDP: NVM format used by 3168 series 115 */ 116 enum iwl_nvm_type { 117 IWL_NVM, 118 IWL_NVM_EXT, 119 IWL_NVM_SDP, 120 }; 121 122 /* 123 * This is the threshold value of plcp error rate per 100mSecs. It is 124 * used to set and check for the validity of plcp_delta. 125 */ 126 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1 127 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50 128 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100 129 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200 130 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255 131 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0 132 133 /* TX queue watchdog timeouts in mSecs */ 134 #define IWL_WATCHDOG_DISABLED 0 135 #define IWL_DEF_WD_TIMEOUT 2500 136 #define IWL_LONG_WD_TIMEOUT 10000 137 #define IWL_MAX_WD_TIMEOUT 120000 138 139 #define IWL_DEFAULT_MAX_TX_POWER 22 140 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\ 141 NETIF_F_TSO | NETIF_F_TSO6) 142 143 /* Antenna presence definitions */ 144 #define ANT_NONE 0x0 145 #define ANT_INVALID 0xff 146 #define ANT_A BIT(0) 147 #define ANT_B BIT(1) 148 #define ANT_C BIT(2) 149 #define ANT_AB (ANT_A | ANT_B) 150 #define ANT_AC (ANT_A | ANT_C) 151 #define ANT_BC (ANT_B | ANT_C) 152 #define ANT_ABC (ANT_A | ANT_B | ANT_C) 153 #define MAX_ANT_NUM 3 154 155 156 static inline u8 num_of_ant(u8 mask) 157 { 158 return !!((mask) & ANT_A) + 159 !!((mask) & ANT_B) + 160 !!((mask) & ANT_C); 161 } 162 163 /** 164 * struct iwl_base_params - params not likely to change within a device family 165 * @max_ll_items: max number of OTP blocks 166 * @shadow_ram_support: shadow support for OTP memory 167 * @led_compensation: compensate on the led on/off time per HW according 168 * to the deviation to achieve the desired led frequency. 169 * The detail algorithm is described in iwl-led.c 170 * @wd_timeout: TX queues watchdog timeout 171 * @max_event_log_size: size of event log buffer size for ucode event logging 172 * @shadow_reg_enable: HW shadow register support 173 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command 174 * is in flight. This is due to a HW bug in 7260, 3160 and 7265. 175 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled. 176 * @max_tfd_queue_size: max number of entries in tfd queue. 177 */ 178 struct iwl_base_params { 179 unsigned int wd_timeout; 180 181 u16 eeprom_size; 182 u16 max_event_log_size; 183 184 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */ 185 shadow_ram_support:1, 186 shadow_reg_enable:1, 187 pcie_l1_allowed:1, 188 apmg_wake_up_wa:1, 189 scd_chain_ext_wa:1; 190 191 u16 num_of_queues; /* def: HW dependent */ 192 u32 max_tfd_queue_size; /* def: HW dependent */ 193 194 u8 max_ll_items; 195 u8 led_compensation; 196 }; 197 198 /* 199 * @stbc: support Tx STBC and 1*SS Rx STBC 200 * @ldpc: support Tx/Rx with LDPC 201 * @use_rts_for_aggregation: use rts/cts protection for HT traffic 202 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40 203 */ 204 struct iwl_ht_params { 205 u8 ht_greenfield_support:1, 206 stbc:1, 207 ldpc:1, 208 use_rts_for_aggregation:1; 209 u8 ht40_bands; 210 }; 211 212 /* 213 * Tx-backoff threshold 214 * @temperature: The threshold in Celsius 215 * @backoff: The tx-backoff in uSec 216 */ 217 struct iwl_tt_tx_backoff { 218 s32 temperature; 219 u32 backoff; 220 }; 221 222 #define TT_TX_BACKOFF_SIZE 6 223 224 /** 225 * struct iwl_tt_params - thermal throttling parameters 226 * @ct_kill_entry: CT Kill entry threshold 227 * @ct_kill_exit: CT Kill exit threshold 228 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs 229 * to checks whether to exit CT Kill. 230 * @dynamic_smps_entry: Dynamic SMPS entry threshold 231 * @dynamic_smps_exit: Dynamic SMPS exit threshold 232 * @tx_protection_entry: TX protection entry threshold 233 * @tx_protection_exit: TX protection exit threshold 234 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order. 235 * @support_ct_kill: Support CT Kill? 236 * @support_dynamic_smps: Support dynamic SMPS? 237 * @support_tx_protection: Support tx protection? 238 * @support_tx_backoff: Support tx-backoff? 239 */ 240 struct iwl_tt_params { 241 u32 ct_kill_entry; 242 u32 ct_kill_exit; 243 u32 ct_kill_duration; 244 u32 dynamic_smps_entry; 245 u32 dynamic_smps_exit; 246 u32 tx_protection_entry; 247 u32 tx_protection_exit; 248 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE]; 249 u8 support_ct_kill:1, 250 support_dynamic_smps:1, 251 support_tx_protection:1, 252 support_tx_backoff:1; 253 }; 254 255 /* 256 * information on how to parse the EEPROM 257 */ 258 #define EEPROM_REG_BAND_1_CHANNELS 0x08 259 #define EEPROM_REG_BAND_2_CHANNELS 0x26 260 #define EEPROM_REG_BAND_3_CHANNELS 0x42 261 #define EEPROM_REG_BAND_4_CHANNELS 0x5C 262 #define EEPROM_REG_BAND_5_CHANNELS 0x74 263 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82 264 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92 265 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80 266 #define EEPROM_REGULATORY_BAND_NO_HT40 0 267 268 /* lower blocks contain EEPROM image and calibration data */ 269 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */ 270 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */ 271 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */ 272 273 struct iwl_eeprom_params { 274 const u8 regulatory_bands[7]; 275 bool enhanced_txpower; 276 }; 277 278 /* Tx-backoff power threshold 279 * @pwr: The power limit in mw 280 * @backoff: The tx-backoff in uSec 281 */ 282 struct iwl_pwr_tx_backoff { 283 u32 pwr; 284 u32 backoff; 285 }; 286 287 /** 288 * struct iwl_csr_params 289 * 290 * @flag_sw_reset: reset the device 291 * @flag_mac_clock_ready: 292 * Indicates MAC (ucode processor, etc.) is powered up and can run. 293 * Internal resources are accessible. 294 * NOTE: This does not indicate that the processor is actually running. 295 * NOTE: This does not indicate that device has completed 296 * init or post-power-down restore of internal SRAM memory. 297 * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that 298 * SRAM is restored and uCode is in normal operation mode. 299 * This note is relevant only for pre 5xxx devices. 300 * NOTE: After device reset, this bit remains "0" until host sets 301 * INIT_DONE 302 * @flag_init_done: Host sets this to put device into fully operational 303 * D0 power mode. Host resets this after SW_RESET to put device into 304 * low power mode. 305 * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup, 306 * to allow host access to device-internal resources. Host must wait for 307 * mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device 308 * registers. 309 * @flag_val_mac_access_en: mac access is enabled 310 * @flag_master_dis: disable master 311 * @flag_stop_master: stop master 312 * @addr_sw_reset: address for resetting the device 313 * @mac_addr0_otp: first part of MAC address from OTP 314 * @mac_addr1_otp: second part of MAC address from OTP 315 * @mac_addr0_strap: first part of MAC address from strap 316 * @mac_addr1_strap: second part of MAC address from strap 317 */ 318 struct iwl_csr_params { 319 u8 flag_sw_reset; 320 u8 flag_mac_clock_ready; 321 u8 flag_init_done; 322 u8 flag_mac_access_req; 323 u8 flag_val_mac_access_en; 324 u8 flag_master_dis; 325 u8 flag_stop_master; 326 u8 addr_sw_reset; 327 u32 mac_addr0_otp; 328 u32 mac_addr1_otp; 329 u32 mac_addr0_strap; 330 u32 mac_addr1_strap; 331 }; 332 333 /** 334 * struct iwl_cfg_trans - information needed to start the trans 335 * 336 * These values cannot be changed when multiple configs are used for a 337 * single PCI ID, because they are needed before the HW REV or RFID 338 * can be read. 339 * 340 * @base_params: pointer to basic parameters 341 * @csr: csr flags and addresses that are different across devices 342 * @device_family: the device family 343 * @umac_prph_offset: offset to add to UMAC periphery address 344 * @rf_id: need to read rf_id to determine the firmware image 345 * @use_tfh: use TFH 346 * @gen2: 22000 and on transport operation 347 * @mq_rx_supported: multi-queue rx support 348 */ 349 struct iwl_cfg_trans_params { 350 const struct iwl_base_params *base_params; 351 const struct iwl_csr_params *csr; 352 enum iwl_device_family device_family; 353 u32 umac_prph_offset; 354 u32 rf_id:1, 355 use_tfh:1, 356 gen2:1, 357 mq_rx_supported:1, 358 bisr_workaround:1; 359 }; 360 361 /** 362 * struct iwl_fw_mon_reg - FW monitor register info 363 * @addr: register address 364 * @mask: register mask 365 */ 366 struct iwl_fw_mon_reg { 367 u32 addr; 368 u32 mask; 369 }; 370 371 /** 372 * struct iwl_fw_mon_regs - FW monitor registers 373 * @write_ptr: write pointer register 374 * @cycle_cnt: cycle count register 375 * @cur_frag: current fragment in use 376 */ 377 struct iwl_fw_mon_regs { 378 struct iwl_fw_mon_reg write_ptr; 379 struct iwl_fw_mon_reg cycle_cnt; 380 struct iwl_fw_mon_reg cur_frag; 381 }; 382 383 /** 384 * struct iwl_cfg 385 * @trans: the trans-specific configuration part 386 * @name: Official name of the device 387 * @fw_name_pre: Firmware filename prefix. The api version and extension 388 * (.ucode) will be added to filename before loading from disk. The 389 * filename is constructed as fw_name_pre<api>.ucode. 390 * @ucode_api_max: Highest version of uCode API supported by driver. 391 * @ucode_api_min: Lowest version of uCode API supported by driver. 392 * @max_inst_size: The maximal length of the fw inst section (only DVM) 393 * @max_data_size: The maximal length of the fw data section (only DVM) 394 * @valid_tx_ant: valid transmit antenna 395 * @valid_rx_ant: valid receive antenna 396 * @non_shared_ant: the antenna that is for WiFi only 397 * @nvm_ver: NVM version 398 * @nvm_calib_ver: NVM calibration version 399 * @lib: pointer to the lib ops 400 * @ht_params: point to ht parameters 401 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) 402 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 403 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity 404 * @internal_wimax_coex: internal wifi/wimax combo device 405 * @high_temp: Is this NIC is designated to be in high temperature. 406 * @host_interrupt_operation_mode: device needs host interrupt operation 407 * mode set 408 * @nvm_hw_section_num: the ID of the HW NVM section 409 * @mac_addr_from_csr: read HW address from CSR registers 410 * @features: hw features, any combination of feature_whitelist 411 * @pwr_tx_backoffs: translation table between power limits and backoffs 412 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response 413 * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the 414 * station can receive in HT 415 * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the 416 * station can receive in VHT 417 * @dccm_offset: offset from which DCCM begins 418 * @dccm_len: length of DCCM (including runtime stack CCM) 419 * @dccm2_offset: offset from which the second DCCM begins 420 * @dccm2_len: length of the second DCCM 421 * @smem_offset: offset from which the SMEM begins 422 * @smem_len: the length of SMEM 423 * @vht_mu_mimo_supported: VHT MU-MIMO support 424 * @integrated: discrete or integrated 425 * @cdb: CDB support 426 * @nvm_type: see &enum iwl_nvm_type 427 * @d3_debug_data_base_addr: base address where D3 debug data is stored 428 * @d3_debug_data_length: length of the D3 debug data 429 * @bisr_workaround: BISR hardware workaround (for 22260 series devices) 430 * @min_txq_size: minimum number of slots required in a TX queue 431 * @uhb_supported: ultra high band channels supported 432 * @min_256_ba_txq_size: minimum number of slots required in a TX queue which 433 * supports 256 BA aggregation 434 * 435 * We enable the driver to be backward compatible wrt. hardware features. 436 * API differences in uCode shouldn't be handled here but through TLVs 437 * and/or the uCode API version instead. 438 */ 439 struct iwl_cfg { 440 struct iwl_cfg_trans_params trans; 441 /* params specific to an individual device within a device family */ 442 const char *name; 443 const char *fw_name_pre; 444 /* params likely to change within a device family */ 445 const struct iwl_ht_params *ht_params; 446 const struct iwl_eeprom_params *eeprom_params; 447 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; 448 const char *default_nvm_file_C_step; 449 const struct iwl_tt_params *thermal_params; 450 enum iwl_led_mode led_mode; 451 enum iwl_nvm_type nvm_type; 452 u32 max_data_size; 453 u32 max_inst_size; 454 netdev_features_t features; 455 u32 dccm_offset; 456 u32 dccm_len; 457 u32 dccm2_offset; 458 u32 dccm2_len; 459 u32 smem_offset; 460 u32 smem_len; 461 u32 soc_latency; 462 u16 nvm_ver; 463 u16 nvm_calib_ver; 464 u32 rx_with_siso_diversity:1, 465 tx_with_siso_diversity:1, 466 bt_shared_single_ant:1, 467 internal_wimax_coex:1, 468 host_interrupt_operation_mode:1, 469 high_temp:1, 470 mac_addr_from_csr:1, 471 lp_xtal_workaround:1, 472 disable_dummy_notification:1, 473 apmg_not_supported:1, 474 vht_mu_mimo_supported:1, 475 integrated:1, 476 cdb:1, 477 dbgc_supported:1, 478 uhb_supported:1; 479 u8 valid_tx_ant; 480 u8 valid_rx_ant; 481 u8 non_shared_ant; 482 u8 nvm_hw_section_num; 483 u8 max_tx_agg_size; 484 u8 max_ht_ampdu_exponent; 485 u8 max_vht_ampdu_exponent; 486 u8 ucode_api_max; 487 u8 ucode_api_min; 488 u32 min_umac_error_event_table; 489 u32 extra_phy_cfg_flags; 490 u32 d3_debug_data_base_addr; 491 u32 d3_debug_data_length; 492 u32 min_txq_size; 493 u32 gp2_reg_addr; 494 u32 min_256_ba_txq_size; 495 const struct iwl_fw_mon_regs mon_dram_regs; 496 const struct iwl_fw_mon_regs mon_smem_regs; 497 }; 498 499 extern const struct iwl_csr_params iwl_csr_v1; 500 extern const struct iwl_csr_params iwl_csr_v2; 501 502 /* 503 * This list declares the config structures for all devices. 504 */ 505 #if IS_ENABLED(CONFIG_IWLDVM) 506 extern const struct iwl_cfg iwl5300_agn_cfg; 507 extern const struct iwl_cfg iwl5100_agn_cfg; 508 extern const struct iwl_cfg iwl5350_agn_cfg; 509 extern const struct iwl_cfg iwl5100_bgn_cfg; 510 extern const struct iwl_cfg iwl5100_abg_cfg; 511 extern const struct iwl_cfg iwl5150_agn_cfg; 512 extern const struct iwl_cfg iwl5150_abg_cfg; 513 extern const struct iwl_cfg iwl6005_2agn_cfg; 514 extern const struct iwl_cfg iwl6005_2abg_cfg; 515 extern const struct iwl_cfg iwl6005_2bg_cfg; 516 extern const struct iwl_cfg iwl6005_2agn_sff_cfg; 517 extern const struct iwl_cfg iwl6005_2agn_d_cfg; 518 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg; 519 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg; 520 extern const struct iwl_cfg iwl1030_bgn_cfg; 521 extern const struct iwl_cfg iwl1030_bg_cfg; 522 extern const struct iwl_cfg iwl6030_2agn_cfg; 523 extern const struct iwl_cfg iwl6030_2abg_cfg; 524 extern const struct iwl_cfg iwl6030_2bgn_cfg; 525 extern const struct iwl_cfg iwl6030_2bg_cfg; 526 extern const struct iwl_cfg iwl6000i_2agn_cfg; 527 extern const struct iwl_cfg iwl6000i_2abg_cfg; 528 extern const struct iwl_cfg iwl6000i_2bg_cfg; 529 extern const struct iwl_cfg iwl6000_3agn_cfg; 530 extern const struct iwl_cfg iwl6050_2agn_cfg; 531 extern const struct iwl_cfg iwl6050_2abg_cfg; 532 extern const struct iwl_cfg iwl6150_bgn_cfg; 533 extern const struct iwl_cfg iwl6150_bg_cfg; 534 extern const struct iwl_cfg iwl1000_bgn_cfg; 535 extern const struct iwl_cfg iwl1000_bg_cfg; 536 extern const struct iwl_cfg iwl100_bgn_cfg; 537 extern const struct iwl_cfg iwl100_bg_cfg; 538 extern const struct iwl_cfg iwl130_bgn_cfg; 539 extern const struct iwl_cfg iwl130_bg_cfg; 540 extern const struct iwl_cfg iwl2000_2bgn_cfg; 541 extern const struct iwl_cfg iwl2000_2bgn_d_cfg; 542 extern const struct iwl_cfg iwl2030_2bgn_cfg; 543 extern const struct iwl_cfg iwl6035_2agn_cfg; 544 extern const struct iwl_cfg iwl6035_2agn_sff_cfg; 545 extern const struct iwl_cfg iwl105_bgn_cfg; 546 extern const struct iwl_cfg iwl105_bgn_d_cfg; 547 extern const struct iwl_cfg iwl135_bgn_cfg; 548 #endif /* CONFIG_IWLDVM */ 549 #if IS_ENABLED(CONFIG_IWLMVM) 550 extern const struct iwl_cfg iwl7260_2ac_cfg; 551 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp; 552 extern const struct iwl_cfg iwl7260_2n_cfg; 553 extern const struct iwl_cfg iwl7260_n_cfg; 554 extern const struct iwl_cfg iwl3160_2ac_cfg; 555 extern const struct iwl_cfg iwl3160_2n_cfg; 556 extern const struct iwl_cfg iwl3160_n_cfg; 557 extern const struct iwl_cfg iwl3165_2ac_cfg; 558 extern const struct iwl_cfg iwl3168_2ac_cfg; 559 extern const struct iwl_cfg iwl7265_2ac_cfg; 560 extern const struct iwl_cfg iwl7265_2n_cfg; 561 extern const struct iwl_cfg iwl7265_n_cfg; 562 extern const struct iwl_cfg iwl7265d_2ac_cfg; 563 extern const struct iwl_cfg iwl7265d_2n_cfg; 564 extern const struct iwl_cfg iwl7265d_n_cfg; 565 extern const struct iwl_cfg iwl8260_2n_cfg; 566 extern const struct iwl_cfg iwl8260_2ac_cfg; 567 extern const struct iwl_cfg iwl8265_2ac_cfg; 568 extern const struct iwl_cfg iwl8275_2ac_cfg; 569 extern const struct iwl_cfg iwl4165_2ac_cfg; 570 extern const struct iwl_cfg iwl9160_2ac_cfg; 571 extern const struct iwl_cfg iwl9260_2ac_cfg; 572 extern const struct iwl_cfg iwl9260_2ac_160_cfg; 573 extern const struct iwl_cfg iwl9260_killer_2ac_cfg; 574 extern const struct iwl_cfg iwl9270_2ac_cfg; 575 extern const struct iwl_cfg iwl9460_2ac_cfg; 576 extern const struct iwl_cfg iwl9560_2ac_cfg; 577 extern const struct iwl_cfg iwl9560_2ac_cfg_quz_a0_jf_b0_soc; 578 extern const struct iwl_cfg iwl9560_2ac_160_cfg; 579 extern const struct iwl_cfg iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc; 580 extern const struct iwl_cfg iwl9460_2ac_cfg_soc; 581 extern const struct iwl_cfg iwl9461_2ac_cfg_soc; 582 extern const struct iwl_cfg iwl9461_2ac_cfg_quz_a0_jf_b0_soc; 583 extern const struct iwl_cfg iwl9462_2ac_cfg_soc; 584 extern const struct iwl_cfg iwl9462_2ac_cfg_quz_a0_jf_b0_soc; 585 extern const struct iwl_cfg iwl9560_2ac_cfg_soc; 586 extern const struct iwl_cfg iwl9560_2ac_160_cfg_soc; 587 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc; 588 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc; 589 extern const struct iwl_cfg iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc; 590 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc; 591 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk; 592 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk; 593 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk; 594 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk; 595 extern const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk; 596 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk; 597 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk; 598 extern const struct iwl_cfg iwl22000_2ac_cfg_hr; 599 extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb; 600 extern const struct iwl_cfg iwl22000_2ac_cfg_jf; 601 extern const struct iwl_cfg iwl_ax101_cfg_qu_hr; 602 extern const struct iwl_cfg iwl_ax101_cfg_qu_c0_hr_b0; 603 extern const struct iwl_cfg iwl_ax101_cfg_quz_hr; 604 extern const struct iwl_cfg iwl22000_2ax_cfg_hr; 605 extern const struct iwl_cfg iwl_ax200_cfg_cc; 606 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr; 607 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr; 608 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0; 609 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr; 610 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr; 611 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr; 612 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0; 613 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0; 614 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0; 615 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0; 616 extern const struct iwl_cfg killer1650x_2ax_cfg; 617 extern const struct iwl_cfg killer1650w_2ax_cfg; 618 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0; 619 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_b0_jf_b0; 620 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_b0_jf_b0; 621 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_b0_jf_b0; 622 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_c0_jf_b0; 623 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_c0_jf_b0; 624 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_c0_jf_b0; 625 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_c0_jf_b0; 626 extern const struct iwl_cfg killer1550i_2ac_cfg_qu_b0_jf_b0; 627 extern const struct iwl_cfg killer1550s_2ac_cfg_qu_b0_jf_b0; 628 extern const struct iwl_cfg iwl22000_2ax_cfg_jf; 629 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0; 630 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0_f0; 631 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0; 632 extern const struct iwl_cfg iwl9560_2ac_cfg_qnj_jf_b0; 633 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0; 634 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0; 635 extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0; 636 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0; 637 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0; 638 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0; 639 #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */ 640 641 #endif /* __IWL_CONFIG_H__ */ 642